CN112147449A - A load state detection circuit and electronic device - Google Patents
A load state detection circuit and electronic device Download PDFInfo
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Abstract
Description
技术领域technical field
本发明实施例涉及负载状态检测技术领域,尤其涉及一种负载状态检测电路和电子设备。Embodiments of the present invention relate to the technical field of load state detection, and in particular, to a load state detection circuit and an electronic device.
背景技术Background technique
目前电子设备应用广泛,电子设备的智能化要求越来越高,设备功能中对于对外接口的检测和保护也越来越重要。电子设备的对外接口用于外接负载,但经常存在错接问题,例如短路等故障,造成电子设备的损坏,更严重的可能会对用户造成人员伤害。在汽车电子领域,存在国标和企业标准双重要求,需要对设备的对外接口做电性能试验,同时还需要保证设备不能损坏,因而对于对外接口的保护要求更高。At present, electronic equipment is widely used, and the intelligent requirements of electronic equipment are getting higher and higher, and the detection and protection of external interfaces in equipment functions are becoming more and more important. The external interface of electronic equipment is used for external load, but there are often misconnection problems, such as short circuit and other faults, which cause damage to electronic equipment, and may cause personal injury to users more seriously. In the field of automotive electronics, there are dual requirements of national standards and enterprise standards. It is necessary to conduct electrical performance tests on the external interface of the equipment, and at the same time, it is necessary to ensure that the equipment cannot be damaged, so the protection requirements for the external interface are higher.
现阶段已采取各种措施应用于电子设备对外接口的防错接,例如接插件防呆、保险丝、大功率TVS(Transient Voltage Suppressor,瞬态二极管)、电容隔离、有源钳位等,但是上述防错接方法均存在一定的问题。例如:接插件防呆无法对单个接口引脚进行保护;自恢复保险丝和大功率TVS价格高体积大,存在寄生电容影响音频信号等的传输;电容隔离只适用于交流信号,且会对信号造成畸变;有源钳位在设备未通电情况下错接容易损坏电路板。At this stage, various measures have been taken to prevent misconnection of external interfaces of electronic equipment, such as foolproof connectors, fuses, high-power TVS (Transient Voltage Suppressor, transient diodes), capacitive isolation, active clamps, etc., but the above There are certain problems in the anti-misconnection method. For example: the foolproof connector cannot protect a single interface pin; the self-recovery fuse and high-power TVS are expensive and bulky, and there are parasitic capacitances that affect the transmission of audio signals, etc.; capacitive isolation is only suitable for AC signals, and will cause signal damage. Distortion; Active clamps can easily damage the circuit board when the device is not powered on.
发明内容SUMMARY OF THE INVENTION
本发明提供一种负载状态检测电路和电子设备,解决了现有技术中无法在保证设备不损坏的前提下对电子设备的对外接口状态进行检测的技术问题,实现了既能保护电子设备不损坏,又能准确、高效的实时在线检测电子设备对外接口状态,且体积小、成本低的技术效果。The invention provides a load state detection circuit and an electronic device, which solves the technical problem in the prior art that the external interface state of the electronic device cannot be detected on the premise of ensuring that the device is not damaged, and realizes that both the electronic device can be protected from damage. , and can accurately and efficiently detect the external interface status of electronic equipment online in real time, and has the technical effect of small size and low cost.
本发明实施例提供了一种负载状态检测电路,应用于电子设备,所述检测电路包括控制单元、电压检测单元、恒流源、开关控制单元以及负载通断单元;An embodiment of the present invention provides a load state detection circuit, which is applied to electronic equipment, and the detection circuit includes a control unit, a voltage detection unit, a constant current source, a switch control unit, and a load on-off unit;
所述电压检测单元与所述电子设备的对外接口以及所述控制单元电连接,用于检测所述对外接口处的电压,并将检测值输出至所述控制单元;The voltage detection unit is electrically connected with the external interface of the electronic device and the control unit, and is used for detecting the voltage at the external interface and outputting the detected value to the control unit;
所述恒流源与所述对外接口电连接,所述恒流源用于开启后向所述对外接口提供恒定电流;The constant current source is electrically connected to the external interface, and the constant current source is used to provide constant current to the external interface after being turned on;
所述负载通断单元连接于所述电子设备的内部电路和所述对外接口之间,所述负载通断单元用于根据控制信号将所述内部电路与所述对外接口之间连接或断开;The load on-off unit is connected between the internal circuit of the electronic device and the external interface, and the load on-off unit is used to connect or disconnect the internal circuit and the external interface according to a control signal ;
所述控制单元通过所述开关控制单元连接所述恒流源以及所述负载通断单元,用于通过所述开关控制单元控制所述恒流源以及所述负载通断单元工作。The control unit is connected to the constant current source and the load on-off unit through the switch control unit, so as to control the operation of the constant current source and the load on-off unit through the switch control unit.
进一步地,所述恒流源包括第一电源、第一电阻、第二电阻、第一三极管、第二三极管以及第一二极管;Further, the constant current source includes a first power supply, a first resistor, a second resistor, a first transistor, a second transistor and a first diode;
所述第一电阻的第一端与所述第一电源电连接,所述第一电阻的第二端与所述第一三极管的基极电连接;所述第一三极管的发射极与所述第一电源电连接,所述第一三极管的集电极与所述第二电阻的第一端电连接;所述第二电阻的第二端与所述开关控制单元电连接;The first end of the first resistor is electrically connected to the first power supply, and the second end of the first resistor is electrically connected to the base of the first triode; the emission of the first triode The electrode is electrically connected to the first power supply, the collector of the first transistor is electrically connected to the first end of the second resistor; the second end of the second resistor is electrically connected to the switch control unit ;
所述第二三极管的发射极与所述第一电阻的第二端电连接,所述第二三极管的基极与所述第二电阻的第一端电连接,所述第二三极管的集电极与所述第一二极管的正极电连接,所述第一二极管的负极与所述对外接口电连接。The emitter of the second triode is electrically connected to the second end of the first resistor, the base of the second triode is electrically connected to the first end of the second resistor, and the second The collector of the triode is electrically connected to the anode of the first diode, and the cathode of the first diode is electrically connected to the external interface.
进一步地,所述开关控制单元包括第一开关管、第二开关管、第三开关管、第二二极管以及第三二极管;Further, the switch control unit includes a first switch tube, a second switch tube, a third switch tube, a second diode and a third diode;
所述第一开关管的控制端与所述控制单元电连接,所述第一开关管的第一端与所述恒流源电连接,所述第一开关管的第二端接地;The control end of the first switch tube is electrically connected to the control unit, the first end of the first switch tube is electrically connected to the constant current source, and the second end of the first switch tube is grounded;
所述第二开关管的控制端与所述控制单元电连接,所述第二开关管的第一端与所述对外接口的负极电连接,所述第二开关管的第二端接地;The control end of the second switch tube is electrically connected to the control unit, the first end of the second switch tube is electrically connected to the negative electrode of the external interface, and the second end of the second switch tube is grounded;
所述第三开关管的控制端与所述控制单元电连接,所述第三开关管的第一端与所述负载通断单元电连接,所述第三开关管的第二端接地;The control end of the third switch tube is electrically connected to the control unit, the first end of the third switch tube is electrically connected to the load switching unit, and the second end of the third switch tube is grounded;
所述第二二极管的负极、所述第三二极管的负极均与所述第三开关管的控制端电连接,所述第二二极管的正极与所述对外接口的正极电连接,所述第三二极管的正极与所述对外接口的负极电连接。The cathode of the second diode and the cathode of the third diode are both electrically connected to the control terminal of the third switch tube, and the anode of the second diode is electrically connected to the anode of the external interface. connected, the anode of the third diode is electrically connected to the cathode of the external interface.
进一步地,所述开关控制单元还包括第四二极管、第三电阻、第四电阻以及第五电阻;Further, the switch control unit further includes a fourth diode, a third resistor, a fourth resistor and a fifth resistor;
所述第四二极管的正极与所述控制单元电连接,所述第四二极管的负极与所述第三开关管的控制端电连接;The anode of the fourth diode is electrically connected to the control unit, and the cathode of the fourth diode is electrically connected to the control terminal of the third switch tube;
所述第三电阻的第一端与所述恒流源电连接,所述第三电阻的第二端与所述对外接口的正极电连接;The first end of the third resistor is electrically connected to the constant current source, and the second end of the third resistor is electrically connected to the positive electrode of the external interface;
所述第四电阻的第一端与所述第二开关管的第一端电连接,所述第四电阻的第二端与所述对外接口的负极电连接;The first end of the fourth resistor is electrically connected to the first end of the second switch tube, and the second end of the fourth resistor is electrically connected to the negative electrode of the external interface;
所述第五电阻的第一端与所述第三开关管的控制端电连接,所述第五电阻的第二端分别与所述第二二极管的负极、所述第三二极管的负极电连接。The first end of the fifth resistor is electrically connected to the control end of the third switch tube, and the second end of the fifth resistor is respectively connected to the cathode of the second diode and the third diode negative electrical connection.
进一步地,所述负载通断单元包括第二电源、第六电阻、第七电阻、第三三极管、第四三极管、第五三极管、第一场效应管、第二场效应管、第三场效应管以及第四场效应管;Further, the load on-off unit includes a second power supply, a sixth resistor, a seventh resistor, a third transistor, a fourth transistor, a fifth transistor, a first field effect transistor, and a second field effect transistor. tube, the third field effect tube and the fourth field effect tube;
所述第六电阻的第一端、所述第七电阻的第一端均与所述第二电源电连接,所述第六电阻的第二端与所述第三三极管的集电极电连接,所述第七电阻的第二端与所述第四三极管的基极电连接;The first end of the sixth resistor and the first end of the seventh resistor are both electrically connected to the second power supply, and the second end of the sixth resistor is electrically connected to the collector of the third transistor. connected, the second end of the seventh resistor is electrically connected to the base of the fourth transistor;
所述第三三极管的发射极与所述第四三极管的发射极电连接,所述第四三极管的集电极与所述第一场效应管的源极、所述第二场效应管的源极电连接;The emitter of the third triode is electrically connected to the emitter of the fourth triode, the collector of the fourth triode is connected to the source of the first field effect transistor, the second The source electrode of the FET is electrically connected;
所述第五三极管的基极与所述第七电阻的第二端电连接,所述第五三极管的发射极与所述第三三极管的发射极电连接,所述第五三极管的集电极与所述第三场效应管的源极、所述第四场效应管的源极电连接;The base of the fifth transistor is electrically connected to the second end of the seventh resistor, the emitter of the fifth transistor is electrically connected to the emitter of the third transistor, and the third transistor is electrically connected. The collector of the five triode is electrically connected to the source of the third field effect transistor and the source of the fourth field effect transistor;
所述第一场效应管的栅极、所述第二场效应管的栅极均与所述第四三极管的发射极电连接,所述第一场效应管的漏极与输入接口的负极电连接,所述第二场效应管的漏极与所述对外接口的负极电连接;The gate of the first field effect transistor and the gate of the second field effect transistor are both electrically connected to the emitter of the fourth triode, and the drain of the first field effect transistor is connected to the input interface. The negative electrode is electrically connected, and the drain electrode of the second field effect transistor is electrically connected to the negative electrode of the external interface;
所述第三场效应管的栅极、所述第四场效应管的栅极均与所述第五三极管的发射极电连接,所述第三场效应管的漏极与输入接口的正极电连接,所述第四场效应管的漏极与所述对外接口的正极电连接。The gate of the third field effect transistor and the gate of the fourth field effect transistor are all electrically connected to the emitter of the fifth triode, and the drain of the third field effect transistor is connected to the input interface. The positive electrode is electrically connected, and the drain electrode of the fourth field effect transistor is electrically connected to the positive electrode of the external interface.
进一步地,所述负载通断单元还包括第一稳压管和第二稳压管;Further, the load on-off unit further includes a first voltage regulator tube and a second voltage regulator tube;
所述第一稳压管的负极与所述第一场效应管的栅极、所述第二场效应管的栅极电连接,所述第一稳压管的正极与所述第一场效应管的源极、所述第二场效应管的源极电连接;The negative electrode of the first voltage regulator is electrically connected to the grid of the first field effect transistor and the grid of the second field effect transistor, and the positive electrode of the first voltage regulator is connected to the first field effect transistor. the source of the tube and the source of the second field effect tube are electrically connected;
所述第二稳压管的负极与所述第三场效应管的栅极、所述第四场效应管的栅极电连接,所述第二稳压管的正极与所述第三场效应管的源极、所述第四场效应管的源极电连接。The negative electrode of the second voltage regulator is electrically connected to the grid of the third field effect transistor and the grid of the fourth field effect transistor, and the positive electrode of the second voltage regulator is electrically connected to the third field effect transistor The source of the tube and the source of the fourth field effect tube are electrically connected.
进一步地,所述电压检测单元包括第三电源、第四开关管和第五开关管;Further, the voltage detection unit includes a third power supply, a fourth switch tube and a fifth switch tube;
所述第四开关管的控制端、所述第五开关管的控制端均与所述第三电源电连接,所述第四开关管的第一端与所述对外接口的负极电连接,所述第四开关管的第二端与所述控制单元电连接,所述第五开关管的第一端与所述对外接口的正极电连接,所述第五开关管的第二端与所述控制单元电连接。The control terminal of the fourth switch tube and the control terminal of the fifth switch tube are both electrically connected to the third power supply, and the first end of the fourth switch tube is electrically connected to the negative pole of the external interface, so The second end of the fourth switch tube is electrically connected to the control unit, the first end of the fifth switch tube is electrically connected to the positive pole of the external interface, and the second end of the fifth switch tube is electrically connected to the The control unit is electrically connected.
进一步地,所述第一开关管包括第六三极管、第八电阻和第九电阻;所述第二开关管包括第七三极管、第十电阻和第十一电阻;所述第三开关管包括第八三极管、第十二电阻和第十三电阻;Further, the first switch tube includes a sixth transistor, an eighth resistor and a ninth resistor; the second switch tube includes a seventh transistor, a tenth resistor and an eleventh resistor; the third The switch tube includes an eighth transistor, a twelfth resistor and a thirteenth resistor;
所述第六三极管的集电极为所述第一开关管的第一端,所述第六三极管的发射极为所述第一开关管的第二端,所述第八电阻连接于所述第六三极管的发射极与基极之间,所述第九电阻的第一端与所述第六三极管的基极电连接,所述第九电阻的第二端为所述第一开关管的控制端;The collector of the sixth transistor is the first end of the first switch, the emitter of the sixth transistor is the second end of the first switch, and the eighth resistor is connected to Between the emitter and the base of the sixth triode, the first end of the ninth resistor is electrically connected to the base of the sixth triode, and the second end of the ninth resistor is the control end of the first switch tube;
所述第七三极管的集电极为所述第二开关管的第一端,所述第七三极管的发射极为所述第二开关管的第二端,所述第十电阻连接于所述第七三极管的发射极与基极之间,所述第十一电阻的第一端与所述第七三极管的基极电连接,所述第十一电阻的第二端为所述第二开关管的控制端;The collector of the seventh transistor is the first end of the second switch, the emitter of the seventh transistor is the second end of the second switch, and the tenth resistor is connected to Between the emitter and the base of the seventh triode, the first end of the eleventh resistor is electrically connected to the base of the seventh triode, and the second end of the eleventh resistor is electrically connected is the control end of the second switch tube;
所述第八三极管的集电极为所述第三开关管的第一端,所述第八三极管的发射极为所述第三开关管的第二端,所述第十二电阻连接于所述第八三极管的发射极与基极之间,所述第十三电阻的第一端与所述第八三极管的基极电连接,所述第十三电阻的第二端为所述第三开关管的控制端。The collector of the eighth transistor is the first end of the third switch tube, the emitter of the eighth transistor is the second end of the third switch tube, and the twelfth resistor is connected to Between the emitter and the base of the eighth transistor, the first end of the thirteenth resistor is electrically connected to the base of the eighth transistor, and the second end of the thirteenth resistor is electrically connected to the base of the eighth transistor. The terminal is the control terminal of the third switch tube.
进一步地,所述第四开关管包括第九三极管、第十四电阻和第十五电阻;所述第五开关管包括第十三极管、第十六电阻和第十七电阻;Further, the fourth switch tube includes a ninth transistor, a fourteenth resistor and a fifteenth resistor; the fifth switch tube includes a thirteenth transistor, a sixteenth resistor and a seventeenth resistor;
所述第九三极管的集电极为所述第四开关管的第一端,所述第九三极管的发射极为所述第四开关管的第二端,所述第十四电阻连接于所述第九三极管的发射极与基极之间,所述第十五电阻的第一端与所述第九三极管的基极电连接,所述第十五电阻的第二端为所述第四开关管的控制端;The collector of the ninth transistor is the first end of the fourth switch, the emitter of the ninth transistor is the second end of the fourth switch, and the fourteenth resistor is connected to Between the emitter and the base of the ninth transistor, the first end of the fifteenth resistor is electrically connected to the base of the ninth transistor, and the second end of the fifteenth resistor is electrically connected to the base of the ninth transistor. The terminal is the control terminal of the fourth switch tube;
所述第十三极管的集电极为所述第五开关管的第一端,所述第十三极管的发射极为所述第五开关管的第二端,所述第十六电阻连接于所述第十三极管的发射极与基极之间,所述第十七电阻的第一端与所述第十三极管的基极电连接,所述第十七电阻的第二端为所述第五开关管的控制端。The collector of the thirteenth tube is the first end of the fifth switch tube, the emitter of the thirteenth tube is the second end of the fifth switch tube, and the sixteenth resistor is connected to Between the emitter and the base of the thirteenth tube, the first end of the seventeenth resistor is electrically connected to the base of the thirteenth tube, and the second end of the seventeenth resistor is electrically connected to the base of the thirteenth tube. The terminal is the control terminal of the fifth switch tube.
本发明实施例还提供了一种电子设备,所述电子设备包括上述任一实施例所述的负载状态检测电路。An embodiment of the present invention further provides an electronic device, where the electronic device includes the load state detection circuit described in any of the foregoing embodiments.
本发明公开了一种负载状态检测电路和电子设备,检测电路包括控制单元、电压检测单元、恒流源、开关控制单元以及负载通断单元;电压检测单元用于检测对外接口处的电压,并将检测值输出至控制单元;恒流源用于开启后向对外接口提供恒定电流;负载通断单元用于根据控制信号将内部电路与对外接口之间连接或断开;控制单元用于通过开关控制单元控制恒流源以及负载通断单元工作。本申请解决了现有技术中无法在保证电子设备不损坏的前提下对电子设备的对外接口状态进行检测的技术问题,实现了既能保护电子设备不损坏,又能准确、高效的实时在线检测电子设备对外接口状态,且体积小、成本低的技术效果。The invention discloses a load state detection circuit and electronic equipment. The detection circuit includes a control unit, a voltage detection unit, a constant current source, a switch control unit and a load on-off unit; the voltage detection unit is used to detect the voltage at an external interface, and Output the detected value to the control unit; the constant current source is used to provide constant current to the external interface after being turned on; the load on-off unit is used to connect or disconnect the internal circuit and the external interface according to the control signal; the control unit is used to pass the switch The control unit controls the constant current source and the load on-off unit to work. The present application solves the technical problem in the prior art that the state of the external interface of the electronic device cannot be detected on the premise of ensuring that the electronic device is not damaged, and realizes the real-time online detection that can not only protect the electronic device from damage, but also is accurate and efficient. The external interface state of electronic equipment, and the technical effect of small size and low cost.
附图说明Description of drawings
图1是本发明实施例提供的一种负载状态检测电路的结构图;1 is a structural diagram of a load state detection circuit provided by an embodiment of the present invention;
图2是本发明实施例提供的一种负载状态检测电路的电路图;2 is a circuit diagram of a load state detection circuit provided by an embodiment of the present invention;
图3是本发明实施例提供的一种负载状态检测电路的工作流程图。FIG. 3 is a working flowchart of a load state detection circuit provided by an embodiment of the present invention.
具体实施方式Detailed ways
下面结合附图和实施例对本发明作进一步的详细说明。可以理解的是,此处所描述的具体实施例仅仅用于解释本发明,而非对本发明的限定。另外还需要说明的是,为了便于描述,附图中仅示出了与本发明相关的部分而非全部结构。The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, the drawings only show some but not all structures related to the present invention.
需要说明的是,本发明的说明书和权利要求书及附图中的术语“第一”、“第二”等是用于区别不同对象,而不是用于限定特定顺序。本发明下述各个实施例可以单独执行,各个实施例之间也可以相互结合执行,本发明实施例对此不作具体限制。It should be noted that the terms "first", "second" and the like in the description, claims and drawings of the present invention are used to distinguish different objects, rather than to limit a specific order. The following embodiments of the present invention may be implemented independently, or may be implemented in combination with each other, which are not specifically limited in the embodiments of the present invention.
图1是本发明实施例提供的一种负载状态检测电路的结构图。FIG. 1 is a structural diagram of a load state detection circuit provided by an embodiment of the present invention.
如图1所示,该负载状态检测电路应用于电子设备,包括控制单元10、电压检测单元20、恒流源30、开关控制单元40以及负载通断单元50。As shown in FIG. 1 , the load state detection circuit is applied to electronic equipment, including a
电压检测单元20与电子设备的对外接口60以及控制单元10电连接,用于检测对外接口60处的电压,并将检测值传送至控制单元10;恒流源30与对外接口60电连接,恒流源30用于开启后向对外接口60提供恒定电流;负载通断单元50连接于电子设备的内部电路和对外接口60之间,负载通断单元50用于根据控制信号将内部电路与对外接口60之间连接或断开;控制单元10通过开关控制单元40连接恒流源30以及负载通断单元50,用于通过开关控制单元40控制恒流源30以及负载通断单元50工作。The
具体地,电压检测单元20能够调理并获取对外接口60上的电压,并将获取到的电压值(即上述检测值)传输给控制单元10,以实现对外接口60上的电压检测;所谓“调理”,指的是电压检测单元20中设置有三极管和电源(即下述第四开关管中的三极管、第五开关管中的三极管和第三电源),三极管能够在对外接口60的电压过高时控制电压检测单元20向控制单元10输出的电压值不超过第三电源的电压值,从而实现对控制单元10的采集引脚的保护。Specifically, the
控制单元10能够对对外接口60进行使能控制,使得在检测开始时断开对外接口60与电子设备的内部电路的连接,以保护电子设备在对与对外接口60相连接的负载进行检测时不被损坏,控制单元10还能基于接收到的检测值判断对外接口60处的负载状态,如短路、断路、过压、过流以及正常状态等,控制单元10可以由单片机、CPU、PLC等构成,能够具备输出控制信号以及进行电压信号的ADC(Analog-to-Digital Converter,模/数转换器)检测功能;在控制单元10判断得到负载的状态之后,基于负载状态向开关控制单元40发送控制信号,并能够将判断得到的负载的状态信息上报至与控制单元10相连接的其他电子单元或显示屏(图1中未画出),以提醒用户存在错误以便及时更正。The
恒流源30用于向对外接口60处的负载提供恒定电流,在进行负载状态检测时,控制单元10会先通过负载通断单元50断开对外接口60和电子设备的内部电路的连接,由于设置了恒流源30,因此在与内部电路断开连接之后,负载上依然能够检测到电压值,即上述检测值,从而在对对外接口60进行检测时实现了对电子设备的保护。The constant
开关控制单元40负责转换过压反馈信号和控制单元10的发送的控制信号,即在对外接口60处的负载出现过压故障时能够基于接收到的控制信号控制负载通断单元50的导通和关断。负载通断单元50能够在负载状态正常情况下开启对外接口60与负载的连接,以及能够在负载出现过压故障时自动的执行将对外接口60与负载断开的动作,负载通断单元50还能够基于开关控制单元40的控制实现对负载的通断控制。The
在本发明实施例中,通过在对负载的状态进行检测时断开负载和电子设备内部电路的连接,使用恒流源施加在负载上,对连接负载的对外接口的电压信息进行分析,并判断得到负载的状态信息,从而实现了能够对该对外接口所连接的电子设备的内部电路进行保护,解决了现有技术中无法在保证电子设备不损坏的前提下对电子设备的对外接口状态进行检测的技术问题,实现了既能保护电子设备不损坏,又能准确、高效的实时在线检测电子设备对外接口状态,且体积小、成本低的技术效果。In the embodiment of the present invention, when the state of the load is detected, the connection between the load and the internal circuit of the electronic device is disconnected, and a constant current source is applied to the load to analyze the voltage information of the external interface connected to the load, and determine The state information of the load is obtained, so that the internal circuit of the electronic device connected to the external interface can be protected, and the state of the external interface of the electronic device cannot be detected under the premise of ensuring that the electronic device is not damaged in the prior art. It can not only protect the electronic equipment from damage, but also can accurately and efficiently detect the external interface status of the electronic equipment online in real time, and has the technical effect of small size and low cost.
图2是本发明实施例提供的一种负载状态检测电路的电路图。FIG. 2 is a circuit diagram of a load state detection circuit provided by an embodiment of the present invention.
可选地,如图2所示,恒流源30包括第一电源VCC1、第一电阻R1、第二电阻R2、第一三极管Q1、第二三极管Q2以及第一二极管D1。Optionally, as shown in FIG. 2 , the constant
第一电阻R1的第一端与第一电源VCC1电连接,第一电阻R1的第二端与第一三极管Q1的基极电连接;第一三极管Q1的发射极与第一电源VCC1电连接,第一三极管Q1的集电极与第二电阻R2的第一端电连接;第二电阻R2的第二端与开关控制单元40电连接。The first end of the first resistor R1 is electrically connected to the first power supply VCC1, the second end of the first resistor R1 is electrically connected to the base of the first transistor Q1; the emitter of the first transistor Q1 is electrically connected to the first power supply The VCC1 is electrically connected, the collector of the first transistor Q1 is electrically connected to the first terminal of the second resistor R2 ; the second terminal of the second resistor R2 is electrically connected to the
第二三极管Q2的发射极与第一电阻R1的第二端电连接,第二三极管Q2的基极与第二电阻R2的第一端电连接,第二三极管Q2的集电极与第一二极管D1的正极电连接,第一二极管D1的负极与对外接口60电连接。The emitter of the second transistor Q2 is electrically connected to the second end of the first resistor R1, the base of the second transistor Q2 is electrically connected to the first end of the second resistor R2, and the collector of the second transistor Q2 The electrode is electrically connected to the anode of the first diode D1 , and the cathode of the first diode D1 is electrically connected to the
具体地,恒流源30由第一电源VCC1经过第一电阻R1、第一三极管Q1、第二三极管Q2、第二电阻R2以及第一二极管D2组成示例性地,参见图2,以第一三极管Q1和第二三极管Q2为PNP型的三极管为例,由于第一三极管Q1的基极和发射极之间的压降大于约0.7V时会使得第二三极管Q2关断,从而实现恒流,恒流源30能够通过对外接口60向负载的正极提供约0.7/R1的恒流电流。Specifically, the constant
可选地,如图2所示,开关控制单元40包括第一开关管Q3、第二开关管Q4、第三开关管Q5、第二二极管D2以及第三二极管D3。Optionally, as shown in FIG. 2 , the
第一开关管Q3的控制端与控制单元10电连接,第一开关管Q3的第一端与恒流源30电连接,第一开关管Q3的第二端接地;第二开关管Q4的控制端与控制单元10电连接,第二开关管Q4的第一端与对外接口60的负极SPK_O_N电连接,第二开关管Q4的第二端接地;第三开关管Q5的控制端与控制单元10电连接,第三开关管Q5的第一端与负载通断单元50电连接,第三开关管Q5的第二端接地;第二二极管D2的负极、第三二极管D3的负极均与第三开关管Q5的控制端电连接,第二二极管D2的正极与对外接口60的正极SPK_O_P电连接,第三二极管D3的正极与对外接口60的负极SPK_O_N电连接。The control end of the first switch tube Q3 is electrically connected to the
可选地,如图2所示,第一开关管Q3包括第六三极管q1、第八电阻r1和第九电阻r2;第二开关管Q4包括第七三极管q2、第十电阻r3和第十一电阻r4;第三开关管包括第八三极管q3、第十二电阻r5和第十三电阻r6;Optionally, as shown in FIG. 2 , the first switch transistor Q3 includes a sixth transistor q1, an eighth resistor r1 and a ninth resistor r2; the second switch transistor Q4 includes a seventh transistor q2 and a tenth resistor r3 and the eleventh resistor r4; the third switch tube includes the eighth transistor q3, the twelfth resistor r5 and the thirteenth resistor r6;
第六三极管q1的集电极为第一开关管Q3的第一端,第六三极管q1的发射极为第一开关管Q3的第二端,第八电阻r1连接于第六三极管q1的发射极与基极之间,第九电阻r2的第一端与第六三极管q1的基极电连接,第九电阻r2的第二端为第一开关管Q3的控制端;The collector of the sixth transistor q1 is the first end of the first switch transistor Q3, the emitter of the sixth transistor q1 is the second end of the first switch transistor Q3, and the eighth resistor r1 is connected to the sixth transistor Between the emitter and the base of q1, the first end of the ninth resistor r2 is electrically connected to the base of the sixth transistor q1, and the second end of the ninth resistor r2 is the control end of the first switch tube Q3;
第七三极管q2的集电极为第二开关管Q4的第一端,第七三极管q2的发射极为第二开关管Q4的第二端,第十电阻r3连接于第七三极管q2的发射极与基极之间,第十一电阻r4的第一端与第七三极管q2的基极电连接,第十一电阻r4的第二端为第二开关管Q4的控制端;The collector of the seventh transistor q2 is the first end of the second switch transistor Q4, the emitter of the seventh transistor q2 is the second end of the second switch transistor Q4, and the tenth resistor r3 is connected to the seventh transistor Between the emitter and the base of q2, the first end of the eleventh resistor r4 is electrically connected to the base of the seventh transistor q2, and the second end of the eleventh resistor r4 is the control end of the second switch transistor Q4 ;
第八三极管q3的集电极为第三开关管Q5的第一端,第八三极管q3的发射极为第三开关管Q5的第二端,第十二电阻r5连接于第八三极管q3的发射极与基极之间,第十三电阻r6的第一端与第八三极管q3的基极电连接,第十三电阻r6的第二端为第三开关管的控制端。The collector of the eighth transistor q3 is the first end of the third switch tube Q5, the emitter of the eighth transistor q3 is the second end of the third switch tube Q5, and the twelfth resistor r5 is connected to the eighth transistor Between the emitter and the base of the tube q3, the first end of the thirteenth resistor r6 is electrically connected to the base of the eighth transistor q3, and the second end of the thirteenth resistor r6 is the control end of the third switch tube .
可选地,如图2所示,开关控制单元40还包括第四二极管D4、第三电阻R3、第四电阻R4以及第五电阻R5。Optionally, as shown in FIG. 2 , the
第四二极管D4的正极与控制单元10电连接,第四二极管D4的负极与第三开关管Q5的控制端电连接;第三电阻R3的第一端与恒流源30电连接,第三电阻R3的第二端与对外接口60的正极SPK_O_P电连接;第四电阻R4的第一端与第二开关管Q4的第一端电连接,第四电阻R4的第二端与对外接口60的负极SPK_O_N电连接;第五电阻R5的第一端与第三开关管Q5的控制端电连接,第五电阻R5的第二端分别与第二二极管D2的负极、第三二极管D3的负极电连接。The anode of the fourth diode D4 is electrically connected to the
示例性地,参见图2,当控制单元10的输出信号SPK_DET_EN设置为高电平时,第一开关管Q3、第二开关管Q4以及第三开关管Q5的集电极与发射极之间饱和导通,恒流源30经过第三电阻R3流向对外接口60正极SPK_O_P处的负载,然后经对外接口60的负极SPK_O_N处的负载以及第四电阻R4流经第二开关管Q4的集电极,并最终流入接地端GND。当对外接口60处出现过压故障时,第二二极管D2和第三二极管D3正向导通,并通过第五电阻R5使得第三开关管Q5的集电极和发射极导通,负载通断单元50中的第三三极管Q6截止,同时,负载通断单元50中的第四三极管Q7以及第五三极管Q8的集电极和发射极之间导通,使得负载通断单元50中的第一场效应管Q9、第二场效应管Q10、第三场效应管Q11以及第四场效应管Q12均关断,从而使得负载通断单元50关断,对外接口60与负载断开连接。2, when the output signal SPK_DET_EN of the
可选地,如图2所示,负载通断单元50包括第二电源VCC2、第六电阻R6、第七电阻R7、第三三极管Q6、第四三极管Q7、第五三极管Q8、第一场效应管Q9、第二场效应管Q10、第三场效应管Q11以及第四场效应管Q12。Optionally, as shown in FIG. 2 , the
第六电阻R6的第一端、第七电阻R7的第一端均与第二电源VCC2电连接,第六电阻R6的第二端与第三三极管Q6的集电极电连接,第七电阻R7的第二端与第四三极管Q7的基极电连接;第三三极管Q6的发射极与第四三极管Q7的发射极电连接,第四三极管Q7的集电极与第一场效应管Q9的源极、第二场效应管Q10的源极电连接。The first end of the sixth resistor R6 and the first end of the seventh resistor R7 are both electrically connected to the second power supply VCC2, the second end of the sixth resistor R6 is electrically connected to the collector of the third transistor Q6, and the seventh resistor The second end of R7 is electrically connected to the base of the fourth transistor Q7; the emitter of the third transistor Q6 is electrically connected to the emitter of the fourth transistor Q7, and the collector of the fourth transistor Q7 is electrically connected to The source of the first field effect transistor Q9 and the source of the second field effect transistor Q10 are electrically connected.
第五三极管Q8的基极与第七电阻的第二端电连接,第五三极管Q8的发射极与第三三极管Q6的发射极电连接,第五三极管Q8的集电极与第三场效应管Q11的源极、第四场效应管Q12的源极电连接。The base of the fifth transistor Q8 is electrically connected to the second end of the seventh resistor, the emitter of the fifth transistor Q8 is electrically connected to the emitter of the third transistor Q6, and the collector of the fifth transistor Q8 is electrically connected. The electrodes are electrically connected to the source of the third field effect transistor Q11 and the source of the fourth field effect transistor Q12.
第一场效应管Q9的栅极、第二场效应管Q10的栅极均与第四三极管Q7的发射极电连接,第一场效应管Q9的漏极与输入接口的负极SPK_N电连接,第二场效应管Q10的漏极与对外接口60的负极SPK_O_N电连接。The gate of the first field effect transistor Q9 and the gate of the second field effect transistor Q10 are both electrically connected to the emitter of the fourth transistor Q7, and the drain of the first field effect transistor Q9 is electrically connected to the negative electrode SPK_N of the input interface , the drain of the second field effect transistor Q10 is electrically connected to the negative electrode SPK_O_N of the
第三场效应管Q11的栅极、第四场效应管Q12的栅极均与第五三极管Q8的发射极电连接,第三场效应管Q11的漏极与输入接口的正极SPK_P电连接,第四场效应管Q12的漏极与对外接口60的正极SPK_O_P电连接。The gate of the third field effect transistor Q11 and the gate of the fourth field effect transistor Q12 are both electrically connected to the emitter of the fifth transistor Q8, and the drain of the third field effect transistor Q11 is electrically connected to the positive electrode SPK_P of the input interface , the drain of the fourth field effect transistor Q12 is electrically connected to the positive electrode SPK_O_P of the
具体地,第二电源VCC2经过第六电阻R6、第七电阻R7、第三三极管Q6以及第四三极管Q7组成的图腾柱驱动电路,能够驱动第一场效应管Q9、第二场效应管Q10的导通和关断,VCC1经过第六电阻R6、第七电阻R7、第三三极管Q6、第五三极管Q8组成的图腾柱驱动电路,能够驱动第三场效应管Q11、第四场效应管Q12的导通和关断;进而实现对外接口60同负载的连接与断开。Specifically, the second power supply VCC2 can drive the first field effect transistor Q9 and the second field effect transistor Q9 through the totem pole driving circuit composed of the sixth resistor R6, the seventh resistor R7, the third transistor Q6 and the fourth transistor Q7. When the effect transistor Q10 is turned on and off, VCC1 can drive the third field effect transistor Q11 through the totem pole drive circuit composed of the sixth resistor R6, the seventh resistor R7, the third transistor Q6, and the fifth transistor Q8. , the fourth field effect transistor Q12 is turned on and off; and the connection and disconnection of the
可选地,负载通断单元50还包括第一稳压管D5和第二稳压管D6;第一稳压管D5的负极与第一场效应管Q9的栅极、第二场效应管Q10的栅极电连接,第一稳压管D6的正极与第一场效应管Q9的源极、第二场效应管Q10的源极电连接;第二稳压管D6的负极与第三场效应管Q11的栅极、第四场效应管Q12的栅极电连接,第二稳压管D6的正极与第三场效应管Q11的源极、第四场效应管Q12的源极电连接。Optionally, the load on-off
具体地,第一稳压管D5用于使第一场效应管Q9、第二场效应管Q10的栅源极间电压不会过高,从而保护第一场效应管Q9和第二场效应管Q10不会由于过压而损坏;第二稳压管D6用于使第三场效应管Q11、第四场效应管Q12的栅源极间电压不会过高,从而保护第一场效应管Q11和第四场效应管Q12不会由于过压而损坏。Specifically, the first voltage regulator D5 is used to prevent the gate-source voltage of the first field effect transistor Q9 and the second field effect transistor Q10 from being too high, thereby protecting the first field effect transistor Q9 and the second field effect transistor Q10 will not be damaged due to overvoltage; the second voltage regulator D6 is used to prevent the gate-source voltage of the third field effect transistor Q11 and the fourth field effect transistor Q12 from being too high, thereby protecting the first field effect transistor Q11 and the fourth FET Q12 will not be damaged due to overvoltage.
可选地,如图2所示,电压检测单元20包括第三电源VCC3、第四开关管Q13和第五开关管Q14;第四开关管Q13的控制端、第五开关管Q14的控制端均与第三电源VCC3电连接,第四开关管Q13的第一端与对外接口60的负极SPK_O_N电连接,第四开关管Q13的第二端与控制单元10电连接,第五开关管Q14的第一端与对外接口60的正极SPK_O_P电连接,第五开关管Q14的第二端与控制单元10电连接。Optionally, as shown in FIG. 2 , the
可选地,第四开关管Q13包括第九三极管q4、第十四电阻r7和第十五电阻r8;第五开关管Q14包括第十三极管q5、第十六电阻r9和第十七电阻r10;Optionally, the fourth switch transistor Q13 includes a ninth transistor q4, a fourteenth resistor r7 and a fifteenth resistor r8; the fifth switch transistor Q14 includes a thirteenth transistor q5, a sixteenth resistor r9 and a tenth resistor Seven resistors r10;
第九三极管q4的集电极为第四开关管Q13的第一端,第九三极管q4的发射极为第四开关管Q13的第二端,第十四电阻r7连接于第九三极管q4的发射极与基极之间,第十五电阻r8的第一端与第九三极管q4的基极电连接,第十五电阻r8的第二端为第四开关管Q13的控制端。The collector of the ninth transistor q4 is the first end of the fourth switch transistor Q13, the emitter of the ninth transistor q4 is the second end of the fourth switch transistor Q13, and the fourteenth resistor r7 is connected to the ninth transistor Between the emitter and the base of the tube q4, the first end of the fifteenth resistor r8 is electrically connected to the base of the ninth transistor q4, and the second end of the fifteenth resistor r8 is controlled by the fourth switch tube Q13 end.
第十三极管q5的集电极为第五开关管Q14的第一端,第十三极管q5的发射极为第五开关管Q14的第二端,第十六电阻r9连接于第十三极管q5的发射极与基极之间,第十七电阻r10的第一端与第十三极管q5的基极电连接,第十七电阻r10的第二端为第五开关管Q14的控制端。The collector of the thirteenth transistor q5 is the first end of the fifth switch transistor Q14, the emitter of the thirteenth transistor q5 is the second end of the fifth switch transistor Q14, and the sixteenth resistor r9 is connected to the thirteenth pole Between the emitter and the base of the tube q5, the first end of the seventeenth resistor r10 is electrically connected to the base of the thirteenth tube q5, and the second end of the seventeenth resistor r10 is controlled by the fifth switch tube Q14 end.
具体地,第四开关管Q13的第二端与控制单元10的负极采样端SPK_ADC_N电连接,第五开关管Q14的第二端与控制单元10的正极采样端SPK_ADC_P电连接。电压检测单元20能够通过第四开关管Q13和第五开关管Q14中的三极管的控制实现控制单元10的正负两个采样端采集对外接口60的电压时不会由于对外接口60的电压过高而损坏,具体来说,当对外接口60处的电压过高时,第四开关管Q13和第五开关管Q14中的三极管截止,控制单元10的正负两个采样端所获取到的电压值最大为第三电源VCC3的值,当控制单元10获取到的电压值的大小为第三电源VCC3的电压值时,表明对外接口60处出现过压现象。Specifically, the second end of the fourth switch Q13 is electrically connected to the negative sampling terminal SPK_ADC_N of the
图3是本发明实施例提供的一种负载状态检测电路的工作流程图。FIG. 3 is a working flowchart of a load state detection circuit provided by an embodiment of the present invention.
下面以一个具体地实施例来对上述负载状态检测电路的工作过程做具体介绍。如图3所示,负载状态检测电路的工作过程包括如下步骤:The working process of the above-mentioned load state detection circuit will be described in detail below with a specific embodiment. As shown in Figure 3, the working process of the load state detection circuit includes the following steps:
步骤S301,检测对外接口是否处于过压,如判断结果为是,则执行步骤S302,否则执行步骤S303。In step S301, it is detected whether the external interface is under overvoltage, and if the determination result is yes, then step S302 is performed; otherwise, step S303 is performed.
步骤S302,负载通断单元50自动断开对外接口60与电子设备的内部电路的连接。In step S302, the load on-off
步骤S303,控制单元10断开对外接口60与电子设备的内部电路的连接。Step S303, the
步骤S304,开启电流源30。In step S304, the
步骤S305,电压检测单元20采集对外接口60的电压值(即上述检测值),并将采集到的电压值传送至控制单元10。Step S305 , the
步骤S306,控制单元10基于接收到的电压值判断对外接口60的状态。Step S306, the
具体地,参见图2,控制单元10中的IO输出控制端SPK_DET_EN设置为高电平时,(1)当负极采样端SPK_ADC_N采集到的电压值约为(0.7/R1)*R4+0.3,正极采样端SPK_ADC_P采集到的电压值约为(0.7/R1)*R40.3+(0.7/R1)*RL时,判断结果为负载处于正常状态,其中RL为负载的电阻;(2)当正极采样端SPK_ADC_P采集到的电压值等于负极采样端SPK_ADC_N采集到的电压值,且约为(0.7/R1)*R4+0.3时,判断结果为对外接口60的正极SPK_O_P和负极SPK_O_N接口上的负载短路;(3)正极当正极采样端SPK_ADC_P采集到的电压值约为VCC2-0.7-0.3-0.3,负极采样端SPK_ADC_N采集到的电压值为0V时,判断结果为对外接口60的正极SPK_O_P和负极SPK_O_N接口上的负载断开;(4)当正极采样端SPK_ADC_P采集到的电压值约为VCC3,负极采样端SPK_ADC_N采集到的电压值为0V时,判断结果为对外接口60的正极SPK_O_P接口对电源短路,负载断开;(5)当正极采样端SPK_ADC_P采集到的电压值约为VCC2-0.7-0.3-0.3,负极采样端SPK_ADC_N采集到的电压值为VCC3时,对外接口60的负极SPK_O_N接口对电源短路,负载断开。Specifically, referring to FIG. 2, when the IO output control terminal SPK_DET_EN in the
(6)当对外接口60的正极SPK_O_P或负极SPK_O_N接口对电源短路时,第二二极管D2和第三二极管D3正向导通,经过第五电阻R5驱动第三开关管Q5饱和导通,关断第一场效应管Q9、第二场效应管Q10、第三场效应管Q11、第四场效应管Q12,以保护电子设备的内部电路。同时,控制单元10的正极采样端SPK_ADC_P采集到的电压值或负极采样端SPK_ADC_N采集到的电压值约为VCC3,控制单元10将SPK_DET_EN信号设置为低电平,以关断第二开关管Q4,避免第四电阻R4和第二开关管Q4损坏。(6) When the positive SPK_O_P or negative SPK_O_N interface of the
(7)当对外接口60的正极SPK_O_P或负极SPK_O_N接口对地短路时,控制单元10的正极采样端SPK_ADC_P采集到的电压值等于负极采样端SPK_ADC_N采集到的电压值,且约为0V,此时控制单元10将SPK_DET_EN信号设置为高电平,关断第一场效应管Q9、第二场效应管Q10、第三场效应管Q11、第四场效应管Q12,以保护电子设备的内部电路。(7) When the positive SPK_O_P or negative SPK_O_N interface of the
步骤S307,控制单元10基于判断结果向开关控制单元40发送控制信号,以通过控制负载通断单元50实现对外接口60与负载之间的导通与断开,同时将判断结果上报至与控制单元10相连接的其他电子单元或显示屏,以提醒用户存在错误以便及时更正。Step S307, the
本发明实施例还提供了一种电子设备,电子设备包括上述任意实施例所述的负载状态检测电路。An embodiment of the present invention further provides an electronic device, where the electronic device includes the load state detection circuit described in any of the foregoing embodiments.
本发明实施例提供的电子设备包括上述实施例中的负载状态检测电路,因此本发明实施例提供的电子设备也具备上述实施例中所描述的有益效果,此处不再赘述。The electronic device provided by the embodiment of the present invention includes the load state detection circuit in the above-mentioned embodiment. Therefore, the electronic device provided by the embodiment of the present invention also has the beneficial effects described in the above-mentioned embodiment, which is not repeated here.
在本发明实施例的描述中,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通。对于本领域的普通技术人员而言,可以具体情况理解上述术语在本发明中的具体含义。In the description of the embodiments of the present invention, unless otherwise expressly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection, or It can be connected in one piece; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be internal communication between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood in specific situations.
最后应说明的是,上述仅为本发明的较佳实施例及所运用技术原理。本领域技术人员会理解,本发明不限于这里所述的特定实施例,对本领域技术人员来说能够进行各种明显的变化、重新调整和替代而不会脱离本发明的保护范围。因此,虽然通过以上实施例对本发明进行了较为详细的说明,但是本发明不仅仅限于以上实施例,在不脱离本发明构思的情况下,还可以包括更多其他等效实施例,而本发明的范围由所附的权利要求范围决定。Finally, it should be noted that the above are only the preferred embodiments of the present invention and the applied technical principles. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and can also include more other equivalent embodiments without departing from the concept of the present invention. The scope is determined by the scope of the appended claims.
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