CN112083961A - Boot Loading Method of Embedded Chip - Google Patents

Abstract

The invention relates to the field of integrated circuit chips, and discloses a boot loading method of an embedded chip. A ROM in the embedded chip is configured as: a first ROM for storing a configuration process of a register of the embedded chip; The second ROM of the boot flow of the user program of the type chip. The boot loading method includes: configuring the registers of the embedded chip based on the configuration data in the first one-time programmable memory and the configuration process in the first ROM; switching the embedded chip to test download mode; and in the test download mode, in response to an instruction pointer jumping from the first ROM to the second ROM, based on the configuration data in the second one-time programmable memory and the second ROM The boot flow of the corresponding user program is executed. The present invention can reduce the coupling of different process codes, and can more targetedly protect sensitive data from being arbitrarily read and written, thereby improving the security of the chip.

Description

Boot Loading Method of Embedded Chip

technical field

The present invention relates to an integrated circuit chip, in particular to a boot loading method of an embedded chip.

Background technique

In an embedded system, the loading and starting tasks of the entire system are completely completed by the BootLoader. For example, in most embedded systems, the system usually starts to execute from the address 0x00000000 when it is powered on or reset, and the BootLoader program of the system is usually arranged at this address.

Simply put, BootLoader is a small program that runs before the user program runs. Through this small program, you can initialize the hardware device and initialize the memory space, so as to bring the software and hardware environment of the system to a suitable state, so as to prepare the correct environment for the final call to the operating system kernel. Typically, BootLoader is implemented heavily relying on hardware, especially in the embedded world. Therefore, it is almost impossible to build a generic BootLoader in the embedded world. Nonetheless, some general things can be generalized about BootLoader to guide user-specific BootLoader design and implementation.

For example, in the power-on process of most chips, BootLoader completes the following tasks in sequence: (1) Initialize the RAM area used; (2) According to the configuration value of the one-time programmable memory area (one-time programmable module), the related CPU (3) irreversibly jump to the user area to execute the user program. If the security chip has higher requirements on its own security, it is often necessary to perform additional security checks on some key areas and key modules, such as adding a one-time programmable memory area between the above processes (1) and (2) The validity of the data is checked; between the processes (2) and (3), the safety self-check of the chip-specific modules (for example, the random number module, the sensor signal detection module, etc.) is added.

However, the BooLoadert program contains instructions related to the configuration process of registers, the self-checking process of the chip, the sample verification process and the user system process. The structure of these instruction codes is scattered and highly coupled, which can easily bring security risks to the chip system.

SUMMARY OF THE INVENTION

The purpose of the present invention is to overcome the defects in the prior art that the structure of each process code is scattered and the coupling is high, and provide a boot loading method of an embedded chip, which can reduce the coupling of different process codes, and can be more Targeted protection of sensitive data from being arbitrarily read and written, thereby improving the security of the chip.

In order to achieve the above object, one aspect of the present invention provides a method for boot loading an embedded chip, wherein the ROM in the embedded chip is configured to store a configuration flow of registers related to the embedded chip The first ROM of the embedded chip; and the second ROM for storing the boot flow of the user program on the embedded chip, correspondingly, the one-time programmable memory in the embedded chip is configured to: a first one-time programmable memory for configuration data related to the configuration process; and a second one-time programmable memory for storing configuration data related to the boot process of the user program, the boot loading method comprising: based on The configuration data in the first one-time programmable memory and the configuration process in the first ROM configure the registers of the embedded chip; switch the embedded chip to a test download mode; and in the test download mode, in response to the instruction pointer jumping from the first ROM to the second ROM, based on the configuration data in the second one-time programmable memory and the second ROM The boot flow of the corresponding user program is executed.

Preferably, the configuring the register of the embedded chip includes: judging the type of the process identifier in the first one-time programmable memory; the process identifier in the first one-time programmable memory In the case of a standard branch identification, verifying the correctness of the configuration data in the first one-time programmable memory; and in the case that the correctness of the configuration data passes the verification, verifying the register to configure.

Preferably, after the step of configuring the registers of the embedded chip is performed, the boot loading method further comprises: performing self-inspection on the corresponding function modules of the embedded chip according to the configured registers; When the corresponding function module passes the self-check, the step of switching the embedded chip to the test download mode is performed.

Preferably, the booting operation for executing the corresponding user program includes: judging the type of the process identifier in the second one-time programmable memory; and the process identifier in the second one-time programmable memory is: In the case of the user identification, in response to the instruction pointer jumping to the user area, the user program in the user area is executed.

Preferably, before executing the step of executing the user program in the user area, the bootstrapping operation of executing the corresponding user program further includes: setting the access mode of the second one-time programmable memory to a non-writable mode.

Preferably, the booting operation of executing the corresponding user program further includes: verifying the correctness of the configuration data in the second one-time programmable memory; If the correctness of the configuration data in the memory passes the verification, the step of judging the type of the process identifier in the second one-time programmable memory is performed.

Preferably, before executing the step of judging the type of the process identifier in the first one-time programmable memory, the configuring the registers of the embedded chip further includes: configuring the registers of the first ROM. The required RAM area is initialized; and before executing the step of verifying the correctness of the configuration data in the second one-time programmable memory, the booting operation of executing the corresponding user program also includes: The RAM area required for the second ROM is initialized.

Preferably, after performing the step of switching the embedded chip to the test download mode, the boot loading method further includes: setting the first ROM, the first one-time programmable memory and the The access mode of the configured registers is not writable.

Preferably, the security of the first ROM is higher than that of the second ROM.

Through the above technical solutions, the present invention creatively configures the ROM in the embedded chip as the first ROM for storing the configuration flow of the registers of the embedded chip; and the user program for storing the embedded chip The second ROM of the boot process, and according to the configuration data in the first one-time programmable memory and the configuration process, the registers of the embedded chip are configured, and then the embedded chip is switched to the test download state and in response to the instruction pointer jumping to the second ROM, according to the configuration data in the second one-time programmable memory and the boot process, the boot operation of the corresponding user program is performed. Therefore, the present invention can reduce the coupling of the process codes for realizing different functions, and can more specifically protect sensitive data from being arbitrarily read and written, thereby improving the security of the chip.

Other features and advantages of the present invention will be described in detail in the detailed description that follows.

Description of drawings

The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the specification, and together with the following specific embodiments, are used to explain the present invention, but do not constitute a limitation to the present invention. In the attached image:

1 is a flowchart of a boot loading method for an embedded chip provided by an embodiment of the present invention;

2 is a flowchart of configuring a register of the embedded chip provided by an embodiment of the present invention;

3 is a flowchart of a bootstrap operation for executing a corresponding user program provided by an embodiment of the present invention;

4 is a flowchart of a verification process of an embedded chip provided by an embodiment of the present invention;

5 is a flowchart of a method for boot loading an embedded chip provided by an embodiment of the present invention; and

FIG. 6 is a flowchart of a verification process and a boot loading process of an embedded chip provided by an embodiment of the present invention.

Detailed ways

The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to illustrate and explain the present invention, but not to limit the present invention.

Before introducing the specific embodiments, the design idea of the present invention is briefly introduced: considering that the configuration process of the register has a certain sensitivity, and the security requirements of the verification process of the chip are low, the register can be divided according to the security and relevance. The configuration and security detection are placed in the first ROM (for example, ROM1) with a higher security level, and the user program of the chip (in the test download mode, the user program can be written into the user area through the first test download instruction) ) into the second ROM (eg, ROM2). As a result, the coupling of codes in different processes can be reduced, and sensitive data can be protected from being arbitrarily read and written in a more targeted manner, thereby improving the security of the chip.

Specifically, the ROM in the embedded chip is configured as: a first ROM for storing a configuration flow of registers of the embedded chip; and a boot flow for storing a user program of the embedded chip The second ROM, correspondingly, the one-time programmable memory in the embedded chip is configured as: a first one-time programmable memory for storing configuration data related to the configuration process; and a first one-time programmable memory for storing A second one-time programmable memory for configuration data related to the boot flow of the user program.

FIG. 1 is a flowchart of a method for bootloading an embedded chip according to an embodiment of the present invention. As shown in FIG. 1 , the boot loading method of the embedded chip may include the following steps S101-S103.

Step S101 , configure the registers of the embedded chip based on the configuration data in the first one-time programmable memory and the configuration process in the first ROM.

For step S101, as shown in FIG. 2, the configuration of the registers of the embedded chip includes the following steps S201-S203.

Step S201, judging the type of the process identifier in the first one-time programmable memory.

The type of the process identification is related to the specific situation of the configuration data in the first one-time programmable (OTP) memory (eg, the configuration area OTP memory). Specifically, when the configuration area OTP memory has not been initialized, the process identification can be determined as a fast branch identification according to the specific situation of the default configuration data; when the configuration area OTP memory has been initialized, the flow The identification can be determined as a standard branch identification according to the specific situation of the corresponding configuration data.

It should be noted that, in order to ensure the initial state of program operation, before step S201 is executed, the configuring the registers of the embedded chip further includes: initializing the RAM area and stack space required by the first ROM . Specifically, in response to the embedded chip being powered on, initialization of the RAM area and stack space required for the embedded chip is performed from address 0 of ROM1, so as to ensure that the following sample verification process can be performed normally.

Step S202, in the case that the process identification in the first one-time programmable memory is a standard branch identification, determine whether the correctness check of the configuration data in the first one-time programmable memory is successful, if If successful, step S203 is executed; otherwise, the chip enters a silent state.

Since the data stored in the first one-time programmable (OTP) memory (for example, the configuration area OTP) is the key data for the operation of the ROM1, and the values of the key registers of the embedded chip are also read in through the configuration area memory, in order to ensure The correctness of the execution of the process related to the boot loading process is performed through step S202 to perform correctness verification of the configuration data. Specifically, in the case of writing the Cyclic Redundancy Check (CRC) value of the configuration data in advance, the correctness of the CRC value of the configuration data is checked.

Step S203, configure the register.

This step S203 can lay a foundation for the execution of the bootstrap operation of the user program in step S103, because the bootstrap operation can only be performed smoothly by using the configuration data of the register.

After step S203 is performed, the bootloading method may further include: performing a self-check on the corresponding function module of the embedded chip according to the configured register (that is, the security requirements of the chip to be configured in the register); and When the corresponding function module passes the self-check, the step of switching the embedded chip to the test download mode is performed.

Wherein, the corresponding functional module of the embedded chip may be an algorithm module, a random number module, or a sensor module or the like.

Step S102, switching the embedded chip to a test download mode.

At the same time, the instruction pointer can be set to jump from ROM1 to ROM2.

After step S102 is performed, the boot loading method may further include: setting the access mode of the first ROM, the first one-time programmable memory and the configured registers to a non-writable mode. Specifically, the ROM1, the configuration area OTP memory and the register can be set to an unwritable state through a dedicated first setting register. Thus, malicious modification to the ROM1, the configuration area OTP memory and the registers can be shielded, thereby improving the security of the system.

Step S103, in the test download mode, in response to the instruction pointer jumping from the first ROM to the second ROM, based on the configuration data in the second one-time programmable memory and the second ROM The boot process in the ROM executes the boot operation of the corresponding user program.

For step S103, as shown in FIG. 3, the bootstrap operation for executing the corresponding user program may include the following steps S301-S302.

Step S301, judging the type of the process identifier in the second one-time programmable memory.

Wherein, the process identifier in the second one-time programmable memory can be set by the second test download instruction in the test download mode.

Since the user flow also depends on the configuration data in the second one-time programmable (OTP) memory (for example, the user area OTP memory), in order to ensure the correctness of the execution of the user flow, before performing the step S301, The performing the corresponding user operation may further include: verifying the correctness of the configuration data in the second one-time programmable memory, and in the case that the correctness of the configuration data passes the verification, re-checking the correctness of the configuration data. Step S301 is executed. For example, when the cyclic redundancy check (CRC) value of the configuration data is written in advance, the correctness of the CRC value of the configuration data is checked.

Moreover, before performing the step of verifying the correctness of the configuration data in the second one-time programmable memory, the performing the corresponding user operation may further include: The RAM area and stack space are initialized.

Step S302, in the case that the process identifier in the second one-time programmable memory is the user identifier, jump to the user area in response to the instruction pointer, and execute the user program in the user area.

In response to the instruction pointer jumping to the user area, before executing the step of executing the user program in the user area, the access mode of the second one-time programmable memory may also be set to a non-writable mode. For example, the user area OTP memory can be set to a non-writable state through a dedicated second setting register, so that malicious modification to the user area OTP memory can be shielded, thereby improving the security of the system.

The above-mentioned boot loading process of the embedded chip is that the first one-time programmable memory (for example, the configuration area OTP memory) and the second one-time programmable memory (for example, the user area OTP memory) have been initialized by default. under the premise. Of course, the present invention can also use the configuration data related to the configuration process and the boot process of the user program obtained by the embedded chip verification method described below to initialize the configuration area OTP memory and the user area OTP memory respectively.

In the conventional bootloading process, the registers of the chip need to be configured first according to the configuration data in the one-time programmable (OTP) memory; then the registers need to be configured according to the configured registers (that is, the security requirements of the chip to be configured in the registers) The special module of the chip itself is carried out for safety self-inspection; finally, the sample verification of the chip is carried out if the self-inspection is successful. Some of the detection boundary values depend on the read-in of a certain data in the OTP memory. After the chip is fabricated, if a certain data in the OTP memory does not exist, it will cause the safety self-inspection to fail, and then the sample verification process cannot be entered. . This is because the sample verification process depends heavily on the configuration data in the OTP memory, and the sample verification process is complicated, so the sample verification process will be severely restricted and cannot be executed. In addition, due to the particularity of the chip's security self-inspection, problems are more likely to occur at this stage, resulting in failure to perform subsequent sample verification. In view of the above defects, the present invention adds a quick branch identification, which skips the configuration of the register and the safety self-check of the chip, and enters the sample verification instruction system according to the default configuration of the register, thereby helping the sample verification to improve work efficiency and increase the probability of discovering hidden problems.

Specifically, the sample verification process refers to verifying the functions in the embedded chip to determine whether it meets the design requirements, so as to prevent the configuration data in the configuration area OTP from being modified or deleted after being maliciously attacked, and then the configuration area OTP can be prevented from being modified or deleted. Correct and complete configuration data in memory ensures that user programs in subsequent user systems can run safely and properly. The boot flow of the user program refers to a flow for guiding the execution flow of the embedded chip into the user program in the user system. .

Specifically, taking the case where two ROMs (ROM1 and ROM2) are provided as an example, the verification process of the embedded chip (hereinafter referred to as the chip) is explained in detail, including the following steps S401-S408, as shown in FIG. 4 shown. Also, the process identifier in the second OTP storage (eg, the user area OTP storage) may be set as the verification identifier in advance.

Step S401, in response to the chip being powered on, initialize the RAM area and stack space required by the ROM1.

Step S402, judging the type of the process identifier in the OTP memory in the configuration area.

Step S403, in the case that the process identifier in the OTP memory in the configuration area is a fast branch identifier, perform initialization on the OTP memory in the user area.

Step S404, switching the chip to the test download mode.

At the same time, the instruction pointer can be set to jump from ROM1 to ROM2.

Step S405, in response to the instruction pointer jumping from ROM1 to ROM2, initialize the RAM area and stack space required by ROM2.

In step S406, it is judged whether the correctness check of the configuration data in the OTP memory of the user area is successful, if successful, step S407 is executed; otherwise, the chip enters a silent state.

Step S407, judging the type of the process identifier in the OTP memory in the user area.

Step S408, in the case that the process identifier in the user area OTP memory is the verification identifier, perform the verification process on the chip.

Under the condition that the verification is successful, the process identifier in the OTP memory of the user area can be set as the user identifier, so as to facilitate the execution of the boot loading process of the embedded chip.

The verification process of the above-mentioned chip firstly judges the type of the process identification in the first OTP memory, and performs initialization on the second one-time programmable memory when the process identification is a fast branch identification; then the embedded chip is switched to the test download mode ; Then in the test download mode, based on the configuration data and the verification process in the second one-time programmable memory, the verification process is performed on the embedded chip, so that the security self-inspection stage of the chip can be skipped and the sample verification process can be quickly entered, thereby Increase the testability of the chip.

Specifically, taking the case where two ROMs (ROM1 and ROM2) are provided as an example, the boot-loading process of the embedded chip (hereinafter referred to as the chip) is explained and described in detail, including the following steps S501-S513, as shown in the figure 5 shown. And, the process identifier in the second OTP storage (eg, the user area OTP storage) has been set as the user identifier in advance.

Step S501 , initialize the configuration area OTP memory and the user area OTP memory by using the configuration data obtained in the verification process of the chip.

Step S502, initialize the RAM area and stack space required by the ROM1.

Step S503, judging the type of the process identifier in the OTP memory in the configuration area.

Step S504, when the process identification in the configuration area OTP memory is a standard branch identification, determine whether the verification of the correctness of the configuration data in the configuration area OTP memory is successful, if successful, then execute step S505; otherwise, The chip goes silent.

Step S505, configure the registers of the chip according to the configuration data in the OTP memory in the configuration area.

In step S506, it is judged whether each self-checking identifier is valid, and if it is valid, step S607 is performed; otherwise, step S508 is performed.

In step S507, it is judged whether each self-checking process is successful. If successful, step S608 is executed; otherwise, the chip enters a silent state.

Step S508, switching the chip to the test download mode.

At the same time, the instruction pointer can be set to jump from ROM1 to ROM2.

Step S509, in response to the instruction pointer jumping from ROM1 to ROM2, initialize the RAM area and stack space required by ROM2.

In step S510, it is judged whether the verification of the correctness of the configuration data in the OTP memory of the user area is successful. If successful, step S511 is executed; otherwise, the chip enters a silent state.

Step S511, judging the type of the process identifier in the OTP memory in the user area.

Step S512, in the case that the process identifier in the user area OTP memory is a user identifier, set the access mode of the user area OTP memory to a non-writable mode.

Step S513, in response to the instruction pointer jumping to the user area, the user program in the user area is executed.

In practical applications, for an embedded chip, its configuration area OTP memory may or may not be initialized. In the case that the OTP memory in the configuration area has been initialized, it can be considered that the chip has completed the verification process, and it can be determined that the process in the OTP memory in the configuration area is identified as a standard process branch, and then the process of the standard process branch is executed to enter the user system; When the OTP memory in the configuration area may not be initialized, it can be determined that the process in the OTP memory in the configuration area is marked as a fast process branch, and then the verification process of the chip is executed through the process of the fast process branch, and then enters the user system through the process of the standard process branch. .

Specifically, taking the case where two ROMs (ROM1 and ROM2) are provided as an example, the boot loading process of the embedded chip (hereinafter referred to as the chip) is explained and described in detail, including the following steps S601-S615, as shown in the figure 6 shown.

Step S601, initialize the RAM area and stack space required by the ROM1.

Step S602, it is judged whether the process identifier in the OTP memory of the configuration area is a fast branch identifier, if so, step S603 is performed; otherwise, step S610 is performed.

Step S603, initialize the user area OTP memory.

At the same time, the process identifier in the OTP memory of the user area can be set as the verification identifier.

Step S604, switching the chip to the test download mode.

At the same time, the instruction pointer can be set to jump from ROM1 to ROM2.

Step S605, in response to the instruction pointer jumping from ROM1 to ROM2, initialize the RAM area and stack space required by ROM2.

In step S606, it is judged whether the verification of the correctness of the configuration data in the OTP memory of the user area is successful, if successful, step S707 is executed; otherwise, the chip enters a silent state.

In step S607, it is judged whether the process identifier in the OTP memory of the user area is a verification identifier, and if so, step S608 is performed; otherwise, step S614 is performed.

In step S608, the verification process is performed on the chip, and under the condition that the verification is successful, the process identifier in the OTP memory of the user area is set as the user identifier, and step S609 is performed.

In step S609, initialization is performed on the OTP memory in the configuration area and the OTP memory in the user area, and step S601 is performed.

After steps S601-S602, when it is determined that the process identifier in the OTP memory in the configuration area is not a fast branch identifier (ie, the process identifier is a standard branch identifier), step S610 is executed.

In step S610, it is judged whether the verification of the correctness of the configuration data in the OTP memory in the configuration area is successful. If successful, step S611 is executed; otherwise, the chip enters a silent state.

Step S611, configure the registers of the chip according to the configuration data in the OTP memory in the configuration area.

In step S612, it is judged whether each self-checking identifier is valid, and if it is valid, step S613 is performed; otherwise, step S604 is performed.

In step S613, it is judged whether each self-checking process is successful. If successful, step S604 is executed; otherwise, the chip enters a silent state.

After steps S604-S607, when it is determined that the process identifier in the OTP memory of the user area is not the verification identifier (ie, the process identifier is the user identifier), step S614 is executed.

Step S614, setting the access mode of the OTP memory in the user area to the non-writable mode.

Step S615, in response to the instruction pointer jumping to the user area, the user program in the user area is executed.

To sum up, the present invention creatively configures the ROM in the embedded chip as the first ROM for storing the configuration flow of the registers of the embedded chip; and the user program for storing the embedded chip The second ROM of the boot process, and according to the configuration data in the first one-time programmable memory and the configuration process, the registers of the embedded chip are configured, and then the embedded chip is switched to the test download state and in response to the instruction pointer jumping to the second ROM, according to the configuration data in the second one-time programmable memory and the boot process, the boot operation of the corresponding user program is performed. Therefore, the present invention can reduce the coupling of the process codes for realizing different functions, and can more specifically protect sensitive data from being arbitrarily read and written, thereby improving the security of the chip.

Correspondingly, an embodiment of the present invention further provides a machine-readable storage medium, where an instruction is stored on the machine-readable storage medium, and the instruction is used to cause a machine to execute the above-mentioned boot loading method of an embedded chip.

The machine-readable storage medium includes but is not limited to phase change memory (abbreviation for phase change random access memory, Phase Change Random Access Memory, PRAM, also known as RCM/PCRAM), static random access memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), Flash Memory, or other memory technology, compact disc read only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices, etc., various media that can store program code.

The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the specific details of the above-mentioned embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solutions of the present invention, These simple modifications all belong to the protection scope of the present invention.

In addition, it should be noted that each specific technical feature described in the above-mentioned specific implementation manner may be combined in any suitable manner under the circumstance that there is no contradiction. In order to avoid unnecessary repetition, the present invention will not further describe various possible combinations.

In addition, the various embodiments of the present invention can also be combined arbitrarily, as long as they do not violate the spirit of the present invention, they should also be regarded as the contents disclosed in the present invention.

Claims (10)

1. A boot loading method of an embedded chip, wherein a ROM within the embedded chip is configured to: a first ROM for storing a configuration flow regarding a register of the embedded chip; and a second ROM for storing a boot flow of a user program with respect to the embedded chip, and accordingly, the one-time programmable memory within the embedded chip is configured to: a first one-time programmable memory for storing configuration data relating to the configuration flow; and a second one-time programmable memory for storing configuration data relating to a boot flow of the user program, the boot loading method comprising:

configuring a register of the embedded chip based on configuration data in the first one-time programmable memory and the configuration process in the first ROM;

switching the embedded chip to a test downloading mode; and

and in the test downloading mode, responding to the jump of an instruction pointer from the first ROM to the second ROM, and executing the corresponding boot operation of the user program based on the configuration data in the second one-time programmable memory and the boot flow in the second ROM.

2. The boot loading method of the embedded chip according to claim 1, wherein the configuring the register of the embedded chip comprises:

judging the type of the process identifier in the first one-time programmable memory;

under the condition that the flow identification in the first one-time programmable memory is a standard branch identification, checking the correctness of the configuration data in the first one-time programmable memory; and

and configuring the register under the condition that the correctness of the configuration data passes the verification.

3. The boot loading method of the embedded chip according to claim 1, wherein after the step of configuring the register of the embedded chip is performed, the boot loading method further comprises:

self-checking the corresponding functional module of the embedded chip according to the configured register; and

and under the condition that the corresponding functional module passes the self-test, executing the step of switching the embedded chip to a test downloading mode.

4. The boot loading method of the embedded chip according to claim 1, wherein the executing the boot operation of the corresponding user program comprises:

judging the type of the process identifier in the second one-time programmable memory; and

and in the case that the flow identifier in the second one-time programmable memory is the user identifier, responding to the instruction pointer jumping to the user area, and executing the user program in the user area.

5. The boot loading method of the embedded chip according to claim 4, wherein before the step of executing the user program in the user area, the step of executing the corresponding user program further comprises: and setting the access mode of the second one-time programmable memory to be a non-writable mode.

6. The boot loading method of the embedded chip according to claim 4, wherein the executing the boot operation of the corresponding user program further comprises:

checking the correctness of the configuration data in the second one-time programmable memory; and

and under the condition that the correctness of the configuration data in the second one-time programmable memory passes the verification, executing the step of judging the type of the process identifier in the second one-time programmable memory.

7. The boot loading method of an embedded chip according to claim 6,

before the step of determining the type of the process identifier in the first otp memory is executed, the configuring the register of the embedded chip further includes: initializing a RAM area required by the first ROM; and

before the step of checking the correctness of the configuration data in the second otp memory is executed, the executing the boot operation of the corresponding user program further includes: initializing a RAM area required for the second ROM.

8. The boot loading method of the embedded chip according to claim 1, wherein after the step of switching the embedded chip to the test download mode is performed, the boot loading method further comprises: setting an access mode of the first ROM, the first one-time programmable memory, and the configured register to a non-writable mode.

9. The boot loading method of an embedded chip according to claim 1, wherein the first ROM is higher in security than the second ROM.

10. A machine-readable storage medium having stored thereon instructions for causing a machine to perform the method of bootloading an embedded chip according to any one of claims 1-9.

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