CN112019195A - Special integrated circuit based on bidirectional flyback equalizer circuit control signal generation - Google Patents
Special integrated circuit based on bidirectional flyback equalizer circuit control signal generation Download PDFInfo
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- CN112019195A CN112019195A CN202010884770.2A CN202010884770A CN112019195A CN 112019195 A CN112019195 A CN 112019195A CN 202010884770 A CN202010884770 A CN 202010884770A CN 112019195 A CN112019195 A CN 112019195A
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- 230000002457 bidirectional effect Effects 0.000 title claims abstract description 26
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 title abstract description 8
- 239000013078 crystal Substances 0.000 claims description 9
- 230000001360 synchronised effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004146 energy storage Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000000178 monomer Substances 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/08—Output circuits
- H03K21/10—Output circuits comprising logic circuits
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- Nonlinear Science (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The invention provides a special integrated circuit based on control signal generation of a bidirectional flyback equalizing circuit, which is used for a battery pack, wherein the battery pack comprises at least one single cell, the bidirectional flyback equalizing circuit comprises at least two MOSFETs and a transformer, the two ends of the transformer are respectively a primary side and a secondary side, the primary side, each single cell and one MOSFET are connected in series, and the secondary side and the other MOSFET are connected in parallel on one single cell; the application is used for providing control signals for double MOSFETs on two sides of a high-frequency transformer of a plurality of bidirectional flyback circuits on the same battery pack, so that the energy of the battery pack realizes bidirectional flow through the bidirectional flyback circuits.
Description
Technical Field
The invention belongs to the technical field of battery packs, and particularly relates to a special integrated circuit based on bidirectional flyback equalizer circuit control signal generation.
Background
The battery is ubiquitous in the current society, and is widely applied in the aspects of electric energy storage, traffic power and the like, so that convenience is brought to daily life of people, and the development of the society is promoted. However, in practical applications, some problems still remain to be solved, and the battery pack balancing problem is one of the problems. Because of the problems existing in the current battery production and manufacturing process, the differences of parameters such as internal resistance, terminal voltage and capacity must exist among the battery monomers, and the differences can cause the non-uniformity of the batteries when the batteries are used in groups, so the service life of the battery pack is greatly influenced if the battery pack is not managed.
The unidirectional flyback equalizing circuit has wide application in the field of active equalizing circuits of battery packs, but the freewheeling diode of the unidirectional flyback circuit only realizes unidirectional conduction and causes a lot of limitations to the field of equalizing of the battery packs, so that the bidirectional flow of energy can be realized by replacing the freewheeling diode with the MOSFET and combining the control method of the invention, and the unidirectional flyback equalizing circuit is better applied to the field of active equalizing of the battery packs. When the bidirectional flyback circuit is used for balancing one battery pack, a plurality of bidirectional flyback circuits are often used, so that a multi-channel control signal is also needed to control the bidirectional flyback circuits. In practical use, the requirement that the multi-channel control signal can adjust the frequency and the duty ratio in real time is met.
Disclosure of Invention
The invention aims to provide a special integrated circuit based on control signal generation of a bidirectional flyback equalizing circuit, and aims to solve the problems that a unidirectional flyback circuit cannot meet requirements when used in the field of battery pack equalization, and a bidirectional flyback circuit needs to meet multichannel control signals in the use process.
The invention provides the following technical scheme:
a special integrated circuit based on control signals of a bidirectional flyback equalizing circuit is used for a battery pack, the battery pack comprises at least one single cell, the bidirectional flyback equalizing circuit comprises at least two MOSFETs and a transformer, the two ends of the transformer are respectively a primary side and a secondary side, the primary side, each single cell and one MOSFET are connected in series, and the secondary side and the other MOSFET are connected in parallel to one single cell; the special integrated circuit comprises an address compiling part, a clock frequency dividing part and a control signal generating part, wherein the address compiling part comprises at least two decoders, the address compiling part is used for decoding, the decoded address words comprise seven bits, the fourth bit is input into a 4-16 decoder, the third bit is input into a 3-8 decoder, so that a plurality of paths of address decoding circuits are output, and the control signal generating circuits are used for gating corresponding channels, so that different duty ratios of different channel control signals are set; the clock frequency division part comprises a crystal oscillator and a latch, a crystal oscillator input signal clk is used as a reference clock, D0-D7 of the latch is set as a frequency division coefficient, the reference clock is counted after an enable signal is effective, the level is inverted when a count value reaches a preset frequency division coefficient, and the count value is cleared, so that the aim of adjusting the frequency of a control signal is fulfilled; the control signal generating part comprises a comparator, a counter and a latch, D0-D4 of the latch is set as a duty ratio coefficient, a clock signal output after the frequency division of the crystal oscillator signal is carried out by the clock frequency dividing part is input to the counter to carry out cycle counting, the output of the counter is compared with a preset duty ratio value of the comparator, when the output of the counter is smaller than the preset duty ratio value, the comparator outputs a high level, otherwise, the low level is output, and therefore duty ratio adjustment of the control signal is achieved.
Preferably, each channel is a synchronous signal based on the clock signal output by the clock frequency division part, the input frequency division coefficient and the duty ratio coefficient of each channel are latched by the internal latch of the application specific integrated circuit, corresponding parameters are provided for the clock frequency division part and the control signal generation part, and then the real-time adjustment of the frequency and the duty ratio of the control signal is realized, and the battery pack balance is realized.
The invention has the beneficial effects that:
the invention relates to a special integrated circuit based on control signal generation of a bidirectional flyback equalizing circuit, which can independently control MOSFETs on two sides of a primary side and a secondary side of a transformer of the bidirectional flyback circuit. If the on-off of the primary side MOSFET is controlled, energy can be transferred from the battery pack to the single battery; if the secondary side MOSFET is controlled to be switched on and off, energy can be transferred from the single battery to the battery pack. Therefore, the bidirectional flow of the energy of the flyback circuit is realized, and the speed and the efficiency of the flyback circuit applied to the field of battery equalization are further accelerated.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic diagram of the connection between a bidirectional flyback equalizer circuit and a battery pack according to the present invention;
FIG. 2 is a schematic diagram of the connection of the address compiling section according to the present invention;
FIG. 3 is a schematic diagram of the clock divider connection of the present invention;
fig. 4 is a schematic diagram of the connection of the control signal generating part of the present invention.
Detailed Description
As shown in fig. 1, the application specific integrated circuit based on the control signal of the bidirectional flyback equalizer circuit is used for a battery pack, and the battery pack comprises at least one single battery (battery 1, battery 2 … …, battery n); the bidirectional flyback equalizing circuit comprises at least two MOSFETs and a transformer, wherein the two ends of the transformer are respectively a primary side and a secondary side, the primary side, each single cell and the MOSFET M2 are connected in series, and the secondary side and the MOSFET M1 are connected to the single cell (the battery 3) in parallel.
The application specific integrated circuit includes an address compiling section, a clock dividing section, and a control signal generating section.
As shown in fig. 2, the address compiling section includes at least two decoders, the address compiling section is used for decoding, the decoded address word includes seven bits (A, B, C, D, E, F, G), wherein the fourth bit is inputted into the 4-16 decoder (74154), the third bit is inputted into the 3-8 decoder (74138), so as to output the address decoding circuit with 128 paths at most, the control signal generating circuit is used for gating the corresponding channel, thereby setting different duty ratios of different channel control signals, so that the duty ratios of different control signals can be set differently according to the requirements of actual conditions, and the variable conditions in actual use can be satisfied more.
As shown in fig. 3, the clock frequency division portion includes a crystal oscillator (CLKFP) and a latch (74373), the crystal oscillator input signal clk is used as a reference clock, D0-D7 of the latch is set as a frequency division coefficient, the reference clock is counted after the enable signal is valid, the level is inverted after the count value reaches a preset frequency division coefficient, and the count value is cleared, thereby achieving the purpose of adjusting the frequency of the control signal.
As shown in fig. 4, the control signal generating portion includes a comparator (MYCOMP), a counter (lpm _ counter0) and a latch (74373), D0-D4 of the latch are set as duty ratio coefficients, a clock signal output by the clock frequency dividing portion after frequency division of the crystal oscillator signal is input to the counter for cycle counting, the output of the counter is compared with a preset duty ratio value of the comparator, when the output of the counter is smaller than the preset duty ratio value, the comparator outputs a high level, otherwise, the comparator outputs a low level, and duty ratio adjustment of the control signal is achieved.
Specifically, each channel is a synchronous signal taking the clock signal output by the clock frequency division part as the standard, the input frequency division coefficient and the duty ratio coefficient of each channel are latched by the internal latch of the special integrated circuit, corresponding parameters are provided for the clock frequency division part and the control signal generation part, and then the real-time adjustment of the frequency and the duty ratio of the control signal is realized, and the battery pack balance is realized;
the application uses the special integrated circuit, and the output control signal is combined with the peripheral MOSFET drive circuit, so that the characteristics of high performance, small batch, high reliability and fast period of the bidirectional flyback circuit control circuit can be met.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (2)
1. A special integrated circuit based on the generation of control signals of a bidirectional flyback equalizing circuit is used for a battery pack, wherein the battery pack comprises at least one single cell and is characterized in that the bidirectional flyback equalizing circuit comprises at least two MOSFETs and a transformer, the two ends of the transformer are respectively a primary side and a secondary side, the primary side, each single cell and one MOSFET are connected in series, and the secondary side and the other MOSFET are connected in parallel on one single cell;
the special integrated circuit comprises an address compiling part, a clock frequency dividing part and a control signal generating part, wherein the address compiling part comprises at least two decoders, the address compiling part is used for decoding, the decoded address words comprise seven bits, the fourth bit is input into a 4-16 decoder, the third bit is input into a 3-8 decoder, so that a plurality of paths of address decoding circuits are output, and the control signal generating circuits are used for gating corresponding channels, so that different duty ratios of different channel control signals are set; the clock frequency division part comprises a crystal oscillator and a latch, a crystal oscillator input signal clk is used as a reference clock, D0-D7 of the latch is set as a frequency division coefficient, the reference clock is counted after an enable signal is effective, the level is inverted when a count value reaches a preset frequency division coefficient, and the count value is cleared, so that the aim of adjusting the frequency of a control signal is fulfilled; the control signal generating part comprises a comparator, a counter and a latch, D0-D4 of the latch is set as a duty ratio coefficient, a clock signal output after the frequency division of the crystal oscillator signal is carried out by the clock frequency dividing part is input to the counter to carry out cycle counting, the output of the counter is compared with a preset duty ratio value of the comparator, when the output of the counter is smaller than the preset duty ratio value, the comparator outputs a high level, otherwise, the low level is output, and therefore duty ratio adjustment of the control signal is achieved.
2. The special integrated circuit for generating the control signal based on the bidirectional flyback equalizer circuit as claimed in claim 1, wherein each channel is a synchronous signal based on the clock signal output by the clock frequency dividing part, the latch is implemented on the input frequency dividing coefficient and the duty ratio coefficient of each channel through the latch inside the special integrated circuit, corresponding parameters are provided for the clock frequency dividing part and the control signal generating part, and then real-time adjustment of the frequency and the duty ratio of the control signal is implemented, and battery pack equalization is implemented.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010884770.2A CN112019195A (en) | 2020-08-28 | 2020-08-28 | Special integrated circuit based on bidirectional flyback equalizer circuit control signal generation |
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| CN202010884770.2A CN112019195A (en) | 2020-08-28 | 2020-08-28 | Special integrated circuit based on bidirectional flyback equalizer circuit control signal generation |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114336872A (en) * | 2021-12-30 | 2022-04-12 | 东莞市达锂电子有限公司 | Lithium battery bidirectional active equalization circuit based on flyback circuit |
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|---|---|---|---|---|
| US5524035A (en) * | 1995-08-10 | 1996-06-04 | International Business Machines Corporation | Symmetric clock system for a data processing system including dynamically switchable frequency divider |
| CN1319788A (en) * | 2000-03-24 | 2001-10-31 | 日本电气株式会社 | Clock control circuit and method |
| US20020052071A1 (en) * | 2000-10-06 | 2002-05-02 | Bernhard Schaffer | Upscaled clock feeds memory to make parallel waves |
| US20160233852A1 (en) * | 2015-02-10 | 2016-08-11 | Inayat Ali | Programmable synchronous clock divider |
| CN111555394A (en) * | 2020-05-19 | 2020-08-18 | 西安交通大学 | Series battery pack balancing method based on bidirectional flyback balancing circuit |
-
2020
- 2020-08-28 CN CN202010884770.2A patent/CN112019195A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5524035A (en) * | 1995-08-10 | 1996-06-04 | International Business Machines Corporation | Symmetric clock system for a data processing system including dynamically switchable frequency divider |
| CN1319788A (en) * | 2000-03-24 | 2001-10-31 | 日本电气株式会社 | Clock control circuit and method |
| US20020052071A1 (en) * | 2000-10-06 | 2002-05-02 | Bernhard Schaffer | Upscaled clock feeds memory to make parallel waves |
| US20160233852A1 (en) * | 2015-02-10 | 2016-08-11 | Inayat Ali | Programmable synchronous clock divider |
| CN111555394A (en) * | 2020-05-19 | 2020-08-18 | 西安交通大学 | Series battery pack balancing method based on bidirectional flyback balancing circuit |
Non-Patent Citations (1)
| Title |
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| 王晓龙: "基于高速开关阀的气动高精度运动控制系统关键技术研究", 《中国优秀硕士学位论文全文数据库》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114336872A (en) * | 2021-12-30 | 2022-04-12 | 东莞市达锂电子有限公司 | Lithium battery bidirectional active equalization circuit based on flyback circuit |
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