CN112014708B - SiC power device online junction temperature calculation method based on FPGA - Google Patents
SiC power device online junction temperature calculation method based on FPGA Download PDFInfo
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Abstract
The invention belongs to the technical field of semiconductors, and particularly relates to an on-line junction temperature calculation method for a SiC power device based on an FPGA. The calculation method comprises the following steps: 1) Preprocessing the driving pulse signal and outputting a reconstruction signal; 2) Conducting zero-drift removal treatment on the conducting current; 3) Calculating the average power during the pulse conduction period; 4) Then, reproducing the delay signal; 5) And finally, the power loss pulse flow enters a junction temperature model to calculate the junction temperature of the power device. The invention is applied to various application occasions of SiC power devices, provides a processing method for calculating power consumption by taking a driving signal as a basis, provides an on-line dynamic zero drift removing method based on probability statistics, provides a power loss pulse stream construction method, provides a discretization model of a Foster equivalent thermal network model with minimum unit thermal resistance R and thermal capacity C connected in parallel, and further calculates junction temperature data consistent with actual fluctuation.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to an on-line junction temperature calculation method for a SiC power device based on an FPGA.
Background
Third-generation semiconductor materials, represented by silicon carbide (SiC), have advantages such as a large forbidden band width, a high breakdown electric field, a high thermal conductivity, a small switching loss, a high frequency, and a large power, and are considered as ideal semiconductor materials for high-voltage and high-frequency power devices.
With the application and popularization of the fault prediction and health management technology in various industries, the research on the fault prediction and health management of the SiC device in various application scenes gets more and more attention. According to literature research, the power loss and the junction temperature of the SiC power device are very important parameters, which are important for fault diagnosis, service life prediction and maintenance decision of products.
In the existing power consumption calculation method, one method is to calculate by taking a sine wave period as a calculation time length, one method is to calculate by taking a pulse period as a time length, and the other method is to calculate by taking a fixed time length. The three methods are all to calculate the average power consumption in a time period, and for calculating the junction temperature, the steady-state characteristics obtained by the several power consumption solving methods are consistent, the energy is the same, and the junction temperature is obtained by entering a junction temperature model in different ways. However, the average power consumption has small fluctuation, and the fluctuation generated by the actual power consumption cannot be reflected, more the steady-state characteristic is shown, and the fluctuation of the correspondingly calculated junction temperature is small. However, for the application occasions of junction temperature such as life prediction, the size of the junction temperature data fluctuation directly influences the life prediction result. Therefore, it is necessary to develop an algorithm conforming to the actual power consumption generation mode, that is, calculate the average power consumption of each switching device during the conduction period, and then enter a junction temperature calculation model in a pulse power consumption flow mode to solve the corresponding junction temperature.
The power loss calculation method directly adopts a simplified formula to carry out estimation and also adopts an integral calculation method. Parameters such as duty ratio and the like are needed in the calculation of the existing simplified formula, but the duty ratio is not a constant value, so the precision is low. The integral calculation method can capture the current and voltage changes in the operation process, and the calculation accuracy of the power consumption is relatively high. In the invention, an integral method is adopted to calculate the power loss.
In addition, the instantaneous on-off of the power device cannot be realized after the driving pulse acts on the power device, and an on-off process exist. If the driving pulse is used as the switching-on and switching-off basis without considering the switching-on and switching-off process, the current used for calculating the switching-on and switching-off losses in the calculation is inevitably inaccurate, the integral time period for calculating the on-state losses is also inaccurate, and the accuracy of the result is also influenced. The driving pulse is reasonably processed, and the current at the proper time is selected for power loss calculation, so that a more accurate power consumption calculation result can be obtained.
For actually acquired power device conduction current, zero drift inevitably exists due to unstable power supply voltage of acquisition equipment, component parameter change, temperature change and the like. Particularly, zero drift caused by temperature change, the temperature is changed continuously in the running process of the equipment, and static correction is difficult to carry out. If dynamic null shift identification can be carried out, the null shift contained in the collected data is removed, and more accurate conduction current of the power device is obtained, the method is very meaningful for accurately calculating the power loss and the junction temperature of the power device.
In practical application, the use frequency of power devices such as SiC may be very high, and a method for calculating power loss and junction temperature on line is relatively lacking.
Disclosure of Invention
The invention aims to provide an FPGA-based SiC power device online junction temperature calculation method, which solves the problems of online power consumption and junction temperature calculation of SiC devices in high-frequency application occasions.
The purpose of the invention is realized by the following technical scheme:
the SiC power device online junction temperature calculation method based on the FPGA is characterized by comprising the following steps of:
1) Preprocessing the driving pulse signal g and outputting a reconstructed pulse signal g1;
2) Conducting zero-drift removal treatment on the conducting current;
3) Calculating the average power loss during the pulse conduction period;
4) The delayed signal is reproduced to generate a power loss pulse stream;
5) And the power loss pulse flow enters a junction temperature model to calculate the junction temperature of the power device.
Further, the method for preprocessing the pulse signal g in the step 1) specifically comprises the following steps:
calculating the current time value u of the pulse signal g n And the value u at the previous time n-1 Difference u of n -u n-1 ;
When u is n -u n-1 The rising edge of =1 comes, the Ton is delayed, and the reconstructed pulse signal g1 output becomes 1;
when u is n -u n-1 The falling edge of =1 comes, with a delay Toff, and the reconstructed pulse signal g1 output becomes 0.
Further, conducting current in the step 2) to perform zero drift removal treatment comprises the following steps:
1) Initializing a conduction current I data queue;
2) Data updating, namely eliminating the head data of the current I data queue, sequentially moving the rear data forward by one bit, and adding the newly acquired current I into the tail of the queue;
3) Solving probability distribution of the I data queue, and taking the data with the maximum probability distribution as null shift data IZ;
4) Carrying out I-IZ processing on the current I acquired at the current moment, and taking the current I as the current input of the current power consumption calculation;
5) And continuing to execute the steps 2), 3) and 4) at the next sampling moment.
Further, the method for calculating the average power loss during the pulse conduction period in the step 3) comprises the following steps:
1) Calculating the value u1 of the reconstructed pulse signal g1 at the current moment n And the value u1 of the previous time n-1 The difference of (c): u1 n -u1 n-1 The difference is used for detecting the rising edge and the falling edge of the reconstructed pulse signal g1;
2) When u1 n -u1 n-1 =1, i.e. when the rising edge arrives, the following operations are started: calculating the turn-on loss Eon of the power device; (b) StoringThe time from the rising edge of the last pulse to the rising edge of the current pulse is the pulse period T, and then the timer is initialized to zero to restart timing; (c) Initializing the conduction loss Esal to zero and starting to accumulate a conduction loss value;
when u1 n -u1 n-1 =1, that is, when the falling edge arrives, the following operations need to be sequentially performed: storing a power device on-time T1; (b) calculating the turn-off loss Eoff of the power device; (c) the cumulative calculation of the conduction loss Esal is also stopped at this time; (d) Summing the energy generated in this on pulse, eon + Esal + Eoff;
further, the delay signal in step 4) is repeated to select the time for delaying a plurality of pulses, and the number of the pulses is determined by the ratio of the widest pulse period to the narrowest pulse period.
Further, the step 4) of the delay signal reproduction requiring data storage includes: the pulse period T, the device on-time T1, the average power loss P when the device is on, and then a power loss pulse stream equal to the pulse width is generated.
Further, the delay signal recurrence in step 4) is composed of two parallel parts, and the specific steps are as follows:
part one:
a) Calculating the value u1 of the reconstructed pulse signal g1 at the current moment n And the value u1 of the previous time n-1 Is u1 n -u1 n-1 ;
b) When u1 n -u1 n-1 1, namely when a rising edge arrives, inserting T, T1 and P of the finished pulse into the tail of the memory, and adding 1 to the length of the memory;
c) When u1 n -u1 n-1 Not equal to 1, i.e. not rising edge state, and continue to perform step a) at the next sampling.
And part two:
a) The reproduction function delays to trigger counting to start;
b) The recurrence function delay triggering counting pulse is equal to N, the recurrence function is triggered, and the flag is set to 1;
c) The Flag is 1, a group of T, T1 and P data which are stored earliest are read from the head of a memory queue, the length of the memory queue is reduced by 1, the data stored later are sequentially moved forward by an address, and then the Flag is set to 0;
d) After the flag is 0, subtracting the sampling time Ts from the T1 at each operation until the value of the T1 is 0, wherein the pulse output is P;
e) When the value of T1 is 0, starting to subtract the sampling time Ts from T-T1 until T-T1 is zero, wherein the pulse output is 0;
f) Setting flag to 1 after T-T1 is zero
g) And reading the next group of data at the next sampling moment, and repeating the steps c), d), e) and f).
Further, step 5) junction temperature calculation adopts a Foster equivalent thermal network model.
Further, the minimal unit of the Foster equivalent thermal network model: i.e., the discrete on-line calculation of the thermal resistance R and the parallel heat capacity C is realized by Tustin integration.
The invention provides an on-line power loss and junction temperature calculation method capable of adapting to high-frequency application occasions, provides a processing method for calculating power loss by taking a driving signal as a basis, and a method for removing dynamic zero drift of conduction current I based on data, provides a power loss pulse stream construction method, constructs a power loss pulse stream according with actual fluctuation, provides a discretization model of a Foster equivalent thermal network model with minimum unit thermal resistance R and thermal capacitance C connected in parallel, and further calculates junction temperature data consistent with the actual fluctuation; junction temperature data can be used as accurate input of the life prediction of the power device; junction temperature data can be used as reference data for maintenance decision, and junction temperature data can be used as reference data for fault prediction.
Drawings
FIG. 1 is a schematic diagram of an inverter circuit according to the present invention;
FIG. 2 is a diagram of the turn-on and turn-off process of the IGBT of the invention;
FIG. 3 is a schematic diagram of a power consumption pulse reproduction of the present invention;
FIG. 4 is a graphical representation of a parallel Xilinx model of the thermal resistance R and thermal capacitance C of the present invention;
FIG. 5 is a diagram of a Tustin integral Xilinx model of the present invention;
FIG. 6 is a junction temperature diagram of SIC _ IGBT and SIC _ FWD of the present invention;
FIG. 7 is a flow chart of SiC power loss and junction temperature calculation according to the present invention;
FIG. 8 is a flow chart of the average power calculation of the present invention;
FIG. 9 is a flow chart of the pulse signal preprocessing of the present invention;
FIG. 10 is a flowchart illustrating a delayed signal reproduction process according to the present invention;
FIG. 11 is a schematic diagram of a Foster equivalent thermal network model of the present invention;
FIG. 12 is a schematic view of the zero drift of the actual acquisition current of the present invention;
FIG. 13 is a flow chart of the zero drift of the actual acquisition current of the present invention.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings:
example 1
Referring to fig. 1, an example of power consumption calculation is an inverter circuit shown in fig. 1, the circuit has a symmetrical structure, and only the IGBT (Sic _ S1) and its anti-parallel diode (Sic _ D1) in the frame are taken as examples, the driving pulse signal g is a driving signal of the Sic _ S1, and the collected conduction current is a conduction current I in the direction indicated in the figure.
Referring to fig. 7 and 8, the online junction temperature calculation method for the SiC power device based on the FPGA specifically includes the following steps:
s1: preprocessing the pulse signal g and outputting a reconstructed pulse signal g1;
s2: carrying out zero drift removal treatment on the conduction current I;
s3: calculating the value u1 of the reconstructed pulse signal g1 at the current moment n And the value u1 of the previous time n-1 Has a difference of (u 1) n -u1 n-1 ) For detection of rising and falling edges of the reconstructed signal;
S4:(u1 n -u1 n-1 = 1), when the rising edge arrives, if the current I>0, when requiredCalculating the turn-on loss Eon of the SiC _ IGBT, recording the pulse period T, initializing a timer to be zero, starting timing, initializing the turn-on losses Esal _ IGBT and Esal _ FWD to be zero, and starting accumulating the turn-on loss value if I is out>If =0, then the accumulated value is Esal _ IGBT, if I<0 then accumulates as Esal _fwd (with the on current direction of S1 being positive). The conduction loss accumulation formula is as follows:
Ic=I,Esal_IGBT=∑Vce*Ic*Ts
If=I,Esal_FWD=∑|Vf|*|If|*Ts
wherein Ts is sampling time, and Eon, vce and Vf are all obtained by looking up a table through an IGBT data manual according to the current I.
S5:(u1 n -u1 n-1 = 1), when the falling edge arrives, the pulse on-width timer T1 is terminated, the calculation of the on-loss Esal is terminated, and the off-loss Eoff is calculated, if the current I is reached>Calculating Eoff _ IGBT if the current is I<0 calculates Eoff _ FWD, and the absolute value of the current (with the conducting current direction of S1 being the positive direction) is needed to calculate the diode Eoff _ FWD. After the turn-off loss Eoff calculation is completed, the total energy of the IGBTs is (Eon _ IGBT + Esal _ IGBT + Eoff _ IGBT) and the total energy of the FWD is (Esal _ FWD + Eoff _ FWD) by summing the energies generated in this on pulse.
Again, eoff was obtained from the Current lookup data Manual.
S6: the average power consumption P _ s (Eon _ IGBT + Esal _ IGBT + Eoff _ IGBT)/T1 of the IGBT is obtained, and the average power consumption P _ d (Esal _ FWD + Eoff _ FWD)/T1 of the FWD is obtained.
S7: and (4) reproducing the delay signal, storing the average power P, the conduction time T1 of the power device and the pulse period T of the power device, and delaying to generate a power loss pulse stream with the same pulse width.
S8: and the power loss pulse flow enters a junction temperature model to calculate the junction temperature of the power device.
The preprocessing of the driving signals mainly solves the problems of selecting the correct time point to calculate Eon and Eoff and calculating the Esal according to the driving pulse.
Referring to fig. 2: the actual curve between Vce and Ic after the drive pulse is applied to the power device. The turn-on and turn-off process of the driving pulse applied to the IGBT can be seen from the figure. After the rising edge of the driving pulse comes, the IGBT switching device is not turned on immediately, there is a time delay first, then the current Ic starts to rise, and the voltage Vce starts to fall at the same time until the voltage Vce falls to near zero, thereby completing the turn-on process. After the falling edge of the driving pulse comes, the IGBT switching device is not turned off immediately, there is a time delay first, then the voltage Vce starts to rise, and Ic starts to fall at the same time until Ic falls to near zero, and the turn-off process is completed.
The so-called turn-on loss and turn-off loss are the energy generated during the process of the current Ic and the voltage Vce reversely changing to reach the steady state. The definition of this process varies slightly from device vendor to device vendor, such as the infilling definition of the energy sum between 10% Ic and 2% Vce for the turn-on loss and 10% Vce to 2% Ic for the turn-off loss. Ton and Toff are measured according to the measurement conditions of Eon and Eoff in the device manual, for example, ton of an english flying refers to the time from the rising edge of a driving pulse to the time when the voltage Vce drops to 2%, and Toff refers to the time from the falling edge of the driving pulse to the time when the current Ic drops to 2%. Then, the rising edge and the falling edge of the driving pulse are respectively subjected to time delay processing of Ton and Toff, and the processed driving pulse can clearly distinguish the opening ending time, the opening time and the closing starting time of one pulse. Based on the Ic collected by the time node, a more accurate result can be obtained by calculating Eon and Eoff with reference to the data on the data manual.
Referring to fig. 9, the pulse signal preprocessing specifically includes the steps of: calculating the current time value u of the pulse signal g n And the value u at the previous moment n-1 Is a difference of u n -u n-1 The detection device is used for detecting the rising edge and the falling edge of the pulse signal g;
when (u) n -u n-1 ) When the value of (g) is equal to 1, delaying Ton, and changing the reconstructed pulse signal g1 output into 1;
when (u) n -u n-1 ) When the value of (d) is equal to-1, delaying Toff, and the reconstructed pulse signal g1 output becomes 0;
wherein Ton and Toff are respectively the on time and the off time.
For the null shift caused by temperature change, the continuous change in the operation process of the equipment can affect the accuracy of the collected conduction current, and further affect the accuracy of calculating power loss and junction temperature. If dynamic null shift identification can be carried out, the null shift contained in the collected data is removed, and more accurate conduction current of the power device is obtained, the method is very meaningful for accurately calculating the power loss and the junction temperature of the power device.
Fig. 12 is a graph showing a probability distribution (fig. 12 lower graph) of actually acquired power device on-current waveforms (fig. 12 upper graph) and data thereof. It can be seen from the above figure that the data has obvious negative drift, and the current data has the characteristic of alternating on and off. After the power device is turned off, theoretically, the current flowing through the power device is close to zero, if the current is not zero, zero drift exists, and the value is extracted to be the current zero drift value. The current time is selected from a section of historical current data with fixed length, and the zero drift value is determined by solving the maximum probability distribution point. The method can reduce the random error of the null shift value and dynamically update the current null shift value in real time. As can be seen from the lower graph, the probability distribution of the data in the upper graph has a larger peak on the left of the zero value, that is, the value occurs the most times, and corresponds to the current value measured at the time of turn-off, that is, the zero drift value.
Referring to fig. 13, the specific steps of the null shift processing are as follows:
initializing an on-current I data queue;
data updating, namely eliminating the head data of the I data queue, sequentially moving the rear data forward by one bit, and adding the latest acquired I into the tail of the queue;
carrying out probability distribution solving on the I data queue, and taking the data with the maximum probability distribution as null shift data IZ;
and (I-IZ) processing the I acquired at the current moment as the current input of the current power consumption calculation.
Considering the conditions of complex and changeable application occasions, different modulation modes, uncertain duty ratio and the like of the SiC device, the calculated average power loss P of the SiC device during the conduction period can enter a junction temperature calculation model through the reproduction of a delay signal.
Referring to fig. 3, the average power loss P calculated on line is calculated after each turn-on is completed, in the figure, the power consumption of the pulse (t 1-t 0) is calculated at the time t1, and the power consumption value is refreshed only when the power consumption value continues to the time t2 without processing, so that the average power loss P is input into the junction temperature model to inevitably obtain an erroneous junction temperature calculation result. Therefore, a link of time delay signal reconstruction is added, an average power loss pulse input junction temperature model consistent with the on-off time of the SiC device is constructed, and the time delay mainly plays a role in ensuring the continuity of the reconstructed power pulse signal.
The delay of the delayed power pulse recurrence function is mainly that when calculation is started, the time for delaying a plurality of pulses is usually selected, and the specific number N of the pulses is determined according to the ratio of the widest pulse period to the narrowest pulse period in an application scene, so that the situation that a recurrence signal is discontinuous due to the fact that the previous pulse is too narrow, the next pulse is wider, the previous pulse is completely repeated and the length data of the next pulse is not calculated can be avoided when the signal is repeated. The delay introduces a lag in the junction temperature calculation result, but for a thermal model, which is a large inertia object, the error introduced by the delay of several high-frequency pulses is extremely limited and can be ignored.
The delay signal reproduction needs to store three parameters of a pulse period T, device conduction time T1 and average power loss P when the device is conducted, then a power loss pulse stream equal to the pulse width is generated, and the stored data is the pulse data which is already stored when the pulse rises.
The length of the memory queue storing data is dynamically varied.
Referring to fig. 10, the delay signal reproduction implementation specific steps are as follows:
the newly stored set of data is always inserted into the tail of the memory queue, and the length of the memory is increased by 1.
Part one:
a) Calculating the value u1 of the reconstructed pulse signal g1 at the current moment n And the value u1 of the previous time n-1 Has a difference of (u 1) n -u1 n-1 );
b) When (u 1) n -u1 n-1 = 1), namely when the rising edge comes, inserting T, T1 and P of the finished pulse into the tail of the memory, and adding 1 to the length of the memory;
c) When (u 1) n -u1 n-1 Not equal to 1), i.e. not rising edge, and the next sampling continues with step a).
And part two:
a) The reproduction function delays to trigger counting to start;
b) The recurrence function delay triggering counting pulse is equal to N, the recurrence function is triggered, and the flag is set to 1;
c) The Flag is 1, a group of stored T, T1 and P data is read from the head of a memory queue, the length of the memory queue is reduced by 1, the data stored behind is sequentially moved forward by an address, and then the Flag is set to 0;
d) After the flag is 0, subtracting the sampling time Ts from the T1 at each operation until the value of the T1 is 0, wherein the pulse output is P;
e) When the value of T1 is 0, starting to subtract Ts from (T-T1) until (T-T1) is zero, wherein the pulse output is 0;
f) Setting flag to be 1 after (T-T1) is zero;
g) And reading the next group of data at the next sampling moment to repeat the steps c), d), e) and f).
Referring to fig. 11, the junction temperature calculation model adopts a Foster equivalent thermal network model, where the Foster equivalent thermal network model corresponds to the minimum unit in fig. 1, which is an SiC _ IGBT and an anti-parallel SiC _ FWD thereof. The Foster equivalent thermal network is realized in an FPGA by adopting a Tustin integration method. The Foster equivalent thermal network is formed by connecting thermal resistance R and thermal capacity C of each layer of material in parallel, a series mode is adopted between each layer of material, the parallel model structure of each group of thermal resistance R and thermal capacity C is the same, only the parameters of the thermal resistance R and the thermal capacity C are different, and the discrete modeling method in the FPGA is explained by taking a black frame part in figure 11 as reference.
The solution of the temperature difference generated after the power loss passes through the parallel connection of the thermal resistance R and the thermal capacitance C can be described by the following formula:
wherein, P n Power loss at time n, P Cn Analogy is the power loss through the heat capacity C at time n, ts is the sampling time, Δ T n The lower corner of n-1 represents the data at the previous sampling time, which is the temperature difference between the thermal resistance R and the thermal resistance C at time n.
Referring to FIG. 4: the parallel Xilinx model of the thermal resistance R and the thermal capacity C can simply and visually describe the heat transfer temperature difference solution after the thermal resistance R and the thermal capacity C are connected in parallel, and is suitable for on-line FPGA discrete calculation.
Referring to fig. 5: the thermal resistance R and the thermal capacitance C are connected in parallel with the model of the tustin integral in the Xilinx model.
Referring to fig. 11, the foster thermal network can be obtained by combining the thermal resistance R and thermal capacity C on the top in parallel with the Xilinx model. In the present calculation example, rs1 and Cs1, rs2 and Cs2, rs3 and Cs3, rs41 and Cs4, rs5 and Cs5 are respectively the thermal resistance and thermal capacity of each layer of material from the chip to the shell of the SIC _ IGBT, rd1 and Cd1, rd2 and Cd2, rd3 and Cd3, rd4 and Cd4, rd5 and Cd5 are respectively the thermal resistance and thermal capacity of each layer of material from the chip to the shell of the SIC _ FWD, and R6 and C6 are the thermal resistance and thermal capacity of the cooling liquid. And (3) solving the temperature rise delta T of each layer of material by adopting a Xilinx model with parallel connection of the thermal resistance R and the thermal capacitance C, and obtaining the junction temperature of the SIC _ IGBT and the SIC _ FWD by adopting a summing mode, wherein the formula is as follows.
Wherein, delta T si The temperature rise corresponding to each layer of the SIC _ IGBT material is solved, and the input power consumption is P _ s; delta T di The temperature rise corresponding to each layer of the SIC _ FWD material is calculatedSolving the input power consumption as P _ d; delta T 6 Solving the input power consumption as (P _ d + P _ s) for the temperature rise of the cooling liquid; t is the coolant temperature.
Referring to fig. 6, in order to calculate the junction temperature graph of the SIC _ IGBT and SIC _ FWD, the horizontal axis is the motor rotation speed, and the vertical axis is the junction temperature, it can be seen from the graph that the junction temperature calculated by the method has a large fluctuation range, and can more accurately reflect the dynamic process of temperature change.
The method comprises the following specific implementation steps:
1) And for the collected SiC power device driving signal g, preprocessing the pulse signal g according to the actual turn-on delay time and turn-off delay time, and ensuring the correct corresponding relation between the driving signal and the current.
2) And calculating the probability distribution of historical data queues for the collected conduction current I of the SiC power device, taking the maximum value of the probability distribution as zero drift, and subtracting the zero drift value from the collected current Ic to ensure the accuracy of current measurement.
3) And judging the rising edge and the falling edge of the preprocessed reconstructed pulse signal g 1.
4) And when the rising edge arrives, ending the timing of the switching period, storing the data T, initializing, starting new timing, starting to calculate the opening loss Eon, and simultaneously starting to calculate the on-state loss Esal. Eon was calculated according to the on-off loss curve on the SIC device manual. Conduction losses Esal _ IGBT and Esal _ FWD are initialized to zero and start accumulating conduction loss values, and are accumulated as Esal _ IGBT if I > =0 and as Esal _fwdif I <0 (with the conduction current direction of S1 being positive). The conduction loss accumulation formula is as follows:
Ic=I,Esal_IGBT=∑Vce*Ic*Ts
If=I,Esal_FWD=∑|Vf|*|If|*Ts
5) And when the falling edge arrives, finishing the calculation of the on-state loss, finishing the timing of the on-time of the device, storing T1, and calculating the off-loss Eoff. The Eoff _ IGBT is calculated if the current I > =0, the Eoff _ FWD is calculated if the current I <0, and the absolute value of the current (with the on current direction of S1 being the positive direction) needs to be taken when the diode Eoff _ FWD is calculated. Eoff was calculated according to the on-off loss curve on the SiC device manual. After the turn-off loss Eoff calculation is completed, the total energy generated in the on pulse is summed, and the total energy of the IGBT is (Eon _ IGBT + Esal _ IGBT + Eoff _ IGBT) and the total energy of the FWD is (Esal _ FWD + Eoff _ FWD).
6) And calculating the average power loss P _ s = (Eon _ IGBT + Esal _ IGBT + Eoff _ IGBT)/T1 of the IGBT, and solving the average power loss P _ d = (Esal _ FWD + Eoff _ FWD)/T1 of the FWD, wherein T1 is the conduction time of the SIC device.
7) And when the next rising edge comes, inputting parameters of T, T1, P _ s and P _ d into the delay power loss pulse stream signal reproduction functional module, and outputting a power pulse stream signal in each operation period by the delay signal reproduction functional module according to the stored pulse duration, turn-off time and power value.
8) And (4) enabling a power pulse flow signal output in real time to enter a Foster junction temperature calculation discrete model to obtain a junction temperature calculation result.
Example 2
A SiC power device online junction temperature calculation method based on FPGA is different from embodiment 1 in that input parameters are not limited to a current I flowing through a power device and a driving signal g of the power device, a conduction voltage drop Vce of the power device is also used as input, and a method of table lookup is not adopted during conduction loss calculation, but an actually acquired Vce is taken.
Example 3
An online junction temperature calculation method for a SiC power device based on FPGA is different from that of the embodiment 1 in that an input signal V is added dc By the coefficient (V) dc /V dc_s ) Correcting on-losses Eon and Eoff, where V dc_s The DC side voltage for the Eon and Eoff measurements on the data sheet.
Example 4
Compared with the embodiment 1, the SiC power device online junction temperature calculation method based on the FPGA is characterized in that for the conducting current zero-shift processing method, the average value of the collected current in the turn-off time period of the power device is calculated and used as a zero-shift value. The method occupies less FPGA memory and operation units.
In conclusion, the invention considers the problem that the switch-off process exists in the actual on-off process of the SiC device, and preprocesses the driving pulse signal, thereby eliminating the influence on the calculation accuracy of the on-off loss, the off-off loss and the on-off loss based on the driving pulse.
By adopting the probability distribution of the current data in the past period of time, the zero drift value is dynamically calculated in real time, the zero drift change caused by temperature is eliminated, and the accurate current value is provided for calculating the power loss.
The method for reproducing the delayed power loss pulse signal ensures the accuracy of the calculation of the on-line junction temperature.
The invention provides an initial delay determining method for determining the recurrence of the delay power loss, which ensures the continuity of the delay power loss pulse stream.
The power loss in the form of pulse flow completely accords with the energy loss generation mode of an actual power device, and the calculated junction temperature fluctuation is more practical.
The parallel on-line calculation discrete model of the thermal resistance and the heat capacity provided by the invention has wide applicability, and can meet various application occasions through any combination.
The invention selects the FPGA as the operation hardware, has rapidity and can meet the high-frequency application occasions.
It is noted that relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
The previous description is only an example of the present application, and is provided to enable any person skilled in the art to understand or implement the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
It is to be understood that the present application is not limited to what has been described above, and that various modifications and changes may be made without departing from the scope thereof. The scope of the application is limited only by the appended claims.
Claims (8)
1. An FPGA-based SiC power device online junction temperature calculation method is characterized by comprising the following steps:
1) The method comprises the following steps of preprocessing a driving pulse signal g and outputting a reconstructed pulse signal g 1:
calculating the current time value u of the pulse signal g n And the value u at the previous moment n-1 Is a difference of u n -u n-1 ;
When u is n -u n-1 When a rising edge of =1 arrives, the Ton is delayed, and the output of the reconstructed pulse signal g1 becomes 1;
when u is n -u n-1 When the-1 falling edge arrives, delaying Toff, and changing the output of the reconstructed pulse signal g1 into 0; wherein Ton and Toff are respectively on time and off time;
2) Conducting zero-drift removal treatment on the conducting current;
3) Calculating the average power loss during the pulse conduction period;
4) The delay signal is reproduced to generate a power loss pulse stream with the same pulse width as the pulse width, so that the continuity of the delay power loss pulse stream is ensured;
5) And the power loss pulse flow enters a junction temperature model to calculate the junction temperature of the power device.
2. The on-line junction temperature calculation method according to claim 1, wherein the conducting current zero-drift removing processing in the step 2) comprises the following steps:
1) Initializing an on-current I data queue;
2) Data updating, namely eliminating the head data of the current I data queue, sequentially moving the data at the rear side forward by one bit, and adding the newly acquired current I to the tail of the queue;
3) Carrying out probability distribution solving on the I data queue, and taking the data with the maximum probability distribution as null shift data IZ;
4) Carrying out I-IZ processing on the current I acquired at the current moment, and taking the current I as the current input of the current power consumption calculation;
5) And continuing to execute the steps 2), 3) and 4) at the next sampling moment.
3. The method for calculating the on-line junction temperature according to claim 1, wherein the method for calculating the average power loss during pulse conduction in the step 3) comprises the following steps:
1) Calculating the value u1 of the reconstructed pulse signal g1 at the current moment n And the value u1 of the previous time n-1 The difference of (a): u1 n -u1 n-1 The difference is used for detecting the rising edge and the falling edge of the reconstructed pulse signal g1;
2) When u1 n -u1 n-1 =1, that is, when the rising edge arrives, the following operations are started: calculating the turn-on loss Eon of the power device; (b) Storing the time from the last pulse rising edge to the current pulse rising edge, namely the pulse period T, and then initializing a timer to zero to restart timing; (c) Initializing the conduction loss Esal to zero and starting to accumulate a conduction loss value;
when u1 n -u1 n-1 =1, that is, when the falling edge arrives, the following operations need to be sequentially performed: storing a power device on-time T1; (b) calculating the turn-off loss Eoff of the power device; (c) the cumulative calculation of the conduction loss Esal is also stopped at this time; (d) Summing the energy generated in this on pulse, eon + Esal + Eoff;
4. the on-line junction temperature calculation method of claim 1, wherein the delay signal recurrence in step 4) selects a time delay of a number of pulses, the number of pulses being determined by a ratio of a widest pulse period to a narrowest pulse period.
5. The on-line junction temperature calculation method according to claim 4, wherein the step 4) of storing the data required for the reproduction of the delay signal comprises the following steps: the pulse period T, the device on time T1, the average power loss P when the device is on, and then a power loss pulse stream equal to the pulse width is generated.
6. The method for calculating the on-line junction temperature according to claim 4, wherein the time delay signal recurrence in the step 4) is composed of two parallel parts, and the specific steps are as follows:
part one is as follows:
a) Calculating the value u1 of the reconstructed pulse signal g1 at the current moment n And the value u1 of the previous time n-1 Is u1 n -u1 n-1 ;
b) When u1 n -u1 n-1 1, namely when a rising edge arrives, inserting T, T1 and P of the finished pulse into the tail of the memory, and adding 1 to the length of the memory;
c) When u1 n -u1 n-1 Not equal to 1, namely the state of non-rising edge, and continuously executing the step a) when sampling next time;
and part two:
a) The reproduction function delays to trigger counting to start;
b) The recurrence function delay triggering counting pulse is equal to N, the recurrence function is triggered, and the flag is set to 1;
c) The Flag is 1, a group of T, T1 and P data which are stored earliest are read from the head of a memory queue, the length of the memory queue is reduced by 1, the data stored later are sequentially moved forward by an address, and then the Flag is set to 0;
d) After the flag is 0, subtracting the sampling time Ts from the T1 at each operation until the value of the T1 is 0, wherein the average power loss output of the pulse is P;
e) When the value of T1 is 0, starting to subtract the sampling time Ts from T-T1 until T-T1 is zero, wherein the average power loss output of the pulse is 0;
f) Setting flag to 1 after T-T1 is zero;
g) And reading the next group of data at the next sampling moment to repeat the steps c), d), e) and f).
7. The on-line junction temperature calculation method of claim 1, wherein the step 5) junction temperature calculation uses a Foster equivalent thermal network model.
8. The on-line junction temperature calculation method of claim 7, wherein the minimum unit of the Foster equivalent thermal network model is: i.e., the discrete on-line calculation of the thermal resistance R and the parallel heat capacity C is realized by Tustin integration.
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