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CN111987217A - RRAM cell structure and method of making same - Google Patents

RRAM cell structure and method of making same Download PDF

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CN111987217A
CN111987217A CN202010861497.1A CN202010861497A CN111987217A CN 111987217 A CN111987217 A CN 111987217A CN 202010861497 A CN202010861497 A CN 202010861497A CN 111987217 A CN111987217 A CN 111987217A
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oxide
cell structure
rram cell
metal
electrode
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沈阳
邹荣
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Shanghai Huali Microelectronics Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/841Electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/883Oxides or nitrides
    • H10N70/8833Binary metal oxides, e.g. TaOx

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Abstract

本发明公开了一种RRAM单元结构,包括自上而下形成金属顶电极、氧化物阻变层和金属底电极,金属底电极形成凸形结构,该凸形结构的凸部伸入氧化物阻变层中。本发明还个公开了一种RRAM单元结构制造方法。本发明通过间接固定导电通道能改善器件工作稳定性及保持特性。

Figure 202010861497

The invention discloses an RRAM cell structure, which includes a top-to-bottom metal top electrode, an oxide resistance change layer and a metal bottom electrode, the metal bottom electrode forms a convex structure, and the convex part of the convex structure extends into the oxide resistance in the changing layer. The invention also discloses a manufacturing method of the RRAM cell structure. The invention can improve the working stability and retention characteristics of the device by indirectly fixing the conductive channel.

Figure 202010861497

Description

RRAM单元结构及其制造方法RRAM cell structure and manufacturing method thereof

技术领域technical field

本发明涉及半导体制造领域,特别是涉及一种RRAM单元结构。本发明还涉及一种RRAM单元结构制造方法。The present invention relates to the field of semiconductor manufacturing, in particular to an RRAM cell structure. The invention also relates to a manufacturing method of the RRAM cell structure.

背景技术Background technique

随着集成电路、移动通信、物联网的发展,对于非易失性存储器的需求越来越向大容量、低功耗、高密度和低成本的方向转变。金属氧化物阻变器件是一种非常具有应用潜力的新型非易失性存储器,其典型结构为金属电极-氧化物-金属电极。在外电场的激励作用下,器件可在高、低阻态之间发生可逆转变,且其高、低阻态在电场撤销之后仍能够保持。Forming过程是指RRAM第一次从初始的高阻态跳变到低阻态的过程,相反的处于低阻态的RRAM在被施加一定电压激励后可以转换到高阻态,低阻态跳变到高阻态的过程称之为Reset。经过Reset过程后进入高阻态的RRAM也可以通过施加电压激励转换到低阻态,而这个过程不同于第一次的高阻态跳变低阻态称之为Set过程。但是传统结构的RRAM器件操作电压(Forming、Set、Reset)电压太高在还不能满足LP 40nm工艺所能提供的最高电压限制,而且很难通过单一的阻变材料层调整来调制各项器件特性,图1为RRAM单元结构示意图。With the development of integrated circuits, mobile communications, and the Internet of Things, the demand for non-volatile memory is increasingly shifting to the direction of large capacity, low power consumption, high density and low cost. Metal oxide resistive device is a new type of non-volatile memory with great application potential, and its typical structure is metal electrode-oxide-metal electrode. Under the excitation of an external electric field, the device can undergo a reversible transition between high and low resistance states, and its high and low resistance states can still be maintained after the electric field is removed. The Forming process refers to the process that the RRAM jumps from the initial high-resistance state to the low-resistance state for the first time. On the contrary, the RRAM in the low-resistance state can be converted to the high-resistance state after being excited by a certain voltage, and the low-resistance state jumps. The process to the high resistance state is called Reset. After the Reset process, the RRAM that enters the high-impedance state can also be converted to the low-impedance state by applying voltage excitation, and this process is different from the first high-impedance transition to the low-impedance state, which is called the Set process. However, the operating voltage (Forming, Set, Reset) of the traditional structure RRAM device is too high to meet the maximum voltage limit that the LP 40nm process can provide, and it is difficult to modulate various device characteristics by adjusting a single resistive material layer. , Figure 1 is a schematic diagram of the RRAM cell structure.

RRAM的转变特性I-V曲线如图2所示,其器件特性包括Forming电压/电流,Set&Reset电压/电流以及MW(Memory Window)存储窗口、读写速度等。The I-V curve of the transition characteristics of RRAM is shown in Figure 2, and its device characteristics include Forming voltage/current, Set&Reset voltage/current, MW (Memory Window) storage window, read and write speed, etc.

基于氧化钽TaOx材料的RRAM器件是典型的金属氧化物非导电通道类,其原理是通过晶格氧被激发产生氧空位形成的导电通道的通断来实现不同的阻值状态,如图3所示。在外加电场的情况下,阻变层氧化钽TaOx中的氧离子会移动至界面层(取决于极性)存储起来,在TaO2中出现氧空位形成的导电通道,TaOx的阻值从高阻态(HRS)变为低阻态(LRS),器件阻值完成转变,后续依次加上极性相反的reset/set电压(一般低于Forming电压),可以使得氧空位通道再次断裂和形成,可以让阻变层在HRS和LRS转变,从而形成循环,存储0和1;RRAM集成在后段,且结构简单成本可控,因此可以作为嵌入式存储设备,非常具有商业化潜力。The RRAM device based on tantalum oxide TaOx material is a typical metal oxide non-conductive channel. The principle is to realize different resistance states through the on-off of the conductive channel formed by the excitation of lattice oxygen to generate oxygen vacancies, as shown in Figure 3. Show. In the case of an external electric field, the oxygen ions in the resistance switching layer TaOx will move to the interface layer (depending on the polarity) for storage, and a conductive channel formed by oxygen vacancies will appear in TaO2, and the resistance of TaOx will change from a high resistance state. (HRS) becomes the low resistance state (LRS), the resistance of the device completes the transition, and then the reset/set voltage of opposite polarity (generally lower than the Forming voltage) is applied in turn, which can make the oxygen vacancy channel break and form again, which can make the oxygen vacancy channel broken and formed again. The resistive layer changes in HRS and LRS to form a cycle to store 0 and 1; RRAM is integrated in the back stage, and the structure is simple and cost controllable, so it can be used as an embedded storage device and has great commercial potential.

40LP RRAM及以下节点项目,目前采用下电极(TaN)/阻变层(TaOx)/上电极(TiN)的方案,流片测试结果显示,该种方案的工作稳定性,保持特性和擦写特性都较差,关键在于由于氧化形成的氧化钽阻变层材料的各组分区别不大,导致导电通道不稳固,由此可见现有的结构和集成方案存在工作稳定性的问题。40LP RRAM and below node projects currently use the lower electrode (TaN)/resistive switching layer (TaOx)/upper electrode (TiN) scheme. The tape-out test results show that the working stability, retention characteristics and erasing characteristics of this scheme are The key is that the components of the tantalum oxide resistive layer material formed by oxidation are not very different, resulting in unstable conductive channels. It can be seen that the existing structure and integration scheme have problems of working stability.

发明内容SUMMARY OF THE INVENTION

在发明内容部分中引入了一系列简化形式的概念,该简化形式的概念均为本领域现有技术简化,这将在具体实施方式部分中进一步详细说明。本发明的发明内容部分并不意味着要试图限定出所要求保护的技术方案的关键特征和必要技术特征,更不意味着试图确定所要求保护的技术方案的保护范围。A series of concepts in simplified form are introduced in the summary of the invention, and the concepts in the simplified form are all simplifications of the prior art in the art, which will be further described in detail in the detailed description. The Summary of the Invention section of the present invention is not intended to attempt to limit the key features and essential technical features of the claimed technical solution, nor is it intended to attempt to determine the protection scope of the claimed technical solution.

本发明要解决的技术问题是提供一种通过间接固定导电通道能改善工作稳定性及保持特性的RRAM单元结构。The technical problem to be solved by the present invention is to provide an RRAM cell structure that can improve working stability and retention characteristics by indirectly fixing conductive channels.

本发明要解决的另一技术问题是提供一种通过间接固定导电通道能改善工作稳定性及保持特性的RRAM单元结构制造方法。Another technical problem to be solved by the present invention is to provide a manufacturing method of an RRAM cell structure which can improve the working stability and retention characteristics by indirectly fixing the conductive channel.

为解决上述技术问题,本发明提供的RRAM单元结构,包括自上而下形成金属顶电极、氧化物阻变层和金属底电极,金属底电极形成凸形结构,该凸形结构的凸部伸入氧化物阻变层中。In order to solve the above technical problems, the RRAM cell structure provided by the present invention includes forming a metal top electrode, an oxide resistive layer and a metal bottom electrode from top to bottom, and the metal bottom electrode forms a convex structure, and the convex part of the convex structure extends. into the oxide resistive layer.

可选择的,进一步改进所述的RRAM单元结构,氧化物阻变层是氧化镍(NiO)、氧化钛(TiOx)、氧化铪(HfOx)或氧化钽(TaOx)。Optionally, to further improve the RRAM cell structure, the oxide resistive layer is nickel oxide (NiO), titanium oxide (TiOx), hafnium oxide (HfOx) or tantalum oxide (TaOx).

可选择的,进一步改进所述的RRAM单元结构,金属顶电极是氮化钽(TaN)或氮化钛(TiN)。Optionally, to further improve the RRAM cell structure, the metal top electrode is tantalum nitride (TaN) or titanium nitride (TiN).

可选择的,进一步改进所述的RRAM单元结构,金属底电极是氮化钽(TaN)或氮化钛(TiN)。Optionally, to further improve the RRAM cell structure, the metal bottom electrode is tantalum nitride (TaN) or titanium nitride (TiN).

本发明提供一种RRAM单元结构制造方法,包括以下步骤:The present invention provides a method for manufacturing an RRAM cell structure, comprising the following steps:

S1,沉积制作金属底电极,将金属底电极刻蚀形成凸形结构;S1, depositing a metal bottom electrode, and etching the metal bottom electrode to form a convex structure;

S2,沉积阻变层金属,氧化形成氧化物阻变层;S2, depositing the metal of the resistive switching layer, and oxidizing to form an oxide resistive switching layer;

S3,研磨平坦化氧化物阻变层顶部;S3, grinding and planarizing the top of the oxide resistive layer;

S4,沉积制作金属顶电极。S4, depositing a metal top electrode.

可选择的,进一步所述的RRAM单元结构制造方法,实施步骤S1时,采用氮化钽(TaN)或氮化钛(TiN)制作金属底电极。Optionally, in the further described RRAM cell structure manufacturing method, when step S1 is performed, tantalum nitride (TaN) or titanium nitride (TiN) is used to form the metal bottom electrode.

可选择的,进一步所述的RRAM单元结构制造方法,实施步骤S3时,氧化形成氧化镍(NiO)、氧化钛(TiOx)、氧化铪(HfOx)或氧化钽(TaOx)作为氧化物阻变层。Optionally, in the further described RRAM cell structure manufacturing method, when step S3 is performed, nickel oxide (NiO), titanium oxide (TiOx), hafnium oxide (HfOx) or tantalum oxide (TaOx) are formed by oxidation as the oxide resistive layer .

可选择的,进一步所述的RRAM单元结构制造方法,实施步骤S4时,采用化学机械研磨平坦化氧化物阻变层顶部。Optionally, in the further described RRAM cell structure manufacturing method, when step S4 is performed, chemical mechanical polishing is used to planarize the top of the oxide resistive switching layer.

可选择的,进一步所述的RRAM单元结构制造方法,实施步骤S5时,采用氮化钽(TaN)或氮化钛(TiN)制作金属顶电极。Optionally, in the further described RRAM cell structure manufacturing method, when step S5 is performed, tantalum nitride (TaN) or titanium nitride (TiN) is used to form the metal top electrode.

如图4所示,传统的RRAM cell结构为两端三层结构-上电极/阻变层/下电极,已电极为TiN材料,阻变层为氧化钽为例,其保持特性很差主要原因在于导电通道不稳固。As shown in Figure 4, the traditional RRAM cell structure is a three-layer structure at both ends-upper electrode/resistance switching layer/lower electrode, the electrode is made of TiN material, and the resistance switching layer is tantalum oxide as an example, the main reason for its poor retention characteristics The reason is that the conduction path is not stable.

本发明凸形结构的金属底电极为氮化钛TiN、氧化物阻变层为氧化钽TaOx、金属上电极为氮化钛TiN,凸形结构的金属底电极及先氧化再CMP形成的阻变层,利用不均匀分布的电场及中心氧化态阻值较小的特点,形成连接活性电极与下电极导电通路固定不变,进而可以固定阻变层导电通道,提高了阻变存储器工作的稳定性及保持特性。利用物理结构及氧化特性以稳固导电通道从而可以使器件的可靠性和稳定性得以提高,而因为氧化特性的缘故,可以更方便的调制氧化参数进而调制阻变存储器的各种参数。如可以调节RRAM的初始阻值,而RRAM的初始电阻会显著影响存储窗口,通过调整工艺结构得到一个合适的初始阻值可以有效的增大存储窗口,这对电路抗噪声特性有重大的意义。The metal bottom electrode of the convex structure of the present invention is titanium nitride TiN, the oxide resistance change layer is tantalum oxide TaOx, the metal upper electrode is titanium nitride TiN, the metal bottom electrode of the convex structure and the resistance change formed by first oxidation and then CMP By utilizing the characteristics of unevenly distributed electric field and the small resistance value of the central oxidation state, the conductive path connecting the active electrode and the lower electrode is formed to be fixed, and then the conductive path of the resistive layer can be fixed, which improves the stability of the resistive memory. and retention characteristics. The reliability and stability of the device can be improved by utilizing the physical structure and the oxidation characteristics to stabilize the conductive channel, and because of the oxidation characteristics, the oxidation parameters can be more conveniently modulated to modulate various parameters of the resistive memory. For example, the initial resistance of RRAM can be adjusted, and the initial resistance of RRAM will significantly affect the storage window. Obtaining a suitable initial resistance by adjusting the process structure can effectively increase the storage window, which is of great significance to the anti-noise characteristics of the circuit.

附图说明Description of drawings

本发明附图旨在示出根据本发明的特定示例性实施例中所使用的方法、结构和/或材料的一般特性,对说明书中的描述进行补充。然而,本发明附图是未按比例绘制的示意图,因而可能未能够准确反映任何所给出的实施例的精确结构或性能特点,本发明附图不应当被解释为限定或限制由根据本发明的示例性实施例所涵盖的数值或属性的范围。下面结合附图与具体实施方式对本发明作进一步详细的说明:The drawings of the present invention are intended to supplement the description in the specification by illustrating the general characteristics of methods, structures and/or materials used in certain exemplary embodiments according to the present invention. However, the drawings of the present invention are schematic representations not to scale and thus may not accurately reflect the precise structural or performance characteristics of any given embodiment, and the drawings of the present invention should not be construed as limiting or limiting by the present invention. The range of values or properties encompassed by the exemplary embodiments. The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments:

图1是RRAM单元结构示意图。FIG. 1 is a schematic diagram of the structure of an RRAM cell.

图2是RRAM的转变特性I-V曲线。Fig. 2 is the transition characteristic I-V curve of RRAM.

图3是基于氧空位的产生复合引起导电通道通断RRAM的原理示意图。FIG. 3 is a schematic diagram of the principle of on-off RRAM based on the generation and recombination of oxygen vacancies.

图4是传统氧化钽作为阻变层的RRAM cell结构示意图。FIG. 4 is a schematic diagram of an RRAM cell structure using traditional tantalum oxide as a resistive switching layer.

图5是本发明结构示意图。Figure 5 is a schematic view of the structure of the present invention.

图6是本发明流程示意图。Figure 6 is a schematic flow chart of the present invention.

具体实施方式Detailed ways

以下通过特定的具体实施例说明本发明的实施方式,本领域技术人员可由本说明书所公开的内容充分地了解本发明的其他优点与技术效果。本发明还可以通过不同的具体实施方式加以实施或应用,本说明书中的各项细节也可以基于不同观点加以应用,在没有背离发明总的设计思路下进行各种修饰或改变。需说明的是,在不冲突的情况下,以下实施例及实施例中的特征可以相互组合。本发明下述示例性实施例可以多种不同的形式来实施,并且不应当被解释为只限于这里所阐述的具体实施例。应当理解的是,提供这些实施例是为了使得本发明的公开彻底且完整,并且将这些示例性具体实施例的技术方案充分传达给本领域技术人员。The embodiments of the present invention are described below through specific specific embodiments, and those skilled in the art can fully understand other advantages and technical effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through different specific embodiments, and various details in this specification can also be applied based on different viewpoints, and various modifications or changes can be made without departing from the general design idea of the invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other under the condition of no conflict. The following exemplary embodiments of the present invention may be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. It should be understood that these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the technical solutions of these exemplary embodiments to those skilled in the art.

第一实施例,如图5所示,本发明提供一种RRAM单元结构,包括自上而下形成金属顶电极、氧化物阻变层和金属底电极,金属底电极形成凸形结构,该凸形结构的凸部伸入氧化物阻变层中。In the first embodiment, as shown in FIG. 5 , the present invention provides an RRAM cell structure, including forming a top metal electrode, an oxide resistive layer and a bottom metal electrode from top to bottom, and the bottom metal electrode forms a convex structure. The convex portion of the shaped structure protrudes into the oxide resistive switching layer.

第二实施例,本发明提供一种RRAM单元结构,包括自上而下形成金属顶电极、氧化物阻变层和金属底电极,金属底电极形成凸形结构,该凸形结构的凸部伸入氧化物阻变层中;In the second embodiment, the present invention provides an RRAM cell structure, including forming a top metal electrode, an oxide resistive layer and a bottom metal electrode from top to bottom, wherein the bottom metal electrode forms a convex structure, and the convex portion of the convex structure extends into the oxide resistive layer;

其中,氧化物阻变层是氧化镍(NiO)、氧化钛(TiOx)、氧化铪(HfOx)或氧化钽(TaOx);金属顶电极是氮化钽(TaN)或氮化钛(TiN);金属底电极是氮化钽(TaN)或氮化钛(TiN)。Wherein, the oxide resistive layer is nickel oxide (NiO), titanium oxide (TiOx), hafnium oxide (HfOx) or tantalum oxide (TaOx); the metal top electrode is tantalum nitride (TaN) or titanium nitride (TiN); The metal bottom electrode is tantalum nitride (TaN) or titanium nitride (TiN).

第三实施例,如图6所示,本发明提供一种RRAM单元结构制造方法,包括以下步骤:The third embodiment, as shown in FIG. 6 , the present invention provides a method for manufacturing an RRAM cell structure, comprising the following steps:

S1,沉积制作金属底电极,将金属底电极刻蚀形成凸形结构;S1, depositing a metal bottom electrode, and etching the metal bottom electrode to form a convex structure;

S2,沉积阻变层金属,氧化形成氧化物阻变层;S2, depositing the metal of the resistive switching layer, and oxidizing to form an oxide resistive switching layer;

S3,研磨平坦化氧化物阻变层顶部;S3, grinding and planarizing the top of the oxide resistive layer;

S4,沉积制作金属顶电极。S4, depositing a metal top electrode.

第四实施例,本发明提供一种RRAM单元结构制造方法,包括以下步骤:In the fourth embodiment, the present invention provides a method for manufacturing an RRAM cell structure, comprising the following steps:

S1,氮化钽(TaN)沉积制作金属底电极,将金属底电极刻蚀形成凸形结构;S1, tantalum nitride (TaN) is deposited to form a metal bottom electrode, and the metal bottom electrode is etched to form a convex structure;

S2,沉积阻变层金属钽(Ta),氧化形成氧化钽(TaOx)阻变层;S2, depositing the resistive layer metal tantalum (Ta), and oxidizing to form a tantalum oxide (TaOx) resistive layer;

S3,化学机械研磨平坦化氧化钽(TaOx)阻变层顶部;S3, chemical mechanical polishing to planarize the top of the tantalum oxide (TaOx) resistive switching layer;

S4,采用氮化钽(TaN)沉积制作金属顶电极。S4, using tantalum nitride (TaN) deposition to fabricate a metal top electrode.

除非另有定义,否则这里所使用的全部术语(包括技术术语和科学术语)都具有与本发明所属领域的普通技术人员通常理解的意思相同的意思。还将理解的是,除非这里明确定义,否则诸如在通用字典中定义的术语这类术语应当被解释为具有与它们在相关领域语境中的意思相一致的意思,而不以理想的或过于正式的含义加以解释。Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will also be understood that, unless expressly defined herein, terms such as those defined in a general dictionary should be construed to have meanings consistent with their meanings in the relevant art context, rather than ideally or excessively The formal meaning is explained.

以上通过具体实施方式和实施例对本发明进行了详细的说明,但这些并非构成对本发明的限制。在不脱离本发明原理的情况下,本领域的技术人员还可做出许多变形和改进,这些也应视为本发明的保护范围。The present invention has been described in detail above through specific embodiments and examples, but these are not intended to limit the present invention. Without departing from the principles of the present invention, those skilled in the art can also make many modifications and improvements, which should also be regarded as the protection scope of the present invention.

Claims (9)

1.一种RRAM单元结构,包括自上而下形成金属顶电极、氧化物阻变层和金属底电极,其特征在于:金属底电极形成凸形结构,该凸形结构的凸部伸入氧化物阻变层中。1. an RRAM cell structure, comprising forming a metal top electrode, an oxide resistive layer and a metal bottom electrode from top to bottom, it is characterized in that: the metal bottom electrode forms a convex structure, and the convex part of this convex structure extends into the oxidation in the resistive layer. 2.如权利要求1所述的RRAM单元结构,其特征在于:氧化物阻变层是氧化镍(NiO)、氧化钛(TiOx)、氧化铪(HfOx)或氧化钽(TaOx)。2 . The RRAM cell structure according to claim 1 , wherein the oxide resistive switching layer is nickel oxide (NiO), titanium oxide (TiOx), hafnium oxide (HfOx) or tantalum oxide (TaOx). 3 . 3.如权利要求1所述的RRAM单元结构,其特征在于:金属顶电极是氮化钽(TaN)或氮化钛(TiN)。3. The RRAM cell structure of claim 1, wherein the metal top electrode is tantalum nitride (TaN) or titanium nitride (TiN). 4.如权利要求1所述的RRAM单元结构,其特征在于:金属底电极是氮化钽(TaN)或氮化钛(TiN)。4. The RRAM cell structure of claim 1, wherein the metal bottom electrode is tantalum nitride (TaN) or titanium nitride (TiN). 5.一种RRAM单元结构制造方法,其特征在于,包括以下步骤:5. a RRAM cell structure manufacturing method, is characterized in that, comprises the following steps: S1,沉积制作金属底电极,将金属底电极刻蚀形成凸形结构;S1, depositing a metal bottom electrode, and etching the metal bottom electrode to form a convex structure; S2,沉积阻变层金属,氧化形成氧化物阻变层;S2, depositing the metal of the resistive switching layer, and oxidizing to form an oxide resistive switching layer; S3,研磨平坦化氧化物阻变层顶部;S3, grinding and planarizing the top of the oxide resistive layer; S4,沉积制作金属顶电极。S4, depositing a metal top electrode. 6.如权利要求5所述的RRAM单元结构制造方法,其特征在于:实施步骤S1时,采用氮化钽(TaN)或氮化钛(TiN)制作金属底电极。6 . The method for manufacturing an RRAM cell structure according to claim 5 , wherein when step S1 is performed, tantalum nitride (TaN) or titanium nitride (TiN) is used to form the metal bottom electrode. 7 . 7.如权利要求5所述的RRAM单元结构制造方法,其特征在于:实施步骤S3时,氧化形成氧化镍(NiO)、氧化钛(TiOx)、氧化铪(HfOx)或氧化钽(TaOx)作为氧化物阻变层。7. The method for manufacturing an RRAM cell structure as claimed in claim 5, wherein when step S3 is implemented, nickel oxide (NiO), titanium oxide (TiOx), hafnium oxide (HfOx) or tantalum oxide (TaOx) are formed by oxidation as oxide resistive layer. 8.如权利要求5所述的RRAM单元结构制造方法,其特征在于:实施步骤S4时,采用化学机械研磨平坦化氧化物阻变层顶部。8 . The method for manufacturing an RRAM cell structure according to claim 5 , wherein when step S4 is performed, chemical mechanical polishing is used to planarize the top of the oxide resistive switching layer. 9 . 9.如权利要求5所述的RRAM单元结构制造方法,其特征在于:实施步骤S5时,采用氮化钽(TaN)或氮化钛(TiN)制作金属顶电极。9 . The method for manufacturing an RRAM cell structure according to claim 5 , wherein when step S5 is performed, tantalum nitride (TaN) or titanium nitride (TiN) is used to form the top metal electrode. 10 .
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102157688A (en) * 2011-03-23 2011-08-17 北京大学 Resistive random-access memory (RRAM) and manufacturing method thereof
CN103035840A (en) * 2012-12-19 2013-04-10 北京大学 Resistive random access memory and preparation method thereof
US20130112936A1 (en) * 2011-01-20 2013-05-09 Panasonic Corporation Resistance change element and manufacturing method therefor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130112936A1 (en) * 2011-01-20 2013-05-09 Panasonic Corporation Resistance change element and manufacturing method therefor
CN102157688A (en) * 2011-03-23 2011-08-17 北京大学 Resistive random-access memory (RRAM) and manufacturing method thereof
CN103035840A (en) * 2012-12-19 2013-04-10 北京大学 Resistive random access memory and preparation method thereof

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