CN111969114B - Display panel, method for manufacturing display panel, and mask plate - Google Patents

Abstract

A display panel, comprising: a plurality of first light-emitting layers, a plurality of second light-emitting layers, a plurality of third light-emitting layers, and a pixel defining layer, comprising: a plurality of first openings covered by the corresponding first light-emitting layers; A plurality of second openings covered by respective second light emitting layers, and a plurality of third openings covered by respective third light emitting layers. The first and second light-emitting layers are alternately arranged in the first direction and the second direction crossing the first direction, and the third light-emitting layers are interspersed between the first light-emitting layers and the second light-emitting layers. Each of the first and second light-emitting layers includes two corners facing each other in the first direction and two corners facing each other in the second direction, each corner having a The edges are chamfered so that the first and second light emitting layers do not overlap each other.

Description

Display panel, method of manufacturing display panel, and mask

technical field

The present invention relates to the field of display technology, and in particular, to a display panel, a method for manufacturing the display panel, and a set of mask plates for manufacturing the display panel.

Background technique

Evaporation of organic light-emitting materials is a key part of the manufacturing process of organic light-emitting diode (OLED) display panels. During the evaporation process, an ultra-fine metal mask (FMM) with perforations is used to obtain high-resolution sub-pixel patterns. As pixel density becomes higher and higher, ensuring the yield of OLED display panels becomes a challenge.

SUMMARY OF THE INVENTION

It would be advantageous to have a solution that alleviates, alleviates or even eliminates one or more of the above problems.

According to a first aspect of the present invention, there is provided a display panel comprising: a plurality of first light-emitting layers configured to emit light of a first color when excited; and a plurality of second light-emitting layers configured to emit light of a first color when excited a plurality of third light emitting layers configured to emit light of a third color when excited; and a pixel defining layer comprising: a plurality of first openings covered by respective first light emitting layers , the plurality of first openings overlap with the corresponding regions of the corresponding first light-emitting layers to define the respective first light-emitting regions of the plurality of first light-emitting layers; the plurality of second openings covered by the corresponding second light-emitting layers, so the plurality of second openings overlap with corresponding regions of the corresponding second light emitting layers to define respective second light emitting regions of the plurality of second light emitting layers; and the plurality of third openings covered by the corresponding third light emitting layers, the The plurality of third openings overlap with corresponding regions of the corresponding third light emitting layers to define respective third light emitting regions of the plurality of third light emitting layers. The first and second light-emitting layers are alternately arranged in the first direction and the second direction crossing the first direction, and the third light-emitting layers are interspersed between the first light-emitting layers and the second light-emitting layers. Each of the first and second light-emitting layers includes two corners facing each other in the first direction and two corners facing each other in the second direction, each corner having a The edges are chamfered so that the first and second light emitting layers do not overlap each other.

In some embodiments, one of the two first corners of each first light-emitting layer and one of the two first corners of the corresponding second light-emitting layer The corresponding second light-emitting layer is directly adjacent to the first light-emitting layer in the first direction. The distance between the one first corner of the first light-emitting layer and the one first corner of the corresponding second light-emitting layer is the distance between the first light-emitting layer and the corresponding second light-emitting layer minimum distance between.

In some embodiments, the two sides forming the one first corner portion of the first light emitting layer include respective linear portions, and respective imaginary extension lines of the linear portions intersect to form a first imaginary corner portion. The two sides of the one first corner portion forming the corresponding second light emitting layer include respective straight line portions, and respective imaginary extension lines of the straight line portions intersect to form a second imaginary corner portion. The first virtual corner partially overlaps the second virtual corner.

In some embodiments, one of the two second corners of each first light-emitting layer and one of the two second corners of the corresponding second light-emitting layer The corresponding second light-emitting layer is directly adjacent to the first light-emitting layer in the second direction. The distance between the one second corner of the first light-emitting layer and the one second corner of the corresponding second light-emitting layer is the distance between the first light-emitting layer and the corresponding second light-emitting layer minimum distance between.

In some embodiments, the two sides forming the one second corner portion of the first light emitting layer include respective straight portions, and respective imaginary extension lines of the straight portions intersect to form a third imaginary corner portion. The two sides forming the one second corner portion of the corresponding second light emitting layer include respective linear portions, and respective imaginary extension lines of the linear portions intersect to form a fourth imaginary corner portion. The third virtual corner partially overlaps the fourth virtual corner.

In some embodiments, the distance from any point on the edge of each corner of each first light-emitting layer to the corresponding first light-emitting region is greater than or equal to the offset tolerance value. The distance from any point on the edge of each corner of each second light-emitting layer to the corresponding second light-emitting region is greater than or equal to the offset tolerance value.

In some embodiments, the first and second corners of each first light emitting layer are chamfered or rounded with a first radius. The first radius is greater than or equal to 10 um.

In some embodiments, the first and second corners of each second light emitting layer are chamfered or rounded with a second radius. The second radius is greater than or equal to 10 um.

In some embodiments, each of the third light emitting layers has the shape of a rounded polygon. Each third light-emitting region has a shape conforming to the shape of the corresponding third light-emitting layer such that the minimum distance from any point on the edge of the corresponding third light-emitting layer to the boundary of the third light-emitting region is substantially equal to the offset tolerance value.

In some embodiments, each of the first, second, and third light-emitting layers is arranged to form a plurality of repeating units that are repeatedly arranged in the first and second directions, each repeating unit comprising two first light-emitting layers, two two second light-emitting layers and four third light-emitting layers. The two first light-emitting layers are arranged at the i-th row and the j+2-th column and the i+2-th row and the j-th column, respectively, and the two second light-emitting layers are arranged at the i-th row and the j-th column and the i-th row, respectively. +2 row and j+2th column, and four third light emitting layers are arranged at i+1th row and j+1th column, i+1th row and j+3th column, i+3th row, respectively and column j+1, and row i+3 and column j+3, where i and j are natural numbers.

In some embodiments, the first direction is substantially perpendicular to the second direction. Each of the first light-emitting layers has a shape obtained by chamfering each of four corners of a first square whose first and second diagonals are parallel to the first and second direction. Each of the second light-emitting layers has a shape obtained by chamfering each of four corners of a second square whose first and second diagonals are parallel to the first and second direction. Each third light-emitting layer has a shape obtained by rounding each of the four corners of a rectangle, one long side of the rectangle being directly adjacent to a corresponding first light-emitting layer One side of the light-emitting layer is opposite and substantially parallel to the side of the corresponding first light-emitting layer, and a short side of the rectangle is directly adjacent to the third light-emitting layer. One side of the corresponding second light-emitting layer The side is opposite and substantially parallel to the side of the corresponding second light-emitting layer.

In some embodiments, the geometric center of each first light-emitting layer and the geometric center of the corresponding second light-emitting layer directly adjacent to the first light-emitting layer in the first direction are located parallel to the first direction in a straight line. The geometric center of each first light-emitting layer and the geometric center of the corresponding second light-emitting layer directly adjacent to the first light-emitting layer in the second direction are located on a line parallel to the second direction.

According to another aspect of the present disclosure, there is provided a method of manufacturing a display panel, comprising: patterning a first conductive layer to form a plurality of first electrodes, wherein the first electrodes are in a first direction and cross the first direction are arranged in an array in the second direction of at least a portion of a first electrode, a first plurality of first electrodes of the plurality of first electrodes are respectively exposed by a first plurality of openings of the plurality of openings, a second plurality of the plurality of first electrodes A plurality of first electrodes are respectively exposed by a second plurality of openings of the plurality of openings, and a third plurality of first electrodes of the plurality of first electrodes are respectively exposed by a third plurality of the plurality of openings. openings are exposed; forming a plurality of first light emitting layers covering the first plurality of openings respectively, a plurality of second light emitting layers covering the second plurality of openings respectively, and forming a plurality of second light emitting layers covering the third plurality of openings respectively a plurality of third light emitting layers; and forming a second conductive layer on each of the first, second and third light emitting layers. The first and second light-emitting layers are alternately arranged in the first direction and the second direction, and the third light-emitting layers are interspersed between the first light-emitting layers and the second light-emitting layers. Each of the first and second light emitting layers includes two first corners facing each other in the first direction and two second corners facing each other in the second direction, the first and each of the second corners has a chamfered edge so that the respective first and second light emitting layers do not overlap each other.

According to yet another aspect of the present disclosure, there is provided a set of masks for evaporating organic light-emitting materials in a manufacturing process of a display panel, comprising: a first mask patterned to include an array of first through holes, each the first through holes include two chamfered corners facing each other in a first direction and two chamfered corners facing each other in a second direction crossing the first direction; and a second mask , is patterned to include an array of second perforations, each second perforation including two chamfered corners facing each other in the first direction and two chamfered corners facing each other in the second direction Chamfered corners. Each of the first and second through holes is positioned in the first and second masks, respectively, such that when the first and second masks are stacked and aligned with each other, the first and second through holes are in the first direction and the They are alternately arranged in the second direction and do not overlap each other.

In some embodiments, respective corners of each first perforation are chamfered or rounded with a first radius. The first radius is greater than or equal to 10 um.

In some embodiments, respective corners of each second perforation are chamfered or rounded with a second radius. The second radius is greater than or equal to 10 um.

In some embodiments, each of the first and second through-holes is positioned in the first and second masks, respectively, such that when the first and second masks are stacked and aligned with each other, the geometric center of each first through-hole and the The geometric center of the corresponding second perforation directly adjacent to the first perforation in the first direction is located on a line parallel to the first direction, and the geometric center of each first perforation is the same as the first perforation. The geometric centers of the directly adjacent corresponding second through holes in the second direction are located on a line parallel to the second direction.

In some embodiments, the first mask includes non-perforated regions between each of the first perforations, wherein each non-perforated region extends linearly in the first direction and spans the first mask at the entire dimension in the first direction.

In some embodiments, the second mask includes non-perforated regions between each of the second perforations, wherein each non-perforated region extends linearly in the first direction and spans the second mask at the entire dimension in the first direction.

In some embodiments, the set of masks further includes: a third mask patterned to include an array of third perforations. The third perforations are positioned in the third reticle such that when the first, second and third masks are stacked and aligned with each other, the third perforations are interspersed between the first perforations and the second perforations. Each third perforation has the shape of a rounded polygon.

According to yet another aspect of the present disclosure, there is provided a display panel including: a plurality of first light-emitting layers configured to emit light of a first color when excited; and a plurality of second light-emitting layers configured to emit light of a first color when excited when excited to emit light of a second color; and a plurality of third light emitting layers configured to emit light of a third color when excited. The first and second light-emitting layers are alternately arranged in the first direction and the second direction crossing the first direction, and the third light-emitting layers are interspersed between the first light-emitting layers and the second light-emitting layers. Each of the first and second light emitting layers includes two first corners facing each other in the first direction and two second corners facing each other in the second direction. The two second corners of each of the first light-emitting layers are chamfered to provide a first void region between the respective first light-emitting layers, and each first void region extends in a straight line in the first direction without overlapping with each of the first light emitting layers, and spanning the entire size of the display panel in the first direction. The two second corners of each second light emitting layer are chamfered to provide second void regions between the second light emitting layers, and each second void region extends in a straight line in the first direction without overlapping with the respective second light emitting layers, and spanning the entire size of the display panel in the first direction.

In some embodiments, the two first corners of each first light emitting layer are chamfered to provide third void regions between the respective first light emitting layers, and each third void region is in the first light emitting layer. The two directions extend along a straight line without overlapping each of the first light emitting layers, and span the entire size of the display panel in the second direction. The two first corners of each second light emitting layer are chamfered to provide fourth void regions between the second light emitting layers, and each fourth void region extends linearly in the second direction without overlapping each second light emitting layer, and spanning the entire size of the display panel in the second direction.

In some embodiments, the display panel has a substantially rectangular profile including two first sides extending in the first direction and two second sides extending in the second direction .

These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.

Description of drawings

Further details, features and advantages of the present invention are disclosed in the following description of exemplary embodiments in conjunction with the accompanying drawings, in which:

FIG. 1 is a plan view schematically showing the arrangement of sub-pixel regions in a typical OLED display panel;

FIG. 2A schematically shows a plan view of a typical mask used for evaporating organic light-emitting materials to form patterns of light-emitting layers;

FIG. 2B schematically shows the arrangement relationship of the mask plate 200 relative to the MSB of the mother substrate during the evaporation process;

3A schematically shows a plan view of the arrangement of five sub-pixel regions in a display panel according to an embodiment of the present invention;

3B schematically shows a plan view of first and second sub-pixel regions in the arrangement of sub-pixel regions of FIG. 3A;

FIG. 4 schematically illustrates an example pixel circuit of the arrangement of sub-pixel regions in the display panel of FIG. 3A;

FIG. 5 schematically shows a cross-sectional view of the display panel of FIG. 3A;

FIG. 6 is a plan view schematically showing a modification of the arrangement of sub-pixel regions in the display panel of FIG. 3A;

7 schematically shows a plan view of another modification of the arrangement of sub-pixel regions in the display panel of FIG. 3A;

8A schematically shows a plan view of a plurality of sub-pixel regions of a display panel according to an embodiment of the present invention;

FIG. 8B schematically shows the outline of the display panel of FIG. 8A;

FIG. 9 schematically shows a flowchart of a method for manufacturing a display panel according to an embodiment of the present invention;

Figures 10A to 10F schematically show cross-sectional views of the display panel obtained in the various steps of the method of Figure 9;

11A and 11B schematically illustrate plan views of a first mask plate and a second mask plate for evaporating organic light-emitting materials during the manufacturing process of the display panel of FIG. 3A according to an embodiment of the present invention;

Figure 11C schematically shows a schematic diagram of stacking and aligning the first and second masks of Figures 11A and 11B with each other;

12A and 12B schematically illustrate plan views of a first mask plate and a second mask plate for evaporating organic light-emitting materials during the manufacturing process of the display panel of FIG. 6 according to an embodiment of the present invention;

Figure 12C schematically shows a schematic diagram of stacking and aligning the first and second masks of Figures 12A and 12B with each other; and

FIG. 13 schematically illustrates a plan view of a third mask for evaporating organic light-emitting materials during the manufacturing process of the display panel of FIG. 7 according to an embodiment of the present invention.

Detailed ways

It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or Sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present disclosure.

Spaces such as "row", "column", "below", "below", "below", "below", "above", "above", etc. Relative terms may be used herein for convenience of description to describe the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that these spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" or "beneath" other elements or features would then be oriented "under the other elements or features" above the characteristics". Thus, the exemplary terms "under" and "under" can encompass both an orientation of above and below. Terms such as "before" or "before" and "after" or "followed by" may similarly be used, for example, to indicate the order in which light travels through elements. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. In addition, it will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the present disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It will be further understood that the terms "comprising" and/or "comprising" when used in this specification designate the presence of stated features, integers, steps, operations, elements and/or parts, but do not exclude one or more The presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof, of other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

It will be understood that when an element or layer is referred to as being "on," "connected to," "coupled to," or "adjacent to another element or layer" When present, it may be directly on, directly connected to, directly coupled to, or directly adjacent to another element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly connected to," "directly coupled to," "directly adjacent to" another element or layer , with no intervening elements or layers present. However, in no case should "on" or "directly on" be interpreted as requiring a layer to completely cover the layer below.

Embodiments of the disclosure are described herein with reference to schematic illustrations (and intermediate structures) of idealized embodiments of the disclosure. As such, variations to the shapes of the illustrations are to be expected, eg, as a result of manufacturing techniques and/or tolerances. Accordingly, embodiments of the present disclosure should not be construed as limited to the particular shapes of the regions illustrated herein, but are to include deviations in shapes due, for example, to manufacturing. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present disclosure.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be construed to have meanings consistent with their meanings in the relevant art and/or the context of this specification, and will not be idealized or overly interpreted in a formal sense, unless expressly defined as such herein.

Figure 1 schematically shows a plan view of an arrangement 100 of sub-pixel regions in a typical OLED display panel.

Referring to FIG. 1 , two first sub-pixel regions 101 , two second sub-pixel regions 102 and one third sub-pixel region 103 are shown. These sub-pixel regions 101 , 102 and 103 are arranged in an array and include respective light emitting layers EL1 , EL2 and EL3 and respective light emitting layers in their respective central regions defined by respective openings of a pixel defining layer (not shown) Zones EZ1, EZ2 and EZ3. The outlines of the light emitting regions EZ1 , EZ2 and EZ3 can be considered to substantially coincide with the boundaries of the openings of the pixel defining layer. When the first, second and third light emitting layers EL1, EL2 and EL3 are excited, the respective light emitting regions EZ1, EZ2 and EZ3 will emit light of different colors.

Since the first and second light emitting layers EL1 and EL2 have corners opposite to each other in the horizontal direction, the horizontally adjacent first and second light emitting layers EL1 and EL2 may partially overlap each other. Similarly, since the first and second light emitting layers EL1 and EL2 have corners opposite to each other in the vertical direction, the vertically adjacent first and second light emitting layers EL1 and EL2 also partially overlap each other, as shown in FIG. 1 indicated by the dashed ellipse. This easily leads to the problem of carrier crosstalk. For example, when the first light-emitting layer EL1 needs to be turned on and the second light-emitting layer EL2 needs to be turned off, the carriers in the first light-emitting layer EL1 may drift to the second light-emitting layer EL2, causing the second light-emitting layer EL2 to emit light slightly bright, resulting in undesired color mixing.

FIG. 2A schematically shows a plan view of a typical mask 200 for evaporating organic light-emitting materials to form patterns of light-emitting layers. For the convenience of illustration, only a partial area of the mask 200 is shown.

Referring to FIG. 2A , the mask 200 is patterned to include an array of through holes 201 , wherein the pattern of the through holes 201 may, for example, correspond to the pattern of the first light emitting layer EL1 or the second light emitting layer EL2 in FIG. 1 . That is, the mask plate 200 may be used to form the first light emitting layer EL1 or the second light emitting layer EL2 shown in FIG. 1 .

In order to ensure the positional accuracy and dimensional accuracy of the formed pattern, the mask plate needs to be tensioned in a predetermined direction with a certain tensile force during use to prevent the mask plate from being deformed by gravity or heat. The predetermined direction in which the tensile force is applied is related to the size of the mother substrate used in vapor deposition and the shape of the perforation of the mask (or, similarly, the light emitting layer to be formed). Generally, the tensile force is applied in a direction parallel to the short sides of the mother substrate. For example, if the mother substrate has a size of 750 mm×650 mm, then a tensile force is applied in a direction parallel to a side of 650 mm of the mother substrate. In some cases, the tensile force is applied in the direction of the corners of the perforations of the mask.

FIG. 2B schematically shows the arrangement relationship of the mask plate 200 relative to the mother substrate MSB during the evaporation process.

Referring to FIG. 2B , the mask 200 is arranged over the mother substrate MSB (shown as a dotted rectangle), and the evaporated luminescent material is driven through the through holes 201 in the mask 200 (for convenience of illustration, in FIG. 2B) and deposited on the mother substrate MSB to form the corresponding pattern of the light-emitting layer. During this process, the mask 200 is tensioned in a direction parallel to the short side of the mother substrate MSB, as indicated by the hollow arrows in FIG. 2B . In a subsequent process, the mother substrate MSB may be singulated and cut into 3×4 display panels along the intersecting dotted lines.

Referring back to FIG. 2A, in the case of the mask 200, a tensile force is applied in the direction indicated by the open arrow. The tensile force is conducted inside the mask 200, and due to the array of perforations 201, the conduction path must bypass these perforations, as indicated by the solid arrows in Figure 2A. This causes the conduction path of the stretching force to deviate from the predetermined direction in which the stretching force is applied, which affects the stretching effect of the mask plate 200 .

In addition, the four right angles of the through hole 201 impose higher requirements on the manufacturing process of the mask plate 200 . The through holes 201 of the mask plate 200 are usually formed by etching the metal sheet with an etching solution, and the etching load of the etching solution at right angles is different from that at straight edges. Under the same etchant concentration, the etching load at the right angle is twice that at the straight edge. That is to say, in the case of the same etching solution concentration, if the accuracy of the straight edge is to be ensured, the etching accuracy of the right angle cannot be guaranteed, and if the accuracy of the right angle is to be ensured, the straight edge will be over-etched.

3A schematically shows a plan view of an arrangement 300 of five sub-pixel regions in a display panel DP according to an embodiment of the present invention.

Referring to FIG. 3A, a first subpixel area 301, a second subpixel area 302, and a third subpixel area 303 are shown. These sub-pixel regions 301, 302 and 303 include respective light emitting layers EL1, EL2 and EL3 and respective light emitting regions EZ1, EZ2 and EZ3.

The first and second light emitting layers EL1 and EL2 are alternately arranged in the first direction D1 and the second direction D2 crossing the first direction D1. In this example, the second direction D2 is substantially perpendicular to the first direction D1, although this is not required. The term "substantially" as used herein is intended to encompass deviations from ideal due, for example, to manufacturing processes.

Each third light emitting layer EL3 is dispersed among each first light emitting layer EL1 and each second light emitting layer EL2. Specifically, as shown in FIG. 3A, each third light emitting layer EL3 is directly adjacent to it by two first light emitting layers EL1 (one upper right, one lower left) and two second light emitting layers EL2 (one upper left, one right below) surrounded. More specifically, the third light emitting layer EL3 is located at the geometric center of the upper left second light emitting layer EL2, the geometric center of the upper right first light emitting layer EL1, the geometric center of the lower right second light emitting layer EL2, and the lower left first light emitting layer EL1. The interior of the quadrilateral formed by connecting the geometric centers in turn.

Each of the first and second light emitting layers EL1 and EL2 includes two first corners (specifically, one upper corner and one lower corner) opposite to each other in the first direction D1 and two in the second direction D2 two second corners (specifically, a left corner and a right corner) opposite each other. Each of the first and second corners has a chamfered edge so that the first and second light emitting layers EL1 and EL2 do not overlap each other. The phrase "first corner of the light-emitting layer" as used herein refers to a region of the light-emitting layer that is more protruding in the first direction D1 relative to other regions of the light-emitting layer, and as used herein, the phrase "emitting light" The "second corner portion of the layer" refers to a region of the light-emitting layer that is more protruded in the second direction D2 relative to other regions of the light-emitting layer. The phrase "A and B do not overlap each other" as used herein means that there is no intersection between A's footprint and B's footprint.

A first corner portion of each first light-emitting layer EL1 is directly adjacent to a first corner portion of the corresponding second light-emitting layer EL2, and the corresponding second light-emitting layer EL2 is in the first direction D1. The first light-emitting layer EL1 is directly adjacent, and the distance between the one first corner portion of the first light-emitting layer EL1 and the one first corner portion of the corresponding second light-emitting layer EL2 is the first The minimum distance between the light-emitting layer EL1 and the corresponding second light-emitting layer EL2. The phrase "the distance between one corner and the other corner" as used herein means the smallest of the distances between each point on the corner and each point on the other corner. In the example of FIG. 3A , the lower corner portion of the upper right first light emitting layer EL1 is directly adjacent to the upper corner portion of the lower right second light emitting layer EL2 , and the lower corner portion of the upper right first light emitting layer EL1 and the lower right second light emitting layer EL1 emit light directly. The distance between the upper corners of the layer EL2 is the minimum distance between the upper right first light emitting layer EL1 and the lower right second light emitting layer EL2. It will be understood that the phrase "A and B partially overlap" as used herein covers the situation where A and B are in contact with each other (ie, A and B share a boundary).

The two sides forming the lower corner portion of the upper right first light emitting layer EL1 include respective straight line portions whose respective imaginary extension lines intersect to form a first imaginary corner portion, as shown by dotted lines in FIG. 3A . The two sides forming the upper corner of the lower right second light emitting layer EL2 include respective straight portions whose respective imaginary extension lines intersect to form a second imaginary corner, as shown by the dotted lines in FIG. 3A . The first virtual corner partially overlaps the second virtual corner. The same applies to the other first and second light emitting layers EL1 and EL2 in the display panel DP, and helps the first and second light emitting layers EL1 and EL2 to have as large an area as possible.

A second corner portion of each first light-emitting layer EL1 is directly adjacent to a second corner portion of the corresponding second light-emitting layer EL2, and the corresponding second light-emitting layer EL2 is adjacent to the second light-emitting layer EL2 in the second direction D2. The first light-emitting layer EL1 is directly adjacent, and the distance between the one second corner portion of the first light-emitting layer EL1 and the one second corner portion of the corresponding second light-emitting layer EL2 is the first The minimum distance between the light-emitting layer EL1 and the corresponding second light-emitting layer EL2. In the example of FIG. 3A , the right corner of the lower left first light emitting layer EL1 is directly adjacent to the left corner of the lower right second light emitting layer EL2 , and the right corner of the lower left first light emitting layer EL1 and the lower right second light emitting layer are directly adjacent to each other. The distance between the left corners of the layer EL2 is the minimum distance between the lower left first light emitting layer EL1 and the lower right second light emitting layer EL2.

The two sides forming the right corner of the lower left first light emitting layer EL1 include respective straight portions whose respective imaginary extension lines intersect to form a third imaginary corner, as shown by dotted lines in FIG. 3A . The two sides forming the left corner of the lower right second light emitting layer EL2 include respective straight portions whose respective imaginary extension lines intersect to form a fourth imaginary corner, as shown by dotted lines in FIG. 3A . The third virtual corner partially overlaps the fourth virtual corner. The same applies to the other first and second light emitting layers EL1 and EL2 in the display panel DP, and helps the first and second light emitting layers EL1 and EL2 to have as large an area as possible.

In the example of FIG. 3A, each of the first and second corners of each first light emitting layer EL1 is rounded with a first radius r1, which is typically greater than or equal to 10 microns (um), and each of the first and second corners of each second light-emitting layer EL2 is rounded with a second radius r2, which is typically greater than or equal to 10 um. In other embodiments, the corners may be rounded with other numerical radii.

As a result of the chamfering, the first and second light emitting layers EL1 and EL2 directly adjacent in the first direction D1 are spaced apart from each other, and the first and second light emitting layers directly adjacent in the second direction D1 EL1 and EL2 are also spaced apart from each other. This avoids the problem of carrier crosstalk and thus avoids undesired color mixing. Moreover, the first and second light emitting layers EL1 and EL2 with rounded corners do not require their masks to have through holes with sharp corners, which increases the contact area between the mask material and the etching solution. This helps mitigate or eliminate poor etch accuracy at sharp corners due to etch loading.

In some embodiments, the minimum distance d1 from any point p1 on the edge of each of the first and second corners of each first light emitting layer EL1 to the boundary of the corresponding first light emitting zone EZ1 is greater than or equal to the offset tolerance value dt, and an arbitrary point p2 on the edge of each of the first and second corners of each second light-emitting layer EL2 to the boundary of the corresponding second light-emitting zone EZ2 The minimum distance d2 is greater than or equal to the offset tolerance value dt. The offset tolerance value dt is a design value that takes into account process errors and is typically 9 to 12 um. In this example, when designing the pixel arrangement, the minimum distance between the straight edge of the light-emitting layer and the straight edge of the light-emitting region is expected to be equal to the offset tolerance value dt.

In some embodiments, the geometric center of each first light emitting layer EL1 and the geometric center of the corresponding second light emitting layer EL2 directly adjacent to the first light emitting layer EL1 in the first direction D1 are located parallel to the On the straight line s1 in the first direction D1, and the geometric center of each first light-emitting layer EL1 and the geometric center of the corresponding second light-emitting layer EL2 directly adjacent to the first light-emitting layer EL1 in the second direction D2 are located at On the straight line s2 parallel to the second direction D2. The third light emitting layers EL3 interspersed between the first light emitting layers EL1 and the second light emitting layers EL2 do not overlap the straight lines s1 and s2.

It will be appreciated that the shapes of the light emitting layers and light emitting regions shown in Figure 3A are exemplary and that other embodiments are possible. For example, each of the first light emitting layers EL1 may include additional corners protruding in directions different from the first and second directions D1 and D2, and these additional corners may or may not be chamfered.

More generally, the display panel DP according to the embodiment of the present invention may be described as follows with reference to FIG. 3B . Figure 3B more clearly shows the first and second subpixel regions 301 and 302 in the arrangement 300 of subpixel regions of Figure 3A, with subpixel region 303 omitted for clarity of illustration.

Referring to FIG. 3B , two second corners of each of the first light emitting layers EL1 opposite to each other in the second direction D2 are chamfered to provide gap regions gp11 among the first light emitting layers EL1 . Each gap region gp11 extends in a straight line without a bent portion in the first direction D1, and spans the entire size of the display panel DP in the first direction D1. Also, two second corners of each of the second light emitting layers EL2 opposite to each other in the second direction D2 are chamfered to provide a gap region gp12 between each of the second light emitting layers EL2. Each gap region gp12 extends in a straight line without a bent portion in the first direction D1, and spans the entire size of the display panel DP in the first direction D1. The void region gp11 does not overlap with any of the first light emitting layers EL1, and the void region gp12 does not overlap with any second light emitting layer EL2. As will be explained in more detail later, this can be achieved by modifying the perforation pattern of the mask used to form these light emitting layers.

Similarly, two first corners of each of the first light emitting layers EL1 opposite to each other in the first direction D1 are chamfered to provide gap regions gp21 among the first light emitting layers EL1 . Each gap region gp21 extends in a straight line without a bent portion in the second direction D2, and spans the entire size of the display panel DP in the second direction D2. Also, two first corners of each of the second light emitting layers EL2 opposite to each other in the first direction D1 are chamfered to provide a gap region gp22 between each of the second light emitting layers EL2. Each gap region gp22 extends in a straight line without a bent portion in the second direction D2, and spans the entire size of the display panel DP in the second direction D2. The void region gp21 does not overlap with any of the first light emitting layers EL1, and the void region gp22 does not overlap with any second light emitting layer EL2.

FIG. 4 schematically shows an example pixel circuit of an arrangement 300 of sub-pixel regions of the display panel DP of FIG. 3A.

4, the display panel DP includes first and second gate lines GL1 and GL2, first to third data lines DL1, DL2 and DL3, and first to third power supply lines PL1, PL2 and PL3. The first sub-pixel region 301 is formed at the intersection of the first gate line GL1 and the third data line DL3, the second sub-pixel region 302 is formed at the intersection of the first gate line GL1 and the first data line DL1, and the third sub-pixel region 302 is formed at the intersection of the first gate line GL1 and the first data line DL1. The pixel area 303 is formed at the intersection of the first gate line GL1 and the second data line DL2. In addition, another first subpixel region 301 is formed at the intersection of the second gate line GL2 and the third data line DL3, and another second subpixel region 302 is formed at the intersection of the second gate line GL2 and the third data line DL3 the intersection.

Each of the sub-pixel regions 301, 302 and 303 includes a switching transistor Ts, a driving transistor Td, a storage capacitor Cst and a light emitting diode Del. This is a typical two transistor one capacitor ("2T1C") pixel circuit. It will be understood that the pixel circuit shown in FIG. 4 is exemplary and schematic only. In other embodiments, other forms of pixel circuitry may be provided. For example, the gate of the switching transistor Ts in the third sub-pixel region 303 may be connected to the second gate line GL2 in addition to the first gate line GL1. Alternatively, the gates of the switching transistors Ts in the third sub-pixel region 303 may be connected to separate gate lines different from the first and second gate lines GL1 and GL2. Any other suitable pixel circuits may also be employed.

FIG. 5 schematically shows a cross-sectional view of the display panel DP of FIG. 3A . For the convenience of description, it is assumed that the pixel circuit as shown in FIG. 4 is employed in the display panel DP.

Referring to FIG. 5 , the display panel DP includes a base substrate 510 on which a driving transistor Td, a switching transistor Ts and a storage capacitor Cst (not shown) are formed in each sub-pixel region. Although not shown, each of the driving transistor Td and the switching transistor Ts includes a gate electrode, a semiconductor layer, a source electrode and a drain electrode. For example, the top-gate type driving transistor Td includes a semiconductor layer of polysilicon, a gate insulating layer on the semiconductor layer, a gate electrode on the gate insulating layer, and source and drain electrodes above the gate electrode. The center of the semiconductor layer serves as a channel, and impurities are doped to both ends of the semiconductor layer. The source and drain electrodes contact both ends of the semiconductor layer.

The passivation layer 520 is formed on the entire surface of the base substrate 510 to cover the driving transistor Td, the switching transistor Ts, and the storage capacitor Cst (not shown). The passivation layer 520 may be formed of an inorganic insulating material (eg, silicon oxide or silicon nitride) or an organic insulating material (eg, benzocyclobutene or acrylic resin).

The first electrode 541 is formed on the passivation layer 520 . The first electrode 541 serves as the anode of the light emitting diode Del, and is connected to the drain electrode of the driving transistor Td (not shown). It will be appreciated that although only one first electrode 541 is labeled in FIG. 4 , there are multiple first electrodes formed on the passivation layer 520 . These first electrodes belong to the respective sub-pixel regions SP, and may be formed by patterning a conductive layer (eg, made of indium tin oxide (ITO)). The sub-pixel area SP marked in FIG. 5 may be any one of the first, second and third sub-pixel areas 301 , 302 and 303 in FIG. 3A .

The pixel defining layer 530 is formed at the boundary of the first electrode 541 so as to define different sub-pixel regions SP. The pixel defining layer 530 includes a patterned bank 530a and a plurality of openings 530b separated by the bank. The position, size and shape of the opening 530b determine the size and shape of the exposed portion of the first electrode 541, and thus define the position, size and shape of the light emitting region EZ of the sub-pixel region SP. It will be appreciated that although only one opening 530b is labeled in FIG. 4, a plurality of openings are formed in respective ones of the respective subpixel regions to expose the corresponding first electrodes. The pixel defining layer 530 may be formed of an inorganic insulating material (eg, silicon oxide or silicon nitride) or an organic insulating material (eg, benzocyclobutene or acrylic resin).

The light emitting layer 542 is formed on the exposed portion of the first electrode 541 and covers the opening 530b. The area of the light emitting layer 542 is generally larger than the area of the opening 530b such that the orthographic projection of the opening 530b on the base substrate 510 typically falls within the orthographic projection of the light emitting layer 542 on the base substrate 510 . Alternatively, in some embodiments, light emitting layer 542 may only fill opening 530b without exceeding opening 530b. The light emitting layer 542 may include an electron injection layer (EIL), an emission material layer (EML), and a hole injection layer (HIL) to improve emission efficiency. It will be appreciated that although only one light emitting layer 542 is marked in FIG. 5 , there are multiple light emitting layers formed on respective ones of the respective first electrodes, as shown by the respective hatched areas in FIG. 5 of. The light emitting layer 542 marked in FIG. 5 may be any one of the first, second and third light emitting layers EL1 , EL2 and EL3 in FIG. 3A .

The second electrodes 543 are integrally formed on the respective light emitting layers 542 . The second electrode 543 serves as a cathode of the light emitting diode Del, and may be formed of a conductive layer (eg, made of aluminum).

The first electrode 541, the light emitting layer 542 and the second electrode 543 form a light emitting diode Del. When the light emitting diode Del is excited, a region of the light emitting layer 542 overlapping the opening 530b can efficiently emit light, and may be defined as a light emitting region EZ. As shown in FIG. 5, the outline of the light emitting zone EZ is determined by the shape of the opening 530b.

FIG. 6 schematically shows a plan view of a variant 600 of the arrangement of sub-pixel regions in the display panel DP of FIG. 3A .

6, the first sub-pixel area 601, the second sub-pixel area 602 and the third sub-pixel area 603 include respective light-emitting layers EL1, EL2 and EL3, and the first and second light-emitting layers EL1 and EL2 have different The shapes of those shown in 3A.

Specifically, each of the first and second corners of each of the first light-emitting layers EL1 is flattened, and each of the first and second corners of each of the second light-emitting layers EL2 is flattened. Each corner of the is also chamfered. As a result, the first and second light emitting layers EL1 and EL2 directly adjacent in the first direction D1 are spaced apart from each other, and the first and second light emitting layers EL1 and EL2 directly adjacent in the second direction D1 They are also spaced apart from each other. This avoids the problem of carrier crosstalk and thus avoids undesired color mixing.

The arrangement 600 of sub-pixel regions may otherwise adopt the same configuration as the arrangement 300 of FIG. 3A. For example, the minimum distance d1 from any point p1 on the edge of each of the first and second corners of each first light-emitting layer EL1 to the boundary of the corresponding first light-emitting zone EZ1 is greater than or equal to the offset The tolerance value dt, and the minimum distance d2 from any point p2 on the edge of each of the first and second corners of each second light-emitting layer EL2 to the boundary of the corresponding second light-emitting zone EZ2 is greater than or equal to the offset tolerance value dt.

It will be appreciated that although each of the chamfered first and second light emitting layers EL1 and EL2 is shown in FIG. 6 as having flat edges, in practice these flat edges are at their junctions. The corners may be rounded due to process reasons. That is, each flat edge may be rounded at its two ends. This still falls within the scope of this application.

FIG. 7 schematically shows a plan view of another variation 700 of the arrangement of sub-pixel regions in the display panel DP of FIG. 3A .

Referring to FIG. 7 , the first subpixel area 701 and the second subpixel area 702 include respective light emitting layers EL1 and EL2 having the same configurations as those shown in FIG. 3A . The arrangement 700 of the sub-pixel regions differs from the arrangement 300 in that the third light-emitting layer EL3 in the third sub-pixel region 703 now has the shape of a rounded polygon (in this example, a rounded rectangle). Compared with the octagonal third light emitting layer EL3 in FIG. 3A , the rounded polygonal third light emitting layer EL3 does not require the mask to have through holes with sharp corners, which helps to alleviate or eliminate the load due to etching. Causes poor accuracy at sharp corners. It will be appreciated that the third light emitting layer EL3 shown in FIG. 7 is exemplary, and in other embodiments, the third light emitting layer EL3 may have other shapes of rounded polygons.

In some embodiments, each third light emitting zone EZ3 has a shape conformal to the shape of the corresponding third light emitting layer EL3 such that any point on the edge of the corresponding third light emitting layer EL3 reaches the third light emitting zone The distance of EZ3 is substantially equal to the offset tolerance value dt. In the example of FIG. 7 , the third light emitting zone EZ3 has a rounded rectangular shape following the shape of the corresponding third light emitting layer EL3 and is chamfered with an appropriate chamfering radius smaller than that of the third light emitting layer EL3 rounded corners. More specifically, the minimum distance from any point on the edge of the third light-emitting layer EL3 to the boundary of the third light-emitting zone EZ3 is substantially equal to the offset tolerance value dt. This allows the third sub-pixel region to have a consistent offset tolerance value in all directions. That is, the process margins are the same in all directions, thereby facilitating process control.

8A schematically shows a plan view of a plurality of sub-pixel regions of a display panel DP according to an embodiment of the present invention.

Referring to FIG. 8A , the first, second and third sub-pixel regions 701 , 702 and 703 have the same configurations as those described above with respect to FIG. 7 . Specifically, the upper, lower, left and right corners of each of the first light-emitting layers EL1 are rounded with a first radius, and the upper, lower, and left corners of each of the second light-emitting layers EL2 The corners and the right corners are rounded with a second radius, and each of the third light emitting layers EL3 has the shape of a rounded polygon (specifically, a rounded rectangle).

In this example, the first direction D1 is substantially perpendicular to the second direction D2. Each of the first light emitting layers EL1 has a shape obtained by chamfering each of four corners of a first square whose first and second diagonals are parallel to the first and second directions D1 and D2. Each of the second light emitting layers EL2 has a shape obtained by chamfering each of four corners of a second square whose first and second diagonals are parallel to the first and second directions D1 and D2. Each third light emitting layer EL3 has a shape obtained by rounding each of four corners of a rectangle, one long side of the rectangle corresponding to the one directly adjacent to the third light emitting layer EL3 One side of the first light-emitting layer EL1 is opposite and substantially parallel to the side of the corresponding first light-emitting layer EL1, and a short side of the rectangle is directly adjacent to a corresponding second light-emitting layer EL3. One side of the light-emitting layer EL2 is opposite to and substantially parallel to the side of the corresponding second light-emitting layer EL2.

The two first subpixel regions 701, the two second subpixel regions 702, and the four third subpixel regions 703 shown in FIG. 8A form one repeating unit. The two first sub-pixel regions are arranged at the i-th row and the j+2-th column and the i+2-th row and the j-th column, respectively. The two second sub-pixel regions are arranged at the i-th row and the j-th column and the i+2-th row and the j+2-th column, respectively. The four third sub-pixel regions are arranged at the i+1th row and the j+1th column, the i+1th row and the j+3th column, the i+3th row and the j+1th column, and the ith +3 rows and j+3 columns (i and j are natural numbers). Here, the terms "row" and "column" are used with reference to the first direction D1 and the second direction D2 in FIG. 8A , that is, a direction parallel to the first direction D1 is called a row direction, and parallel to the second direction D1 The direction of the direction D2 is referred to as the column direction.

A plurality of such repeating units are repeatedly arranged across the entire display panel DP in the first and second directions D1 and D2. This pixel arrangement is known as a Diamond pixel arrangement, wherein the first subpixel area 701 is a blue subpixel, the second subpixel area 702 is a red subpixel, and the third subpixel area 703 is a green subpixel.

The areas of the light-emitting regions of the red, green and blue sub-pixels are determined by the properties of the light-emitting material. The blue light-emitting material has a shorter lifetime, so the blue light-emitting region is usually made to have a larger area in order to delay aging. The human eye is more sensitive to green than blue and red, and thus green light-emitting regions are usually made to have a smaller area. In some embodiments, the area ratio of the light-emitting regions of the red, green and blue sub-pixels is set as Sr:Sg:Sb=1:(1.2~1.5):(1.4~1.8), wherein Sr is the red light-emitting region , Sg is the area of the green light-emitting region, and Sb is the area of the blue light-emitting region.

It will be appreciated that, although not shown in FIG. 8A , the first and second light emitting layers EL1 and EL2 may adopt the same configurations as those described in FIG. 6 . Alternatively or additionally, in some embodiments, the third light emitting layer EL3 may adopt the same configurations as those described in FIGS. 3A or 6 . In some embodiments, the third light emitting layer EL3 may also be chamfered to have a substantially elliptical shape without straight sides, and such a shape is still considered to be obtained by making each of the four corners of the rectangle The shape obtained by rounding the corners.

More generally, the display panel DP according to the embodiment of the present invention can be described as including a plurality of first-group light-emitting layers arranged in the third direction D3 and a plurality of second light-emitting layers arranged in the third direction D3. groups of light-emitting layers, wherein each of the plurality of first groups includes a plurality of first light-emitting layers EL1 and a plurality of third light-emitting layers EL3 arranged alternately, and each of the plurality of second groups It includes a plurality of third light emitting layers EL3 and a plurality of second light emitting layers EL2 which are alternately arranged. The plurality of first groups and the plurality of second groups are alternately arranged in a fourth direction D4 crossing (eg, substantially perpendicular to) the third direction D3. The plurality of first groups and the plurality of second groups are arranged such that a plurality of third groups of light emitting layers arranged in the fourth direction D4 and a plurality of first groups arranged in the fourth direction D4 are formed. Four groups of light-emitting layers, wherein the plurality of third groups and the plurality of fourth groups are alternately arranged in the third direction D3. Each of the plurality of third groups includes a plurality of first light emitting layers EL1 and a plurality of third light emitting layers EL3 arranged alternately, and each of the plurality of fourth groups includes a plurality of alternately arranged A third light emitting layer EL3 and a plurality of second light emitting layers EL2.

FIG. 8B schematically shows the outline of the display panel DP of FIG. 8A .

Referring to FIG. 8B , the display panel DP has a substantially rectangular outline including two first sides extending along the first direction D1 and two second sides extending along the second direction D2. A plurality of repeating units as shown in FIG. 8A are repeatedly arranged across the entire display panel DP in the first and second directions D1 and D2, forming an array of sub-pixels.

It will be appreciated that in other embodiments, the display panel DP may have a profile that is rotated 90 degrees clockwise or counterclockwise relative to that shown in FIG. 8B . That is, the rectangular outline of the display panel DP may have longer sides extending along the first direction D1 and shorter sides extending along the second direction D2.

9 schematically shows a flowchart of a method 900 of manufacturing a display panel according to an embodiment of the present invention, and FIGS. 10A to 10F schematically show cross-sectional views of the display panel DP obtained in each step of the method 900 . .

At step 910, the first conductive layer is patterned to form a plurality of first electrodes. As shown in FIG. 10A , a passivation layer 1020 is formed on the base substrate 1010 to cover electronic components in the pixel circuit (eg, the transistors Ts and Td and the capacitor Cst shown in FIG. 4 ), and on the passivation layer 1020 A first conductive layer 1041 is formed. The first conductive layer 1041 is made of, for example, ITO. As shown in FIG. 10B , the first conductive layer 1041 is patterned into a plurality of first electrodes arranged in an array in the first direction D1 and the second direction D2 to correspond to respective sub-pixel regions. This can be achieved by any suitable means, such as photolithography or laser etching.

At step 920, a pixel defining layer is formed on the patterned first conductive layer. As shown in FIG. 10C , the pixel defining layer 1030 is formed on the patterned first conductive layer 1041 to cover each of the first electrodes.

At step 930, the pixel defining layer is patterned to form a plurality of openings exposing the plurality of first electrodes, respectively. As shown in FIG. 10D , the pixel defining layer 1030 is patterned to form a plurality of openings 1030b exposing a corresponding one of the respective first electrodes 1041 , wherein each opening 1030b exposes at least a portion of the corresponding first electrode 1041 . The first plurality of first electrodes in each first electrode 1041 are respectively exposed by the first plurality of openings in the plurality of openings 1030b, and the second plurality of first electrodes in each first electrode 1041 are respectively exposed by the plurality of openings 1030b. A second plurality of openings of the plurality of openings 1030b are exposed, and a third plurality of first electrodes of each of the first electrodes 1041 are exposed by a third plurality of openings of the plurality of openings 1103, respectively.

This can be achieved by any suitable means, such as a photolithographic process. In one example, a photoresist layer is first formed on the pixel defining layer 1030 shown in FIG. 10C by, for example, spin coating, and then irradiated with ultraviolet light through a photomask having a pattern corresponding to the plurality of openings 1030b A photoresist layer that causes a chemical reaction in the photoresist in the exposed areas. Then, the photoresist in the exposed areas is removed by development, so that the pattern of the photomask is copied to the photoresist layer. Finally, the pattern is transferred to the pixel definition layer 1030 by etching, and the residual photoresist is removed to obtain a patterned retaining wall 1030a and an opening 1030b separated by the retaining wall 1030a, as shown in FIG. 10D .

At step 940, a plurality of first light emitting layers covering the first plurality of openings, respectively, a plurality of second light emitting layers covering the second plurality of openings, respectively, and a plurality of second light emitting layers covering the third plurality of openings, respectively, are formed a plurality of third light emitting layers.

The formation of the first light-emitting layer is realized by evaporating the first light-emitting material by using the first evaporation mask. The first light-emitting material is, for example, an organic light-emitting material that emits blue light when excited. The formation of the second light-emitting layer is achieved by evaporating the second light-emitting material using the second evaporation mask. The second light-emitting material is, for example, an organic light-emitting material that emits red light when excited. The formation of the third light-emitting layer is realized by evaporating the third light-emitting material by using the third evaporation mask. The third light-emitting material is, for example, an organic light-emitting material that emits green light when excited.

As shown in FIG. 10E , the light emitting layer 1042 is formed on the first electrode 1041 and covers the opening 1030b, and a region of the light emitting layer 1042 overlapping the opening 1030b forms the light emitting region EZ. The light emitting layer 1042 represents any one of the first, second and third light emitting layers EL1, EL2 and EL3 described above with respect to Figures 3A to 8B. Additionally, modification of the shape of the openings 1030b can be achieved by modifying the pattern of the photomask when patterning the pixel defining layer 1030 to impart a desired profile to the resulting light emitting zone EZ.

At step 950, a second conductive layer is formed on each of the first, second and third light emitting layers. As shown in FIG. 10F , second conductive layers 1043 are formed on the respective light emitting layers 1042 . The second conductive layer 1043 may be made of, for example, aluminum. The first electrode 1041, the light emitting layer 1042 and the second electrode 1043 form a light emitting diode Del.

The method 900 provides the same advantages as those described above with respect to the display panel embodiments, which are not repeated here.

FIGS. 11A and 11B schematically illustrate plan views of a first mask 1100A and a second mask 1100B for evaporating organic light emitting materials in a manufacturing process of the display panel DP of FIG. 3A according to an embodiment of the present invention.

11A, the first mask 1100A is patterned to include an array of first through holes 1101a, each of which includes two chamfered corners opposite to each other in the first direction D1 and Two chamfered corners facing each other in the second direction D2 where the direction D1 intersects. In this embodiment, each corner of each first through hole 1101a is rounded with a first radius, wherein the first radius is, for example, greater than or equal to 10 um. The first mask 1100A is used to form the pattern of the first light emitting layer EL1 in FIG. 3A .

Referring to FIG. 11B, the second mask 1100B is patterned to include an array of second through holes 1101b, each second through hole 1101b including two chamfered corners opposite to each other in the first direction D1 and Two chamfered corners opposite to each other in the second direction D2. In this embodiment, each corner of each second through hole 1101b is rounded with a second radius, wherein the second radius is, for example, greater than or equal to 10 um. The second mask 1100B is used to form the pattern of the second light emitting layer EL2 in FIG. 3A .

FIG. 11C schematically shows a schematic view of stacking and aligning the first and second masks 1100A and 1100B of FIGS. 11A and 11B with each other.

Referring to FIG. 11C , the second mask 1100B is laminated on the first mask 1100A. The respective first and second through-holes 1101a and 1101b are positioned in the first and second masks 1100A and 1100B, respectively, such that when the first and second masks 1100A and 1100B are stacked and aligned with each other, the first and second through-holes 1101a and 1101b are alternately arranged in the first direction D1 and the second direction D2 without overlapping each other. This enables the arrangement of the first and second light emitting layers EL1 and EL2 shown in FIG. 3A to be realized.

In some embodiments, the respective first and second vias 1101a and 1101b are positioned in the first and second masks 1100A and 1100B, respectively, such that when the first and second masks 1100A and 1100B are stacked and aligned with each other, The geometric center of each first through hole 1101a and the geometric center of the corresponding second through hole 1101b directly adjacent to the first through hole 1101a in the first direction D1 are located on a straight line s1 parallel to the first direction D1, And the geometric center of each first through hole 1101a and the geometric center of the corresponding second through hole 1101b directly adjacent to the first through hole 1101a in the second direction D2 are located on the straight line s2 parallel to the second direction D2 .

In some embodiments, the two corners of each of the first through holes 1101a that are opposite to each other in the second direction D2 are chamfered to provide non-perforated regions 1110a between the first through holes 1101a. Each non-perforated region 1110a extends in a straight line in the first direction D1 without a bent portion, and spans the entire dimension of the first mask plate 1100A in the first direction D1, as shown in FIG. 11A . This enables the conduction path of the tensile force inside the first reticle 1100A along these non-perforated regions 1110a (as indicated by the solid arrows) when the first reticle 1100A is tensioned by the tensile force (as indicated by the open arrows). indicated), thereby avoiding the respective first perforations 1101a. Alternatively or additionally, non-perforated regions 1120a are provided between each of the first perforations 1101a, each of which extends in a straight line in the second direction D2 without any bending, and which spans the first mask 1100A in the second The entire dimension in direction D2. This is beneficial to improve the netting effect of the first mask plate 1100A, thereby improving the positional accuracy and dimensional accuracy of the resulting first light-emitting layer EL1. Moreover, the chamfered perforation also reduces the area of the perforated area and improves the mechanical strength of the mask.

Similarly, the two corners of each second perforation 1101b opposite to each other in the second direction D2 are chamfered to provide an unperforated area 1110b between each second perforation 1101b. Each non-perforated region 1110b extends in a straight line in the first direction D1 without any bending, and spans the entire dimension of the second mask plate 1100B in the first direction D1, as shown in FIG. 11B . This enables the conduction path of the tensile force inside the second reticle 1100B along these non-perforated regions 1110b (as indicated by the solid arrows) when the second reticle 1100B is tensioned by the tensile force (as indicated by the open arrows). indicated), thereby avoiding the respective second perforations 1101b. Alternatively or additionally, non-perforated regions 1120b are provided between each of the second perforations 1101b, each of which extends in a straight line in the second direction D2 without any bending, and which spans the second mask plate 1100B in the second The entire dimension in direction D2. This is beneficial to improve the netting effect of the second mask plate 1100B, thereby improving the positional accuracy and dimensional accuracy of the resulting second light-emitting layer EL2.

FIGS. 12A and 12B schematically illustrate plan views of a first mask 1200A and a second mask 1200B for evaporating organic light emitting materials in a manufacturing process of the display panel DP of FIG. 6 according to an embodiment of the present invention.

Referring to FIG. 12A, the first mask 1200A is patterned to include an array of first through holes 1201a, each of which includes two chamfered corners opposite to each other in the first direction D1 and Two chamfered corners facing each other in the second direction D2 where the direction D1 intersects. In this embodiment, each corner of each first through hole 1201a is chamfered. The first mask 1200A is used to form the pattern of the first light emitting layer EL1 in FIG. 6 .

Referring to FIG. 12B , the second mask 1200B is patterned to include an array of second through holes 1201b, each second through hole 1201b including two chamfered corners opposite to each other in the first direction D1 and Two chamfered corners opposite to each other in the second direction D2. In this embodiment, each corner of each second through hole 1201b is chamfered. The second mask 1200B is used to form the pattern of the second light emitting layer EL2 in FIG. 6 .

The first and second masks 1200A and 1200B may otherwise have the same configuration as those of the first and second masks 1100A and 1100B. For example, non-perforated regions 1210a and 1220a are provided between each of the first perforations 1201a, and non-perforated regions 1210b and 1220b are provided between each of the second perforations 1201b. This provides the same advantages as those described above with respect to Figures 11A and 11B.

FIG. 12C schematically shows a schematic diagram of stacking and aligning the first and second masks 1200A and 1200B of FIGS. 12A and 12B with each other.

Referring to FIG. 12C, the second mask 1200B is laminated on the first mask 1200A. The respective first and second through-holes 1201a and 1201b are positioned in the first and second masks 1200A and 1200B, respectively, such that when the first and second masks 1200A and 1200B are stacked and aligned with each other, the first and second through-holes 1201a and 1201b are alternately arranged in the first direction D1 and the second direction D2 without overlapping each other. This enables the arrangement of the first and second light emitting layers EL1 and EL2 shown in FIG. 6 to be realized.

In some embodiments, the respective first and second through-holes 1201a and 1201b are positioned in the first and second masks 1200A and 1200B, respectively, such that when the first and second masks 1200A and 1200B are stacked and aligned with each other, The geometric center of each first through hole 1201a and the geometric center of the corresponding second through hole 1201b directly adjacent to the first through hole 1201a in the first direction D1 are located on a straight line s1 parallel to the first direction D1, And the geometric center of each first through hole 1201a and the geometric center of the corresponding second through hole 1201b directly adjacent to the first through hole 1201a in the second direction D2 are located on the straight line s2 parallel to the second direction D2 .

FIG. 13 schematically shows a plan view of a third mask 1300 for evaporating organic light-emitting materials during the manufacturing process of the display panel DP of FIG. 7 according to an embodiment of the present invention.

Referring to FIG. 13 , the third mask 1300 is patterned to include an array of third through holes 1301 , each third through hole 1301 having the shape of a rounded polygon. In this embodiment, each third through hole 1301 has the shape of a rounded rectangle. The third reticle 1300 is not required to have through-holes with sharp corners, helping to alleviate or eliminate poor etching accuracy at sharp corners due to etch loading.

The third mask 1300 is used to form the pattern of the third light emitting layer EL3 in FIG. 7 . For this purpose, each third through-hole 1301 is positioned in the third mask 1300 such that when the first and second masks (eg, 1100A and 1100B) and the third mask 1300 are stacked and aligned with each other, each third Perforations 1301 are interspersed between each of the first and second perforations (eg, 1101a and 1101b indicated by dashed lines in FIG. 13 ). In this way, after the first, second and third luminescent materials are evaporated onto the substrate through the first, second and third masks 1100A, 1100B and 1300 respectively, the first and second luminescent materials as shown in FIG. 7 are obtained. and patterns of the third light emitting layers EL1, EL2 and EL3.

In some embodiments, the third mask 1300 may be used in combination with the first and second masks 1200A and 1200B to obtain the first and second light emitting layers EL1 and EL2 shown in FIG. The pattern of the combination of the third light-emitting layer EL3 shown.

In some embodiments, each of the third through holes 1301 may have other shapes of rounded polygons to obtain the third light emitting layer EL3 having a corresponding shape.

While the foregoing discussion contains several specific implementation details, these should not be construed as limitations on the scope of any invention or what may be claimed, but rather as descriptions of features that may be limited to particular embodiments of particular inventions. Certain features that are described in this specification in different embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. For example, some of the first and second sub-pixel regions may have the configuration described with respect to FIG. 3A , while others of the first and second sub-pixel regions may have the configuration described with respect to FIG. 6 . For another example, some of the corners of the same light-emitting layer may be rounded, and some of the corners may be chamfered. Similarly, although various operations are depicted in the figures as being in a particular order, this should not be construed as a requirement that the operations be performed in the particular order shown or in a sequential order, nor should it be construed as a requirement that all operations be performed operations shown to obtain the desired result.

Various modifications and adaptations to the foregoing exemplary embodiments of the invention may become apparent to those skilled in the relevant arts in view of the foregoing description, taken in conjunction with reading the accompanying drawings. Any and all modifications will still fall within the scope of the non-limiting and exemplary embodiments of this invention. Furthermore, other embodiments of the inventions described herein will come to mind to one skilled in the art to which these embodiments of the invention pertain having the benefit of the teachings presented in the foregoing descriptions and the associated drawings.

Claims (20)

1. A display panel, comprising: a plurality of first light-emitting layers configured to emit light of a first color when excited; a plurality of second light-emitting layers configured to emit light of a second color when excited; a plurality of third light-emitting layers configured to emit light of a third color when excited; and Pixel defined layers, including: a plurality of first openings covered by respective first light emitting layers, the plurality of first openings overlapping respective regions of the respective first light emitting layers to define respective first light emitting regions of the plurality of first light emitting layers; a plurality of second openings covered by respective second light emitting layers, the plurality of second openings overlapping respective regions of the respective second light emitting layers to define respective second light emitting regions of the plurality of second light emitting layers; and a plurality of third openings covered by respective third light emitting layers, the plurality of third openings overlapping with respective regions of the respective third light emitting layers to define respective third light emitting regions of the plurality of third light emitting layers, The first and second light-emitting layers are alternately arranged in the first direction and the second direction crossing the first direction, and the third light-emitting layers are interspersed between the first light-emitting layers and the second light-emitting layers, and Each of the first and second light-emitting layers includes two first corners opposite to each other in the first direction and two second corners opposite to each other in the second direction, the first 1. Each of the second corners has a chamfered edge so that the first and second light-emitting layers do not overlap each other, wherein the distance from any point on the edge of each of the first and second corners of the first light-emitting layer to the corresponding first light-emitting region is greater than or equal to an offset tolerance value, the offset The tolerance value is the minimum distance between the straight edge of the first light-emitting layer or the second light-emitting layer and the straight edge of the first light-emitting region or the second light-emitting region, respectively, wherein the distance from any point on the edge of each of the first and second corners of the second light-emitting layer to the corresponding second light-emitting region is greater than or equal to the offset tolerance value, Wherein the third light-emitting layer has the shape of a rounded polygon, and wherein the third light-emitting region has a shape conforming to the shape of the corresponding third light-emitting layer, and any point on the edge of the corresponding third light-emitting layer to The minimum distance of the boundary of the third light-emitting area is equal to the offset tolerance value, wherein both the first light-emitting layer and the second light-emitting layer are at least partially in contact with the third light-emitting layer, and each second light-emitting layer and its adjacent first light-emitting layer are in the first direction and There are gaps in the second direction. 2. The display panel of claim 1, wherein one of the two first corners of each first light-emitting layer is directly adjacent to one of the two first corners of the corresponding second light-emitting layer, the corresponding second light-emitting layer is directly adjacent to the first light-emitting layer in the first direction, and The distance between the one first corner portion of the first light-emitting layer and the one first corner portion of the corresponding second light-emitting layer is the distance between the first light-emitting layer and the corresponding second light-emitting layer minimum distance between. 3. The display panel of claim 2, wherein two sides of the one first corner portion forming the first light-emitting layer include respective straight line portions, and respective imaginary extension lines of the straight line portions intersect to form a first imaginary corner portion, wherein the two sides of the one first corner portion forming the corresponding second light emitting layer include respective straight line portions, and respective imaginary extension lines of the straight line portions intersect to form a second virtual corner portion, and wherein the first virtual corner partially overlaps the second virtual corner. 4. The display panel of claim 1, wherein one of the two second corners of each first light-emitting layer is directly adjacent to one of the two second corners of the corresponding second light-emitting layer, the corresponding second light-emitting layer is directly adjacent to the first light-emitting layer in the second direction, and The distance between the one second corner of the first light-emitting layer and the one second corner of the corresponding second light-emitting layer is the distance between the first light-emitting layer and the corresponding second light-emitting layer minimum distance between. 5. The display panel of claim 4, wherein the two sides forming the one second corner portion of the first light-emitting layer include respective straight line portions, and respective imaginary extension lines of the straight line portions intersect to form a third virtual corner portion, wherein two sides of the one second corner portion forming the corresponding second light-emitting layer include respective straight line portions, and respective imaginary extension lines of the straight line portions intersect to form a fourth imaginary corner portion, and wherein the third virtual corner partially overlaps the fourth virtual corner. 6. The display panel of claim 1, wherein the first and second corners of each of the first light emitting layers are chamfered or rounded with a first radius. 7. The display panel of claim 6, wherein the first radius is greater than or equal to 10 um. 8. The display panel of claim 1, wherein the first and second corners of each of the second light emitting layers are chamfered or rounded with a second radius. 9. The display panel of claim 8, wherein the second radius is greater than or equal to 10 um. 10. The display panel of claim 1, wherein each of the first, second and third light emitting layers is arranged to form a plurality of repeating units repeatedly arranged in the first and second directions, each repeating unit comprising two a first light-emitting layer, two second light-emitting layers and four third light-emitting layers, wherein: The two first light emitting layers are arranged at the i-th row and the j+2-th column and the i+2-th row and the j-th column, respectively, two second light emitting layers are arranged at the i-th row and the j-th column and the i+2-th row and the j+2-th column, respectively, and The four third light emitting layers are arranged at the i+1 th row and the j+1 th column, the i+1 th row and the j+3 th column, the i+3 th row and the j+1 th column, and the i+ th row 3 rows and j+3 columns, where i and j are natural numbers. 11. The display panel of claim 10, wherein the first direction is perpendicular to the second direction, wherein each of the first light-emitting layers has a shape obtained by chamfering each of four corners of a first square whose first and second diagonals are parallel to the first and the second direction, wherein each of the second light-emitting layers has a shape obtained by chamfering each of four corners of a second square whose first and second diagonals are respectively parallel to the first and the second direction, and Each of the third light-emitting layers has a shape obtained by rounding each of the four corners of a rectangle, and a long side of the rectangle is directly adjacent to a corresponding third light-emitting layer. One side of a light-emitting layer is opposite and parallel to the side of the corresponding first light-emitting layer, and a short side of the rectangle is directly adjacent to a side of the third light-emitting layer corresponding to the second light-emitting layer Opposite and parallel to the side of the corresponding second light-emitting layer. 12. The display panel of any one of claims 1-11, wherein the geometric center of each first light-emitting layer and the geometric center of the corresponding second light-emitting layer directly adjacent to the first light-emitting layer in the first direction are located on a line parallel to the first direction, and The geometric center of each first light-emitting layer and the geometric center of the corresponding second light-emitting layer directly adjacent to the first light-emitting layer in the second direction are located on a line parallel to the second direction. 13. A method of manufacturing a display panel, comprising: patterning the first conductive layer to form a plurality of first electrodes, wherein the first electrodes are arranged in an array in a first direction and a second direction crossing the first direction; forming a pixel definition layer on the patterned first conductive layer; patterning the pixel defining layer to form a plurality of openings respectively exposing the plurality of first electrodes, wherein each opening exposes at least a portion of a corresponding first electrode, a first plurality of first electrodes of the plurality of first electrodes are respectively exposed by a first plurality of openings of the plurality of openings, a second plurality of first electrodes of the plurality of first electrodes are respectively exposed by a second plurality of openings of the plurality of openings, and the a third plurality of first electrodes of the plurality of first electrodes are respectively exposed by a third plurality of openings of the plurality of openings; forming a plurality of first light-emitting layers covering the first plurality of openings, respectively, a plurality of second light-emitting layers covering the second plurality of openings, respectively, and a plurality of third light-emitting layers covering the third plurality of openings, respectively a light-emitting layer; and forming a second conductive layer on each of the first, second and third light emitting layers, The first and second light-emitting layers are alternately arranged in the first direction and the second direction, and the third light-emitting layers are interspersed between the first light-emitting layers and the second light-emitting layers, and Each of the first and second light-emitting layers includes two first corners opposite to each other in the first direction and two second corners opposite to each other in the second direction, the first 1. Each of the second corners has a chamfered edge so that the first and second light-emitting layers do not overlap each other, wherein the first plurality of openings overlap corresponding regions of the corresponding first light emitting layers to define respective first light emitting regions of the plurality of first light emitting layers, and the second plurality of openings correspond to corresponding regions of the corresponding second light emitting layers the regions overlap to define second light emitting regions of the respective plurality of second light emitting layers, the third plurality of openings overlap with corresponding regions of the corresponding third light emitting layers to define the third light emitting regions of the respective third light emitting layers luminous area, wherein the distance from any point on the edge of each of the first and second corners of the first light-emitting layer to the corresponding first light-emitting region is greater than or equal to an offset tolerance value, the offset The tolerance value is the minimum distance between the straight edge of the first light-emitting layer or the second light-emitting layer and the straight edge of the first light-emitting region or the second light-emitting region, respectively, wherein the distance from any point on the edge of each of the first and second corners of the second light-emitting layer to the corresponding second light-emitting region is greater than or equal to the offset tolerance value, Wherein the third light-emitting layer has the shape of a rounded polygon, and wherein the third light-emitting region has a shape conforming to the shape of the corresponding third light-emitting layer, and any point on the edge of the corresponding third light-emitting layer to The minimum distance of the boundary of the third light-emitting area is equal to the offset tolerance value, wherein both the first light-emitting layer and the second light-emitting layer are at least partially in contact with the third light-emitting layer, and each second light-emitting layer and its adjacent first light-emitting layer are in the first direction and There are gaps in the second direction. 14. A set of masks for evaporating organic light-emitting materials in a manufacturing process of a display panel, comprising: a first mask patterned to include an array of first perforations, each first perforation including two chamfered corners opposite each other in a first direction and in a second direction intersecting the first direction two chamfered corners opposite each other; and a second mask patterned to include an array of second perforations, each second perforation including two chamfered corners opposite each other in the first direction and opposite each other in the second direction the two chamfered corners, The first and second through holes are respectively positioned in the first and second masks so that when the first and second masks are stacked and aligned with each other, the first and second through holes are in the first direction and in all directions. are alternately arranged in the second direction and do not overlap each other, wherein the first mask includes unperforated regions between the first perforations, wherein each unperforated region extends linearly in the first direction and spans the first mask in the first direction the entire size up, wherein the second mask includes non-perforated regions between each of the second perforations, wherein each non-perforated region extends linearly in the first direction and spans the second mask in the first direction full size up. 15. The set of masks of claim 14, wherein respective corners of each first through hole are chamfered or rounded with a first radius. 16. The set of masks of claim 15, wherein the first radius is greater than or equal to 10 um. 17. The set of masks of claim 14, wherein respective corners of each second through hole are chamfered or rounded with a second radius. 18. The set of masks of claim 17, wherein the second radius is greater than or equal to 10 um. 19. The set of masks of claim 14, wherein each of the first and second perforations are positioned in the first and second masks, respectively, such that when the first and second masks are stacked and aligned with each other, The geometric center of each first perforation and the geometric center of the corresponding second perforation directly adjacent to the first perforation in the first direction are located on a line parallel to the first direction, and each first perforation The geometric center of the first through hole and the geometric center of the corresponding second through hole directly adjacent to the first through hole in the second direction are located on a line parallel to the second direction. 20. The set of masks of claim 14, further comprising: a third mask patterned to include an array of third perforations, wherein each third perforation is positioned in the third mask such that when the first, second and third masks are stacked and aligned with each other, each third perforation is interspersed between each first perforation and each second perforation, and Each of the third perforations has the shape of a rounded polygon.

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