CN111880975B - Detection method, system, storage medium and test equipment for the shortest pulse of power on and off - Google Patents
Detection method, system, storage medium and test equipment for the shortest pulse of power on and off Download PDFInfo
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- CN111880975B CN111880975B CN202010646157.7A CN202010646157A CN111880975B CN 111880975 B CN111880975 B CN 111880975B CN 202010646157 A CN202010646157 A CN 202010646157A CN 111880975 B CN111880975 B CN 111880975B
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
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Abstract
本发明公开了一种开关机最短脉冲的检测方法、系统和存储介质、测试设备，其中，检测方法包括：在待测设备的串口DTR引脚与开关机引脚连接后，通过控制串口DTR引脚的高低电平，以向待测设备循环输入开关机脉冲时间，以便待测设备开关机；获取待测设备的开关机状态，并根据待测设备的开关机状态和循环输入的开关机脉冲时间检测最短开关机脉冲。该方法可精确计算出最短开关机脉冲时间，具有成本低、测试精确度高、无需特殊仪器电路支持、测试周期短等优点。
The present invention discloses a detection method, system, storage medium and test equipment for the shortest on/off pulse, wherein the detection method comprises: after the serial port DTR pin of the device to be tested is connected to the on/off pin, the high and low levels of the serial port DTR pin are controlled to cyclically input the on/off pulse time to the device to be tested so that the device to be tested can be turned on/off; the on/off state of the device to be tested is obtained, and the shortest on/off pulse is detected according to the on/off state of the device to be tested and the cyclically input on/off pulse time. The method can accurately calculate the shortest on/off pulse time, and has the advantages of low cost, high test accuracy, no need for special instrument circuit support, and short test cycle.
Description
Technical Field
The invention relates to the technical field of software testing, in particular to a method for detecting the shortest switching on and switching off pulse, a system for detecting the shortest switching on and switching off pulse, a computer readable storage medium and a testing device.
Background
Aiming at the minimum pulse time verification of the hardware mode on-off in the communication module, in the related technology, the pulse time is generally simulated through manual rough verification, a special instrument or a special hardware circuit, and whether the normal on-off can be performed is verified under the simulated specific pulse time. However, the above-mentioned techniques have drawbacks such as high test cost, complicated circuit design, uncontrollable test accuracy, and necessity of knowing the theoretical pulse time in advance for the pulse circuit design.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems in the related art to some extent. Therefore, a first object of the present invention is to provide a method for detecting the shortest pulse of the switching on/off of a motor. The method can accurately calculate the shortest switching on/off pulse time, and has the advantages of low cost, high test accuracy, no special instrument circuit support, short test period and the like.
A second object of the present invention is to propose a computer readable storage medium.
A third object of the invention is to propose a testing device.
A fourth object of the present invention is to provide a system for detecting a shortest pulse of a power on/off state.
In order to achieve the above purpose, an embodiment of the first aspect of the present invention provides a method for detecting a startup/shutdown shortest pulse, comprising the steps of controlling a high-low level of a serial port DTR pin of a device to be tested after the serial port DTR pin is connected with a startup/shutdown pin, so as to circularly input startup/shutdown pulse time to the device to be tested, so as to facilitate startup/shutdown of the device to be tested, obtaining a startup/shutdown state of the device to be tested, and detecting the shortest startup/shutdown pulse according to the startup/shutdown state of the device to be tested and the circularly input startup/shutdown pulse time.
According to the method for detecting the shortest on-off pulse, disclosed by the embodiment of the invention, the shortest on-off pulse time can be accurately calculated by controlling the high and low levels of the serial port DTR (DATA TERMINAL READY, ready data terminal) pins and automatically detecting the on-off state through circularly detecting the on-off reported information and other interface loading states, and the method has the advantages of low cost, high test accuracy, no special instrument circuit support, short test period and the like.
In addition, the method for detecting the startup and shutdown shortest pulse according to the above embodiment of the present invention may further have the following additional technical features:
according to one embodiment of the invention, when the on-off pulse time is circularly input to the device to be tested, the on-off pulse time is controlled to be sequentially increased by integer multiples according to a preset accuracy requirement.
According to one embodiment of the invention, the detection of the shortest switching-on pulse according to the switching-on state of the equipment to be detected and the cyclically input switching-on pulse time comprises the steps of obtaining a preliminary shortest switching-on pulse according to the switching-on state of the equipment to be detected and the cyclically input switching-on pulse time, repeatedly applying the preliminary shortest switching-on pulse to the equipment to be detected so that the equipment to be detected is repeatedly switched on and off, confirming whether the preliminary shortest switching-on pulse is reliable according to the switching-on state of the equipment to be detected, and taking the preliminary shortest switching-on pulse as a final shortest switching-on pulse when confirming that the preliminary shortest switching-on pulse is reliable.
According to one embodiment of the invention, the switching on/off pulse time is gradually increased according to a preset accuracy requirement when the preliminary shortest switching on/off pulse is confirmed to be unreliable.
To achieve the above object, a second aspect of the present invention provides a computer-readable storage medium having stored thereon a detection program for a startup/shutdown shortest pulse, which when executed by a processor, can be executed by the method for detecting a startup/shutdown shortest pulse.
The computer readable storage medium of the embodiment of the invention can accurately calculate the shortest switching on/off pulse time when the computer program stored on the computer readable storage medium and corresponding to the detection method of the shortest switching on/off pulse is executed by a processor, and has the advantages of low cost, high test accuracy, no special instrument circuit support, short test period and the like.
In order to achieve the above object, an embodiment of a third aspect of the present invention provides a test apparatus, including a memory, a processor, and a detection program for a switching on/off shortest pulse stored in the memory and capable of running on the processor, where the detection program is executed by the processor, and the detection method for the switching on/off shortest pulse can be implemented.
The test equipment of the embodiment of the invention can accurately calculate the shortest switching on/off pulse time when the processor executes the detection program of the switching on/off shortest pulse stored in the memory, and has the advantages of low cost, high test accuracy, no need of special instrument circuit support, short test period and the like.
In order to achieve the above purpose, a fourth aspect of the present invention provides a system for detecting a startup/shutdown shortest pulse, which includes a pulse control module configured to, after a serial port DTR pin of a device to be detected is connected to a startup/shutdown pin, circularly input startup/shutdown pulse time to the device to be detected by controlling a high-low level of the serial port DTR pin, so that the device to be detected is started and shutdown, an acquisition module configured to acquire a startup/shutdown state of the device to be detected, and a shortest startup/shutdown pulse detection module configured to detect a shortest startup/shutdown pulse according to the startup/shutdown state of the device to be detected and the circularly input startup/shutdown pulse time.
The detection system for the shortest on-off pulse of the embodiment of the invention can accurately calculate the shortest on-off pulse time by controlling the high and low levels of the serial port DTR pin and circularly detecting the on-off reported information and other interface loading states to automatically detect the on-off state, and has the advantages of low cost, high test accuracy, no need of special instrument circuit support, short test period and the like.
In addition, the detection system of the switching on/off shortest pulse according to the above embodiment of the present invention may further have the following additional technical features:
According to an embodiment of the present invention, the pulse control module is further configured to control, when the on/off pulse time is cyclically input to the device under test, the on/off pulse time to be sequentially increased by integer multiples according to a preset accuracy requirement.
According to one embodiment of the invention, the shortest switching-on pulse detection module is further used for obtaining a preliminary shortest switching-on pulse according to the switching-on state of the equipment to be detected and the cyclically input switching-on pulse time, repeatedly applying the preliminary shortest switching-on pulse to the equipment to be detected through the pulse control module so that the equipment to be detected is repeatedly switched on and off, confirming whether the preliminary shortest switching-on pulse is reliable according to the switching-on state of the equipment to be detected, and taking the preliminary shortest switching-on pulse as a final shortest switching-on pulse when confirming that the preliminary shortest switching-on pulse is reliable.
According to an embodiment of the present invention, the shortest switching-on/off pulse detection module is further configured to gradually increase the switching-on/off pulse time according to a preset accuracy requirement by the pulse control module when the preliminary shortest switching-on/off pulse is determined to be unreliable.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
FIG. 1 is a flow chart of a method for detecting a shortest pulse of a power on/off state according to one embodiment of the present invention;
FIG. 2 is a flow chart of a method of detecting a shortest on/off pulse according to one specific example of the present invention;
fig. 3 is a block diagram of a detection system for a shortest pulse of on/off according to an embodiment of the present invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.
The following describes a method, a system, a storage medium and a test device for detecting the shortest pulse of the startup and shutdown according to the embodiment of the invention with reference to the drawings.
Fig. 1 is a flowchart of a method for detecting a shortest pulse of a power on/off state according to an embodiment of the present invention. As shown in fig. 1, the detection method includes the steps of:
S1, after a serial port DTR pin of equipment to be tested is connected with a startup and shutdown pin, the startup and shutdown pulse time is circularly input to the equipment to be tested by controlling the high and low levels of the serial port DTR pin so as to startup and shutdown the equipment to be tested.
Specifically, after the serial port DTR pin of the device to be tested is connected with the switch pin, the serial port DTR pin can be communicated with the serial port through a serial port by using perl language to control the high level and the low level of the serial port DTR pin, namely, the serial port DTR pin can be controlled to be pulled up or pulled down through a statement of "$ob- > dtr_active (F)", the serial port DTR pin can be pulled up through a statement of "$ob- > dtr_active (T)", and the serial port DTR pin can be pulled down. The on-off pulse time is controlled by controlling the high and low levels of the serial port DTR pin and by a select () function in perl language, such as "select (undef, undef, undef, p×n)", so that the on-off of the device to be tested can be realized according to the on-off pulse time p×n. Wherein N is a variable parameter and takes the value of an integer larger than 0.
S2, acquiring the switching-on and switching-off state of the equipment to be detected, and detecting the shortest switching-on and switching-off pulse according to the switching-on and switching-off state of the equipment to be detected and the cyclically input switching-on and switching-off pulse time.
In the embodiment of the present invention, as shown in fig. 2, when the test is started, test parameters such as pulse detection accuracy p (in milliseconds), continuous switching success number s, and the like may be preconfigured. For example, the pulse detection accuracy p may be configured to be 10ms, and the number of successive switching on and off successes s may be 100. Referring to fig. 2, a variable parameter n may also be set, for example, n may be 0 at an initial value.
Specifically, as an example, as shown in fig. 2, when the device to be tested is turned on and off, n=n++, and the high/low level of the serial port DTR pin is controlled, so that the device to be tested is turned on and off. And acquiring a startup and shutdown state, and if a startup success flag such as RDY is detected according to the startup and shutdown state and the serial port is tested to be capable of normally communicating, judging that the equipment to be tested is successful in startup. And after judging that the equipment to be tested is successfully started, controlling the equipment to be tested to be powered off according to the current startup and shutdown pulse time p. Acquiring the on-off state again, if the on-off state is judged to be successful, the boot test step is returned. And repeatedly executing the steps until the value of the switching-on and switching-off success times r reaches the continuous switching-on and switching-off success times s. At this time, it can be determined that the current on-off pulse time p×n is the shortest on-off pulse.
In one embodiment of the present invention, when the on-off pulse time is cyclically input to the device under test, the on-off pulse time is controlled to be sequentially increased by integer times according to a preset accuracy requirement, for example, n is increased by a preset step length 1.
Specifically, as another example, as shown in fig. 2, if the device to be tested is not powered on successfully or is powered on and off according to p×n, n=n++ is returned, and the value of N is increased at this time, so that the power on and off pulse time p×n is increased.
For example, let p=10 ms, s=100 times, n=0. The method comprises the steps of firstly performing a switching on and off test according to 10ms, detecting that equipment to be tested is not successfully started or is not successfully shut down when the successful times of continuous switching on and off reach 50 times (less than 100 times) in the first test, resetting switching on and off pulse time, doubling the switching on and off pulse time to 20ms, and performing switching on and off test according to 20ms in the second test. Similarly, when the on-off test is performed according to 20ms, if the test device is detected to be started up unsuccessfully or shut down unsuccessfully before the successful times of continuous on-off reaches 100 times, the on-off pulse time is set to be 30ms, and so on. If the number of consecutive switching successes reaches 100 when the switching test is performed at 50ms (fifth test), 50ms is taken as the shortest switching pulse time.
In one embodiment of the invention, the detection of the shortest switching-on pulse according to the switching-on state of the equipment to be detected and the cyclically input switching-on pulse time comprises the steps of obtaining the preliminary shortest switching-on pulse according to the switching-on state of the equipment to be detected and the cyclically input switching-on pulse time, repeatedly applying the preliminary shortest switching-on pulse to the equipment to be detected so as to enable the equipment to be detected to be repeatedly switched on and switched off, confirming whether the preliminary shortest switching-on pulse is reliable according to the switching-on state of the equipment to be detected, and taking the preliminary shortest switching-on pulse as the final shortest switching-on pulse when confirming that the preliminary shortest switching-on pulse is reliable.
Specifically, when the on-off test is performed according to a certain on-off pulse time, for example, 10ms×5=50 ms, if the first on-off test is successful, determining that the initial shortest on-off pulse time is 50ms, adding 1 to the value of the on-off success times r, and applying the shortest on-off pulse corresponding to the 50ms to the device to be tested again, so that the device to be tested repeatedly starts and shuts down. In the repeated switching-on and switching-off process, whether 50ms is reliable or not is confirmed according to the switching-on and switching-off state of the equipment to be tested, for example, in 100 switching-on and switching-off tests, the switching-on and switching-off success times (including the continuous switching-on and switching-off success times) are more than or equal to 95 times, and the 50ms is reliable, and the initial shortest switching-on and switching-off pulse time 50ms is determined to be the final shortest switching-on and switching-off pulse time. Of course, if any of the test times between 95-100 detects a successful turn-on/off 95 times, the test may be stopped and 50ms may be determined directly as the final shortest turn-on/off pulse time.
In one embodiment of the present invention, when the preliminary shortest switching pulse is determined to be unreliable, the switching pulse time is gradually increased according to a preset accuracy requirement.
Specifically, when the number of unsuccessful switching on/off times is equal to or greater than a certain value, such as 5 times (including 5 consecutive unsuccessful cases) in a preset number of tests, for example, 100 times, the preliminary shortest switching on/off pulse (for example, time 10ms×5=50 ms) is considered unreliable, and the switching on/off pulse time may be set to 10ms×10=100 ms. If not reliable, the on-off pulse time is set to 10ms 15=150 ms, and so on.
In summary, according to the method for detecting the shortest on-off pulse in the embodiment of the invention, the shortest on-off pulse time can be accurately calculated by controlling the high and low levels of the serial port DTR pin and automatically detecting the on-off state through circularly detecting the on-off reported information and other interface loading states. The method has the advantages of low cost, high test accuracy, no special instrument circuit support, short test period and the like.
Further, the present invention proposes a computer-readable storage medium having stored thereon a detection program for a startup and shutdown shortest pulse, which when executed by a processor, can be the detection method for a startup and shutdown shortest pulse.
The computer readable storage medium of the embodiment of the invention can accurately calculate the shortest switching on/off pulse time when the computer program stored on the computer readable storage medium and corresponding to the detection method of the shortest switching on/off pulse is executed by a processor, and has the advantages of low cost, high test accuracy, no special instrument circuit support, short test period and the like.
Furthermore, the invention provides a test device, which comprises a memory, a processor and a detection program of the switching on/off shortest pulse stored in the memory and capable of running on the processor, wherein the detection method of the switching on/off shortest pulse can be realized when the processor executes the detection program.
The test equipment of the embodiment of the invention can accurately calculate the shortest switching on/off pulse time when the processor executes the detection program of the switching on/off shortest pulse stored in the memory, and has the advantages of low cost, high test accuracy, no need of special instrument circuit support, short test period and the like.
Fig. 3 is a block diagram of a detection system for a shortest pulse of on/off according to an embodiment of the present invention. As shown in fig. 3, the detection system 100 for the shortest switching on/off pulse includes a pulse control module 10, an acquisition module 20, and a shortest switching on/off pulse detection module 30.
The pulse control module 10 is configured to control the high-low level of the serial port DTR pin after the serial port DTR pin of the device to be tested is connected with the power on/off pin, so as to circularly input the power on/off pulse time to the device to be tested, so that the device to be tested is powered on/off.
Specifically, after the serial port DTR pin of the device to be tested is connected to the switch pin, the pulse control module 10 may communicate with the serial port through the serial port by using the perl language to control the high level and the low level of the serial port DTR pin, that is, to implement the pull-up or pull-down control on the serial port DTR pin, for example, through the statement "$ob- > dtr_active (F)", the serial port DTR pin may be pulled up, and through the statement "$ob- > dtr_active (T)", the serial port DTR pin may be pulled down. The on-off pulse time is controlled by controlling the high and low levels of the serial port DTR pin and by a select () function in perl language, such as "select (undef, undef, undef, p×n)", so that the on-off of the device to be tested can be realized according to the on-off pulse time p×n. Wherein N is a variable parameter and takes the value of an integer larger than 0.
The obtaining module 20 is configured to obtain an on-off state of the device to be tested. The shortest switching on/off pulse detection module 30 is configured to detect a shortest switching on/off pulse according to a switching on/off state of the device to be tested and a cyclically input switching on/off pulse time.
In the embodiment of the present invention, as shown in fig. 2, when the test is started, test parameters such as pulse detection accuracy p (in milliseconds), continuous switching success number s, and the like may be preconfigured. For example, the pulse detection accuracy p may be configured to be 10ms, and the number of successive switching on and off successes s may be 100. Referring to fig. 2, a variable parameter n may also be set, for example, n may be 0 at an initial value.
Specifically, as an example, as shown in fig. 2, when the device to be tested is turned on and off, n=n++, and the high/low level of the serial port DTR pin is controlled, so that the device to be tested is turned on and off. The obtaining module 20 obtains the on-off state of the device to be tested, and if the shortest on-off pulse detecting module 30 detects a successful start-up sign such as RDY according to the on-off state and the serial port can be normally communicated, it is determined that the device to be tested is successfully started up. And after judging that the equipment to be tested is successfully started, controlling the equipment to be tested to be powered off according to the current startup and shutdown pulse time p. The obtaining module 20 obtains the on-off state of the device to be tested again, and if the shortest on-off pulse detecting module 30 determines that the power-off is successful according to the on-off state, the power-on test step is returned. And repeatedly executing the steps until the value of the switching-on and switching-off success times r reaches the continuous switching-on and switching-off success times s. At this time, it can be determined that the current on-off pulse time p×n is the shortest on-off pulse.
In one embodiment of the present invention, the pulse control module 10 is further configured to control the on-off pulse time to sequentially increase by integer times according to a preset accuracy requirement, for example, n increases by a preset step size of 1 when the on-off pulse time is cyclically input to the device under test.
Specifically, as another example, as shown in fig. 2, if the device to be tested is not powered on successfully or is powered on and off according to p×n, n=n++ is returned, and the value of N is increased at this time, so that the power on and off pulse time p×n is increased.
For example, let p=10 ms, s=100 times, n=0. The method comprises the steps of firstly performing a switching on and off test according to 10ms, detecting that equipment to be tested is not successfully started or is not successfully shut down when the successful times of continuous switching on and off reach 50 times (less than 100 times) in the first test, resetting switching on and off pulse time, doubling the switching on and off pulse time to 20ms, and performing switching on and off test according to 20ms in the second test. Similarly, when the on-off test is performed according to 20ms, if the test device is detected to be started up unsuccessfully or shut down unsuccessfully before the successful times of continuous on-off reaches 100 times, the on-off pulse time is set to be 30ms, and so on. If the number of consecutive switching successes reaches 100 when the switching test is performed at 50ms (fifth test), 50ms is taken as the shortest switching pulse time.
In one embodiment of the present invention, the shortest switching pulse detection module 30 is further configured to obtain a preliminary shortest switching pulse according to a switching state of the device to be tested and a cyclically input switching pulse time, repeatedly apply the preliminary shortest switching pulse to the device to be tested through the pulse control module 10 so that the device to be tested is repeatedly turned on and off, determine whether the preliminary shortest switching pulse is reliable according to the switching state of the device to be tested, and use the preliminary shortest switching pulse as a final shortest switching pulse when the preliminary shortest switching pulse is determined to be reliable.
Specifically, when the on-off test is performed according to a certain on-off pulse time, for example, 10ms×5=50 ms, if the first on-off test is successful, determining that the initial shortest on-off pulse time is 50ms, adding 1 to the value of the on-off success times r, and applying the shortest on-off pulse corresponding to the 50ms to the device to be tested again, so that the device to be tested repeatedly starts and shuts down. In the repeated switching-on and switching-off process, whether 50ms is reliable or not is confirmed according to the switching-on and switching-off state of the equipment to be tested, for example, in 100 switching-on and switching-off tests, the switching-on and switching-off success times (including the continuous switching-on and switching-off success times) are more than or equal to 95 times, and the 50ms is reliable, and the initial shortest switching-on and switching-off pulse time 50ms is determined to be the final shortest switching-on and switching-off pulse time. Of course, if any of the test times between 95-100 detects a successful turn-on/off 95 times, the test may be stopped and 50ms may be determined directly as the final shortest turn-on/off pulse time.
In one embodiment of the present invention, the shortest switching on/off pulse detection module 30 is further configured to gradually increase the switching on/off pulse time according to a preset accuracy requirement through the pulse control module when the preliminary shortest switching on/off pulse is determined to be unreliable.
Specifically, when the number of unsuccessful switching on/off times is equal to or greater than a certain value, such as 5 times (including 5 consecutive unsuccessful cases) in a preset number of tests, for example, 100 times, the preliminary shortest switching on/off pulse (for example, time 10ms×5=50 ms) is considered unreliable, and the switching on/off pulse time may be set to 10ms×10=100 ms. If not reliable, the on-off pulse time is set to 10ms 15=150 ms, and so on.
In summary, the detection system for the shortest on-off pulse of the embodiment of the invention can accurately calculate the shortest on-off pulse time by controlling the high-low level of the serial port DTR pin and automatically detecting the on-state through circularly detecting the on-state reported information and other interface loading states, and has the advantages of low cost, high test accuracy, no need of special instrument circuit support, short test period and the like.
It should be noted that the logic and/or steps represented in the flowcharts or otherwise described herein, for example, may be considered as a ordered listing of executable instructions for implementing logical functions, and may be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include an electrical connection (an electronic device) having one or more wires, a portable computer diskette (a magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It is to be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, may be implemented using any one or combination of techniques known in the art, discrete logic circuits with logic gates for implementing logic functions on data signals, application specific integrated circuits with appropriate combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed, mechanically connected, electrically connected, directly connected, indirectly connected through an intervening medium, or in communication between two elements or in an interaction relationship between two elements, unless otherwise explicitly specified. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "up" or "down" a second feature may be the first and second features in direct contact, or the first and second features in indirect contact via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (8)
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| TW201209432A (en) * | 2010-08-16 | 2012-03-01 | Hon Hai Prec Ind Co Ltd | Apparatus and method for testing power on and off processes of an electronic device |
| CN102479120A (en) * | 2010-11-22 | 2012-05-30 | 鸿富锦精密工业（深圳）有限公司 | Startup/shutdown test system and startup/shutdown test method |
| CN104459592A (en) * | 2014-11-25 | 2015-03-25 | 北京市计量检测科学研究院 | Calibration instrument for temporal characteristics of pulses per second |
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