CN111835377B - Signal transceiving device and power-on and power-off method of transmitting module thereof - Google Patents
Signal transceiving device and power-on and power-off method of transmitting module thereof Download PDFInfo
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- CN111835377B CN111835377B CN202010839206.9A CN202010839206A CN111835377B CN 111835377 B CN111835377 B CN 111835377B CN 202010839206 A CN202010839206 A CN 202010839206A CN 111835377 B CN111835377 B CN 111835377B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
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Abstract
A signal transceiver and a power-on and power-off method of a transmitting module thereof are provided. The signal transceiving apparatus includes: a receiving module adapted to receive a signal; and the transmitting module is connected with the receiving module, comprises a power amplifier, a digital-to-analog converter and other transmitting sub-blocks which are connected with each other and is suitable for transmitting signals, and the digital-to-analog converter, the other transmitting sub-blocks and the power amplifier are sequentially and reversely powered on and off according to a physical layer protocol. By applying the scheme, the overshoot problem of the transmitting module of the signal transmitting and receiving device during power-on and power-off can be effectively solved, so that the transmitted signal quality is improved.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a signal transceiving device and a power-on and power-off method of a transmitting module of the signal transceiving device.
Background
With the development of wireless multimedia communication technology and wireless connection technology, signal transceiving devices are increasingly widely used.
However, most of the existing signal transceiver devices have overshoot problem when the transmitter module is powered up or powered down, which results in the transmitted signal quality being not ideal enough.
Disclosure of Invention
The invention aims to provide a signal transceiver and a power-on and power-off method of a transmitting module of the signal transceiver, so as to solve the problem of overshoot of the transmitting module of the signal transceiver when the transmitting module is powered on and powered off.
To achieve the above object, an aspect of an embodiment of the present invention relates to a signal transceiver apparatus, including: a receiving module adapted to receive a signal; and the transmitting module is connected with the receiving module, comprises a power amplifier, a digital-to-analog converter and other transmitting sub-blocks which are connected with each other and is suitable for transmitting signals, and the digital-to-analog converter, the other transmitting sub-blocks and the power amplifier are sequentially and reversely powered on and off according to a physical layer protocol.
Optionally, the other transmit sub-block comprises a matching network connecting the receiving module and the transmitting module.
Optionally, the matching network is adapted to switch reception and transmission of signals.
Optionally, the matching network comprises a combined passive network.
Optionally, the other transmit sub-blocks include an antenna, an up-conversion mixer, a local oscillator, and a filter.
Another aspect of the embodiments of the present invention relates to a method for powering up the transmission module of the signal transceiver apparatus as described above, according to which the digital-to-analog converter, the other transmission sub-blocks and the power amplifier are sequentially powered up during the start-up transition of the transmission module.
Optionally, after the digital-to-analog converter turns on for the first delay, the other transmit sub-blocks turn on, and the receiving module turns off.
Optionally, the power amplifier is turned on after the other transmit sub-block is turned on for a second delay.
Optionally, after the digital-to-analog converter starts a third delay, the physical layer performs data transmission, where the third delay is greater than a sum of the first delay and the second delay.
A further aspect of embodiments of the present invention relates to a method for powering down the transmit module of a signal transceiving apparatus as described above, according to which the digital-to-analog converter, the other transmit sub-blocks and the power amplifier are sequentially powered down in reverse order during a switch off of the transmit module.
Optionally, after a fourth delay of stopping data transmission by the physical layer, the power amplifier is turned off.
Optionally, after the power amplifier is turned off for a fifth delay, the other transmitting sub-blocks are turned off, and the receiving module is turned on.
Optionally, after a sixth delay of turning off the power amplifier, the digital-to-analog converter is turned off, and the sixth delay is greater than the fifth delay.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:
the invention provides a signal transceiver, comprising: a receiving module adapted to receive a signal; and the transmitting module is connected with the receiving module, comprises a power amplifier, a digital-to-analog converter and other transmitting sub-blocks which are connected with each other and is suitable for transmitting signals, and the digital-to-analog converter, the other transmitting sub-blocks and the power amplifier are sequentially and reversely powered on and off according to a physical layer protocol. According to the embodiment of the invention, the digital-to-analog converter, the other transmitting sub-blocks and the power amplifier of the transmitting module of the signal transceiver are sequentially powered on, and the digital-to-analog converter, the other transmitting sub-blocks and the power amplifier of the transmitting module of the signal transceiver are sequentially powered off in a reverse order, so that the power amplifier which is turned off can block local oscillator signal leakage caused by a direct current deviation signal of the digital-to-analog converter. Therefore, the overshoot problem of the transmitting module of the signal transmitting and receiving device during power-on and power-off can be effectively solved, and the quality of transmitted signals is improved.
Where the technical conditions warrant, the subject matter of any independent claim herein may be combined with any single subject matter or combination of subject matter recited in any dependent claim to form new claimed subject matter.
In order to make the aforementioned objects, features and advantages of the embodiments of the present invention comprehensible, this application is further described with reference to the accompanying drawings.
Drawings
Fig. 1 is a schematic structural diagram of a signal transceiver according to an embodiment of the present invention;
fig. 2 is a time domain schematic diagram illustrating overshoot of a transmitter module of a signal transceiver in power-up and power-down states in the prior art; and
fig. 3 is a timing diagram of a method for powering up and down a transmit module of a signal transceiving apparatus according to an embodiment of the present invention.
Detailed Description
Fig. 1 is a schematic structural diagram of a signal transceiver according to an embodiment of the present invention. As shown in fig. 1, an aspect of the embodiment of the present invention relates to a signal transceiver 10, including: a receiving module 12 and a transmitting module 14.
The receiving module 12 is adapted to receive signals.
In a specific implementation, the receiving module 12 may have the construction of a receiver as is common in the art. For example, the receiving module 12 may include an antenna 24, a Low Noise Amplifier (LNA) 26, a down-conversion mixer 28, a filter 30, an Analog-to-Digital Converter (ADC) 32, and the like, which are connected to each other.
In a particular implementation, the receive module 12 may optionally include a transconductance Amplifier (Gm)34 connected between the low noise Amplifier 26 and the down-conversion mixer 28 and a transimpedance Amplifier (TIA) 36 connected between the down-conversion mixer 28 and the filter 30.
The transmitting module 14, connected to the receiving module 12, includes a Power Amplifier (PA) 16, a Digital-to-Analog Converter (DAC) 18 and other transmitting sub-blocks 20 connected to each other and adapted to transmit signals, and the Digital-to-Analog Converter 18, other transmitting sub-blocks 20 and the Power Amplifier 16 are powered on and off sequentially and reversely according to a physical layer 22 protocol.
Fig. 2 is a time domain schematic diagram of the overshoot of the transmitter module of the signal transceiver in the prior art when powering up and down.
The inventor finds out through experiments that: when a transmitting module of the existing signal transceiving device is powered on, overshoot occurs in a signal time domain diagram, namely, leakage of a header part (a left side "peak" in fig. 2); when the transmitter module of the prior art signal transceiver is powered down, an overshoot, i.e., a leakage at the tail of the packet (the "peak" on the right in fig. 2), occurs in the time domain diagram of the signal.
In the embodiment of the present invention, according to a protocol of a Physical Layer & Media Access Control (PHY & MAC)22, the digital-to-analog converter 18, the other transmit sub-blocks 20, and the power amplifier 16 are sequentially powered up. Therefore, when the transmitting module 14 of the signal transceiver 10 is powered on, the local oscillator signal leakage caused by the dc offset signal during the dc offset setup of the digital-to-analog converter 18 can be blocked by the power amplifier 16 being turned off, so that the overshoot can be avoided when the transmitting module 14 of the signal transceiver 10 is powered on.
In the embodiment of the present invention, the power-down of the digital-to-analog converter 18, the other transmit sub-blocks 20, and the power amplifier 16 is performed in reverse order according to the protocol of the physical layer 22. Thus, when the transmit module 14 of the transceiver 10 is powered down, the power amplifier 16 is turned off prior to the digital-to-analog converter 18 and the other transmit sub-blocks 20. Therefore, the local oscillation signal leakage caused by the dc offset signal of the digital-to-analog converter 18 can be blocked by the turned-off power amplifier 16, so as to avoid the overshoot when the transmitting module 14 of the signal transceiver 10 is powered down.
Thus, the overshoot problem of the transmitting module 14 of the signal transceiver 10 during power-up and power-down can be effectively solved, and the quality of the transmitted signal can be improved.
In an embodiment of the present invention, the other transmitting sub-block 20 includes a matching network 23 connecting the receiving module 12 and the transmitting module 14.
In particular implementations, the matching network 23 may perform noise cancellation matching for the receiving module 12 and impedance matching for the transmitting module 14.
In an embodiment of the invention, the matching network 23 is adapted to switch the reception and transmission of signals.
In a specific implementation, the matching network 23 may include a non-series connected switching circuit (not shown), in the receive mode, the switch is open, reconstructing a receive matching circuit; in the transmitting mode, the switch is closed, and the transmitting matching circuit is reconstructed, so that the receiving and transmitting of signals are switched.
In one embodiment of the present invention, the matching network 23 comprises a combinational passive network.
In a particular implementation, matching network 23 may include a first passive network (not shown) and a second passive network (not shown). The first passive network may be coupled to the receive module 12 and may be noise-canceling matched for the receive module 12. A second passive network may be connected to the transmit module 14 and impedance matched to the transmit module 14.
In an embodiment of the present invention, the other transmission sub-block 20 includes an antenna 24, an up-conversion mixer 19, a Local Oscillator (Local) Generator 15 and a filter 30.
In an implementation, the transmitting module 14 may include a Power Amplifier (PAD) 17 connected to the Power Amplifier 16, and the like.
In a specific implementation, the low noise amplifier 26, the power amplifier 16, and the matching network 23 may constitute a virtual transmit-receive switch. The virtual transceiving switch can reconstruct a matching network through a non-series connection switch circuit in the matching network 23 according to a protocol of the physical layer 22, and switch between a receiving matching network and a transmitting matching network, so that the conversion between the receiving and the transmitting of signals is realized. The virtual transmit/receive switch does not include a physical transmit/receive switch.
Fig. 3 is a timing diagram of a method for powering up and down a transmit module of a signal transceiving apparatus according to an embodiment of the present invention. In fig. 3, "TX _ EN" indicates that the transmitting module 14 is turned on, "DAC _ EN" indicates that the digital-to-analog converter 18 is turned on, "TX _ IPs _ EN" indicates that the other transmitting sub-blocks 20 are turned on, "RX _ EN" indicates that the receiving module 12 is turned on, "PA _ EN" indicates that the power amplifier 16 is turned on, and "DATA" indicates DATA.
Another aspect of the embodiments of the present invention relates to a method for powering up the transmitting module 14 of the signal transceiving apparatus 10 as described above. According to the method, the digital-to-analog converter 18, the other transmit sub-blocks 20, and the power amplifier 16 are sequentially powered up during the period when the transmit module 14 turns on the conversion.
In the embodiment of the present invention, according to the protocol of the physical layer 22, during the period of the transmitting module 14 of the transceiver 10 turning on the conversion, the digital-to-analog converter 18, the other transmitting sub-blocks 20 and the power amplifier 16 are sequentially powered up. Therefore, during the dc offset setup of the digital-to-analog converter 18, the local oscillator signal leakage caused by the dc offset will be blocked by the power amplifier 16 being turned off, thereby avoiding overshoot at the power-up of the transmit module 14 of the signal transceiver 10.
In an embodiment of the present invention, after the digital-to-analog converter 18 turns on the first delay, the other transmitting sub-block 20 turns on, and the receiving module 12 turns off.
In particular implementations, the first delay may vary depending on different physical layer 22 protocols. For example, the first delay may be 0 to 1 microsecond (excluding 0), such as 20 nanoseconds, 40 nanoseconds, 60 nanoseconds, 80 nanoseconds, 1 microsecond, and so forth.
In this manner, the other transmit sub-blocks 20 may be facilitated to help the dac 18 establish the dc offset and the local oscillator signal leakage caused by the dc offset is blocked by the turned off pa 16.
In an embodiment of the present invention, the power amplifier 16 is turned on after the other transmission sub-block 20 is turned on for the second delay.
In particular implementations, the second delay may vary according to different physical layer 22 protocols. For example, the second delay may be 0 to 1 microsecond (excluding 0), such as 20 nanoseconds, 40 nanoseconds, 60 nanoseconds, 80 nanoseconds, 1 microsecond, and so forth.
In this manner, overshoot problems at power-up of the transmit module 14 of the transceiver 10 may be advantageously avoided.
In an embodiment of the present invention, after the digital-to-analog converter 18 starts a third delay, the physical layer 22 performs data transmission, and the third delay is greater than a sum of the first delay and the second delay.
In particular implementations, the third delay may vary depending on different physical layer 22 protocols. For example, the third delay may be 0 to 1 microsecond (excluding 0), such as 40 nanoseconds, 60 nanoseconds, 80 nanoseconds, or the like.
In this manner, it may be advantageous to ensure the quality of the transmitted signal.
Yet another aspect of an embodiment of the present invention relates to a method for powering down the transmit module 14 of the signal transceiving apparatus 10 as described above. According to the method, the digital-to-analog converter 18, the other transmit sub-blocks 20, and the power amplifier 16 are sequentially powered down in reverse order during the off-conversion of the transmit module 14.
In the embodiment of the present invention, according to the protocol of the physical layer 22, during the period of turning off the conversion of the transmitting module 14 of the signal transceiver 10, the power-down of the digital-to-analog converter 18, the other transmitting sub-blocks 20 and the power amplifier 16 is performed in reverse order. Thus, the power amplifier 16 is turned off prior to the digital-to-analog converter 18 and other transmit sub-blocks 20. After the power amplifier 16 is turned off, if the digital-to-analog converter 18 is not turned off, the direct current bias of the digital-to-analog converter 18 is in a normal state, and the local oscillation signal leakage cannot be caused; if the digital-to-analog converter 18 is turned off after the power amplifier 16 is turned off, the local oscillator leakage caused by the dc offset signal will be blocked by the turned off power amplifier 16, thereby avoiding overshoot when the transmit module 14 of the signal transceiver 10 is powered down.
In an embodiment of the present invention, after the physical layer 22 stops data transmission for the fourth delay, the power amplifier 16 is turned off.
In particular implementations, the fourth delay may vary according to different physical layer 22 protocols. For example, the fourth delay may be 0 to 1 microsecond (excluding 0), such as 20 nanoseconds, 40 nanoseconds, 60 nanoseconds, 80 nanoseconds, 1 microsecond, and so forth.
In this manner, local oscillator signal leakage due to dc offset when a subsequent digital-to-analog converter 18 is turned off may be advantageously blocked by the power amplifier 16 being turned off after data transmission is complete.
In an embodiment of the present invention, after the power amplifier 16 is turned off for the fifth delay, the other transmitting sub-blocks 20 are turned off, and the receiving module 12 is turned on.
In particular implementations, the fifth delay may vary depending on different physical layer 22 protocols. For example, the fifth delay may be 0 to 1 microsecond (excluding 0), such as 20 nanoseconds, 40 nanoseconds, 60 nanoseconds, 80 nanoseconds, 1 microsecond, and so forth.
In this manner, the other transmit sub-blocks 20 may be facilitated to help the digital-to-analog converter 18 remove dc offset.
In an embodiment of the present invention, the digital-to-analog converter 18 is turned off after a sixth delay time when the power amplifier 16 is turned off, and the sixth delay time is greater than the fifth delay time.
In particular implementations, the sixth delay may vary depending on different physical layer 22 protocols. For example, the sixth delay may be 0 to 1 microsecond (excluding 0), such as 40 nanoseconds, 60 nanoseconds, 80 nanoseconds, 1 microsecond, and so forth.
In this manner, overshoot problems when the transmitter module 14 of the transceiver 10 is powered down may be advantageously avoided.
The various embodiments described above and shown in the drawings are illustrative of the invention and are not exhaustive of the invention. Any modification of the present invention by a person of ordinary skill in the related art within the scope of the basic technical idea of the present invention is within the scope of the present invention.
Claims (13)
1. A signal transceiving apparatus, comprising:
a receiving module adapted to receive a signal;
and the transmitting module is connected with the receiving module, comprises a power amplifier, a digital-to-analog converter and other transmitting sub-blocks which are connected with each other and is suitable for transmitting signals, and the digital-to-analog converter, the other transmitting sub-blocks and the power amplifier are sequentially and reversely powered on and off according to a physical layer protocol.
2. The signal transceiving apparatus of claim 1, wherein the other transmit sub-block comprises a matching network connecting the receive module and the transmit module.
3. The signal transceiving apparatus of claim 2, wherein the matching network is adapted to switch reception and transmission of signals.
4. Signal transceiving apparatus according to claim 2 or 3, wherein the matching network comprises a combined passive network.
5. The signal transceiving apparatus of any of claims 2 to 4, wherein the other transmit sub-block comprises an antenna, an up-conversion mixer, a local oscillator, and a filter.
6. Method for powering up the transmit module of a signal transceiving apparatus according to any of claims 1 to 5, wherein the digital-to-analog converter, the other transmit sub-blocks and the power amplifier are sequentially powered up in sequence during a turn-on transition of the transmit module.
7. The method of claim 6, wherein after the digital-to-analog converter turns on for a first delay, the other transmit sub-blocks turn on and the receive module turns off.
8. The method of claim 7, wherein the power amplifier is turned on after the other transmit sub-block is turned on for a second delay.
9. The method of claim 8, wherein the physical layer transmits data after the digital-to-analog converter turns on a third delay, the third delay being greater than a sum of the first delay and the second delay.
10. Method for powering down the transmit module of a signal transceiving apparatus according to any of claims 1 to 5, wherein the digital-to-analog converter, the other transmit sub-blocks and the power amplifier are powered down in reverse order during the transmit module off transition.
11. The method of claim 10, wherein the power amplifier is turned off after a fourth delay for the physical layer to stop data transmission.
12. The method of claim 11, wherein after a fifth delay from turning off the power amplifier, the other transmit sub-block is turned off and the receive module is turned on.
13. The method of claim 12, wherein the digital-to-analog converter is turned off after a sixth delay time after the power amplifier is turned off, the sixth delay time being greater than the fifth delay time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202010839206.9A CN111835377B (en) | 2020-08-19 | 2020-08-19 | Signal transceiving device and power-on and power-off method of transmitting module thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010839206.9A CN111835377B (en) | 2020-08-19 | 2020-08-19 | Signal transceiving device and power-on and power-off method of transmitting module thereof |
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| CN111835377A CN111835377A (en) | 2020-10-27 |
| CN111835377B true CN111835377B (en) | 2022-02-22 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101388681B (en) * | 2007-09-13 | 2012-11-14 | 东方通信股份有限公司 | TETRA transceiver and implementing method thereof |
| CN103391055B (en) * | 2013-07-19 | 2016-06-15 | 京信通信系统（中国）有限公司 | DPD MCPA power-on protection method and device and DPD MCPA device |
| CN105610449B (en) * | 2015-12-25 | 2019-04-05 | 泰凌微电子（上海）有限公司 | Dual-mode radio frequency transmit-receive structure |
| CN111800178B (en) * | 2016-08-08 | 2024-07-30 | 华为技术有限公司 | Diversity receiver and terminal |
| CN108566103B (en) * | 2018-05-11 | 2020-06-02 | 南京恩瑞特实业有限公司 | One-key switch device for secondary radar and implementation method thereof |
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