CN111832088B

CN111832088B - Method and device for protecting data in low-power-consumption mode of solid state disk, computer equipment and storage medium

Info

Publication number: CN111832088B
Application number: CN202010669747.1A
Authority: CN
Inventors: 冯通; 郭芳芳; 甘金涛; 冯元元
Original assignee: Shenzhen Union Memory Information System Co Ltd
Current assignee: Shenzhen Union Memory Information System Co Ltd
Priority date: 2020-07-13
Filing date: 2020-07-13
Publication date: 2024-02-13
Anticipated expiration: 2040-07-13
Also published as: CN111832088A

Abstract

The invention relates to a method, a device, computer equipment and a storage medium for protecting data in a low-power consumption mode of a solid state disk; wherein, the method comprises the following steps: the CPU0 stores the log information of the solid state disk to the storage particles according to the low-power consumption instruction issued by the host end; CPU0 sends a self-defined instruction to CPU1 and CPU 2; CPU0 refreshes temporary data and written data in DRAM to memory grain; CPU0 judges whether the temporary data and written data in DRAM are all refreshed into the memory grain; if yes, the CPU0 sets a low-power instruction completion mark for the CPU1 and the CPU 2; CPU0 determines whether or not the low power instruction completion flag is marked on CPU1 and CPU 2. The invention designs different data protection modes aiming at different modules, not only can flexibly store data and improve the data storage efficiency, but also can effectively increase the stability and reliability of the system.

Description

Method and device for protecting data in low-power-consumption mode of solid state disk, computer equipment and storage medium

Technical Field

The invention relates to the technical field of solid state disks, in particular to a method and a device for protecting low-power consumption mode data of a solid state disk, computer equipment and a storage medium.

Background

The low power consumption mode is used as the most direct and effective function of controlling the power consumption of the solid state disk, and has very strict requirements on the basic function of the solid state disk; the power consumption, the performance, the stability and the like become factors for enterprises to measure the solid state disk, and the importance of the low-power consumption function can be seen; the low power consumption function is mainly used for closing the working clock, powering down and the like aiming at the hardware module so as to achieve the purpose of saving power consumption.

Solid state disks are made up of many modules, such as: BM (Buffer Management space management module), LDPC (Low-density Parity-check), DRAM (Dynamic Random Access Memory dynamic random access memory), etc., in the Low power consumption mode, in order to save power consumption, the clock is turned off and the power is turned off for each hardware module, so that data is damaged to a great extent, and thus data loss is caused, the system is unstable, and more serious system breakdown of the solid state disk and damage to the hardware module are caused, so that it is important to design an effective data protection mechanism in the Low power consumption mode.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provide a method, a device, computer equipment and a storage medium for protecting low-power-consumption mode data of a solid state disk.

In order to achieve the above purpose, the present invention adopts the following technical scheme:

the data protection method of the low-power consumption mode of the solid state disk is based on the solid state disk controlled by the CPU0, the CPU1 and the CPU 2; the method comprises the following steps:

the CPU0 stores the log information of the solid state disk to the storage particles according to the low-power consumption instruction issued by the host end;

CPU0 sends a self-defined instruction to CPU1 and CPU 2;

CPU0 refreshes temporary data and written data in DRAM to memory grain;

CPU0 judges whether the temporary data and written data in DRAM are all refreshed into the memory grain;

if yes, the CPU0 sets a low-power instruction completion mark for the CPU1 and the CPU 2;

CPU0 judges whether the CPU1 and the CPU2 are marked with low-power instruction completion marks or not;

if yes, the CPU1 and the CPU2 set PCIE links to enter a low power consumption mode;

CPU1 and CPU2 save PCIE physical layer, configuration and data of data link layer to SRAM power-down area;

CPU1 and CPU2 reset PCIE link and PCIE physical layer;

CPU1 and CPU2 save register and configuration information of NVME module to SRAM non-power-down area;

CPU1 and CPU2 reset NVME module;

CPU1 and CPU2 close the clock of the solid state disk and do the power-down processing;

CPU0 obtains the order that the host computer terminal issued, CPU1 and CPU2 control the solid state disk to withdraw from the low power consumption mode, return to the normal operating condition, and return to step "CPU0 saves the log information of the solid state disk to the storage granule according to the low power consumption instruction that the host computer terminal issued".

The further technical scheme is as follows: before the step of "the CPU0 sends the custom instruction to the CPU1 and the CPU 2", the method further includes: CPU0 judges whether the log information of the solid state disk is stored in the storage particles or not; if so, entering a step of 'CPU 0 sends a custom instruction to CPU1 and CPU 2'; if not, returning to the step of ' CPU0 ' to store the log information of the solid state disk to the storage particles according to the low power consumption instruction issued by the host side '.

The further technical scheme is as follows: the step "CPU0 judges whether all temporary data in DRAM and written data are refreshed into the memory granule" is performed, if not, CPU0 sets a low power instruction incomplete flag to CPU1 and CPU2, and executes the step "CPU0 judges whether or not a low power instruction complete flag is marked on CPU1 and CPU 2".

The further technical scheme is as follows: in the step "CPU0 judges whether the CPU1 and the CPU2 are marked with the low power consumption instruction completion mark", if not, the step "CPU0 sends the customized instruction to the CPU1 and the CPU 2" is returned.

The utility model provides a solid state disk low power consumption mode data protection device, includes: the device comprises an acquisition and storage unit, a sending unit, a refreshing unit, a first judging unit, a first setting unit, a second judging unit, a second setting unit, a first storage unit, a first resetting unit, a second storage unit, a second resetting unit, a closing unit and an acquisition and exit returning unit;

the acquisition and storage unit is used for storing the log information of the solid state disk to the storage particles by the CPU0 according to the low-power consumption instruction issued by the host end;

the sending unit is used for sending the self-defined instruction to the CPU1 and the CPU2 by the CPU 0;

the refreshing unit is used for refreshing the temporary data and the written data in the DRAM into the storage particles by the CPU 0;

the first judging unit is used for judging whether the temporary data and the written data in the DRAM are all refreshed into the storage particles or not by the CPU 0;

the first setting unit is used for setting a low-power-consumption instruction completion mark for the CPU1 and the CPU2 by the CPU 0;

the second judging unit is used for judging whether the CPU1 and the CPU2 are marked with low-power-consumption instruction completion marks or not by the CPU 0;

the second setting unit is configured to set, by using the CPU1 and the CPU2, that the PCIE link enters a low power consumption mode;

the first storage unit is used for storing configuration and data of the PCIE physical layer and the data link layer in the SRAM non-power-down area by the CPU1 and the CPU 2;

the first reset unit is configured to reset the PCIE link and the PCIE physical layer by using the CPU1 and the CPU 2;

the second storage unit is used for storing the register and the configuration information of the NVME module in the SRAM non-power-down area by the CPU1 and the CPU 2;

the second reset unit is used for resetting the NVME module by the CPU1 and the CPU 2;

the closing unit is used for closing clocks of the solid state disk by the CPU1 and the CPU2 and performing power-down processing;

the acquisition and exit return unit is used for the CPU0 to acquire a command issued by the host end, the CPU1 and the CPU2 control the solid state disk to exit the low power consumption mode, return to the normal working state, and return to the execution CPU0 to store the log information of the solid state disk to the storage particles according to the low power consumption command issued by the host end.

The further technical scheme is as follows: further comprises: and the third judging unit is used for judging whether the log information of the solid state disk is stored in the storage particles or not by the CPU 0.

The further technical scheme is as follows: in the first judging unit, if the temporary data and the written data in the DRAM are not all refreshed in the memory granule, the CPU0 sets a low-power-consumption instruction incomplete mark for the CPU1 and the CPU 2.

The further technical scheme is as follows: in the second judging unit, if the CPU1 and the CPU2 are not marked with the low power consumption instruction completion mark, the return execution CPU0 sends the self-defined instruction to the CPU1 and the CPU 2.

The computer equipment comprises a memory and a processor, wherein the memory stores a computer program, and the processor realizes the solid state disk low-power consumption mode data protection method when executing the computer program.

A storage medium storing a computer program comprising program instructions which, when executed by a processor, implement a solid state disk low power mode data protection method as described above.

Compared with the prior art, the invention has the beneficial effects that: the method comprises the steps that log information of a solid state disk is stored into storage particles through a background, a front end sends a self-defining command to the temporary data in a DRAM and the data of the storage particles which are being written in, the data is brushed into the storage particles, the state of the rear end is detected, and the processes such as clock closing and the like are carried out until the rear end is in an idle state and no data is written in; the data interacted with the host computer such as front-end link and NVME are stored in the SRAM without power failure of the chip, so that the data recovery time can be reduced, the state before entering into low power consumption can be quickly recovered, different data protection modes are designed for different modules, the data can be flexibly stored, the data storage efficiency is improved, the stability and reliability of the system can be effectively increased, and the requirements can be better met.

The invention is further described below with reference to the drawings and specific embodiments.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic flow chart of a method for protecting data in a low power consumption mode of a solid state disk according to an embodiment of the present invention;

FIG. 2 is a schematic block diagram of a low power consumption mode data protection device for a solid state disk according to an embodiment of the present invention;

fig. 3 is a schematic block diagram of a computer device according to an embodiment of the present invention.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

It should be understood that the terms "comprises" and "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be further understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.

Referring to fig. 1 to 3, wherein referring to fig. 1, the invention discloses a method for protecting data in a low power consumption mode of a solid state disk, which comprises the following steps:

s1, a CPU0 stores log information of a solid state disk to storage particles according to a low-power-consumption instruction issued by a host end;

in this embodiment, the log information of the solid state disk is mainly smart information, security information, and the like.

S3, the CPU0 sends a self-defined instruction to the CPU1 and the CPU 2;

wherein, before the step S3, the method further includes: step S2, the CPU0 judges whether the log information of the solid state disk is stored in the storage particles or not; if so, entering step S3; if not, returning to the step S1.

When the log information of the solid state disk is saved in the storage particles, returning to the step S2 to perform full coverage again, so as to avoid the possibility of missed storage.

The custom instruction is that the CPU0 sends the shared memory of the CPU1 and the CPU2 to the CPU1 and the CPU2 through the CPU 0.

Further, the custom instruction is a low power instruction generated by the CPU 0.

S4, the CPU0 refreshes the temporary data and the written data in the DRAM into the storage granules;

in this embodiment, the CPU includes a CPU0, a CPU1, and a CPU2, where the CPU0 is a front end, and the CPU1 and the CPU2 are rear ends.

S5, the CPU0 judges whether all temporary data in the DRAM and written data are refreshed into the memory grain;

if not, the process proceeds to step S6, and CPU0 sets a low power instruction incomplete flag to CPU1 and CPU2, and executes the process to step S8.

S7, if yes, the CPU0 sets a low-power instruction completion mark for the CPU1 and the CPU 2;

s8, the CPU0 judges whether the CPU1 and the CPU2 are marked with low-power-consumption instruction completion marks or not; if not, return to step S3"CPU0 sends a custom instruction to CPU1 and CPU 2".

S9, if yes, the CPU1 and the CPU2 set PCIE (bus protocol) links to enter a low-power consumption mode;

s10, the CPU1 and the CPU2 store the configuration and data of a PCIE physical layer and a data link layer in an SRAM non-power-down area;

the SRAM non-power-down area is a flash memory area which is provided with a solid state disk and cannot be powered down.

S11, resetting a PCIE link and a PCIE physical layer by a CPU1 and a CPU 2;

in this embodiment, the reset is restored to the initialized state, and the reset is performed to perform a subsequent power-down process or to turn off the clock.

S12, the CPU1 and the CPU2 store registers and configuration information of the NVME module to the SRAM power-down-free area;

s13, resetting the NVME module by the CPU1 and the CPU 2;

s14, the CPU1 and the CPU2 close clocks of the solid state disk and do power-down processing;

s15, the CPU0 acquires a command issued by the host, the CPU1 and the CPU2 control the solid state disk to exit the low power consumption mode, return to the normal working state, and return to the step S1, wherein the CPU0 stores log information of the solid state disk to the storage particles according to the low power consumption command issued by the host.

The method aims at log information of the solid state disk, is stored in storage particles through a background, and aims at temporary data in a DRAM (dynamic random access memory) and data of the storage particles which are being written in, a user-defined command is sent by the front end, the data is brushed into the storage particles, the state of the rear end is detected, and the processes such as clock closing and the like are carried out until the rear end is in an idle state and no data is written in; the data interacted with the host computer such as front-end link and NVME are stored in the SRAM without power failure of the chip, so that the data recovery time can be reduced, the state before entering into low power consumption can be quickly recovered, different data protection modes are designed for different modules, the data can be flexibly stored, the data storage efficiency is improved, the stability and reliability of the system can be effectively increased, and the requirements can be better met.

Referring to fig. 2, the invention also discloses a device for protecting the data of the low power consumption mode of the solid state disk, which comprises: acquisition holding unit 10, transmitting unit 30, refreshing unit 40, first judging unit 50, first setting unit 60, second judging unit 70, second setting unit 80, first holding unit 90, first resetting unit 100, second holding unit 110, second resetting unit 120, closing unit 130, and acquisition exit returning unit 140;

the acquiring and storing unit 10 is configured to store log information of the solid state disk to the storage granule according to a low-power consumption instruction issued by the host side by the CPU 0;

the sending unit 30 is configured to send a custom instruction to the CPU1 and the CPU2 by the CPU 0;

the refreshing unit 40 is used for refreshing the temporary data and the written data in the DRAM into the memory grain by the CPU 0;

the first judging unit 50 is configured to judge, by the CPU0, whether all temporary data in the DRAM and written data are refreshed into the memory granule;

the first setting unit 60 is configured to set, by the CPU0, a low power consumption instruction completion flag for the CPU1 and the CPU 2;

the second judging unit 70 is configured to judge, by using the CPU0, whether the CPU1 and the CPU2 are marked with a low power instruction completion mark;

the second setting unit 80 is configured to set, by using the CPU1 and the CPU2, that the PCIE link enters a low power consumption mode;

the first storage unit 90 is configured to store configuration and data of the PCIE physical layer and the data link layer in the SRAM non-power-down area by using the CPU1 and the CPU 2;

the first reset unit 100 is configured to reset the PCIE link and the PCIE physical layer by using the CPU1 and the CPU 2;

the second saving unit 110 is configured to save the registers and configuration information of the NVME module to the SRAM non-power-down area by using the CPU1 and the CPU 2;

the second reset unit 120 is configured to reset the NVME module by using the CPU1 and the CPU 2;

the closing unit 130 is configured to close clocks of the solid state disk and perform power-down processing for the CPU1 and the CPU 2;

the acquiring and exiting return unit 140 is configured to obtain, by using the CPU0, a command issued by the host, control the solid state disk to exit the low power mode by using the CPU1 and the CPU2, return to the normal working state, and return to execute the CPU0 to save log information of the solid state disk to the storage granule according to the low power instruction issued by the host.

The solid state disk low power consumption mode data protection device further comprises: the third judging unit 20 is configured to judge whether the log information of the solid state disk is saved in the storage granule by using the CPU 0.

In the first judging unit 50, if the temporary data and the written data in the DRAM are not all refreshed into the memory granule, the CPU0 sets the low power consumption instruction incomplete flag to the CPU1 and the CPU 2.

In the second judging unit 70, if the CPU1 and the CPU2 are not marked with the low power instruction completion mark, the return execution CPU0 sends the customized instruction to the CPU1 and the CPU 2.

It should be noted that, as those skilled in the art can clearly understand, the specific implementation process of the low-power consumption mode data protection device and the units of the solid state disk may refer to the corresponding descriptions in the foregoing method embodiments, and for convenience and brevity of description, the description is omitted herein.

The solid state disk low power mode data protection apparatus described above may be implemented in the form of a computer program that is executable on a computer device as shown in fig. 3.

Referring to fig. 3, fig. 3 is a schematic block diagram of a computer device according to an embodiment of the present application; the computer device 500 may be a terminal or a server, where the terminal may be an electronic device with a communication function, such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device. The server may be an independent server or a server cluster formed by a plurality of servers.

With reference to FIG. 3, the computer device 500 includes a processor 502, memory, and a network interface 505, connected by a system bus 501, where the memory may include a non-volatile storage medium 503 and an internal memory 504.

The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer program 5032 includes program instructions that, when executed, cause the processor 502 to perform a method for protecting data in a low power mode of a solid state disk.

The processor 502 is used to provide computing and control capabilities to support the operation of the overall computer device 500.

The internal memory 504 provides an environment for the execution of a computer program 5032 in the non-volatile storage medium 503, which computer program 5032, when executed by the processor 502, causes the processor 502 to perform a method for protecting data in a low power mode of a solid state disk.

The network interface 505 is used for network communication with other devices. Those skilled in the art will appreciate that the structures shown in FIG. 3 are block diagrams only and do not constitute a limitation of the computer device 500 to which the present teachings apply, and that a particular computer device 500 may include more or fewer components than shown, or may combine certain components, or have a different arrangement of components.

It should be appreciated that in embodiments of the present application, the processor 502 may be a central processing unit (Central Processing Unit, CPU), the processor 502 may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSPs), application specific integrated circuits (Application Specific Integrated Circuit, ASICs), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. Wherein the general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

Those skilled in the art will appreciate that all or part of the flow in a method embodying the above described embodiments may be accomplished by computer programs instructing the relevant hardware. The computer program comprises program instructions, and the computer program can be stored in a storage medium, which is a computer readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.

Accordingly, the present invention also provides a storage medium. The storage medium may be a computer readable storage medium. The storage medium stores a computer program, wherein the computer program comprises program instructions which, when executed by a processor, can implement the solid state disk low power consumption mode data protection method described above.

The storage medium may be a U-disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, or other various computer-readable storage media that can store program codes.

Those of ordinary skill in the art will appreciate that the elements and algorithm steps described in connection with the embodiments disclosed herein may be embodied in electronic hardware, in computer software, or in a combination of the two, and that the elements and steps of the examples have been generally described in terms of function in the foregoing description to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

In the several embodiments provided by the present invention, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the device embodiments described above are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, multiple units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed.

The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be combined, divided and deleted according to actual needs. In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.

The integrated unit may be stored in a storage medium if implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present invention is essentially or a part contributing to the prior art, or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a terminal, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention.

The foregoing examples are provided to further illustrate the technical contents of the present invention for the convenience of the reader, but are not intended to limit the embodiments of the present invention thereto, and any technical extension or re-creation according to the present invention is protected by the present invention. The protection scope of the invention is subject to the claims.

Claims

1. The data protection method of the low-power consumption mode of the solid state disk is based on the solid state disk controlled by the CPU0, the CPU1 and the CPU 2; the method is characterized by comprising the following steps of:

CPU0 sends a self-defined instruction to CPU1 and CPU 2;

CPU0 refreshes temporary data and written data in DRAM to memory grain;

CPU1 and CPU2 reset PCIE link and PCIE physical layer;

CPU1 and CPU2 reset NVME module;

CPU0 obtains the command issued by the host, CPU1 and CPU2 control the solid state disk to exit the low power consumption mode, return to the normal working state, and return to step CPU0 to save the log information of the solid state disk to the storage particles according to the low power consumption command issued by the host;

before the step CPU0 sends the custom instruction to the CPU1 and the CPU2, the method further includes: CPU0 judges whether the log information of the solid state disk is stored in the storage particles or not; if so, entering the step CPU0 to send a self-defined instruction to the CPU1 and the CPU 2; if not, returning to the step CPU0 to store the log information of the solid state disk to the storage particles according to the low-power-consumption instruction issued by the host end;

the step CPU0 judges whether the temporary data in the DRAM and the written data are all refreshed into the storage particles, if not, the CPU0 sets a low-power-consumption instruction incomplete mark for the CPU1 and the CPU2, and executes the step CPU0 to judge whether the low-power-consumption instruction complete mark is marked on the CPU1 and the CPU 2;

and the step CPU0 judges whether the CPU1 and the CPU2 are marked with low-power-consumption instruction completion marks, if not, the step CPU0 is returned to send the self-defined instructions to the CPU1 and the CPU 2.

2. The utility model provides a solid state disk low power consumption mode data protection device which characterized in that includes: the device comprises an acquisition and storage unit, a sending unit, a refreshing unit, a first judging unit, a first setting unit, a second judging unit, a second setting unit, a first storage unit, a first resetting unit, a second storage unit, a second resetting unit, a closing unit and an acquisition and exit returning unit;

the acquisition and exit return unit is used for the CPU0 to acquire a command issued by the host end, the CPU1 and the CPU2 control the solid state disk to exit the low power consumption mode, return to the normal working state, and return to the execution CPU0 to store the log information of the solid state disk to the storage particles according to the low power consumption command issued by the host end;

the apparatus further comprises: the third judging unit is used for judging whether the log information of the solid state disk is stored in the storage particles or not by the CPU 0; if so, executing the CPU0 to send the self-defined instruction to the CPU1 and the CPU 2; if not, the execution CPU0 stores the log information of the solid state disk to the storage particles according to the low-power-consumption instruction issued by the host computer;

in the first judging unit, if the temporary data and the written data in the DRAM are not all refreshed into the storage particles, the CPU0 sets a low-power-consumption instruction incomplete mark for the CPU1 and the CPU 2;

in the second judging unit, if the CPU1 and the CPU2 are not marked with the low power consumption instruction completion mark, the return execution CPU0 sends the self-defined instruction to the CPU1 and the CPU 2.

3. A computer device, wherein the computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the method for protecting data in a low power mode of a solid state disk according to claim 1 when executing the computer program.

4. A storage medium storing a computer program comprising program instructions which, when executed by a processor, implement the solid state disk low power mode data protection method of claim 1.