CN111812545B - Line defect detection method, device, equipment and medium - Google Patents
Line defect detection method, device, equipment and medium Download PDFInfo
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- CN111812545B CN111812545B CN202010646701.8A CN202010646701A CN111812545B CN 111812545 B CN111812545 B CN 111812545B CN 202010646701 A CN202010646701 A CN 202010646701A CN 111812545 B CN111812545 B CN 111812545B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/52—Testing for short-circuits, leakage current or ground faults
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/54—Testing for continuity
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/58—Testing of lines, cables or conductors
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/30—Computing systems specially adapted for manufacturing
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- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
The embodiment of the invention discloses a line defect detection method, a device, equipment and a medium, wherein the method comprises the following steps: acquiring a standard circuit diagram which is pre-established and corresponds to a circuit to be tested, and an actual circuit diagram which corresponds to the circuit to be tested; standard position information of at least two elements in a standard circuit diagram and position information to be tested corresponding to the at least two elements in an actual circuit diagram are obtained; processing the standard circuit diagram into a circuit diagram to be matched based on the standard position information and the test position information; and determining defect information in the actual circuit diagram based on the circuit diagram to be matched and the actual circuit diagram. The technical scheme of the embodiment of the invention improves the universality, convenience and high efficiency of line detection.
Description
Technical Field
The embodiment of the invention relates to the technical field of LCD (liquid crystal display), in particular to a line defect detection method, device, equipment and medium.
Background
Currently, when detecting a line, the length of the line can be measured in the field, and whether the line has a line defect such as a short circuit or a short circuit is determined based on the relation between the lengths of the lines.
However, there are several problems in detecting line defects in the above manner: currently, when line defects are detected by line or segment by segment measurement, the problem that the line defect detection is time-consuming and labor-consuming exists; furthermore, if a customer changes a new product, the new line has different appearance characteristics, so that the original detection logic is easy to cause false detection, and the technical problem of high false detection efficiency is caused.
Disclosure of Invention
The invention provides a line defect detection method, a device, equipment and a storage medium, which are used for realizing the technical effects of optimizing a line detection strategy and improving line detection efficiency.
In a first aspect, an embodiment of the present invention provides a line defect detection method, including:
acquiring a standard circuit diagram which is pre-established and corresponds to a circuit to be tested, and an actual circuit diagram which corresponds to the circuit to be tested;
obtaining standard position information of at least two elements in the standard circuit diagram and position information to be tested corresponding to the at least two elements in the actual circuit diagram;
processing the standard circuit diagram into a circuit diagram to be matched based on the standard position information and the test position information;
and determining defect information in the actual circuit diagram based on the circuit diagram to be matched and the actual circuit diagram.
In a second aspect, an embodiment of the present invention further provides a line defect detecting device, including:
the circuit diagram obtaining module is used for obtaining a standard circuit diagram which is pre-established and corresponds to a circuit to be tested and an actual circuit diagram which corresponds to the circuit to be tested;
the position information determining module is used for acquiring standard position information of at least two elements in the standard circuit diagram and position information to be tested corresponding to the at least two elements in the actual circuit diagram;
the circuit diagram to be matched acquisition module is used for processing the standard circuit diagram into a circuit diagram to be matched based on the standard position information and the test position information;
and the defect information determining module is used for determining defect information in the actual circuit diagram based on the circuit diagram to be matched and the actual circuit diagram.
In a third aspect, an embodiment of the present invention further provides an apparatus, including:
one or more processors;
storage means for storing one or more programs,
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the line defect detection method according to any of the embodiments of the present invention.
In a fourth aspect, embodiments of the present invention also provide a storage medium containing computer-executable instructions, which when executed by a computer processor, are configured to perform a line defect detection method according to any of the embodiments of the present invention.
According to the technical scheme, the conversion matrix for converting the standard circuit diagram into the actual circuit diagram can be determined by processing the standard circuit diagram and the actual circuit diagram, the standard circuit diagram is converted into the circuit diagram to be matched corresponding to the actual circuit diagram based on the conversion matrix, the circuit defect in the actual circuit diagram is determined based on the difference between the circuit diagram to be matched and the actual circuit diagram, and then the actual circuit is optimized based on the circuit defect, so that the technical effects of universality, convenience and high efficiency of circuit detection are improved.
Drawings
In order to more clearly illustrate the technical solution of the exemplary embodiments of the present invention, a brief description is given below of the drawings required for describing the embodiments. It is obvious that the drawings presented are only drawings of some of the embodiments of the invention to be described, and not all the drawings, and that other drawings can be made according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a line defect detecting method according to an embodiment of the invention;
FIG. 2 is a diagram of a distorted image according to an embodiment of the present invention;
fig. 3 is a flow chart of a circuit defect detecting method according to a second embodiment of the present invention;
fig. 4 is a schematic engineering drawing diagram corresponding to a circuit diagram to be tested according to a second embodiment of the present invention;
fig. 5 is a schematic diagram of positions corresponding to elements in an actual circuit diagram and a standard circuit diagram provided in a second embodiment of the present invention;
FIG. 6 is a corresponding image of a circuit diagram to be matched and an actual circuit diagram after converting a standard circuit diagram into a corresponding circuit diagram to be matched based on a conversion matrix;
fig. 7 is a schematic structural diagram of a circuit defect detecting device according to a third embodiment of the present invention;
fig. 8 is a schematic diagram of an apparatus structure according to a fourth embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Example 1
Fig. 1 is a schematic flow chart of a line defect detection method according to an embodiment of the present invention, where the method may be applied to detect a line arranged based on a line layout to determine whether a defect exists in an actually laid line, and the method may be performed by a line defect detection device, where the device may be implemented in software and/or hardware, and the hardware may be a server or an electronic device.
As shown in fig. 1, the method of the present embodiment includes:
s110, acquiring a standard circuit diagram which is pre-established and corresponds to the circuit to be tested and an actual circuit diagram which corresponds to the circuit to be tested.
In general, when laying out a circuit, it is generally necessary to determine a circuit layout, i.e., draw a circuit layout, and lay out a circuit according to the circuit layout. The circuit layout is generally implemented based on CAD or other drawing software, and the pre-drawn circuit layout may be stored to retrieve the pre-drawn circuit layout at the time of circuit inspection, and the actual layout circuit is inspected based on the circuit layout. The line to be tested is a line to be tested, and an engineering drawing corresponding to the line to be tested can be used as a standard line drawing. The actual circuit diagram is the circuit diagram corresponding to the circuit which is actually laid out according to the engineering drawing.
Optionally, obtaining a standard circuit diagram pre-established corresponding to the circuit to be tested and an actual circuit diagram corresponding to the circuit to be tested includes: retrieving an engineering drawing comprising the line to be tested; determining a target area corresponding to the line to be tested from the engineering drawing, dividing the target area into at least one sub-area based on a preset rule, and taking each sub-area as the standard line drawing; acquiring a shooting image of an actual line laid according to the engineering drawing based on a shooting device; dividing the shot image into at least one sub-area according to the preset rule, and taking each sub-area as the actual circuit diagram.
When the circuit diagram is laid out in the actual field, it is generally necessary to determine the theoretical diagram, i.e., the engineering drawing. When determining whether the circuit of the field layout is matched with the engineering drawing, the engineering drawing and the circuit diagram corresponding to the circuit of the field layout can be obtained for matching to determine.
The engineering drawing library can comprise a plurality of engineering drawings, and each engineering drawing can comprise a plurality of circuits. The line to be tested may be a part of the engineering drawing, so that after the engineering drawing is acquired, an area corresponding to the line to be tested may be determined from the engineering drawing, and the area may be used as a target area corresponding to the line to be tested. In order to improve the accuracy of line defect detection, the target area may be divided into at least one area, and each area may be used as a standard line drawing. And (3) shooting the circuit laid out in the field based on the high-definition shooting device to obtain a shooting image. Of course, in order to improve the accuracy of the line defect detection, the photographed image may be also divided into at least one area, and each area may be taken as an actual line drawing. The reason why the accuracy can be improved in this way is that, referring to fig. 2, the normal image is shown in (a) of fig. 2, the image shot in the shooting state generally has a certain frame loss, and as shown in (b) of fig. 2, although corresponding measures are taken to correct the image, there is still a slight difference, and at this time, the image is divided into at least one area, so that the technical effect of dispersing errors and further improving the accuracy of subsequent detection can be achieved.
S120, standard position information of at least two elements in a standard circuit diagram and position information to be tested corresponding to the at least two elements in an actual circuit diagram are obtained.
The element may be a component in the circuit diagram or a model corresponding to a certain component, which is made in advance. The rectangular plane coordinate system may be established in advance, the position information of the element in the standard circuit diagram, that is, the coordinate information may be determined, and the coordinate information obtained at this time may be used as the standard position information. The number of elements may be two, three or more, and in order to improve the accuracy of the transformation matrix, the number of elements may be as large as possible, and optionally ten elements. Of course, the number of the specific elements may be determined according to actual situations. In order to be able to process the standard line graph into an image to be matched corresponding to the actual line graph, after determining the position information of the elements in the standard line graph, the position information corresponding to at least two elements may be acquired from the corresponding positions of the actual line graph, that is, according to the same principle, a coordinate system is established in the standard line graph, and the position information of at least two elements in the actual line graph is determined and used as the position information to be tested.
Optionally, the elements are components used in the circuit, and the obtaining standard position information of at least two elements in the standard circuit diagram and the position information to be tested corresponding to the at least two elements in the actual circuit diagram includes: acquiring at least two elements in a standard circuit diagram, and determining the central point coordinate information of each element as standard position information; corresponding positions of at least two elements in the actual circuit diagram are obtained, actual coordinate information of the at least two elements in the actual circuit diagram is determined, and the actual coordinate information is used as position information to be tested.
In order to determine the specific position information of the elements, the coordinate information of the center point of each element may be obtained as standard position information, and correspondingly, the actual coordinate information of the corresponding element in the actual circuit diagram may be used as the position information to be tested.
In this embodiment, the advantage of determining the position information to be tested and the standard position information is that the conversion matrix between the standard image and the actual image can be obtained according to the relationship between the position information to be tested and the standard position information, so as to process the standard image based on the conversion matrix.
And S130, processing the standard circuit diagram into a circuit diagram to be matched based on the standard position information and the test position information.
The circuit diagram to be matched refers to a circuit image after the standard circuit diagram is converted into an actual circuit diagram.
It should be noted that, before the standard circuit diagram is processed into the circuit diagram to be matched, a transformation matrix for converting the standard circuit diagram into the circuit diagram to be matched may be determined based on the standard position information and the position information to be tested. The circuit diagram to be matched is a circuit diagram which is matched with the actual circuit diagram by processing the standard circuit diagram based on the transformation matrix.
Optionally, processing the standard circuit diagram into the circuit diagram to be matched based on the standard position information and the test position information includes: determining a conversion matrix between the standard line image and the actual line image by vector calculation on the standard position information and the test position information; and converting the standard circuit diagram into a circuit diagram to be matched based on the conversion matrix.
After obtaining the position information to be tested and the actual position information of the corresponding element, a vector calculation method may be used to process the test position information and the actual position information of the corresponding element, so as to obtain a conversion matrix of converting the standard circuit diagram into the circuit diagram to be matched corresponding to the actual circuit diagram.
Specifically, after the conversion matrix converted from the standard line graph to the actual line graph is calculated, the standard line graph may be converted into the image to be matched with the actual line graph based on the conversion matrix.
In this embodiment, converting the standard circuit diagram into the circuit diagram to be matched based on the conversion matrix includes: and acquiring coordinate information of the edge line in the standard circuit diagram and standard position information of each element, and processing the coordinate information and the standard position information of the edge line based on the conversion matrix to obtain a circuit diagram to be matched corresponding to the standard circuit diagram.
In order to convert the standard line graph into a line graph to be matched corresponding to the actual line graph, coordinate information of each point on the edge line of the standard line graph may be acquired. And processing the coordinate information of the edge points and the coordinate information of the elements in the standard circuit diagram based on the conversion matrix, so that the standard circuit diagram can be converted into a circuit diagram to be matched corresponding to the actual circuit diagram.
And S140, determining defect information in the actual circuit diagram based on the circuit diagram to be matched and the actual circuit diagram.
The defect information may be information that does not correspond to the actual circuit diagram and the circuit diagram to be matched, for example, the defect information may include specific coordinate information of the defect, and the like.
Specifically, by matching the circuit diagram to be matched with the actual circuit diagram, optionally, the circuit diagram to be matched is paved on the actual circuit diagram, different contents are taken as defects, and the specific position or specific identification of the defects can be taken as defect information.
In this embodiment, based on the to-be-matched circuit diagram and the actual circuit diagram, determining defect information in the actual circuit diagram may be: determining the difference between the circuit to be matched and the actual circuit diagram by carrying out matching processing on the circuit diagram to be matched and the actual circuit diagram; defect information in the actual wiring diagram is determined based on the difference.
According to the technical scheme, the conversion matrix for converting the standard circuit diagram into the actual circuit diagram can be determined by processing the standard circuit diagram and the actual circuit diagram, the standard circuit diagram is converted into the circuit diagram to be matched corresponding to the actual circuit diagram based on the conversion matrix, the circuit defect in the actual circuit diagram is determined based on the difference between the circuit diagram to be matched and the actual circuit diagram, and then the actual circuit is optimized based on the circuit defect, so that the technical effects of universality, convenience and high efficiency of circuit detection are improved. On the basis of the technical scheme, after obtaining the defect information, the method further comprises the following steps: displaying the defect information in a preset mode; the preset mode includes highlighting the difference in the actual line graph or outputting defect information corresponding to the difference and displaying in the target area.
The preset mode may be to highlight the difference between the to-be-matched graph and the actual line graph, or to output the coordinate information of the difference in the target area. The target area may be a display area preset on the display interface.
Example two
Fig. 3 is a flow chart of a circuit defect detecting method according to a second embodiment of the present invention. As shown in fig. 3, the method includes:
s210, selecting a prefabricated CAD engineering drawing corresponding to the line to be tested, and determining a detection area.
Specifically, a CAD drawing corresponding to the line to be tested can be selected from the CAD file, namely, the storage space for storing the engineering drawing. And selecting a region corresponding to the line to be tested from the CAD drawing frame, and taking the region as a target region. In order to improve the accuracy of defect information detection, the target area may be divided into at least one sub-area, and each sub-area may be sequentially taken as a detection area.
For example, as shown in fig. 4, a CAD drawing corresponding to the test line may be determined from the CAD drawing, and a first sub-region in the CAD drawing may be used as the detection region.
S220, standard position information of each element is acquired for each detection area.
Specifically, the coordinate information of the center point of each component or model in the detection area can be obtained, and the coordinate information of the center point is used as standard position information.
S230, acquiring an actual layout diagram shot by the shooting device and determining actual position information of corresponding elements in the actual circuit diagram.
Specifically, an actual layout chart according to a CAD drawing layout can be shot based on a high-definition camera, the actual layout chart is divided into at least one sub-area according to the same principle, and the sub-area corresponding to the detection area is obtained as an actual circuit chart. And acquiring the coordinate information of the central point of the corresponding element or the model in the actual circuit diagram, and taking the coordinate information as the actual position information.
S240, determining a conversion matrix based on the standard position information and the actual position information.
For example, referring to fig. 5, elements or points corresponding to the models in the cad drawing, that is, points corresponding to each model or element in the standard line drawing are points of the first type in fig. 5; the points corresponding to the elements or models in the actual wiring diagram are the second type of points in fig. 5. Through vector calculation, a conversion matrix from the first type point to the second type point, namely a conversion matrix for converting the standard circuit diagram into the actual circuit diagram, can be obtained.
S250, based on the conversion matrix, the coordinate information and the standard position information of each edge point of the detection area are processed, and the detection area is converted into a circuit diagram to be matched, which is matched with the actual circuit diagram.
Specifically, coordinate information of each edge point of the detection area and standard position information of the element are obtained, the information is processed through a transformation matrix, and each point on the standard graph can be converted into a to-be-matched line graph corresponding to the actual line graph.
For example, referring to fig. 6, (a) shows an actual circuit diagram obtained based on the photographing device, and (b) shows an engineering drawing, i.e. a standard circuit diagram, obtained by processing the standard circuit diagram through a conversion matrix, and it should be noted that a certain difference may exist between the actual circuit diagram and the standard circuit diagram; (c) For the coincidence map after the actual wiring diagram (a) and the wiring diagram to be matched (b) are laid together, the difference between the wiring diagram to be matched and the actual wiring diagram can be determined based on (c) in fig. 6. Of course, the actual quasi-line diagram can be completely matched with the line diagram to be matched, and no difference exists.
S260, determining the difference between the circuit diagram to be matched and the actual circuit diagram, and outputting the difference.
Specifically, when the standard circuit diagram is converted into the circuit diagram to be matched based on the transformation matrix, the circuit diagram to be matched can be paved on the actual circuit diagram, referring to fig. 6 (c), the difference between the circuit diagram to be matched and the actual circuit diagram can be determined through comparison, the difference can be displayed on a display interface, or the position information of the difference can be displayed in a corresponding area, so that a worker can determine defects in the actual layout circuit based on the difference information, namely, the defect searching efficiency is optimized, and the detection efficiency of the circuit layout is further improved.
According to the technical scheme, the conversion matrix for converting the standard circuit diagram into the actual circuit diagram can be determined by processing the standard circuit diagram and the actual circuit diagram, the standard circuit diagram is converted into the circuit diagram to be matched corresponding to the actual circuit diagram based on the conversion matrix, the circuit defect in the actual circuit diagram is determined based on the difference between the circuit diagram to be matched and the actual circuit diagram, and then the actual circuit is optimized based on the circuit defect, so that the technical effects of universality, convenience and high efficiency of circuit detection are improved.
Example III
Fig. 7 is a schematic structural diagram of a circuit defect detecting device according to a third embodiment of the present invention, where the device includes: the circuit diagram obtaining module 310, the position information determining module 320, the circuit diagram obtaining module to be matched 330 and the defect information determining module 340.
The circuit diagram obtaining module 310 is configured to obtain a standard circuit diagram that is pre-established and corresponds to a circuit to be tested, and an actual circuit diagram that corresponds to the circuit to be tested; the location information determining module 320 is configured to obtain standard location information of at least two elements in the standard circuit diagram, and location information to be tested corresponding to the at least two elements in the actual circuit diagram; a circuit diagram to be matched acquisition module 330, configured to process the standard circuit diagram into a circuit diagram to be matched based on the standard position information and the test position information; and the defect information determining module 340 is configured to determine defect information in the actual circuit diagram based on the circuit diagram to be matched and the actual circuit diagram.
According to the technical scheme, the conversion matrix for converting the standard circuit diagram into the actual circuit diagram can be determined by processing the standard circuit diagram and the actual circuit diagram, the standard circuit diagram is converted into the circuit diagram to be matched corresponding to the actual circuit diagram based on the conversion matrix, the circuit defect in the actual circuit diagram is determined based on the difference between the circuit diagram to be matched and the actual circuit diagram, and then the actual circuit is optimized based on the circuit defect, so that the technical effects of universality, convenience and high efficiency of circuit detection are improved.
On the basis of the technical scheme, the circuit diagram acquisition module comprises:
the engineering drawing calling unit is used for calling engineering drawings comprising the line to be tested;
a standard circuit diagram obtaining unit, configured to determine a target area corresponding to the circuit to be tested from the engineering drawing, divide the target area into at least one sub-area based on a preset rule, and use each sub-area as the standard circuit diagram
The circuit diagram shooting unit is used for acquiring shooting images of actual circuits laid according to the engineering drawing based on a shooting device;
the actual circuit diagram obtaining unit is used for dividing the shot image into at least one sub-area according to the preset rule, and taking each sub-area as the actual circuit diagram. On the basis of the above technical solutions, the location information determining module includes:
a standard position information acquisition unit, configured to acquire at least two elements in the standard circuit diagram, and determine center point coordinate information of each element as standard position information;
the to-be-tested position information acquisition unit is used for acquiring corresponding positions of the at least two elements in the actual circuit diagram, determining actual coordinate information of the at least two elements in the actual circuit diagram, and taking the actual coordinate information as the to-be-tested position information.
On the basis of the above technical solutions, the to-be-matched circuit diagram obtaining module includes:
a conversion matrix acquisition unit configured to determine a conversion matrix between the standard line image and the actual line image by vector calculation on the standard position information and the test position information;
and the circuit diagram obtaining unit to be matched is used for converting the standard circuit diagram into the circuit diagram to be matched based on the conversion matrix.
On the basis of the above technical solutions, the to-be-matched circuit diagram obtaining unit is further configured to: and acquiring coordinate information of an edge line in a standard circuit diagram and standard position information of each element, and processing the coordinate information and the standard position information of the edge line based on the conversion matrix to obtain a circuit diagram to be matched corresponding to the standard circuit diagram.
On the basis of the above technical solutions, the defect information determining module includes:
the difference acquisition unit is used for determining the difference between the circuit to be matched and the actual circuit diagram through matching processing of the circuit diagram to be matched and the actual circuit diagram;
and a defect information determining unit for determining defect information in the actual circuit diagram based on the difference.
On the basis of the technical schemes, the device comprises:
the defect information display module is used for displaying the defect information in a preset mode; the preset mode comprises the steps of highlighting the difference in the actual line diagram or outputting defect information corresponding to the difference and displaying the defect information in a target area.
The circuit defect detection device provided by the embodiment of the invention can execute the circuit defect detection method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
It should be noted that each unit and module included in the above apparatus are only divided according to the functional logic, but not limited to the above division, so long as the corresponding functions can be implemented; in addition, the specific names of the functional units are also only for distinguishing from each other, and are not used to limit the protection scope of the embodiments of the present invention.
Example IV
Fig. 8 is a schematic structural diagram of an apparatus according to a fourth embodiment of the present invention. Fig. 8 shows a block diagram of an exemplary device 40 suitable for use in implementing the embodiments of the present invention. The device 40 shown in fig. 8 is merely an example and should not be construed as limiting the functionality and scope of use of embodiments of the present invention.
As shown in fig. 8, device 40 is in the form of a general purpose computing device. Components of device 40 may include, but are not limited to: one or more processors or processing units 401, a system memory 402, a bus 403 that connects the various system components (including the system memory 402 and the processing units 401).
The system memory 402 may include computer system readable media in the form of volatile memory, such as Random Access Memory (RAM) 404 and/or cache memory 405. Device 40 may further include other removable/non-removable, volatile/nonvolatile computer system storage media. By way of example only, storage system 406 may be used to read from and write to non-removable, nonvolatile magnetic media (not shown in FIG. 8, commonly referred to as a "hard drive"). Although not shown in fig. 8, a magnetic disk drive for reading from and writing to a removable non-volatile magnetic disk (e.g., a "floppy disk"), and an optical disk drive for reading from or writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In such cases, each drive may be coupled to bus 403 through one or more data medium interfaces. Memory 402 may include at least one program product having a set (e.g., at least one) of program modules configured to carry out the functions of embodiments of the invention.
A program/utility 408 having a set (at least one) of program modules 407 may be stored in, for example, memory 402, such program modules 407 including, but not limited to, an operating system, one or more application programs, other program modules, and program data, each or some combination of which may include an implementation of a network environment. Program modules 407 generally perform the functions and/or methods of the described embodiments of the invention.
The device 40 may also communicate with one or more external devices 409 (e.g., keyboard, pointing device, display 410, etc.), one or more devices that enable a user to interact with the device 40, and/or any devices (e.g., network card, modem, etc.) that enable the device 40 to communicate with one or more other computing devices. Such communication may occur through an input/output (I/O) interface 411. Also, device 40 may communicate with one or more networks such as a Local Area Network (LAN), a Wide Area Network (WAN) and/or a public network, such as the Internet, via network adapter 412. As shown, network adapter 412 communicates with other modules of device 40 over bus 403. It should be appreciated that although not shown in fig. 8, other hardware and/or software modules may be used in connection with device 40, including, but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, data backup storage systems, and the like.
The processing unit 401 executes various functional applications and data processing by running a program stored in the system memory 402, for example, implements the line defect detection method provided by the embodiment of the present invention.
Example five
A fifth embodiment of the present invention also provides a storage medium containing computer-executable instructions for performing a line defect detection method when executed by a computer processor.
The method comprises the following steps:
acquiring a standard circuit diagram which is pre-established and corresponds to a circuit to be tested, and an actual circuit diagram which corresponds to the circuit to be tested;
obtaining standard position information of at least two elements in the standard circuit diagram and position information to be tested corresponding to the at least two elements in the actual circuit diagram;
processing the standard circuit diagram into a circuit diagram to be matched based on the standard position information and the test position information;
and determining defect information in the actual circuit diagram based on the circuit diagram to be matched and the actual circuit diagram.
The computer storage media of embodiments of the invention may take the form of any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
The computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, either in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for embodiments of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (8)
1. A method for detecting a line defect, comprising:
acquiring a standard circuit diagram which is pre-established and corresponds to a circuit to be tested, and an actual circuit diagram which corresponds to the circuit to be tested;
obtaining standard position information of at least two elements in the standard circuit diagram and position information to be tested corresponding to the at least two elements in the actual circuit diagram;
processing the standard circuit diagram into a circuit diagram to be matched based on the standard position information and the test position information;
determining defect information in the actual circuit diagram based on the circuit diagram to be matched and the actual circuit diagram;
the element is a component used in a circuit, the obtaining standard position information of at least two elements in the standard circuit diagram and the position information to be tested corresponding to the at least two elements in the actual circuit diagram includes:
acquiring at least two elements in the standard circuit diagram, and determining the central point coordinate information of each element as standard position information;
acquiring corresponding positions of the at least two elements in the actual circuit diagram, determining actual coordinate information of the at least two elements in the actual circuit diagram, and taking the actual coordinate information as the position information to be tested;
based on the standard position information and the test position information, processing the standard circuit diagram into a circuit diagram to be matched, including:
determining a conversion matrix between the standard line image and the actual line image by vector calculation on the standard position information and the test position information;
and converting the standard circuit diagram into a circuit diagram to be matched based on the conversion matrix.
2. The method according to claim 1, wherein the acquiring pre-establishes a standard route map corresponding to a route to be tested and an actual route map corresponding to the route to be tested includes:
retrieving an engineering drawing comprising the line to be tested;
determining a target area corresponding to the line to be tested from the engineering drawing, dividing the target area into at least one sub-area based on a preset rule, and taking each sub-area as the standard line drawing;
acquiring a shooting image of an actual line laid according to the engineering drawing based on a shooting device;
dividing the shot image into at least one sub-area according to the preset rule, and taking each sub-area as the actual circuit diagram.
3. The method of claim 1, wherein converting the standard circuit diagram into a circuit diagram to be matched based on the conversion matrix comprises:
and acquiring coordinate information of an edge line in a standard circuit diagram and standard position information of each element, and processing the coordinate information and the standard position information of the edge line based on the conversion matrix to obtain a circuit diagram to be matched corresponding to the standard circuit diagram.
4. The method of claim 1, wherein the determining defect information in the actual route map based on the route map to be matched and the actual route map comprises:
determining the difference between the circuit to be matched and the actual circuit diagram by carrying out matching processing on the circuit diagram to be matched and the actual circuit diagram;
defect information in the actual route map is determined based on the difference.
5. The method as recited in claim 4, further comprising:
displaying the defect information in a preset mode;
the preset mode comprises the steps of highlighting the defect information in the actual circuit diagram or outputting the defect information corresponding to the difference and displaying the defect information in a target area.
6. A line defect detecting apparatus, comprising:
the circuit diagram acquisition module is used for acquiring a standard circuit diagram which is pre-established and corresponds to a circuit to be tested and an actual circuit diagram which corresponds to the circuit to be tested;
the position information determining module is used for acquiring standard position information of at least two elements in the standard circuit diagram and position information to be tested corresponding to the at least two elements in the actual circuit diagram;
the circuit diagram to be matched acquisition module is used for processing the standard circuit diagram into a circuit diagram to be matched based on the standard position information and the test position information;
the defect information determining module is used for determining defect information in the actual circuit diagram based on the circuit diagram to be matched and the actual circuit diagram;
the location information determining module includes:
a standard position information acquisition unit, configured to acquire at least two elements in the standard circuit diagram, and determine center point coordinate information of each element as standard position information;
the to-be-tested position information acquisition unit is used for acquiring corresponding positions of the at least two elements in the actual circuit diagram, determining actual coordinate information of the at least two elements in the actual circuit diagram, and taking the actual coordinate information as the to-be-tested position information;
the circuit diagram obtaining module to be matched comprises:
a conversion matrix acquisition unit configured to determine a conversion matrix between the standard line image and the actual line image by vector calculation on the standard position information and the test position information;
and the circuit diagram obtaining unit to be matched is used for converting the standard circuit diagram into the circuit diagram to be matched based on the conversion matrix.
7. An apparatus, the apparatus comprising:
one or more processors;
a storage means for storing one or more programs;
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the line defect detection method of any of claims 1-5.
8. A storage medium containing computer executable instructions for performing the line defect detection method of any of claims 1-5 when executed by a computer processor.
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| CN114322917B (en) * | 2021-12-28 | 2023-08-18 | 广东电网有限责任公司 | A transformer winding detection method, device, electronic equipment and storage medium |
| CN115293096B (en) * | 2022-08-05 | 2023-05-26 | 清研精准(北京)汽车科技有限公司 | Line generation method, device, electronic equipment and storage medium |
| CN116152217A (en) * | 2023-03-02 | 2023-05-23 | 广东电网有限责任公司 | A secondary circuit detection method, device, electronic equipment and storage medium |
| CN117497439A (en) * | 2023-09-27 | 2024-02-02 | 上海朋熙半导体有限公司 | A method, device, equipment and readable medium for predicting critical defects in wafers |
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