CN111812482A - Reliability test system for laser chips - Google Patents
Reliability test system for laser chips Download PDFInfo
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- CN111812482A CN111812482A CN201910291850.4A CN201910291850A CN111812482A CN 111812482 A CN111812482 A CN 111812482A CN 201910291850 A CN201910291850 A CN 201910291850A CN 111812482 A CN111812482 A CN 111812482A
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
Description
技术领域technical field
本发明涉及一种激光芯片用可靠性测试系统,属于芯片加工技术领域。The invention relates to a reliability testing system for laser chips, belonging to the technical field of chip processing.
背景技术Background technique
芯片老化测试是一种采用电压和高温来加速器件电学故障的电应力测试方法,其中,老化过程基本上模拟运行了芯片整个寿命,因为老化过程中应用的电激励反映了芯片工作的最坏情况。Chip burn-in is an electrical stress test method that uses voltage and high temperature to accelerate electrical failure of the device, where the burn-in process essentially simulates running the entire life of the chip because the electrical excitation applied during burn-in reflects the worst-case scenario of chip operation .
老化测试可以用来作为器件可靠性的检测或作为生产窗口来发现器件的早期故障,一般用于芯片老化测试的装置是通过测试插座与外接电路板共同工作,在现有的老化测试夹具中,提供温度的加热源距芯片较远,温度控制精度较差,且单次仅能测试单颗芯片,十分麻烦。The burn-in test can be used as a device reliability test or as a production window to find the early failure of the device. Generally, the device used for chip burn-in test works together with an external circuit board through a test socket. In the existing burn-in test fixture, The heating source that provides the temperature is far away from the chip, the temperature control accuracy is poor, and only a single chip can be tested at a time, which is very troublesome.
发明内容SUMMARY OF THE INVENTION
本发明的目的是提供一种激光芯片用可靠性测试系统,其不仅能够提高温控精度,还能单次测试多个芯片,有效提高测试效率。The purpose of the present invention is to provide a reliability test system for laser chips, which can not only improve the temperature control accuracy, but also test multiple chips at a time, thereby effectively improving the test efficiency.
为达到上述目的,本发明采用的技术方案是:一种激光芯片用可靠性测试系统,包括基板、安装在基板上的载板和安装在载板上的第一PCB,所述载板上开有供芯片嵌入的芯片槽,所述第一PCB上具有与芯片槽对应的芯片探针,所述基板和载板之间安装有若干个TEC,此TEC位于芯片槽的正下方,所述基板与第一PCB之间安装有一隔热板,此隔热板中开有供TEC嵌入的隔热通槽;In order to achieve the above object, the technical solution adopted in the present invention is: a reliability testing system for a laser chip, comprising a substrate, a carrier board mounted on the substrate, and a first PCB mounted on the carrier board, and the carrier board opens There are chip grooves for chips to be embedded in, the first PCB has chip probes corresponding to the chip grooves, a number of TECs are installed between the substrate and the carrier board, and the TECs are located directly below the chip grooves, and the substrate A heat shield is installed between the first PCB and the heat shield, and the heat shield is provided with a heat shield through slot for embedding the TEC;
所述第一PCB安装在隔热板上,所述基板上安装有一第二PCB,此第二PCB上具有连接触点、与连接触点连通的测试触点、焊接触点和与焊接触点连通的供电触点,所述第一PCB上具有与连接触点对应的连接探针,所述测试触点用于连接外部设备,所述TEC的接电引脚焊接在焊接触点上;The first PCB is mounted on the heat shield, and a second PCB is mounted on the substrate, and the second PCB has connection contacts, test contacts communicating with the connection contacts, soldering contacts and soldering contacts Connected power supply contacts, the first PCB has connection probes corresponding to the connection contacts, the test contacts are used to connect external equipment, and the electricity connection pins of the TEC are welded on the welding contacts;
所述第一PCB和隔热板之间安装有一垫板,此垫板上开有供芯片探针和连接探针通过的探针通孔,所述第一PCB和垫板通过一固定螺丝安装在基板上,所述基板上还设有限位杆,此限位杆上套有位于垫板和载板之间的限位弹簧,所述垫板上开有供限位杆嵌入的限位孔,此限位孔一侧的垫板上还连通开有一条形导向孔,且此条形导向孔位于垫板靠近芯片的一侧;A backing plate is installed between the first PCB and the heat insulation board. The backing plate is provided with a probe through hole for the chip probe and the connection probe to pass through. The first PCB and the backing plate are installed by a fixing screw. On the base plate, the base plate is also provided with a limit rod, the limit rod is sleeved with a limit spring located between the backing plate and the carrier plate, and the backing plate is provided with a limit hole for the limit rod to be embedded in , the backing plate on one side of the limiting hole is also connected with a strip-shaped guide hole, and the strip-shaped guide hole is located on the side of the backing plate close to the chip;
所述焊接触点位于第二PCB底面,所述基板底面开有与焊接触点对应的焊接通孔。The soldering contacts are located on the bottom surface of the second PCB, and the bottom surface of the substrate is provided with soldering through holes corresponding to the soldering contacts.
上述技术方案中进一步改进的方案如下:The further improved scheme in the above technical scheme is as follows:
1. 上述方案中,所述基板顶面开有供TEC嵌入的安装槽。1. In the above solution, the top surface of the substrate is provided with a mounting groove for the TEC to be embedded.
2. 上述方案中,所述安装槽间隔开有两个,所述载板设置为两个并分别位于此两个安装槽中。2. In the above solution, the installation grooves are separated by two, and the carrier plates are arranged in two and are respectively located in the two installation grooves.
3. 上述方案中,一个所述装槽中TEC的数量为四个,两个所述芯片槽与一个TEC对应。3. In the above solution, the number of TECs in one of the slots is four, and two of the chip slots correspond to one TEC.
4. 上述方案中,所述基板顶面的侧缘处开有供隔热板嵌入的隔热槽,所述安装槽开于此隔热槽槽底。4. In the above solution, the side edge of the top surface of the base plate is provided with a heat insulation groove for embedding the heat insulation board, and the installation groove is opened at the bottom of the heat insulation groove.
5. 上述方案中,所述隔热槽拐角处开有弧形口。5. In the above solution, arc openings are opened at the corners of the heat insulating grooves.
6. 上述方案中,所述隔热板顶面的侧缘处开有供载板嵌入的阶梯槽。6. In the above solution, the side edge of the top surface of the heat insulation board is provided with a stepped groove for embedding the carrier board.
7. 上述方案中,所述基板上具有一定位杆,所述隔热板、载板和垫板上开有供定位杆嵌入的定位孔。7. In the above solution, a positioning rod is provided on the base plate, and positioning holes for embedding the positioning rod are formed on the heat insulation plate, the carrier plate and the backing plate.
由于上述技术方案的运用,本发明与现有技术相比具有下列优点:Due to the application of the above-mentioned technical solutions, the present invention has the following advantages compared with the prior art:
1、本发明激光芯片用可靠性测试系统,其基板和载板之间安装有若干个TEC,此TEC位于芯片槽的正下方,通过在基板和PCB之间加装TEC,即半导体制冷器,并在TEC上安装上用于放置芯片的载板,直接将芯片置于用于加热控温的TEC上,TEC即能直接加热芯片,不仅加热速度快、效率高,且温控精度高,各个芯片的测试结果受温度波动的影响较小;其基板与第一PCB之间安装有一隔热板,此隔热板中开有供TEC嵌入的隔热通槽,通过将TEC安装进具有隔热作用的隔热板的隔热通槽中,一方面,通过隔热板能够阻止TEC产生的热量向周围逸散,提高加热效率,另一方面,通过隔热通槽的设置将TEC的加热效果限制在载板的芯片槽处,使得TEC的温控精度更高,并减小能量向周围逸散带来的温度波动幅度,进一步降低温度波动对测试精度的影响。1. In the reliability testing system for laser chips of the present invention, several TECs are installed between the substrate and the carrier board, and the TECs are located directly below the chip groove. And install the carrier board for placing the chip on the TEC, and directly place the chip on the TEC used for heating and temperature control, the TEC can directly heat the chip, not only fast heating, high efficiency, but also high temperature control accuracy, each The test results of the chip are less affected by temperature fluctuations; a heat shield is installed between the substrate and the first PCB, and the heat shield has a heat shield through slot for the TEC to be embedded. In the thermal insulation channel of the active thermal insulation board, on the one hand, the heat generated by the TEC can be prevented from dissipating to the surroundings by the thermal insulation board, and the heating efficiency can be improved. It is limited to the chip slot of the carrier board, which makes the temperature control accuracy of the TEC higher, and reduces the temperature fluctuation range caused by energy dissipation to the surroundings, further reducing the impact of temperature fluctuation on the test accuracy.
2、本发明激光芯片用可靠性测试系统,其第一PCB安装在隔热板上,所述基板上安装有一第二PCB,此第二PCB上具有连接触点、与连接触点连通的测试触点、焊接触点和与焊接触点连通的供电触点,所述第一PCB上具有与连接触点对应的连接探针,所述测试触点用于连接外部设备,所述TEC的接电引脚焊接在焊接触点上,由于TEC组件需要外接电源,PCB不仅需要与TEC连接实现集成供电,还需要在使用时连通芯片,便于工作人员进行芯片测试,但是,在拆、装芯片时,需要移动解除PCB探针和芯片的接触,一方面,要求与芯片连通的PCB相对基板能够移动,另一方面,要求与TEC焊接固定的PCB不能移动,避免其影响到TEC的加热控温功能,因此,通过将PCB模块化分为带有芯片探针和连接探针的第一PCB和带有连接触点、测试触点、焊接触点和供电触点的第二PCB,从而利用可移动的第一PCB实现与芯片的连通和断开,再借助第一PCB和第二PCB的连接实现对芯片的测试,进而满足供电、测试、拆装等多重需求,十分方便。2. In the reliability testing system for laser chips of the present invention, the first PCB is installed on the heat insulation board, and a second PCB is installed on the substrate, and the second PCB has connection contacts and is connected with the connection contacts. Contacts, soldering contacts, and power supply contacts communicating with the soldering contacts, the first PCB has connection probes corresponding to the connection contacts, the test contacts are used to connect external devices, and the connection of the TEC The electrical pins are welded on the welding contacts. Since the TEC component requires an external power supply, the PCB not only needs to be connected to the TEC for integrated power supply, but also needs to be connected to the chip during use, which is convenient for the staff to test the chip. However, when disassembling and installing the chip , Need to move to release the contact between the PCB probe and the chip. On the one hand, the PCB connected to the chip is required to be able to move relative to the substrate. On the other hand, the PCB fixed to the TEC must not be moved to avoid affecting the heating and temperature control function of the TEC. , therefore, by modularizing the PCB into a first PCB with chip probes and connection probes and a second PCB with connection contacts, test contacts, solder contacts and power supply contacts, the use of movable The first PCB of the device is connected and disconnected from the chip, and then the chip is tested by means of the connection between the first PCB and the second PCB, so as to meet the multiple requirements of power supply, testing, disassembly and assembly, which is very convenient.
3、本发明激光芯片用可靠性测试系统,其第一PCB和垫板通过一固定螺丝安装在基板上,所述基板上还设有限位杆,此限位杆上套有位于垫板和载板之间的限位弹簧,所述垫板上开有供限位杆嵌入的限位孔,此限位孔一侧的垫板上还连通开有一条形导向孔,且此条形导向孔位于垫板靠近芯片的一侧,通过固定螺丝的设置,使得第一PCB能够与芯片稳定连通,而限位弹簧在受到压缩后仍然具有一定的厚度,从而通过压缩状态的限位弹簧隔离载板和垫板,形成走光间隙,便于激光芯片完成光电测试,同时,将固定螺丝拧松后,限位弹簧又能自动顶起垫板,使第一PCB的芯片探针脱离芯片,便于工作人员操作芯片槽中的芯片,并且,穿在限位孔中的限位杆即能沿着与限位孔连通的条形导向孔滑移,从而使垫板和第一PCB板远离芯片槽,避免芯片探针、垫板和第一PCB影响到芯片的拆装。3. In the reliability testing system for laser chips of the present invention, the first PCB and the backing plate are mounted on the base plate through a fixing screw, and the base plate is also provided with a limit rod. The limit spring between the plates, the backing plate has a limit hole for the limit rod to be embedded, and the backing plate on one side of the limit hole is also connected with a strip guide hole, and the strip guide hole Located on the side of the backing plate close to the chip, the first PCB can be stably communicated with the chip through the setting of the fixing screws, and the limit spring still has a certain thickness after being compressed, so that the limit spring in the compressed state isolates the carrier board And the backing plate to form a light gap, which is convenient for the laser chip to complete the photoelectric test. At the same time, after the fixing screw is loosened, the limit spring can automatically push up the backing plate, so that the chip probe of the first PCB can be separated from the chip, which is convenient for the staff to operate. The chip in the chip slot, and the limit rod passing through the limit hole can slide along the strip guide hole communicated with the limit hole, so that the backing plate and the first PCB board are far away from the chip slot and avoid the chip The probes, the pad and the first PCB affect the disassembly and assembly of the chip.
4、本发明激光芯片用可靠性测试系统,其焊接触点位于第二PCB底面,所述基板底面开有与焊接触点对应的焊接通孔,由于需要将TEC的接电引脚焊接至第二PCB的焊接触点上,因此,为了避免TEC焊接过程中出现质量不佳的问题,导致TEC焊接完毕后,各个TEC难以维持在同一基准面中,导致安装在多个TEC上的载板与TEC之间存在不同大小的缝隙,难以完全贴合,既会影响到载板的安装,又会因为不同大小缝隙的存在,导致不同TEC对应的芯片处于不同的温度区间,单个芯片测试精度较差,同批芯片测试结果差异较大,从而影响到夹具的使用,因此,基板上的焊接通孔露出焊接触点,而预先将隔热板、载板和TEC组装为一体,并安装进隔热槽中,工作人员不仅能够直接实现接电引脚和焊接触点的焊接,还能避免TEC由于焊接工作而出现偏移,从而保证TEC加热控温的均匀性。4. In the reliability testing system for laser chips of the present invention, the welding contacts are located on the bottom surface of the second PCB, and the bottom surface of the substrate is provided with welding through holes corresponding to the welding contacts. Therefore, in order to avoid the problem of poor quality during the TEC welding process, it is difficult to maintain each TEC in the same reference plane after the TEC welding is completed, resulting in the carrier board mounted on multiple TECs and the There are gaps of different sizes between the TECs, which are difficult to fit completely, which will not only affect the installation of the carrier board, but also cause the chips corresponding to different TECs to be in different temperature ranges due to the existence of gaps of different sizes, and the test accuracy of a single chip is poor. , the test results of the same batch of chips are quite different, which affects the use of the fixture. Therefore, the soldered through holes on the substrate expose the soldered contacts, and the heat insulation board, the carrier board and the TEC are assembled in advance and installed into the heat insulation board. In the tank, the staff can not only directly realize the welding of the power-connecting pins and the welding contacts, but also avoid the deviation of the TEC due to the welding work, thereby ensuring the uniformity of the TEC heating and temperature control.
5、本发明激光芯片用可靠性测试系统,其安装槽间隔开有两个,所述载板设置为两个并分别位于此两个安装槽中,一个所述装槽中TEC的数量为四个,两个所述芯片槽与一个TEC对应,通过安装槽中多个TEC的设置,进一步增加热源的加热效率和密集度,从而使得载板上能够开设更多的芯片槽,且利用第一PCB和第二PCB的配合集成各个芯片的连通和测试,从而提高芯片的测试效率,降低测试成本。5. The reliability testing system for laser chips of the present invention has two mounting slots spaced apart, two of the carrier boards are arranged in the two mounting slots, and the number of TECs in one of the mounting slots is four. Each of the two chip slots corresponds to one TEC. By setting multiple TECs in the mounting slot, the heating efficiency and density of the heat source are further increased, so that more chip slots can be opened on the carrier board, and the first The cooperation of the PCB and the second PCB integrates the connection and testing of each chip, thereby improving the testing efficiency of the chip and reducing the testing cost.
附图说明Description of drawings
附图1为本发明激光芯片用可靠性测试系统的整体结构示意图;1 is a schematic diagram of the overall structure of the reliability testing system for laser chips according to the present invention;
附图2为激光芯片用可靠性测试系统的局部爆炸图;Accompanying
附图3为附图2中A部分的爆炸图;Accompanying
附图4为激光芯片用可靠性测试系统另一视角的局部爆炸图;Accompanying drawing 4 is the partial exploded view of another angle of view of the reliability test system for laser chips;
附图5为激光芯片用可靠性测试系统底部结构示意图;5 is a schematic diagram of the bottom structure of the reliability testing system for laser chips;
附图6为垫板和第一PCB部分的爆炸结构示意图。Figure 6 is a schematic diagram of the explosion structure of the backing plate and the first PCB part.
以上附图中:1、基板;11、限位杆;12、限位弹簧;16、焊接通孔;101、安装槽;106、定位杆;107、定位孔;108、隔热槽;109、弧形口;2、载板;201、芯片槽;3、第一PCB;31、芯片探针;32、连接探针;4、TEC;41、接电引脚;5、隔热板;51、隔热通槽;501、阶梯槽;6、第二PCB;61、连接触点;62、测试触点;63、焊接触点;64、供电触点;7、垫板;71、固定螺丝;72、限位孔;73、条形导向孔;701、探针通孔。In the above drawings: 1, base plate; 11, limit rod; 12, limit spring; 16, welding through hole; 101, installation groove; 106, positioning rod; 107, positioning hole; 108, heat insulation groove; 109, Arc mouth; 2, carrier board; 201, chip slot; 3, first PCB; 31, chip probe; 32, connection probe; 4, TEC; 41, electrical pin; 5, heat shield; 51 , heat insulation through slot; 501, stepped slot; 6, second PCB; 61, connection contact; 62, test contact; 63, welding contact; 64, power supply contact; 7, backing plate; 71, fixing screw ; 72, limit hole; 73, strip guide hole; 701, probe through hole.
具体实施方式Detailed ways
实施例1:一种激光芯片用可靠性测试系统,参照附图1-6,包括基板1、安装在基板1上的载板2和安装在载板2上的第一PCB3,所述载板2上开有供芯片嵌入的芯片槽201,所述第一PCB3上具有与芯片槽201对应的芯片探针31,所述基板1和载板2之间安装有若干个TEC4,此TEC4位于芯片槽201的正下方,所述基板1与第一PCB3之间安装有一隔热板5,此隔热板5中开有供TEC4嵌入的隔热通槽51;Embodiment 1: A reliability testing system for laser chips, referring to Figures 1-6, includes a
所述第一PCB3安装在隔热板5上,所述基板1上安装有一第二PCB6,此第二PCB6上具有连接触点61、与连接触点61连通的测试触点62、焊接触点63和与焊接触点63连通的供电触点63,所述第一PCB3上具有与连接触点61对应的连接探针32,所述测试触点62用于连接外部设备,所述TEC4的接电引脚41焊接在焊接触点63上;The first PCB3 is mounted on the
所述第一PCB3和隔热板5之间安装有一垫板7,此垫板7上开有供芯片探针31和连接探针32通过的探针通孔701,所述第一PCB3和垫板7通过一固定螺丝71安装在基板1上,所述基板1上还设有限位杆11,此限位杆11上套有位于垫板7和载板2之间的限位弹簧12,所述垫板7上开有供限位杆11嵌入的限位孔72,此限位孔72一侧的垫板7上还连通开有一条形导向孔73,且此条形导向孔73位于垫板7靠近芯片的一侧;A backing plate 7 is installed between the
所述焊接触点63位于第二PCB6底面,所述基板1底面开有与焊接触点63对应的焊接通孔16。The soldering contacts 63 are located on the bottom surface of the second PCB 6 , and soldering through holes 16 corresponding to the soldering contacts 63 are opened on the bottom surface of the
上述基板1顶面开有供TEC4嵌入的安装槽101;上述安装槽101间隔开有两个,上述载板2设置为两个并分别位于此两个安装槽101中;一个上述装槽中TEC4的数量为四个,两个上述芯片槽201与一个TEC4对应。The top surface of the above-mentioned
上述基板1顶面的侧缘处开有供隔热板5嵌入的隔热槽108,上述安装槽101开于此隔热槽108槽底;上述隔热槽108拐角处开有弧形口109。The side edge of the top surface of the above-mentioned
上述隔热板5顶面的侧缘处开有供载板2嵌入的阶梯槽501;上述基板1上具有一定位杆106,上述隔热板5、载板2和垫板7上开有供定位杆106嵌入的定位孔107。The side edge of the top surface of the
实施例2:一种激光芯片用可靠性测试系统,参照附图1-6,包括基板1、安装在基板1上的载板2和安装在载板2上的第一PCB3,所述载板2上开有供芯片嵌入的芯片槽201,所述第一PCB3上具有与芯片槽201对应的芯片探针31,所述基板1和载板2之间安装有若干个TEC4,此TEC4位于芯片槽201的正下方,所述基板1与第一PCB3之间安装有一隔热板5,此隔热板5中开有供TEC4嵌入的隔热通槽51;Embodiment 2: A reliability testing system for laser chips, referring to Figures 1-6, includes a
所述第一PCB3安装在隔热板5上,所述基板1上安装有一第二PCB6,此第二PCB6上具有连接触点61、与连接触点61连通的测试触点62、焊接触点63和与焊接触点63连通的供电触点63,所述第一PCB3上具有与连接触点61对应的连接探针32,所述测试触点62用于连接外部设备,所述TEC4的接电引脚41焊接在焊接触点63上;The first PCB3 is mounted on the
所述第一PCB3和隔热板5之间安装有一垫板7,此垫板7上开有供芯片探针31和连接探针32通过的探针通孔701,所述第一PCB3和垫板7通过一固定螺丝71安装在基板1上,所述基板1上还设有限位杆11,此限位杆11上套有位于垫板7和载板2之间的限位弹簧12,所述垫板7上开有供限位杆11嵌入的限位孔72,此限位孔72一侧的垫板7上还连通开有一条形导向孔73,且此条形导向孔73位于垫板7靠近芯片的一侧;A backing plate 7 is installed between the
所述焊接触点63位于第二PCB6底面,所述基板1底面开有与焊接触点63对应的焊接通孔16。The soldering contacts 63 are located on the bottom surface of the second PCB 6 , and soldering through holes 16 corresponding to the soldering contacts 63 are opened on the bottom surface of the
上述基板1顶面开有供TEC4嵌入的安装槽101;上述安装槽101间隔开有两个,上述载板2设置为两个并分别位于此两个安装槽101中;一个上述装槽中TEC4的数量为四个,两个上述芯片槽201与一个TEC4对应。The top surface of the above-mentioned
上述基板1顶面的侧缘处开有供隔热板5嵌入的隔热槽108,上述安装槽101开于此隔热槽108槽底;上述隔热槽108拐角处开有弧形口109上述隔热板5顶面的侧缘处开有供载板2嵌入的阶梯槽501。The side edge of the top surface of the above-mentioned
采用上述激光芯片用可靠性测试系统时,通过在基板和PCB之间加装TEC,即半导体制冷器,并在TEC上安装上用于放置芯片的载板,直接将芯片置于用于加热控温的TEC上,TEC即能直接加热芯片,不仅加热速度快、效率高,且温控精度高,各个芯片的测试结果受温度波动的影响较小;通过将TEC安装进具有隔热作用的隔热板的隔热通槽中,一方面,通过隔热板能够阻止TEC产生的热量向周围逸散,提高加热效率,另一方面,通过隔热通槽的设置将TEC的加热效果限制在载板的芯片槽处,使得TEC的温控精度更高,并减小能量向周围逸散带来的温度波动幅度,进一步降低温度波动对测试精度的影响。When using the above reliability test system for laser chips, by installing a TEC, that is, a semiconductor refrigerator, between the substrate and the PCB, and installing a carrier plate for placing the chip on the TEC, the chip is directly placed in the heating control system. On a warm TEC, the TEC can directly heat the chip, which not only has fast heating speed and high efficiency, but also has high temperature control accuracy. The test results of each chip are less affected by temperature fluctuations; In the heat insulation channel of the hot plate, on the one hand, the heat generated by the TEC can be prevented from dissipating to the surroundings by the heat insulation plate, and the heating efficiency is improved. At the chip slot of the board, the temperature control accuracy of the TEC is higher, and the temperature fluctuation range caused by energy dissipation to the surroundings is reduced, and the impact of temperature fluctuation on the test accuracy is further reduced.
另外,由于TEC组件需要外接电源,PCB不仅需要与TEC连接实现集成供电,还需要在使用时连通芯片,便于工作人员进行芯片测试,但是,在拆、装芯片时,需要移动解除PCB探针和芯片的接触,一方面,要求与芯片连通的PCB相对基板能够移动,另一方面,要求与TEC焊接固定的PCB不能移动,避免其影响到TEC的加热控温功能,因此,通过将PCB模块化分为带有芯片探针和连接探针的第一PCB和带有连接触点、测试触点、焊接触点和供电触点的第二PCB,从而利用可移动的第一PCB实现与芯片的连通和断开,再借助第一PCB和第二PCB的连接实现对芯片的测试,进而满足供电、测试、拆装等多重需求,十分方便。In addition, since the TEC component requires an external power supply, the PCB not only needs to be connected to the TEC for integrated power supply, but also needs to be connected to the chip during use, which is convenient for the staff to test the chip. However, when disassembling and installing the chip, it is necessary to remove the PCB probe and The contact of the chip, on the one hand, requires the PCB connected to the chip to be able to move relative to the substrate, on the other hand, requires that the PCB fixed to the TEC cannot move, so as to avoid affecting the heating and temperature control function of the TEC. Therefore, by modularizing the PCB Divided into a first PCB with chip probes and connection probes and a second PCB with connection contacts, test contacts, solder contacts and power supply contacts, so that the movable first PCB is used to realize the connection with the chip It is very convenient to connect and disconnect, and then use the connection of the first PCB and the second PCB to realize the test of the chip, so as to meet the multiple requirements of power supply, testing, disassembly and assembly.
另外,通过固定螺丝的设置,使得第一PCB能够与芯片稳定连通,而限位弹簧在受到压缩后仍然具有一定的厚度,从而通过压缩状态的限位弹簧隔离载板和垫板,形成走光间隙,便于激光芯片完成光电测试,同时,将固定螺丝拧松后,限位弹簧又能自动顶起垫板,使第一PCB的芯片探针脱离芯片,便于工作人员操作芯片槽中的芯片,并且,穿在限位孔中的限位杆即能沿着与限位孔连通的条形导向孔滑移,从而使垫板和第一PCB板远离芯片槽,避免芯片探针、垫板和第一PCB影响到芯片的拆装In addition, through the setting of the fixing screws, the first PCB can be stably communicated with the chip, and the limit spring still has a certain thickness after being compressed, so that the carrier plate and the backing plate are separated by the limit spring in the compressed state to form a light travel gap. , which is convenient for the laser chip to complete the photoelectric test. At the same time, after the fixing screw is loosened, the limit spring can automatically push up the backing plate, so that the chip probe of the first PCB can be separated from the chip, which is convenient for the staff to operate the chip in the chip slot, and , the limit rod passing through the limit hole can slide along the bar-shaped guide hole connected with the limit hole, so as to keep the backing plate and the first PCB board away from the chip groove, and avoid the chip probe, the backing plate and the first PCB board. A PCB affects the disassembly and assembly of the chip
另外,由于需要将TEC的接电引脚焊接至第二PCB的焊接触点上,因此,为了避免TEC焊接过程中出现质量不佳的问题,导致TEC焊接完毕后,各个TEC难以维持在同一基准面中,导致安装在多个TEC上的载板与TEC之间存在不同大小的缝隙,难以完全贴合,既会影响到载板的安装,又会因为不同大小缝隙的存在,导致不同TEC对应的芯片处于不同的温度区间,单个芯片测试精度较差,同批芯片测试结果差异较大,从而影响到夹具的使用,因此,基板上的焊接通孔露出焊接触点,而预先将隔热板、载板和TEC组装为一体,并安装进隔热槽中,工作人员不仅能够直接实现接电引脚和焊接触点的焊接,还能避免TEC由于焊接工作而出现偏移,从而保证TEC加热控温的均匀性。In addition, since it is necessary to solder the power pins of the TEC to the soldering contacts of the second PCB, in order to avoid the problem of poor quality during the TEC soldering process, it is difficult for each TEC to maintain the same reference after the TEC soldering is completed. In the surface, there are gaps of different sizes between the carrier board and the TEC installed on multiple TECs, which is difficult to fit completely. The chips are in different temperature ranges, the test accuracy of a single chip is poor, and the test results of the same batch of chips are quite different, which affects the use of the fixture. Therefore, the soldering through holes on the substrate expose the soldering contacts, and the heat shield , The carrier board and the TEC are assembled into one, and installed in the heat insulation groove, the staff can not only directly realize the welding of the power connection pins and the welding contacts, but also avoid the TEC from offset due to the welding work, so as to ensure the heating of the TEC. Uniformity of temperature control.
另外,通过安装槽中多个TEC的设置,进一步增加热源的加热效率和密集度,从而使得载板上能够开设更多的芯片槽,且利用第一PCB和第二PCB的配合集成各个芯片的连通和测试,从而提高芯片的测试效率,降低测试成本。In addition, through the arrangement of multiple TECs in the mounting slot, the heating efficiency and density of the heat source are further increased, so that more chip slots can be opened on the carrier board, and the cooperation of the first PCB and the second PCB can be used to integrate each chip. Connect and test, thereby improving the test efficiency of the chip and reducing the test cost.
上述实施例只为说明本发明的技术构思及特点,其目的在于让熟悉此项技术的人士能够了解本发明的内容并据以实施,并不能以此限制本发明的保护范围。凡根据本发明精神实质所作的等效变化或修饰,都应涵盖在本发明的保护范围之内。The above-mentioned embodiments are only intended to illustrate the technical concept and characteristics of the present invention, and the purpose is to enable those skilled in the art to understand the content of the present invention and implement them accordingly, and cannot limit the protection scope of the present invention. All equivalent changes or modifications made according to the spirit of the present invention should be included within the protection scope of the present invention.
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