CN111799169B - Process for processing TGV by combining femtosecond laser with HF wet etching - Google Patents
Process for processing TGV by combining femtosecond laser with HF wet etching Download PDFInfo
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- CN111799169B CN111799169B CN202010693932.4A CN202010693932A CN111799169B CN 111799169 B CN111799169 B CN 111799169B CN 202010693932 A CN202010693932 A CN 202010693932A CN 111799169 B CN111799169 B CN 111799169B
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- 238000000034 method Methods 0.000 title claims abstract description 34
- 238000012545 processing Methods 0.000 title claims abstract description 19
- 238000001039 wet etching Methods 0.000 title claims abstract description 12
- 239000011521 glass Substances 0.000 claims abstract description 76
- 238000005530 etching Methods 0.000 claims abstract description 34
- 239000002184 metal Substances 0.000 claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 claims abstract description 7
- 230000035515 penetration Effects 0.000 claims abstract description 5
- 238000007747 plating Methods 0.000 claims abstract description 5
- 238000009713 electroplating Methods 0.000 claims abstract description 4
- 239000000126 substance Substances 0.000 claims abstract description 4
- 239000012790 adhesive layer Substances 0.000 claims description 9
- 239000010410 layer Substances 0.000 claims description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 8
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 claims description 3
- 239000003960 organic solvent Substances 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 abstract description 13
- 239000011248 coating agent Substances 0.000 abstract description 4
- 238000000576 coating method Methods 0.000 abstract description 4
- 238000000227 grinding Methods 0.000 abstract description 4
- 239000000463 material Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000013532 laser treatment Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/352—Working by laser beam, e.g. welding, cutting or boring for surface treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Mechanical Engineering (AREA)
- Ceramic Engineering (AREA)
- Plasma & Fusion (AREA)
- Optics & Photonics (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Laser Beam Processing (AREA)
- Surface Treatment Of Glass (AREA)
Abstract
The invention discloses a process for processing TGV by combining femtosecond laser with HF wet etching, which comprises the following steps: s1, bonding a wafer to a glass carrier plate, scanning the periphery of a hole on the glass surface by using femtosecond laser, and etching the hole in an annular mode by using HF; s2, thinning the back of the wafer and performing element engineering; s3, performing pattern etching processing on the glass surface for the second time by using HF etching, and finishing perforation; s4, stripping glass in the middle island region to complete integral TGV penetration; s5, etching the adhesion layer and the release layer by using O 2 Plasma to enable TGV to be completely communicated with the front surface of the wafer, and continuing the manufacturing process of chemical plating and electroplating metal. The invention adopts the mode of combining femtosecond laser with HF wet etching to form the perforated glass carrier plate by two times of etching, has little influence on the overall strength, can still bear the stress during grinding, has smooth coating surface, greatly reduces the processing area and improves the efficiency by using the femtosecond laser to deconstruct the glass structure bonding around the hole, and can carry out double-sided processing technology.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a process for processing TGV by combining femtosecond laser with HF wet etching.
Background
With the rise of communication electronics, there is an increasing demand for miniaturized and high-sensitivity modules or systems, and the demand for signal quality is also increasing. High-density integrated technologies, such as System-in-Package (SiP), have been rapidly developed, but miniaturized integrated packages of mixed-signal multi-chip systems have become one of the technical difficulties in the field. In addition to technologies such as three-dimensional chip stacking (STACKED DIE PACKAGE), package stacking (Package on Package, POP), and the like, new materials and new technologies are applied to package miniaturization, such as flexible substrates, through silicon via (Through Silicon Via, TSV) interposer technologies, and glass via (Through Glass Via, TGV) interposer technologies, which are one of hot research directions for vertical 3D interconnection.
The glass material and the ceramic material have no free moving charges, have excellent dielectric property, have a thermal expansion coefficient close to that of silicon, and the glass through hole (Through Glass Via, TGV) technology of replacing the silicon material with glass can avoid the problem of poor TSV insulation, so that the method is an ideal three-dimensional integration solution. The Glass Via (TGV) technology is considered as a key technology for the next generation of three-dimensional integration, and the core of the technology is a deep hole forming process. In addition, the TGV technology does not need to manufacture an insulating layer, and reduces the process complexity and the processing cost. TGV and related technology have wide application prospect in optical communication, radio frequency, microwave, micro-electromechanical system, micro-fluidic device and three-dimensional integration fields.
Conventional TGV (window) processes use Sand Blasting or femtosecond laser processing (Femtosecond Laser) to fabricate the through-holes. However, this process has the following disadvantages: (1) When the area is large during perforation processing, the laser scanning time is long, and the processing number is poor; (2) The strength of the support of the carrier plate is greatly reduced after the large surface of the glass carrier plate is punched, and the carrier plate cannot bear the action of huge stress during the thinning and grinding processing of the wafer; (3) After the complete perforation, when a release layer (RELEASING LAYER) or an adhesive layer (adhesive) must be applied to the glass carrier during Bonding, the solvent and the coating material will leak out of the perforation or partially adhere to the perforation, resulting in a difficulty in coating uniformity.
Disclosure of Invention
In order to solve the above-mentioned drawbacks of the prior art, the present invention is to provide a process for processing TGV by combining femtosecond laser with HF wet etching, in which only part of the thickness of the periphery of the pattern is removed in the first etching by combining femtosecond laser with HF wet etching, so that the perforation is not completed, but the perforation pattern is completely formed into a glass carrier plate which is not completely perforated, the whole strength is not affected very little and can still bear the stress during grinding, the coating surface is flat (no hole), and the femtosecond laser only needs to deconstruct the glass structure bonding around the hole, the processing area is greatly reduced, the efficiency is improved, then the release layer or the adhesive layer can be smoothly coated, the temporary or permanent bonding with the Si wafer is smoothly completed, and then the process of thinning the wafer to the minimum (thin) thickness is completed by adopting the technology of grinding plus etching, and then the double-sided processing process can be performed.
The aim of the invention can be achieved by the following technical scheme:
a process for fabricating TGV by femtosecond laser combined with HF wet etching, comprising the steps of:
S1, bonding a glass carrier plate on the front surface of a wafer, turning over the wafer to the glass surface, scanning a hole peripheral region of the glass carrier plate by using femtosecond laser, deconstructing and modifying glass bonds of the region, and etching the region by using HF to form an annular etching hole;
s2, turning over to the wafer surface, and thinning and element engineering are carried out on the back surface of the wafer;
S3, turning over the glass surface again, and performing pattern etching processing for the second time by using HF etching until perforation is completed;
s4, debonding the middle island glass region through laser, then placing the wafer and the glass carrier plate into pure water, and stripping the middle island glass through water flow to complete integral TGV penetration;
S5, etching the adhesive layer by using O 2 Plasma to stop the through holes on the surface of the wafer, so that the TGV is completely communicated with the front surface of the wafer, and continuing the manufacturing process of chemical plating and electroplating metal.
Preferably, the depth of the etched holes in step (1) is 50-90% of the thickness of the glass carrier plate.
Preferably, the femtosecond laser has a center wavelength of 750-850nm, a pulse width of 50×10 -15-500×10-15 s, and a repetition frequency of 1-103 kHz.
Preferably, the front-side bonding of the glass carrier to the wafer in step (1) is temporary bonding or permanent bonding.
Preferably, the front bonding of the glass carrier plate on the wafer in the step (1) is temporary bonding, after the metal process in the step (5) is completed, the glass carrier plate is turned over to enable the glass carrier plate to face upwards, the ultrathin wafer is attached to the UV film frame, the release layer is deconstructed by laser scanning, then the glass carrier plate is removed, the adhesion layer is removed by an organic solvent, and after the cleaning is completed, the wafer is subjected to cutting and packaging processes.
Preferably, the metal process in step (5) is performed on one side of the wafer surface or on both sides of the wafer surface and the glass surface.
The invention has the beneficial effects that:
1. the femtosecond laser deconstructs the glass to be mainly bonded, and the etching rate of the area after laser treatment is ten times or more than that of other areas, so that the whole glass can be etched smoothly to form a processed hole pattern.
2. In the invention, only part of the thickness of the periphery of the pattern is removed in the first etching, the thickness of the etched glass part is more than 50%, and less glass in other areas can be lost in the second etching.
3. The glass carrier plate has the function of a carrier plate, and the thinning wafer and the metal manufacturing process can be performed on one side of the wafer surface or simultaneously performed on both sides of the wafer surface and the glass surface. Meanwhile, the glass carrier plate can also be a permanently bonded adapter plate (TGV) function, and has the function of the adapter plate (TGV) after bearing the thinned wafer.
Drawings
The invention is further described below with reference to the accompanying drawings.
FIG. 1 is a schematic view of the process of step 1 of the present invention in example 1 and example 2;
FIG. 2 is a schematic view of the process of step 2 of the present invention in example 1 and example 2;
FIG. 3 is a schematic view of the process of step 3 of the present invention in examples 1 and 2;
FIG. 4 is a schematic view of the process of step 4 of the present invention in examples 1 and 2;
FIG. 5 is a schematic view of the process of step 5 of example 1 of the present invention;
FIG. 6 is a schematic view of the process of step 5 of example 2 of the present invention;
FIG. 7 is a schematic view of the process of step 6 of example 2 of the present invention.
In the figure:
1-wafer, 2-glass carrier plate, 3-first etching through hole, 4-adhesive layer, 5-release layer, 6-second etching through hole, 7-middle island glass, 8-TGV through hole, 9-UV film frame, 10-crystal grain.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should be understood that the terms "open," "upper," "lower," "thickness," "top," "middle," "length," "inner," "peripheral," and the like indicate orientation or positional relationships, merely for convenience in describing the present invention and to simplify the description, and do not indicate or imply that the components or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present invention.
Example 1
A process for fabricating TGV by femtosecond laser combined with HF wet etching, comprising the steps of:
S1, permanently bonding a glass carrier plate on the front surface of a wafer, turning over the wafer to the glass surface, scanning the peripheral area of a hole of the glass carrier plate by using femtosecond laser, deconstructing the glass bond of the area, etching the area by using HF to form an annular etching hole, wherein the depth of the etching hole is 85% of the thickness of the glass carrier plate, the center wavelength of the femtosecond laser is 810nm, the pulse width is 320 multiplied by 10 -15 S, and the repetition frequency is 100kHz;
s2, turning over to the wafer surface, and thinning and element engineering are carried out on the back surface of the wafer;
S3, turning over the glass surface again, and performing pattern etching processing for the second time by using HF etching until perforation is completed;
s4, debonding the middle island glass region through laser, then placing the wafer and the glass carrier plate into pure water, and stripping the middle island glass through water flow to complete integral TGV penetration;
S5, etching the adhesive layer by using O 2 Plasma to stop the through holes on the surface of the wafer, so that the TGV is completely communicated with the front surface of the wafer, and then carrying out double-sided plating and metal electroplating processes for manufacturing the wafer surface and the glass surface.
Example 2
A process for fabricating TGV by femtosecond laser combined with HF wet etching, comprising the steps of:
S1, temporarily bonding a glass carrier plate on the front surface of a wafer, turning over the front surface of the wafer to the glass surface, scanning the peripheral area of a hole of the glass carrier plate by using femtosecond laser, deconstructing the glass bond of the area, etching the area by using HF to form an annular etching hole, wherein the depth of the etching hole is 80% of the thickness of the glass carrier plate, the center wavelength of the femtosecond laser is 780nm, the pulse width is 92 multiplied by 10 -15 S, and the repetition frequency is 85kHz;
s2, turning over to the wafer surface, and thinning and element engineering are carried out on the back surface of the wafer;
S3, turning over the glass surface again, and performing pattern etching processing for the second time by using HF etching until perforation is completed;
s4, debonding the middle island glass region through laser, then placing the wafer and the glass carrier plate into pure water, and stripping the middle island glass through water flow to complete integral TGV penetration;
S5, etching the adhesive layer by using O 2 Plasma to stop the through holes on the surface of the wafer, so that the TGV is completely communicated with the front surface of the wafer, and then carrying out the processes of wafer surface chemical plating and electroplated metal manufacturing;
S6, turning over to enable the glass carrier plate to face upwards, attaching the ultrathin wafer on the UV film frame, deconstructing the release layer by laser scanning, removing the glass carrier plate, removing the adhesive layer by using an organic solvent, and cutting and packaging the wafer after cleaning.
In the description of the present specification, the descriptions of the terms "one embodiment," "example," "specific example," and the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing has shown and described the basic principles, principal features and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims.
Claims (6)
1. A process for fabricating TGV by femtosecond laser combined with HF wet etching, comprising the steps of:
S1, bonding a glass carrier plate on the front surface of a wafer, turning over the wafer to the glass surface, scanning a hole peripheral region of the glass carrier plate by using femtosecond laser, deconstructing and modifying glass bonds of the region, and etching the region by using HF to form an annular etching hole;
s2, turning over to the wafer surface, and thinning and element engineering are carried out on the back surface of the wafer;
S3, turning over the glass surface again, and performing pattern etching processing for the second time by using HF etching until perforation is completed;
s4, debonding the middle island glass region through laser, then placing the wafer and the glass carrier plate into pure water, and stripping the middle island glass through water flow to complete integral TGV penetration;
S5, etching the adhesive layer by using O 2 Plasma to stop the through holes on the surface of the wafer, so that the TGV is completely communicated with the front surface of the wafer, and continuing the manufacturing process of chemical plating and electroplating metal.
2. The process of claim 1, wherein the depth of the etched holes in step S1 is 50-90% of the thickness of the glass carrier.
3. The process for fabricating TGV by combining a femtosecond laser with HF wet etching according to claim 1, wherein the femtosecond laser center wavelength is 750-850nm, pulse width is 50 x 10 -15-500×10-15 s, and repetition frequency is 1-103kHz tuning.
4. The process of claim 1, wherein the wafer front side bonding glass carrier in step S1 is temporary bonding or permanent bonding.
5. The process of claim 4, wherein the glass carrier is bonded on the front surface of the wafer in step S1, the glass carrier is turned upside down after the metal process in step S5 is completed, the ultra-thin wafer is attached to the UV film frame, the release layer is deconstructed by laser scanning, the glass carrier is removed, the adhesive layer is removed by an organic solvent, and the wafer is cut and packaged after the cleaning is completed.
6. The process of claim 1, wherein the metal process in step S5 is performed on one side of the wafer surface or on both sides of the wafer surface and the glass surface.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010693932.4A CN111799169B (en) | 2020-07-17 | 2020-07-17 | Process for processing TGV by combining femtosecond laser with HF wet etching |
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| CN202010693932.4A CN111799169B (en) | 2020-07-17 | 2020-07-17 | Process for processing TGV by combining femtosecond laser with HF wet etching |
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| CN111799169B true CN111799169B (en) | 2024-05-28 |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112864026B (en) * | 2021-03-23 | 2023-08-15 | 三叠纪(广东)科技有限公司 | Process for processing TGV through hole by combining laser with HF wet etching |
| CN113035756A (en) * | 2021-03-24 | 2021-06-25 | 绍兴同芯成集成电路有限公司 | Method for radiating substrate in ultrathin wafer processing by using glass carrier plate |
| CN114496914B (en) * | 2022-01-26 | 2025-07-18 | 上海芯波电子科技有限公司 | Chip packaging technology based on glass substrate and multi-device integrated glass chip |
| CN118366867A (en) * | 2024-03-28 | 2024-07-19 | 通芯微半导体(南通)有限公司 | Processing method of glass-based carrier plate with good pore-forming effect |
| CN118380329A (en) * | 2024-04-10 | 2024-07-23 | 通芯微半导体(南通)有限公司 | A processing method for improved glass substrate |
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| JP2006290630A (en) * | 2005-02-23 | 2006-10-26 | Nippon Sheet Glass Co Ltd | Processing method of glass using laser |
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