CN111739939B - A high frequency silicon germanium heterojunction bipolar transistor and a method for manufacturing the same - Google Patents
A high frequency silicon germanium heterojunction bipolar transistor and a method for manufacturing the same Download PDFInfo
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- CN111739939B CN111739939B CN202010642151.2A CN202010642151A CN111739939B CN 111739939 B CN111739939 B CN 111739939B CN 202010642151 A CN202010642151 A CN 202010642151A CN 111739939 B CN111739939 B CN 111739939B
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- 229910000577 Silicon-germanium Inorganic materials 0.000 title claims abstract description 31
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 title claims abstract description 13
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 title claims abstract description 10
- 239000000463 material Substances 0.000 claims abstract description 37
- 238000000151 deposition Methods 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 14
- 238000005530 etching Methods 0.000 claims abstract description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 12
- 239000000969 carrier Substances 0.000 claims abstract description 9
- 238000002955 isolation Methods 0.000 claims abstract description 8
- 229910052796 boron Inorganic materials 0.000 claims abstract description 6
- 238000005468 ion implantation Methods 0.000 claims abstract description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 4
- 238000000137 annealing Methods 0.000 claims abstract description 3
- 238000009826 distribution Methods 0.000 claims abstract description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 7
- 230000003321 amplification Effects 0.000 claims description 4
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 4
- 230000009471 action Effects 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- -1 boron ions Chemical class 0.000 claims description 2
- 239000002131 composite material Substances 0.000 claims 2
- 239000000203 mixture Substances 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 abstract description 3
- 239000002184 metal Substances 0.000 abstract description 3
- 238000001259 photo etching Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 9
- 230000008901 benefit Effects 0.000 description 8
- 239000012535 impurity Substances 0.000 description 8
- 229910004298 SiO 2 Inorganic materials 0.000 description 6
- 230000008569 process Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 229910008310 Si—Ge Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/80—Heterojunction BJTs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/80—Heterojunction BJTs
- H10D10/821—Vertical heterojunction BJTs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/133—Emitter regions of BJTs
- H10D62/136—Emitter regions of BJTs of heterojunction BJTs
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention relates to a high-frequency silicon-germanium heterojunction bipolar transistor and a manufacturing method thereof, belonging to the technical field of electronics. The method comprises the steps of depositing a buried oxide layer on a monocrystalline Si substrate, carrying out boron ion implantation at the position of a collector region corresponding to a base window, carrying out rapid annealing operation to eliminate lattice damage, etching a groove at one end of the collector region to form an STI isolation region, depositing and filling heavily doped Si material, adopting stepped distribution of Ge components of a base region, depositing N+ polycrystalline silicon on a monocrystalline Si thin layer to serve as an emitter, covering a layer of Si 3N4 stress film on two sides of a polycrystalline Si emitter layer, the monocrystalline Si thin layer and a base SiGe thin layer, introducing uniaxial stress at the same time in the emitter region and the base region, and photoetching metal outside a collector, the emitter and the base to form a lead. According to the invention, uniaxial compressive stress is introduced into the emitter region and the base region, so that the mobility of carriers and the frequency characteristic of the device are improved, and the requirement of terahertz frequency band on the performance of the core device is met.
Description
Technical Field
The invention belongs to the technical field of electronics, and relates to a high-frequency silicon-germanium heterojunction bipolar transistor and a manufacturing method thereof.
Background
As integrated circuits continue to move toward smaller process nodes, the cut-off frequency f T and the maximum oscillation frequency f max of the silicon-based active device gradually enter the terahertz frequency band. Compared with the traditional III-V semiconductor device, the silicon-based solid terahertz device has the technical advantages of low cost, easy mass production and compatibility with the process of a very large scale integrated circuit, and gradually attracts attention of countries around the world. In the frequency range of 0.1-1 THz, because the SiGeBiCMOS reference circuit and the system show great potential and technical advantages, the SiGeHBT becomes a core device of the silicon-based high-frequency integrated circuit, research institutions and scholars at home and abroad aim to optimize the frequency performance by utilizing various technical means, and the potential of the SiGeBiCMOS reference circuit and the system in the high-frequency application field is fully explored.
SiGe Heterojunction Bipolar Transistors (HBTs) incorporate a small amount of Ge component into the base region of a silicon-based Bipolar Junction Transistor (BJT). The base region is made of SiGe, so that the device performance is remarkably improved, and the SiGeHBT becomes a standard bipolar transistor in high-speed application. Heterojunction Bipolar Transistors (HBTs) based on silicon germanium (SiGe) technology developed on the basis of the mature silicon technology utilize the advantage of "band engineering", solve the contradiction between the enhancement of amplification factor and the enhancement of frequency characteristics, but there is a limit to the enhancement of device performance by only relying on the technology.
The research shows that the strain Si technology can improve the mobility of the current carrier, shorten the transition time of the current carrier and effectively improve the performance of the device. The SOI technology can reduce parasitic capacitance effect generated by PN junction, power consumption of the device and production cost, and can also accelerate the working speed of the device and improve the radiation resistance of the device and the utilization rate of the wafer. Therefore, the advanced silicon-based SOI technology is used for continuously reducing the feature size of the device, and meanwhile, the key performance parameters such as the frequency, the early voltage, the breakdown voltage and the like of the device can be greatly improved by combining the advanced silicon-based SOI technology with the strained Si technology.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a high-frequency sige heterojunction bipolar transistor and a method for manufacturing the same.
In order to achieve the above purpose, the present invention provides the following technical solutions:
A high-frequency Si-Ge heterojunction bipolar transistor is prepared through depositing buried oxide layer on monocrystal Si substrate, forming Si structure with monocrystal Si substrate and collector region, introducing an insulating layer (most of SiO 2 material) between top Si material and substrate Si material, performing boron ion implantation at the position of collector region corresponding to base window, quick annealing to eliminate lattice damage, etching a recess at one end of collector region to form STI isolation region, etching a recess again, depositing heavily doped Si material, depositing N+ polysilicon as emitter on monocrystal Si thin layer, depositing high-stress cover layer Si 3N4 material on monocrystal Si thin layer, etching base window and emitter window, and mirroring after stress introduction.
The high-stress covering layer Si 3N4 material is deposited by using the dual-frequency radio-frequency power PECVD, the intrinsic stress of the material is easily transferred into a silicon channel by using the method, the applied stress changes the energy band structure of the device, the mobility of carriers is enhanced, and the performance of the device is improved. Meanwhile, due to the fact that lattice constants of Si and Ge are different, the high-frequency silicon-germanium heterojunction bipolar transistor designed in the process is subjected to the action of biaxial stress.
The outer base region part outside the SiGe base region is positioned in the substrate instead of the region which is positioned on the substrate and is opposite to the conventional SiGe HBT, so that the advantage is that the junction area of the collector junction is effectively increased while the series resistance of the base region is kept low, the amplification factor and the frequency of the device are improved, and the device is easier to integrate with the complementary metal oxide semiconductor CMOS in a process.
According to the physical theory of semiconductor devices, the cut-off frequency f T of the SOI SiGe HBT can be written as:
τ ec,SOISiGe includes base transit time, delay time caused by emitter junction band discontinuity, emitter transit time, collector junction space charge region transit time, and collector junction capacitance charge time. Wherein τ ec,SOISiGe of the SOI SiGe HBT can be written as:
The uniaxial compressive stress introduced by the base region breaks the valence band energy band, the heavy hole band leaves the valence band top, and the light hole band remains on the valence band top, so that the effective electric conduction quality of holes in the direction is reduced, the mobility of carriers is enhanced, the total transit time of the carriers is reduced, and the cut-off frequency of the device is improved.
The relationship of f T to fmax is:
r b is the base resistance. The introduction of stress has no effect on the concentration of the device, but enhances the mobility of the carriers, so the base resistance decreases with the increase of the mobility of the carriers. From the above expression, the highest oscillation frequency is proportional to the cut-off frequency and inversely proportional to the base resistance. As the cutoff frequency f T increases, the base resistance decreases, so the highest oscillation frequency f max increases.
The SOI SiGe HBT structure in the terahertz frequency band is formed by organically combining a mature silicon-based integrated circuit process with a fast-developing SiGe technology, an SOI technology and a strain technology, and by introducing uniaxial stress into a base region, the uniaxial stress applied by the base region enables a valence band energy band to split, a heavy hole band leaves a valence band top, and a light hole band remains at the valence band top, so that the conductivity effective mass of holes in the direction is reduced, the mobility of carriers is enhanced, the total transit time of the carriers is reduced, and the cut-off frequency of the device is improved.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and other advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the specification.
Drawings
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in the following preferred detail with reference to the accompanying drawings, in which:
Fig. 1 is a schematic diagram of a device structure of a high-frequency sige heterojunction bipolar transistor according to the present invention;
FIG. 2 is a schematic diagram of a manufacturing method of a high frequency SiGe heterojunction bipolar transistor;
FIG. 3 is a schematic diagram of a method of fabricating a two-high frequency SiGe heterojunction bipolar transistor;
FIG. 4 is a schematic diagram of a method of fabricating a case three high frequency SiGe heterojunction bipolar transistor;
FIG. 5 is a schematic diagram of a method of fabricating a four-high frequency SiGe heterojunction bipolar transistor;
FIG. 6 is a schematic diagram of a manufacturing process of a case five high frequency SiGe heterojunction bipolar transistor;
fig. 7 is a schematic diagram of a manufacturing method of a six-high frequency sige heterojunction bipolar transistor.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the illustrations provided in the following embodiments merely illustrate the basic idea of the present invention by way of illustration, and the following embodiments and features in the embodiments may be combined with each other without conflict.
In which the drawings are for illustrative purposes only and are not intended to be construed as limiting the invention, and in which certain elements of the drawings may be omitted, enlarged or reduced in order to better illustrate embodiments of the invention, and not to represent actual product dimensions, it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
In the description of the present invention, it should be understood that, if there are terms such as "upper", "lower", "left", "right", "front", "rear", etc., the directions or positional relationships indicated are based on the directions or positional relationships shown in the drawings, only for convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred devices or elements must have a specific direction, be constructed and operated in a specific direction, so that the terms describing the positional relationships in the drawings are merely for exemplary illustration and are not to be construed as limitations of the present invention, and that the specific meanings of the terms described above may be understood by those skilled in the art according to specific circumstances.
Fig. 1 is a schematic diagram of a device structure of a high-frequency sige heterojunction bipolar transistor according to the present invention. Referring to fig. 2 to 7, a schematic diagram of a method for manufacturing a high-frequency sige heterojunction bipolar transistor according to the present invention is shown, the method includes:
100 preparing a Si substrate with the crystal orientation of (100) and the thickness of 100nm;
Growing a buried oxide layer BOX with the thickness of 190nm and composed of a SiO 2 material on a 101Si substrate material;
And a collector region of Si material grows on the buried oxide layer BOX, wherein the collector region is divided into two parts, the part of the collector region, which is close to the buried oxide layer BOX, is a sub-collector region 102, the thickness of the collector region is 120nm, the doped impurity is P, and the impurity concentration is 1.1X10 19cm-3. The thickness of the collector region 103 above the sub-collector region is 190nm, the doped impurity is P, the impurity concentration is 1.5X10 17cm-3, and the SOI structure is shown in FIG. 2;
growing Si 3N4 material above the collector region, etching the Si 3N4 material at the position corresponding to the base window, performing boron (B) ion implantation on the etched region to form a P+ inner base region 104, wherein the dosage of the implanted boron ions is 4×10 13cm-3, and performing rapid thermal annealing operation after ion implantation to recover the structure and eliminate lattice damage;
Depositing SiO 2 material to form shallow trench isolation 105, etching the position corresponding to the collector window, depositing heavily doped Si material 106, doping with P and impurity concentration of 1.1X10: 10 19cm-3, wherein the structure of the device is shown in figure 3;
Forming a base region 107 with a thickness of 38nm above a collector region 103 and a part of a P+ inner base region 104, wherein the Ge component of the base region adopts a step-shaped distribution, the part close to the collector region 103 is a SiGe material with a thickness of 16nm and a Ge component of 30%, the part close to the emitter region 108 is a SiGe material with a thickness of 16nm and a Ge component of 17%, the part between the two parts is a SiGe material with a thickness of 6nm and a Ge component of 30-17%, the impurity doped in the whole base region is B, and the concentration is 4 multiplied by 10 18cm-3;
Depositing a strain Si material to form a single crystal Si thin layer 108, depositing N+ polysilicon 109, etching off polysilicon outside an emitter region, depositing a SiO 2 material with the thickness of 20nm, forming a side wall 110 outside the N+ polysilicon, depositing N+ polysilicon, and finally reserving the N+ polysilicon of a region corresponding to an emitter window, wherein the structure of the device is shown in figure 4;
Depositing a high-stress cover layer Si 3N4 material 111 by PECVD (plasma enhanced chemical vapor deposition) of a double-frequency radio frequency power source, wherein the cover layer Si 3N4 material provides uniaxial compressive stress, and the structure of the device is shown in figure 5;
Depositing an isolation SiO 2 material, depositing base region P+ polysilicon 112 with the impurity concentration of 4 multiplied by 10 18cm-3, etching the material, and depositing an isolation SiO 2 material, wherein the structure of the device is shown in figure 6;
The collector region n+ polysilicon 113 is deposited with an impurity concentration of 1 x 10 18cm-3, and the metal aluminum 114 is sputtered to the entire device structure to form a metal electrode material, and the region outside the photoetched electrode, at this time the device structure is as shown in fig. 7.
Finally, it is noted that the above embodiments are only for illustrating the technical solution of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications and equivalents may be made thereto without departing from the spirit and scope of the present invention, which is intended to be covered by the claims of the present invention.
Claims (2)
1. A high-frequency silicon germanium heterojunction bipolar transistor is characterized by comprising,
A substrate having a crystal plane of (100) single crystal Si;
a buried oxide layer is deposited on the monocrystalline Si substrate, and the SOI structure is formed by the monocrystalline Si substrate and Si material of the collector region;
boron ions are implanted in the position of the collector region corresponding to the base window;
one end of the collector region is etched with a first groove to form an STI isolation region, and a second groove is deposited and filled with a heavily doped Si material;
Ge composition of the base region in a stepwise distribution;
the shallow trench isolation (105) is positioned between the collector region (103) and the deposited heavily doped Si material (106), and the Ge is positioned above the collector region (103);
a monocrystalline Si thin layer is deposited above the base region and used as a cap layer;
n+ polysilicon is deposited on the monocrystalline Si thin layer as an emitter;
Depositing a high-stress covering layer Si 3N4 material by using a dual-frequency radio frequency power source PECVD, and etching an emitter window and a base region window;
The outer base region part outside the SiGe base region is positioned in the substrate so as to improve the amplification factor and frequency of the device;
The SOI SiGe HBT heterojunction bipolar transistor structure with the uniaxial compressive stress in the base region is formed by using a dual-frequency radio frequency power source PECVD to deposit a high-stress covering layer Si 3N4 material, intrinsic stress is transferred to the fields of an emitter region and a base region and the surface of a collector region, and the applied stress changes the energy band structure of a device and enhances the mobility of carriers;
Meanwhile, the lattice constants of Si and Ge are different, so that the base region of the high-frequency silicon-germanium heterojunction bipolar transistor is subjected to the action of uniaxial stress caused by Si 3N4 materials and biaxial stress caused by a substrate, and a uniaxial strain emitter region and a composite strain base region are formed.
2. A method for manufacturing a high-frequency silicon-germanium heterojunction bipolar transistor is characterized in that the method comprises the following steps:
selecting a monocrystalline Si substrate with a crystal face of (100);
Depositing a buried oxide layer on the monocrystalline Si substrate to form an SOI structure with the monocrystalline Si substrate and Si material of the collector region;
Performing boron ion implantation at the position of the collector region corresponding to the base window, and performing rapid annealing operation to eliminate lattice damage;
Etching a groove at one end of the collector region to form an STI isolation region, etching a groove again, and depositing and filling a heavily doped Si material;
The Ge component of the base region is distributed in a step-type manner;
depositing a monocrystalline Si thin layer as a cap layer above the base region;
Depositing N+ polysilicon on the monocrystalline Si thin layer to serve as an emitter;
Depositing a high-stress covering layer Si 3N4 material by using a dual-frequency radio frequency power source PECVD, and etching an emitter window and a base region window;
The outer base region part outside the SiGe base region is positioned in the substrate so as to improve the amplification factor and frequency of the device;
The high-stress covering layer Si 3N4 material is deposited by using the dual-frequency radio-frequency power PECVD, intrinsic stress of the high-stress covering layer Si 3N4 material is transferred into a silicon channel, the applied stress changes the energy band structure of a device and enhances the mobility of a carrier, meanwhile, the lattice constants of Si and Ge are different, so that the base region of the high-frequency silicon-germanium heterojunction bipolar transistor is subjected to the action of uniaxial stress caused by the Si 3N4 material and biaxial stress caused by a substrate, and a uniaxial strain emitter region and a composite strain base region are formed.
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| CN112992898A (en) * | 2021-02-05 | 2021-06-18 | 重庆邮电大学 | SiGe BiCMOS transistor integrated structure and implementation method thereof |
| CN114188400B (en) * | 2021-12-08 | 2024-12-06 | 西安建筑科技大学 | A NPN power SiGe bipolar transistor and its manufacturing method |
| CN114335234A (en) * | 2022-01-07 | 2022-04-12 | 重庆邮电大学 | A silicon germanium heterojunction phototransistor and its manufacturing method |
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| CN103441141A (en) * | 2013-07-29 | 2013-12-11 | 北京工业大学 | Ultra-wide temperature area high-thermal-stability microwave power SiGe heterojunction bipolar transistor |
| CN108649067A (en) * | 2018-05-09 | 2018-10-12 | 燕山大学 | A kind of Terahertz SOI composite strain Si/SiGe heterojunction bipolar transistors and preparation method |
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| US7888745B2 (en) * | 2006-06-21 | 2011-02-15 | International Business Machines Corporation | Bipolar transistor with dual shallow trench isolation and low base resistance |
| JP2008060134A (en) * | 2006-08-29 | 2008-03-13 | Matsushita Electric Ind Co Ltd | Heterojunction bipolar transistor |
| CN102446965B (en) * | 2010-10-14 | 2013-09-11 | 上海华虹Nec电子有限公司 | Germanium-silicon heterojunction bipolar transistor |
| CN102800590B (en) * | 2012-08-24 | 2014-09-10 | 中国科学院上海微系统与信息技术研究所 | Preparation method of SOI (silicon on insulator)-based SiGe-HBT (heterojunction bipolar transistor) |
| CN104091825B (en) * | 2014-07-13 | 2017-04-19 | 北京工业大学 | Super junction collector region SiGe heterojunction bipolar transistor |
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| CN103441141A (en) * | 2013-07-29 | 2013-12-11 | 北京工业大学 | Ultra-wide temperature area high-thermal-stability microwave power SiGe heterojunction bipolar transistor |
| CN108649067A (en) * | 2018-05-09 | 2018-10-12 | 燕山大学 | A kind of Terahertz SOI composite strain Si/SiGe heterojunction bipolar transistors and preparation method |
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