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CN111722149A - A cable detection device, method, system and computer-readable storage medium - Google Patents

A cable detection device, method, system and computer-readable storage medium Download PDF

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CN111722149A
CN111722149A CN202010537359.8A CN202010537359A CN111722149A CN 111722149 A CN111722149 A CN 111722149A CN 202010537359 A CN202010537359 A CN 202010537359A CN 111722149 A CN111722149 A CN 111722149A
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interface
cable
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fpga
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邓文博
孔祥涛
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IEIT Systems Co Ltd
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Inspur Electronic Information Industry Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/54Testing for continuity
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433Sockets for IC's or transistors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/58Testing of lines, cables or conductors

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Abstract

本申请公开了一种线缆检测设备及方法、系统、计算机可读存储介质,设备包括:FPGA、与FPGA连接的提示器;FPGA的第一IO接口与目标线缆的输入接口相连接,FPGA的第二IO接口与目标线缆的输出接口相连接;其中,FPGA通过第一IO接口向目标线缆发送目标指令,并通过第二IO接口判断是否接收到目标指令,若通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆连通的提示信息,若未通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆存在断路的提示信息。本申请中,只需通过发送指令便可以实现对目标线缆的检测,检测速度快,准确率高,此外,还可以提高线缆检测的检测多样性。

Figure 202010537359

The present application discloses a cable detection device and method, system, and computer-readable storage medium. The device includes: an FPGA, a prompter connected to the FPGA; the first IO interface of the FPGA is connected to the input interface of the target cable, and the second IO interface of the FPGA is connected to the output interface of the target cable; wherein the FPGA sends a target instruction to the target cable through the first IO interface, and determines whether the target instruction is received through the second IO interface. If the target instruction is received through the second IO interface, the prompter is controlled to issue a prompt message indicating that the target cable is connected. If the target instruction is not received through the second IO interface, the prompter is controlled to issue a prompt message indicating that the target cable is broken. In the present application, the detection of the target cable can be achieved by simply sending an instruction, with fast detection speed and high accuracy. In addition, the detection diversity of the cable detection can be improved.

Figure 202010537359

Description

一种线缆检测设备、方法、系统及计算机可读存储介质A cable detection device, method, system and computer-readable storage medium

技术领域technical field

本申请涉及线缆检测技术领域,更具体地说,涉及一种线缆检测设备、方法、系统及计算机可读存储介质。The present application relates to the technical field of cable detection, and more particularly, to a cable detection device, method, system, and computer-readable storage medium.

背景技术Background technique

随着大数据时代的到来,各种网络数据呈爆炸性增长,服务器应用的环境也变得多种多样,与此同时,服务器需要支持的配置也越来越多,比如扩展不同的IO和存储模块。为了做到灵活配置,服务器内部需要不同类型的线缆将主板和各个模块互联起来,形成一个完整的系统。With the advent of the era of big data, various network data have exploded, and the server application environment has become diverse. At the same time, the server needs to support more and more configurations, such as expanding different IO and storage modules. . In order to achieve flexible configuration, different types of cables are required inside the server to interconnect the motherboard and various modules to form a complete system.

为了保证线缆能够正常被使用,在服务器设计的初期阶段需要对线缆样品进行量测,以确认线缆是否按照设计要求进行制作。现有的线缆检测方法是人工借助万用表检测线缆是否连通。In order to ensure that the cable can be used normally, it is necessary to measure the cable sample in the early stage of server design to confirm whether the cable is manufactured according to the design requirements. The existing cable detection method is to manually detect whether the cable is connected by means of a multimeter.

然而,服务器设计中使用的线缆的数量和线缆管脚较多,如果用万用表进行通路检测的话,过程繁琐,工作量大,既浪费时间,又容易遗漏混淆;适用性低。However, the number of cables and cable pins used in the server design is large. If a multimeter is used for path detection, the process is cumbersome and the workload is heavy, which is time-consuming and easy to be missed and confused; the applicability is low.

综上所述,如何提供线缆检测的适用性是目前本领域技术人员亟待解决的问题。To sum up, how to provide the applicability of cable detection is an urgent problem to be solved by those skilled in the art.

发明内容SUMMARY OF THE INVENTION

本申请的目的是提供一种线缆检测设备,其能在一定程度上解决如何提高线缆检测的适用性的技术问题。本申请还提供了一种线缆检测方法、系统及计算机可读存储介质。The purpose of the present application is to provide a cable detection device, which can solve the technical problem of how to improve the applicability of cable detection to a certain extent. The present application also provides a cable detection method, system and computer-readable storage medium.

为了实现上述目的,本申请提供如下技术方案:In order to achieve the above purpose, the application provides the following technical solutions:

一种线缆检测设备,包括:FPGA、与所述FPGA连接的提示器;A cable detection device, comprising: an FPGA, a prompter connected to the FPGA;

所述FPGA的第一IO接口与目标线缆的输入接口相连接,所述FPGA的第二IO接口与所述目标线缆的输出接口相连接;The first IO interface of the FPGA is connected with the input interface of the target cable, and the second IO interface of the FPGA is connected with the output interface of the target cable;

其中,所述FPGA通过所述第一IO接口向所述目标线缆发送目标指令,并通过所述第二IO接口判断是否接收到所述目标指令,若通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征所述目标线缆连通的提示信息,若未通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征所述目标线缆存在断路的提示信息。Wherein, the FPGA sends the target command to the target cable through the first IO interface, and judges whether the target command is received through the second IO interface, if the target command is received through the second IO interface If the target command is not received through the second IO interface, the prompter is controlled to issue a prompt message indicating that the target cable is connected. A message indicating that there is an open circuit in the cable.

优选的,所述第一IO接口和所述第二IO接口的接口类型包括slimlineX8线缆接口、MiniSAS线缆接口、oculink线缆接口、slimlineX4线缆接口。Preferably, the interface types of the first IO interface and the second IO interface include a slimlineX8 cable interface, a MiniSAS cable interface, an oculink cable interface, and a slimlineX4 cable interface.

优选的,所述目标线缆的管脚与所述FPGA的IO接口一一对应连接;Preferably, the pins of the target cable are connected in one-to-one correspondence with the IO interfaces of the FPGA;

所述FPGA通过所述第一IO接口向所述目标线缆发送目标指令,并通过所述第二IO接口判断是否接收到所述目标指令,若通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征所述目标线缆连通的提示信息,若未通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征所述目标线缆存在断路的提示信息,包括:The FPGA sends a target command to the target cable through the first IO interface, and judges whether the target command is received through the second IO interface, if the target command is received through the second IO interface command, the prompter is controlled to issue a prompt message indicating that the target cable is connected, and if the target command is not received through the second IO interface, the prompter is controlled to issue a message indicating the existence of the target cable Broken circuit prompt information, including:

所述FPGA在所述目标线缆的管脚中确定出当前待检测管脚,生成对当前待检测管脚进行检测的所述目标指令,通过所述第一IO接口向所述目标线缆发送所述目标指令,并通过所述第二IO接口判断是否接收到所述目标指令,若通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征当前待检测管脚连通的提示信息,若未通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征当前待检测管脚存在断路的提示信息;待完成所述目标线缆的所有管脚的检测之后,判断所述目标线缆的所有管脚是否均连通,若所述目标线缆的所有管脚均连通,则控制所述提示器发出表征所述目标线缆连通的所述提示信息,若所述目标线缆的所有管脚并非均连通,则控制所述提示器发出表征所述目标线缆存在断路的所述提示信息。The FPGA determines the current pin to be detected in the pins of the target cable, generates the target instruction for detecting the current to-be-detected pin, and sends it to the target cable through the first IO interface the target command, and determine whether the target command is received through the second IO interface, and if the target command is received through the second IO interface, the prompter is controlled to issue a pin representing the current to-be-detected pin Connected prompt information, if the target command is not received through the second IO interface, the prompter is controlled to issue prompt information indicating that the current to-be-detected pin has an open circuit; all pipes of the target cable are to be completed. After the detection of the feet, it is judged whether all the pins of the target cable are connected, and if all the pins of the target cable are connected, the prompter is controlled to issue the prompt indicating that the target cable is connected If all pins of the target cable are not connected, the prompter is controlled to issue the prompt information indicating that the target cable is disconnected.

优选的,还包括:与所述FPGA连接的控制器;Preferably, it also includes: a controller connected to the FPGA;

所述控制器用于传输线缆检测与否的控制指令至所述FPGA,以控制所述FPGA是否执行线缆检测操作。The controller is configured to transmit a control instruction of whether the cable is detected or not to the FPGA, so as to control whether the FPGA performs the cable detection operation.

优选的,还包括:与所述FPGA及所述提示器连接的电源器,用于为所述FPGA及所述提示器供电。Preferably, it also includes: a power supply connected to the FPGA and the prompter, for supplying power to the FPGA and the prompter.

优选的,所述提示器包括LED灯。Preferably, the prompter includes an LED light.

一种线缆检测方法,应用于FPGA,包括:A cable detection method, applied to an FPGA, includes:

通过自身的第一IO接口向目标线缆发送目标指令,所述第一IO接口与所述目标线缆的输入接口相连接;Send the target command to the target cable through its own first IO interface, the first IO interface is connected to the input interface of the target cable;

通过自身的第二IO接口判断是否接收到所述目标指令,所述第二IO接口与所述目标线缆的输出接口相连接;Determine whether the target command is received through its own second IO interface, the second IO interface is connected to the output interface of the target cable;

若通过所述第二IO接口接收到所述目标指令,则发出表征所述目标线缆连通的提示信息;If the target instruction is received through the second IO interface, a prompt message indicating that the target cable is connected is issued;

若未通过所述第二IO接口接收到所述目标指令,则发出表征所述目标线缆存在断路的提示信息。If the target command is not received through the second IO interface, a prompt message indicating that the target cable is disconnected is sent out.

优选的,所述目标线缆的管脚与所述FPGA的IO接口一一对应连接;Preferably, the pins of the target cable are connected in one-to-one correspondence with the IO interfaces of the FPGA;

所述发出表征所述目标线缆存在断路的提示信息之后,还包括:After sending out the prompt information indicating that the target cable has an open circuit, the method further includes:

记录所述第一IO接口连接的所述目标线缆的管脚信息;record the pin information of the target cable connected to the first IO interface;

记录所述第二IO接口连接的所述目标线缆的管脚信息。The pin information of the target cable connected to the second IO interface is recorded.

一种线缆检测系统,应用于FPGA,包括:A cable detection system, applied to an FPGA, includes:

第一发送模块,用于通过自身的第一IO接口向目标线缆发送目标指令,所述第一IO接口与所述目标线缆的输入接口相连接;a first sending module, configured to send a target command to a target cable through its own first IO interface, where the first IO interface is connected to an input interface of the target cable;

第一判断模块,用于通过自身的第二IO接口判断是否接收到所述目标指令,所述第二IO接口与所述目标线缆的输出接口相连接;若通过所述第二IO接口接收到所述目标指令,则发出表征所述目标线缆连通的提示信息;若未通过所述第二IO接口接收到所述目标指令,则发出表征所述目标线缆存在断路的提示信息。The first judgment module is used for judging whether the target command is received through its own second IO interface, the second IO interface is connected with the output interface of the target cable; if the second IO interface is received through the second IO interface When the target command is reached, a prompt message indicating that the target cable is connected is sent; if the target command is not received through the second IO interface, a prompt message indicating that the target cable is disconnected is sent.

一种计算机可读存储介质,应用于FPGA,所述计算机可读存储介质中存储有计算机程序,所述计算机程序被处理器执行时实现如上任一所述的线缆检测方法。A computer-readable storage medium is applied to an FPGA, and a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, any one of the above-mentioned cable detection methods is implemented.

本申请提供的一种线缆检测设备,包括:FPGA、与FPGA连接的提示器;FPGA的第一IO接口与目标线缆的输入接口相连接,FPGA的第二IO接口与目标线缆的输出接口相连接;其中,FPGA通过第一IO接口向目标线缆发送目标指令,并通过第二IO接口判断是否接收到目标指令,若通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆连通的提示信息,若未通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆存在断路的提示信息。本申请中,FPGA的第一IO接口与目标线缆的输入接口相连接,且第二IO接口与目标线缆的输出接口相连接,这样,FPGA可以通过第一IO接口传输目标指令至目标线缆,并且目标线缆会将目标指令传输至第二IO接口,FPGA可以通过第二IO接口判断是否接收到目标指令来判断目标线缆是否连通,也即只需通过发送指令便可以实现对目标线缆的检测,检测速度快,准确率高,此外,无论目标线缆的类型如何改变,FPGA上的IO接口均与目标线缆的接口相连接,所以本申请还可以提高线缆检测的检测多样性。本申请提供的一种线缆检测方法、系统及计算机可读存储介质也解决了相应技术问题。A cable detection device provided by the present application includes: an FPGA and a prompter connected to the FPGA; a first IO interface of the FPGA is connected to an input interface of a target cable, and a second IO interface of the FPGA is connected to an output of the target cable. The interfaces are connected; wherein, the FPGA sends the target command to the target cable through the first IO interface, and judges whether the target command is received through the second IO interface, and if the target command is received through the second IO interface, the control prompter sends out a token The prompt information indicating that the target cable is connected, if the target command is not received through the second IO interface, the prompter is controlled to issue a prompt information indicating that the target cable is disconnected. In this application, the first IO interface of the FPGA is connected to the input interface of the target cable, and the second IO interface is connected to the output interface of the target cable. In this way, the FPGA can transmit the target command to the target cable through the first IO interface. and the target cable will transmit the target command to the second IO interface, and the FPGA can judge whether the target cable is connected through the second IO interface by judging whether the target command is received, that is, the target cable can be realized only by sending the command. Cable detection has fast detection speed and high accuracy. In addition, no matter how the type of the target cable changes, the IO interface on the FPGA is connected to the interface of the target cable, so the application can also improve the detection of cable detection. Diversity. The cable detection method, system and computer-readable storage medium provided by the present application also solve the corresponding technical problems.

附图说明Description of drawings

为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据提供的附图获得其他的附图。In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only It is an embodiment of the present application. For those of ordinary skill in the art, other drawings can also be obtained according to the provided drawings without any creative effort.

图1为本申请实施例提供的线缆检测设备的结构示意图;FIG. 1 is a schematic structural diagram of a cable detection device provided by an embodiment of the present application;

图2为本申请实施例提供的一种线缆检测方法的流程图;FIG. 2 is a flowchart of a cable detection method provided by an embodiment of the present application;

图3为本申请实施例提供的一种线缆检测系统的结构示意图。FIG. 3 is a schematic structural diagram of a cable detection system according to an embodiment of the present application.

具体实施方式Detailed ways

下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

请参阅图1,图1为本申请实施例提供的线缆检测设备的结构示意图。Please refer to FIG. 1 , which is a schematic structural diagram of a cable detection device provided by an embodiment of the present application.

本申请实施例提供的一种线缆检测设备,包括:FPGA(Field Programmable GateArray,现场可编程逻辑门阵列)1、与FPGA1连接的提示器2;A cable detection device provided by an embodiment of the present application includes: an FPGA (Field Programmable GateArray, Field Programmable Gate Array) 1, and a prompter 2 connected to the FPGA1;

FPGA1的第一IO接口与目标线缆的输入接口相连接,FPGA1的第二IO接口与目标线缆的输出接口相连接;The first IO interface of FPGA1 is connected with the input interface of the target cable, and the second IO interface of FPGA1 is connected with the output interface of the target cable;

其中,FPGA1通过第一IO接口向目标线缆发送目标指令,并通过第二IO接口判断是否接收到目标指令,若通过第二IO接口接收到目标指令,则控制提示器2发出表征目标线缆连通的提示信息,若未通过第二IO接口接收到目标指令,则控制提示器2发出表征目标线缆存在断路的提示信息。Among them, FPGA1 sends the target command to the target cable through the first IO interface, and judges whether the target command is received through the second IO interface. If the target command is received through the second IO interface, the control prompter 2 sends out a signal representing the target cable. For the connected prompt information, if the target command is not received through the second IO interface, the prompter 2 is controlled to issue a prompt information indicating that the target cable is disconnected.

也即本申请中,FPGA的第一IO接口可以与目标线缆的输入接口相连接,第二IO接口可以与目标线缆的输出接口相连接,这样,FPGA的第一IO接口便可以通过目标线缆与第二IO接口相连接,从而为后续FPGA借助目标指令测试目标线缆是否连通提供通信链路。应当指出,FPGA的IO接口与目标线缆的接口相连接,意味着本申请中FPGA的IO接口的端口类型与目标线缆的端口类型相匹配,FPGA的IO接口的端口类型可以根据目标线缆的端口类型来确定;此外,本申请中并不限制目标线缆的类型,比如目标线缆可以为slimlineX8线缆、MiniSAS线缆、oculink线缆、slimlineX4线缆、slimlineX8转2个slimlineX4线缆等。That is to say, in this application, the first IO interface of the FPGA can be connected to the input interface of the target cable, and the second IO interface can be connected to the output interface of the target cable. In this way, the first IO interface of the FPGA can pass through the target cable. The cable is connected to the second IO interface, so as to provide a communication link for the subsequent FPGA to test whether the target cable is connected by means of the target command. It should be pointed out that the IO interface of the FPGA is connected to the interface of the target cable, which means that the port type of the IO interface of the FPGA matches the port type of the target cable in this application, and the port type of the IO interface of the FPGA can be based on the target cable. In addition, this application does not limit the type of target cable, for example, the target cable can be slimlineX8 cable, MiniSAS cable, oculink cable, slimlineX4 cable, slimlineX8 to 2 slimlineX4 cables, etc. .

实际应用中,FPGA的第一IO接口与目标线缆的输入接口相连接,FPGA的第二IO接口与目标线缆的输出接口相连接之后,FPGA便可以通过发送目标指令来判断目标线缆是否连通,并控制提示器发出相应的提示信息,以便用户查看判断结果,比如FPGA可以通过第一IO接口向目标线缆发送目标指令,并通过第二IO接口判断是否接收到目标指令,若通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆连通的提示信息,若未通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆存在断路的提示信息等。In practical applications, the first IO interface of the FPGA is connected to the input interface of the target cable, and after the second IO interface of the FPGA is connected to the output interface of the target cable, the FPGA can determine whether the target cable is not by sending the target command. connected, and control the prompter to issue corresponding prompt information so that the user can view the judgment result. For example, the FPGA can send the target command to the target cable through the first IO interface, and judge whether the target command is received through the second IO interface. When the second IO interface receives the target command, the control prompter sends a prompt message indicating that the target cable is connected. If the target command is not received through the second IO interface, the control prompter sends a prompt message indicating that the target cable is disconnected.

本申请提供的一种线缆检测设备,包括:FPGA、与FPGA连接的提示器;FPGA的第一IO接口与目标线缆的输入接口相连接,FPGA的第二IO接口与目标线缆的输出接口相连接;其中,FPGA通过第一IO接口向目标线缆发送目标指令,并通过第二IO接口判断是否接收到目标指令,若通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆连通的提示信息,若未通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆存在断路的提示信息。本申请中,FPGA的第一IO接口与目标线缆的输入接口相连接,且第二IO接口与目标线缆的输出接口相连接,这样,FPGA可以通过第一IO接口传输目标指令至目标线缆,并且目标线缆会将目标指令传输至第二IO接口,FPGA可以通过第二IO接口判断是否接收到目标指令来判断目标线缆是否连通,也即只需通过发送指令便可以实现对目标线缆的检测,检测速度快,准确率高,此外,无论目标线缆的类型如何改变,FPGA上的IO接口均与目标线缆的接口相连接,所以本申请还可以提高线缆检测的检测多样性。A cable detection device provided by the present application includes: an FPGA and a prompter connected to the FPGA; a first IO interface of the FPGA is connected to an input interface of a target cable, and a second IO interface of the FPGA is connected to an output of the target cable. The interfaces are connected; wherein, the FPGA sends the target command to the target cable through the first IO interface, and judges whether the target command is received through the second IO interface, and if the target command is received through the second IO interface, the control prompter sends out a token The prompt information indicating that the target cable is connected, if the target command is not received through the second IO interface, the prompter is controlled to issue a prompt information indicating that the target cable is disconnected. In this application, the first IO interface of the FPGA is connected to the input interface of the target cable, and the second IO interface is connected to the output interface of the target cable. In this way, the FPGA can transmit the target command to the target cable through the first IO interface. and the target cable will transmit the target command to the second IO interface, and the FPGA can judge whether the target cable is connected through the second IO interface by judging whether the target command is received, that is, the target cable can be realized only by sending the command. Cable detection has fast detection speed and high accuracy. In addition, no matter how the type of the target cable changes, the IO interface on the FPGA is connected to the interface of the target cable, so the application can also improve the detection of cable detection. Diversity.

本申请实施例提供的一种线缆检测设备中,第一IO接口和第二IO接口的接口类型可以包括slimlineX8线缆接口、MiniSAS线缆接口、oculink线缆接口、slimlineX4线缆接口等。In the cable detection device provided by the embodiment of the present application, the interface types of the first IO interface and the second IO interface may include a slimlineX8 cable interface, a MiniSAS cable interface, an oculink cable interface, a slimlineX4 cable interface, and the like.

应当指出,实际应用中,可以直接将FPGA的IO接口的接口类型设置为与目标线缆匹配的类型,也可以借助连接器来将FPGA的IO接口与目标线缆的接口相连接,比如在图1中,CON_1、CON_2、CON_3、CON_4、CON_5、CON_6、CON_7和CON_8均为相应的连接器,且CON_1、CON_2用于将IO接口和slimlineX8类型的线缆相连接,CON_3、CON_4用于将IO接口和MiniSAS类型的线缆相连接,CON_5、CON_6用于将IO接口和OuclinkX8类型的线缆相连接,CON_7和CON_8用于将IO接口和slimlineX4类型的线缆相连接。对于每个连接器,连接器中的MN表示连接器上与目标线缆的管脚的相对应的管脚,比如CON_1中的A1表示与slimlineX8的A1管脚相对应的管脚,且FPGA中的IO_x_y表示相应的IO接口。It should be pointed out that in practical applications, the interface type of the IO interface of the FPGA can be directly set to the type matching the target cable, or the IO interface of the FPGA can be connected with the interface of the target cable by means of a connector, such as in Fig. In 1, CON_1, CON_2, CON_3, CON_4, CON_5, CON_6, CON_7 and CON_8 are all corresponding connectors, and CON_1, CON_2 are used to connect the IO interface and slimlineX8 type cable, CON_3, CON_4 are used to connect the IO The interface is connected to the MiniSAS type cable, CON_5 and CON_6 are used to connect the IO interface to the OuclinkX8 type cable, and CON_7 and CON_8 are used to connect the IO interface to the slimlineX4 type cable. For each connector, MN in the connector represents the pin corresponding to the pin of the target cable on the connector, for example, A1 in CON_1 represents the pin corresponding to the A1 pin of slimlineX8, and in the FPGA IO_x_y represents the corresponding IO interface.

本申请实施例提供的一种线缆检测设备中,目标线缆的管脚与FPGA的IO接口一一对应连接;In the cable detection device provided by the embodiment of the present application, the pins of the target cable are connected to the IO interfaces of the FPGA in a one-to-one correspondence;

相应的,FPGA通过第一IO接口向目标线缆发送目标指令,并通过第二IO接口判断是否接收到目标指令,若通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆连通的提示信息,若未通过第二IO接口接收到目标指令,则控制提示器发出表征目标线缆存在断路的提示信息,包括:Correspondingly, the FPGA sends the target command to the target cable through the first IO interface, and judges whether the target command is received through the second IO interface. Connected prompt information, if the target command is not received through the second IO interface, the control prompter sends out prompt information indicating that the target cable is disconnected, including:

FPGA在目标线缆的管脚中确定出当前待检测管脚,生成对当前待检测管脚进行检测的目标指令,通过第一IO接口向目标线缆发送目标指令,并通过第二IO接口判断是否接收到目标指令,若通过第二IO接口接收到目标指令,则控制提示器发出表征当前待检测管脚连通的提示信息,若未通过第二IO接口接收到目标指令,则控制提示器发出表征当前待检测管脚存在断路的提示信息;待完成目标线缆的所有管脚的检测之后,判断目标线缆的所有管脚是否均连通,若目标线缆的所有管脚均连通,则控制提示器发出表征目标线缆连通的提示信息,若目标线缆的所有管脚并非均连通,则控制提示器发出表征目标线缆存在断路的提示信息。The FPGA determines the current pin to be detected in the pins of the target cable, generates a target command to detect the current pin to be detected, sends the target command to the target cable through the first IO interface, and judges through the second IO interface Whether the target command is received, if the target command is received through the second IO interface, the control prompter sends out a prompt message indicating that the current pin to be detected is connected, and if the target command is not received through the second IO interface, the control prompter sends out Indicates the prompt information that the current pin to be detected has an open circuit; after the detection of all pins of the target cable is completed, it is judged whether all the pins of the target cable are connected, and if all the pins of the target cable are connected, control The prompter sends out prompt information indicating that the target cable is connected, and if all pins of the target cable are not all connected, the prompter is controlled to send out prompt information indicating that the target cable is disconnected.

也即,目标线缆的一个管脚对应FPGA的一个IO接口,此时,便可以对目标线缆的每对管脚间的连通性进行检测,以目标线缆为slimlineX4线缆、且线缆检测设备的结果如图1所示为例,则目标线缆通过CON_7和CON_8与FPGA的IO接口相连接,假设slimlineX4线缆的管脚对应关系如表1所示,CON_7端的A1管脚对应CON_8端的B1管脚,则FPGA通过IO接口IO_7_1发送目标指令的话,应该从IO接口IO_8_20接收到目标指令,因此,FPGA可以向IO接口IO_7_1发送目标指令,判断能否通过IO接口IO_8_20接收到目标指令,若能通过IO接口IO_8_20接收到目标指令,则可以判定目标线缆的A1管脚与B1管脚间连通,若不能通过IO接口IO_8_20接收到目标指令,则可以判定目标线缆的A1管脚与B1管脚间发生了断路。That is, a pin of the target cable corresponds to an IO interface of the FPGA. At this time, the connectivity between each pair of pins of the target cable can be detected. The target cable is a slimlineX4 cable and the cable is The result of the detection device is shown in Figure 1 as an example. The target cable is connected to the IO interface of the FPGA through CON_7 and CON_8. Suppose the pin correspondence of the slimlineX4 cable is shown in Table 1, and the A1 pin on the CON_7 end corresponds to CON_8 If the FPGA sends the target command through the IO interface IO_7_1, it should receive the target command from the IO interface IO_8_20. Therefore, the FPGA can send the target command to the IO interface IO_7_1 to determine whether it can receive the target command through the IO interface IO_8_20. If the target command can be received through the IO interface IO_8_20, it can be determined that the A1 pin of the target cable is connected to the B1 pin. If the target command cannot be received through the IO interface IO_8_20, it can be determined that the A1 pin of the target cable is connected to the An open circuit has occurred between the B1 pins.

表1 slimlineX4线缆管脚对应关系表Table 1 Correspondence table of slimlineX4 cable pins

Figure BDA0002537472150000071
Figure BDA0002537472150000071

实际应用中,目标指令的类型可以根据实际需要确定,比如目标指令可以包括逻辑1与逻辑0组成的指令,且FPGA通过第一IO接口向当前待检测管脚发送逻辑1,向其他管脚发送逻辑0,也即,FPGA在测试目标线缆的管脚间的连通性时,可以只向目标线缆中的当前待检测管脚连接的IO发送逻辑1,向目标线缆中的其他管脚连接的IO发送逻辑0,这样,只要FPGA能够接收到逻辑1,便可以判定目标线缆中的当前待检测管脚连通。当然,还可以有其他测试方式,本申请在此不做具体限定。In practical applications, the type of the target instruction can be determined according to actual needs. For example, the target instruction can include an instruction composed of logic 1 and logic 0, and the FPGA sends a logic 1 to the current to-be-detected pin through the first IO interface, and sends it to other pins. Logic 0, that is, when testing the connectivity between the pins of the target cable, the FPGA can only send logic 1 to the IO connected to the current pin to be detected in the target cable, and send logic 1 to other pins in the target cable. The connected IO sends a logic 0, so that as long as the FPGA can receive a logic 1, it can determine that the current pin to be detected in the target cable is connected. Of course, there may also be other testing methods, which are not specifically limited in this application.

具体应用场景中,为了准确获知目标线缆中未连通的管脚的信息,在控制提示器发出表征目标线缆存在断路的提示信息之后,还可以记录第一IO接口连接的目标线缆的管脚信息;记录第二IO接口连接的目标线缆的管脚信息In a specific application scenario, in order to accurately know the information of the unconnected pins in the target cable, after the control prompter sends out the prompt information indicating that the target cable is disconnected, the pipe of the target cable connected to the first IO interface can also be recorded. Pin information; record the pin information of the target cable connected to the second IO interface

本申请实施例提供的一种线缆检测设备中,为了便于对检测过程进行控制,还可以包括与FPGA连接的控制器;控制器用于传输线缆检测与否的控制指令至FPGA,以控制FPGA是否执行线缆检测操作。In the cable detection device provided by the embodiment of the present application, in order to facilitate the control of the detection process, a controller connected to the FPGA may also be included; the controller is used to transmit a control command of whether the cable is detected or not to the FPGA, so as to control the FPGA Whether to perform the cable detection operation.

应当指出,本申请图1中的BUTTON便是本申请示出的控制器,其类型为一种开关,该控制器可以通过改变FPGA检测到的电平高低变化情况来向FPGA发现相应的控制指令,比如可以在控制器使得FPGA接收到高电平时,设置FPGA执行线缆检测操作,在控制器使得FPGA接收到低电平时,设置FPGA不执行线缆检测操作等。当然,控制器的类型可以根据实际需要确定,本申请在此不做具体限定。It should be pointed out that the BUTTON in FIG. 1 of this application is the controller shown in this application, and its type is a switch. The controller can find corresponding control instructions from the FPGA by changing the level changes detected by the FPGA. For example, when the controller enables the FPGA to receive a high level, the FPGA can be set to perform a cable detection operation, and when the controller enables the FPGA to receive a low level, the FPGA can be set to not perform a cable detection operation, etc. Of course, the type of the controller can be determined according to actual needs, which is not specifically limited in this application.

本申请实施例提供的一种线缆检测设备中,为了保证线缆检测设备能够随时随地的工作,还可以在本申请提供的线缆检测设备中,设置与FPGA及提示器连接的电源器,用于为FPGA及提示器等器件供电,也即为线缆检测设备供电。In the cable detection device provided by the embodiment of the present application, in order to ensure that the cable detection device can work anytime and anywhere, a power supply connected to the FPGA and the prompter may also be set in the cable detection device provided by the present application. It is used to power devices such as FPGA and prompter, that is, power supply for cable detection equipment.

本申请实施例提供的一种线缆检测设备中,为了尽可能的降低线缆检测设备的复杂度,可以将提示器设置为LED灯,LED灯的数量及类型可以根据实际需要确定。In the cable detection device provided by the embodiment of the present application, in order to reduce the complexity of the cable detection device as much as possible, the prompter can be set as LED lights, and the number and type of the LED lights can be determined according to actual needs.

相应的,FPGA可以通过控制LED灯来发出相应的提示信息,比如可以通过控制LED灯的亮灭来表征不同的提示信息,比如可以控制LED灯发光来表征目标线缆连通,可以控制LED灯熄灭来表征目标线缆存在断路等。当然,还可以借助LED灯的发光颜色来表征不同的提示信息等,本申请在此不做限定。Correspondingly, the FPGA can send out corresponding prompt information by controlling the LED lights. For example, it can control the on and off of the LED lights to represent different prompt information. For example, it can control the LED lights to light up to indicate the target cable is connected, and can control the LED lights to turn off. to indicate that the target cable has an open circuit, etc. Of course, different prompt information and the like can also be represented by the luminous color of the LED lamp, which is not limited in this application.

具体应用场景中,本申请图1所示线缆检测设备中,控制各类线缆的开关按键及表征该线缆检测通过与否的LED灯间的对应关系可以如表2所示,当然,还可以有其他对应关系。In the specific application scenario, in the cable detection device shown in FIG. 1 of the present application, the corresponding relationship between the switch buttons that control various cables and the LED lights indicating whether the cable has passed the detection can be shown in Table 2. Of course, There may also be other correspondences.

表2线缆类型及对应的开关按键和LED灯Table 2 Cable types and corresponding switch buttons and LED lights

Figure BDA0002537472150000091
Figure BDA0002537472150000091

请参阅图2,图2为本申请实施例提供的一种线缆检测方法的流程图。Please refer to FIG. 2 , which is a flowchart of a cable detection method provided by an embodiment of the present application.

本申请实施例提供的一种线缆检测方法,应用于FPGA,可以包括以下步骤:A cable detection method provided by an embodiment of the present application, applied to an FPGA, may include the following steps:

步骤S101:通过自身的第一IO接口向目标线缆发送目标指令,第一IO接口与目标线缆的输入接口相连接。Step S101: Send a target command to a target cable through its own first IO interface, where the first IO interface is connected to an input interface of the target cable.

步骤S102:通过自身的第二IO接口判断是否接收到目标指令,第二IO接口与目标线缆的输出接口相连接;若通过第二IO接口接收到目标指令,则执行步骤S103;若未通过第二IO接口接收到目标指令,则执行步骤S104。Step S102: Determine whether the target command is received through its own second IO interface, and the second IO interface is connected to the output interface of the target cable; if the target command is received through the second IO interface, then perform step S103; After the second IO interface receives the target instruction, step S104 is executed.

步骤S103:发出表征目标线缆连通的提示信息;Step S103: Send out a prompt message indicating that the target cable is connected;

步骤S104:发出表征目标线缆存在断路的提示信息。Step S104: Send out prompt information indicating that the target cable is disconnected.

本申请实施例提供的一种线缆检测方法中,目标线缆的管脚可以与FPGA的IO接口一一对应连接;In the cable detection method provided by the embodiment of the present application, the pins of the target cable may be connected to the IO interfaces of the FPGA in a one-to-one correspondence;

FPGA在发出表征目标线缆存在断路的提示信息之后,还可以记录第一IO接口连接的目标线缆的管脚信息;记录第二IO接口连接的目标线缆的管脚信息。After the FPGA sends out the prompt information indicating that the target cable is disconnected, it can also record the pin information of the target cable connected to the first IO interface; and record the pin information of the target cable connected to the second IO interface.

本申请实施例提供的一种线缆检测方法中各个步骤的相应描述请参阅上述实施例中的对应描述,在此不再赘述。For the corresponding description of each step in the cable detection method provided by the embodiment of the present application, please refer to the corresponding description in the foregoing embodiment, and details are not repeated here.

请参阅图3,图3为本申请实施例提供的一种线缆检测系统的结构示意图。Please refer to FIG. 3 , which is a schematic structural diagram of a cable detection system according to an embodiment of the present application.

本申请实施例提供的一种线缆检测系统,应用于FPGA,可以包括:A cable detection system provided by an embodiment of the present application, applied to an FPGA, may include:

第一发送模块101,用于通过自身的第一IO接口向目标线缆发送目标指令,第一IO接口与目标线缆的输入接口相连接;The first sending module 101 is configured to send the target command to the target cable through its own first IO interface, and the first IO interface is connected with the input interface of the target cable;

第一判断模块102,用于通过自身的第二IO接口判断是否接收到目标指令,第二IO接口与目标线缆的输出接口相连接;若通过第二IO接口接收到目标指令,则发出表征目标线缆连通的提示信息;若未通过第二IO接口接收到目标指令,则发出表征目标线缆存在断路的提示信息。The first judging module 102 is used for judging whether the target command is received through its own second IO interface, the second IO interface is connected with the output interface of the target cable; if the target command is received through the second IO interface, it issues a token The prompt information that the target cable is connected; if the target command is not received through the second IO interface, the prompt information indicating that the target cable is disconnected is issued.

本申请实施例提供的一种线缆检测系统中各个模块的相应描述请参阅上述实施例中的对应描述,在此不再赘述。For the corresponding description of each module in the cable detection system provided by the embodiment of the present application, please refer to the corresponding description in the foregoing embodiment, and details are not repeated here.

本申请实施例提供的一种计算机可读存储介质,计算机可读存储介质中存储有计算机程序,计算机程序被处理器执行时实现如上实施例所描述的线缆检测方法的步骤。An embodiment of the present application provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the cable detection method described in the above embodiments are implemented.

本申请所涉及的计算机可读存储介质包括随机存储器(RAM)、内存、只读存储器(ROM)、电可编程ROM、电可擦除可编程ROM、寄存器、硬盘、可移动磁盘、CD-ROM、或技术领域内所公知的任意其它形式的存储介质。The computer-readable storage medium referred to in this application includes random access memory (RAM), internal memory, read only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs , or any other form of storage medium known in the art.

本申请实施例提供的一种线缆检测方法、系统及计算机可读存储介质中相关部分的说明请参见本申请实施例提供的线缆检测设备中对应部分的详细说明,在此不再赘述。另外,本申请实施例提供的上述技术方案中与现有技术中对应技术方案实现原理一致的部分并未详细说明,以免过多赘述。For the description of the relevant parts in the cable detection method, system, and computer-readable storage medium provided by the embodiments of the present application, please refer to the detailed description of the corresponding parts in the cable detection device provided by the embodiments of the present application, and details are not repeated here. In addition, parts of the above technical solutions provided in the embodiments of the present application that are consistent with the implementation principles of the corresponding technical solutions in the prior art are not described in detail, so as to avoid redundant descriptions.

还需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。It should also be noted that in this document, relational terms such as first and second are used only to distinguish one entity or operation from another, and do not necessarily require or imply those entities or operations There is no such actual relationship or order between them. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass non-exclusive inclusion such that a process, method, article or device comprising a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in a process, method, article or apparatus that includes the element.

对所公开的实施例的上述说明,使本领域技术人员能够实现或使用本申请。对这些实施例的多种修改对本领域技术人员来说将是显而易见的,本文中所定义的一般原理可以在不脱离本申请的精神或范围的情况下,在其它实施例中实现。因此,本申请将不会被限制于本文所示的这些实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。The above description of the disclosed embodiments enables any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, this application is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1.一种线缆检测设备,其特征在于,包括:FPGA、与所述FPGA连接的提示器;1. A cable detection device, comprising: an FPGA, a prompter connected with the FPGA; 所述FPGA的第一IO接口与目标线缆的输入接口相连接,所述FPGA的第二IO接口与所述目标线缆的输出接口相连接;The first IO interface of the FPGA is connected with the input interface of the target cable, and the second IO interface of the FPGA is connected with the output interface of the target cable; 其中,所述FPGA通过所述第一IO接口向所述目标线缆发送目标指令,并通过所述第二IO接口判断是否接收到所述目标指令,若通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征所述目标线缆连通的提示信息,若未通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征所述目标线缆存在断路的提示信息。Wherein, the FPGA sends the target command to the target cable through the first IO interface, and judges whether the target command is received through the second IO interface, if the target command is received through the second IO interface If the target command is not received through the second IO interface, the prompter is controlled to issue a prompt message indicating that the target cable is connected. A message indicating that there is an open circuit in the cable. 2.根据权利要求1所述的线缆检测设备,其特征在于,所述第一IO接口和所述第二IO接口的接口类型包括slimlineX8线缆接口、MiniSAS线缆接口、oculink线缆接口、slimlineX4线缆接口。2. The cable detection device according to claim 1, wherein the interface types of the first IO interface and the second IO interface include slimlineX8 cable interface, MiniSAS cable interface, oculink cable interface, slimlineX4 cable interface. 3.根据权利要求1所述的线缆检测设备,其特征在于,所述目标线缆的管脚与所述FPGA的IO接口一一对应连接;3. The cable detection device according to claim 1, wherein the pins of the target cable are connected in one-to-one correspondence with the IO interfaces of the FPGA; 所述FPGA通过所述第一IO接口向所述目标线缆发送目标指令,并通过所述第二IO接口判断是否接收到所述目标指令,若通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征所述目标线缆连通的提示信息,若未通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征所述目标线缆存在断路的提示信息,包括:The FPGA sends a target command to the target cable through the first IO interface, and judges whether the target command is received through the second IO interface, if the target command is received through the second IO interface command, the prompter is controlled to issue a prompt message indicating that the target cable is connected, and if the target command is not received through the second IO interface, the prompter is controlled to issue a message indicating the existence of the target cable Broken circuit prompt information, including: 所述FPGA在所述目标线缆的管脚中确定出当前待检测管脚,生成对当前待检测管脚进行检测的所述目标指令,通过所述第一IO接口向所述目标线缆发送所述目标指令,并通过所述第二IO接口判断是否接收到所述目标指令,若通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征当前待检测管脚连通的提示信息,若未通过所述第二IO接口接收到所述目标指令,则控制所述提示器发出表征当前待检测管脚存在断路的提示信息;待完成所述目标线缆的所有管脚的检测之后,判断所述目标线缆的所有管脚是否均连通,若所述目标线缆的所有管脚均连通,则控制所述提示器发出表征所述目标线缆连通的所述提示信息,若所述目标线缆的所有管脚并非均连通,则控制所述提示器发出表征所述目标线缆存在断路的所述提示信息;The FPGA determines the current pin to be detected in the pins of the target cable, generates the target instruction for detecting the current to-be-detected pin, and sends it to the target cable through the first IO interface the target command, and determine whether the target command is received through the second IO interface, and if the target command is received through the second IO interface, the prompter is controlled to issue a pin representing the current to-be-detected pin Connected prompt information, if the target command is not received through the second IO interface, the prompter is controlled to issue prompt information indicating that the current to-be-detected pin has an open circuit; all pipes of the target cable are to be completed. After the detection of the feet, it is judged whether all the pins of the target cable are connected, and if all the pins of the target cable are connected, the prompter is controlled to issue the prompt indicating that the target cable is connected information, if all pins of the target cable are not all connected, control the prompter to issue the prompt information indicating that the target cable has an open circuit; 其中,所述目标指令包括逻辑1与逻辑0组成的指令,且所述FPGA通过所述第一IO接口向当前待检测管脚发送逻辑1,向其他管脚发送逻辑0。The target instruction includes an instruction composed of a logic 1 and a logic 0, and the FPGA sends a logic 1 to the current to-be-detected pin and sends a logic 0 to other pins through the first IO interface. 4.根据权利要求1所述的线缆检测设备,其特征在于,还包括:与所述FPGA连接的控制器;4. The cable detection device according to claim 1, further comprising: a controller connected to the FPGA; 所述控制器用于传输线缆检测与否的控制指令至所述FPGA,以控制所述FPGA是否执行线缆检测操作。The controller is configured to transmit a control instruction of whether the cable is detected or not to the FPGA, so as to control whether the FPGA performs the cable detection operation. 5.根据权利要求1所述的线缆检测设备,其特征在于,还包括:与所述FPGA及所述提示器连接的电源器,用于为所述FPGA及所述提示器供电。5 . The cable detection device according to claim 1 , further comprising: a power supply connected to the FPGA and the prompter, and configured to supply power to the FPGA and the prompter. 6 . 6.根据权利要求1所述的线缆检测设备,其特征在于,所述提示器包括LED灯。6. The cable detection device of claim 1, wherein the prompter comprises an LED light. 7.一种线缆检测方法,其特征在于,应用于FPGA,包括:7. A cable detection method, characterized in that, applied to FPGA, comprising: 通过自身的第一IO接口向目标线缆发送目标指令,所述第一IO接口与所述目标线缆的输入接口相连接;Send the target command to the target cable through its own first IO interface, the first IO interface is connected to the input interface of the target cable; 通过自身的第二IO接口判断是否接收到所述目标指令,所述第二IO接口与所述目标线缆的输出接口相连接;Determine whether the target command is received through its own second IO interface, the second IO interface is connected to the output interface of the target cable; 若通过所述第二IO接口接收到所述目标指令,则发出表征所述目标线缆连通的提示信息;If the target instruction is received through the second IO interface, a prompt message indicating that the target cable is connected is issued; 若未通过所述第二IO接口接收到所述目标指令,则发出表征所述目标线缆存在断路的提示信息。If the target command is not received through the second IO interface, a prompt message indicating that the target cable is disconnected is sent. 8.根据权利要求7所述的方法,其特征在于,所述目标线缆的管脚与所述FPGA的IO接口一一对应连接;8. The method according to claim 7, wherein the pins of the target cable are connected in one-to-one correspondence with the IO interfaces of the FPGA; 所述发出表征所述目标线缆存在断路的提示信息之后,还包括:After sending out the prompt information indicating that the target cable has an open circuit, the method further includes: 记录所述第一IO接口连接的所述目标线缆的管脚信息;record the pin information of the target cable connected to the first IO interface; 记录所述第二IO接口连接的所述目标线缆的管脚信息。The pin information of the target cable connected to the second IO interface is recorded. 9.一种线缆检测系统,其特征在于,应用于FPGA,包括:9. A cable detection system, characterized in that, applied to FPGA, comprising: 第一发送模块,用于通过自身的第一IO接口向目标线缆发送目标指令,所述第一IO接口与所述目标线缆的输入接口相连接;a first sending module, configured to send a target command to a target cable through its own first IO interface, where the first IO interface is connected to an input interface of the target cable; 第一判断模块,用于通过自身的第二IO接口判断是否接收到所述目标指令,所述第二IO接口与所述目标线缆的输出接口相连接;若通过所述第二IO接口接收到所述目标指令,则发出表征所述目标线缆连通的提示信息;若未通过所述第二IO接口接收到所述目标指令,则发出表征所述目标线缆存在断路的提示信息。The first judgment module is used for judging whether the target command is received through its own second IO interface, the second IO interface is connected with the output interface of the target cable; if the second IO interface is received through the second IO interface When the target command is reached, a prompt message indicating that the target cable is connected is sent; if the target command is not received through the second IO interface, a prompt message indicating that the target cable is disconnected is sent. 10.一种计算机可读存储介质,其特征在于,应用于FPGA,所述计算机可读存储介质中存储有计算机程序,所述计算机程序被处理器执行时实现如权利要求7或8所述的线缆检测方法。10. A computer-readable storage medium, characterized in that, applied to an FPGA, a computer program is stored in the computer-readable storage medium, and the computer program is implemented by a processor when the computer program is executed as claimed in claim 7 or 8 Cable detection method.
CN202010537359.8A 2020-06-12 2020-06-12 A cable detection device, method, system and computer-readable storage medium Pending CN111722149A (en)

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Application publication date: 20200929