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CN111681966B - 一种超薄焊接堆叠封装方法 - Google Patents

一种超薄焊接堆叠封装方法 Download PDF

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CN111681966B
CN111681966B CN202010590382.3A CN202010590382A CN111681966B CN 111681966 B CN111681966 B CN 111681966B CN 202010590382 A CN202010590382 A CN 202010590382A CN 111681966 B CN111681966 B CN 111681966B
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冯光建
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Zhejiang Jimaike Microelectronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
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    • HELECTRICITY
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
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    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/023Redistribution layers [RDL] for bonding areas
    • H01L2224/0231Manufacturing methods of the redistribution layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83007Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the layer connector during or after the bonding process

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Abstract

本发明公开了一种超薄焊接堆叠封装方法,包括以下步骤:A,在硅转接板表面制作凹槽,在凹槽内嵌入不同厚度不同种类的芯片,芯片PAD互联面朝下,在转接板背面灌胶,使芯片和凹槽缝隙被填满;B,减薄转接板凹槽一面,使芯片厚度一致,然后减薄转接板另一面,刻蚀另一面的硅使PAD通过凹槽显露出来,电镀工艺得到跟PAD互联的RDL;C,通过粘贴工艺把多层减薄后的转接板堆叠,通过干法刻蚀工艺使各层互联RDL焊盘露出,沉积钝化层,打开焊盘底部金属,做种子层沉积,电镀金属得到互联RDL;D,在RDL表面植焊球得到多层堆叠的超薄封装结构。

Description

一种超薄焊接堆叠封装方法
技术领域
本发明属于半导体技术领域,具体涉及一种超薄焊接堆叠封装方法。
背景技术
随着三维封装技术的发展,多层堆叠封装技术应用广泛,从一开始的闪存芯片工艺到后来的DRAM(Dynamic Random Access Memory,动态随机存取存储器),以至于后面索尼的CIS(CMOS Image Sensor,CMOS图像传感器)也采用BSI STACKED工艺来做,产品无论是体积重量还是性能都有的大幅度提高。
但是多层堆叠芯片需要用到尺寸相同的晶圆来做堆叠,良率难控制,且在芯片设计的时候就要考虑多层堆叠的技术难点,对设计公司和晶圆制造公司都难度较大,同时堆叠后的晶圆厚度较大,不适应现在终端越来越薄的需求。
发明内容
本发明要解决的技术问题是提供一种一种超薄焊接堆叠封装方法。
为解决上述技术问题,本发明采用如下的技术方案:
一种超薄焊接堆叠封装方法,包括以下步骤:
A,在硅转接板表面制作凹槽,在凹槽内嵌入不同厚度不同种类的芯片,芯片PAD互联面朝下,在转接板背面灌胶,使芯片和凹槽缝隙被填满;
B,减薄转接板凹槽一面,使芯片厚度一致,然后减薄转接板另一面,刻蚀另一面的硅使PAD通过凹槽显露出来,电镀工艺得到跟PAD互联的RDL;
C,通过粘贴工艺把多层减薄后的转接板堆叠,通过干法刻蚀工艺使各层互联RDL焊盘露出,沉积钝化层,打开焊盘底部金属,做种子层沉积,电镀金属得到互联RDL;
D,在RDL表面植焊球得到多层堆叠的超薄封装结构。
优选地,所述步骤A具体包括:
通过光刻、刻蚀工艺在硅转接板刻蚀出空腔,对特殊形貌的空腔采用湿法腐蚀的方式;空腔深度范围在100nm到700um之间,形状包括方形,圆形,椭圆形和三角形,其侧是壁垂直的,或者是有斜坡的;
把不同厚度的芯片用胶粘的方式嵌入到凹槽中,芯片PAD互联面朝下,在凹槽中填充胶体使芯片和凹槽缝隙被填满。
优选地,所述芯片为经测试合格的芯片。
优选地,所述步骤B具体包括:
减薄转接板凹槽一面,使芯片厚度一致,然后减薄转接板另一面,在另一面制作凹槽,使芯片的PAD露出;
在晶圆开凹槽一面沉积钝化层,然后刻蚀钝化层使PAD露出,通过光刻和电镀工艺制作RDL使凹槽中PAD电性被引出。
优选地,所述步骤C中,所述转接板堆叠层数大于3层。
采用本发明具有如下的有益效果:通过把测试完成的芯片进行重新排布嵌入到挖有空腔的转接板上,避免了芯片的良率问题,同时对转接板模组进行整体减薄,实现了多层堆叠模组厚度减少目的。
附图说明
图1a为本发明实施例的超薄焊接堆叠封装方法在硅转接板刻蚀出空腔的结构示意图;
图1b为本发明实施例的超薄焊接堆叠封装方法的减薄转接板的结构示意图;
图1c为本发明实施例的超薄焊接堆叠封装方法的转接板堆叠结构示意图;
图1d为本发明实施例的超薄焊接堆叠封装方法中电镀金属得到互联RDL的结构示意图;
如图1e为本发明实施例的超薄焊接堆叠封装方法中在RDL表面植焊球得到多层堆叠的超薄封装结构。
具体实施方式
以下将结合附图所示的具体实施方式对本发明进行详细描述。但这些实施方式并不限制本发明,本领域的普通技术人员根据这些实施方式所做出的结构、方法、或功能上的变换均包含在本发明的保护范围内。
此外,在不同的实施例中可能使用重复的标号或标示。这些重复仅为了简单清楚地叙述本发明,不代表所讨论的不同实施例及/或结构之间具有任何关联性。
本发明的各实施方式中提到的有关于步骤的标号,仅仅是为了描述的方便,而没有实质上先后顺序的联系。各具体实施方式中的不同步骤,可以进行不同先后顺序的组合,实现本发明的发明目的。
本发明实施例提供的一种超薄焊接堆叠封装方法,包括以下步骤:
A,在硅转接板表面制作凹槽,在凹槽内嵌入不同厚度不同种类的芯片,芯片PAD互联面朝下,在转接板背面灌胶,使芯片和凹槽缝隙被填满;
如图1a所示,通过光刻,刻蚀工艺在硅转接板101刻蚀出空腔,此处对特殊形貌的空腔,还可以采用湿法腐蚀的方式;空腔深度范围在100nm到700um之间,形状可以是方形,圆形,椭圆形,三角形等,其侧壁可以是垂直的,也可以是有斜坡的;
把不同厚度的芯片102用胶粘103的方式嵌入到凹槽中,芯片PAD互联面朝下,在凹槽中填充胶体104使芯片和凹槽缝隙被填满,此处芯片为经测试合格的芯片。
B,减薄转接板凹槽一面,使芯片厚度一致,然后减薄转接板另一面,刻蚀另一面的硅使PAD通过凹槽显露出来,电镀工艺得到跟PAD互联的RDL;
如图1b所示,减薄转接板凹槽一面,使芯片厚度一致,然后减薄转接板另一面,在另一面制作凹槽,使芯片的PAD露出;
在晶圆开凹槽一面沉积钝化层,然后刻蚀钝化层使PAD露出,通过光刻和电镀工艺制作RDL105使凹槽中PAD电性被引出。
C,通过粘贴工艺把多层减薄后的转接板堆叠,通过干法刻蚀工艺使各层互联RDL焊盘露出,沉积钝化层,打开焊盘底部金属,做种子层沉积,电镀金属得到互联RDL;
如图1c所示,通过粘贴工艺设置黏胶层106把多层减薄后的转接板堆叠,堆叠层数大于3层;
如图1d所示,通过干法刻蚀工艺使各层互联RDL焊盘露出,沉积钝化层,打开焊盘底部金属,做种子层沉积,电镀金属得到互联RDL108。
D:在RDL表面植焊球得到多层堆叠的超薄封装结构;
如图1e所示,在RDL表面植焊球109得到多层堆叠的超薄封装结构。
以上方式实现的超薄焊接堆叠方法,通过把测试完成的芯片进行重新排布嵌入到挖有空腔的转接板上,避免了芯片的良率问题,同时对转接板模组进行整体减薄,实现了多层堆叠模组厚度减少目的。
对本领域技术人员而言,显然本发明不限于上述示范性实施例的细节,而且在不背离本发明的精神或基本特征的情况下,能够以其他的具体形式实现本发明。因此,无论从哪一点来看,均应将实施例看作是示范性的,而且是非限制性的,本发明的范围由所附权利要求而不是上述说明限定,因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。
此外,应当理解,虽然本说明书按照实施方式加以描述,但并非每个实施方式仅包含一个独立的技术方案,说明书的这种叙述方式仅仅是为清楚起见,本领域技术人员应当将说明书作为一个整体,各实施例中的技术方案也可以经适当组合,形成本领域技术人员可以理解的其他实施方式。

Claims (3)

1.一种超薄焊接堆叠封装方法,其特征在于,包括以下步骤:
A,在硅转接板表面制作凹槽,在凹槽内嵌入不同厚度不同种类的芯片,芯片PAD互联面朝下,在转接板背面灌胶,使芯片和凹槽缝隙被填满;所述芯片为经测试合格的芯片;
B,减薄转接板凹槽一面,使芯片厚度一致,然后减薄转接板另一面,刻蚀另一面的硅使PAD通过凹槽显露出来,电镀工艺得到跟PAD互联的RDL;
C,通过粘贴工艺把多层减薄后的转接板堆叠,通过干法刻蚀工艺使各层互联RDL焊盘露出,沉积钝化层,打开焊盘底部金属,做种子层沉积,电镀金属得到互联RDL;
D,在RDL表面植焊球得到多层堆叠的超薄封装结构;
所述步骤A具体包括:
通过光刻、刻蚀工艺在硅转接板刻蚀出空腔,对特殊形貌的空腔采用湿法腐蚀的方式;空腔深度范围在100nm到700um之间,形状包括方形,圆形,椭圆形和三角形,其侧是壁垂直的,或者是有斜坡的;
把不同厚度的芯片用胶粘的方式嵌入到凹槽中,芯片PAD互联面朝下,在凹槽中填充胶体使芯片和凹槽缝隙被填满。
2.如权利要求1所述的超薄焊接堆叠封装方法,其特征在于,所述步骤B具体包括:
减薄转接板凹槽一面,使芯片厚度一致,然后减薄转接板另一面,在另一面制作凹槽,使芯片的PAD露出;
在晶圆开凹槽一面沉积钝化层,然后刻蚀钝化层使PAD露出,通过光刻和电镀工艺制作RDL使凹槽中PAD电性被引出。
3.如权利要求1所述的超薄焊接堆叠封装方法,其特征在于,所述步骤C中,所述转接板堆叠层数大于3层。
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CN1893053A (zh) * 2005-07-08 2007-01-10 三星电子株式会社 插件结构及其制造方法、晶片级堆叠结构和封装结构
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CN1893053A (zh) * 2005-07-08 2007-01-10 三星电子株式会社 插件结构及其制造方法、晶片级堆叠结构和封装结构
WO2013037102A1 (zh) * 2011-09-13 2013-03-21 深南电路有限公司 芯片埋入基板的封装方法及其结构
CN105845643A (zh) * 2016-06-12 2016-08-10 华天科技(昆山)电子有限公司 一种嵌入硅基板芯片封装结构及其制作方法

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