CN111654268B - Gate electrode driving circuit and driving method of silicon carbide device - Google Patents
Gate electrode driving circuit and driving method of silicon carbide device Download PDFInfo
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- CN111654268B CN111654268B CN202010588794.3A CN202010588794A CN111654268B CN 111654268 B CN111654268 B CN 111654268B CN 202010588794 A CN202010588794 A CN 202010588794A CN 111654268 B CN111654268 B CN 111654268B
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 63
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 62
- 238000000034 method Methods 0.000 title claims abstract description 38
- 230000010354 integration Effects 0.000 claims abstract description 23
- 239000003990 capacitor Substances 0.000 claims description 27
- 230000000630 rising effect Effects 0.000 claims description 15
- 230000001934 delay Effects 0.000 claims description 4
- 230000008569 process Effects 0.000 abstract description 17
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/042—Modifications for accelerating switching by feedback from the output circuit to the control circuit
- H03K17/04206—Modifications for accelerating switching by feedback from the output circuit to the control circuit in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
- H03K17/0822—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in field-effect transistor switches
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a gate electrode driving circuit and a driving method of a silicon carbide device, which can inhibit current overshoot in the conducting process, effectively improve the reliability of a circuit system and reduce the conducting loss of the silicon carbide device. The gate driving circuit includes: the device comprises a driving module, a voltage dividing module, an integrating module and a differential module; the driving module generates an original driving signal according to the pulse width modulation signal; the voltage division module carries out voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, the first voltage signal is sent to the integration module, and the second voltage signal is sent to the difference module; the integration module carries out delay processing of preset time on the first voltage signal; the difference module performs difference operation on the first voltage signal and the second voltage signal after delay processing to obtain an output signal, so that the output signal is the second voltage signal before the preset time, and the voltage value of the output signal is smaller than the voltage value of the second voltage signal after the preset time.
Description
Technical Field
The invention relates to the field of circuits, in particular to a gate driving circuit and a driving method of a silicon carbide device.
Background
The traditional silicon (Si) material power device has narrow forbidden bandwidth and low blocking voltage, is difficult to meet the requirements of a new generation power system in the aspects of energy consumption, working temperature and switching frequency, and becomes the bottleneck of the development of the power electronics technology. Silicon carbide (SiC) is a novel semiconductor material having a wide forbidden band and a high breakdown voltage, the forbidden band width of which is about 3 times that of Si material, and the breakdown voltage is 10 times or more that of Si material. Compared with the traditional Si-based power device, the SiC MOSFET has the advantages of higher blocking voltage, lower on-state resistance, good heat conduction characteristic energy, high-speed breaking capacity and the like, and has huge advantages which are incomparable with the traditional power device in the application fields of electric automobile driving, aerospace, new energy industry and the like.
Although SiC MOSFETs have many advantages in application, because they have very high switching speeds, they are very sensitive to packaging of driving circuits, wiring, stray parasitic inductances of lines, and self-section capacitances of devices, and mainly manifest in high voltage, high power, and high switching speed applications, where SiC MOSFETs easily generate very high voltage change rates (dv/dt) and current change rates (di/dt) when turned on and off, resulting in problems of current overshoot, voltage overshoot, and long-time switching oscillation, which can significantly increase device loss, seriously affect performances such as efficiency and electromagnetic compatibility of the system, and reduce system reliability.
In order to protect the SiC device, measures are usually taken to inhibit overcurrent and overvoltage, and the existing method for changing the driving resistor can delay the rising and falling time of current, but increases the switching delay and the Miller platform time, so that the SiC MOSFET generates larger switching loss and affects the efficiency of the converter; the existing method for adding the buffer circuit can effectively reduce the turn-off overvoltage of the SiC MOSFET, but cannot reduce the turn-on overcurrent, and the buffer circuit needs to use a high-voltage device, so that the loss of the circuit is not reduced, but larger additional loss is brought; the existing closed-loop active driving circuit can accurately control the waveform of the switching process, inhibit voltage and current spikes and reduce switching loss, but is complex to realize, and high-speed high-bandwidth operational amplifiers, D/A conversion chips, FPGA and other devices are needed, so that the implementation cost is high, and the control delay is long; in the existing multi-drive resistor control method, switching resistor control switching speeds are controlled in a delay stage, a current rising stage and a Miller platform stage, each parallel branch circuit comprises a two-way switch, a faster drive circuit is needed to be added for the two-way switch due to the short switching process of SiCNOSFET, and CPLD/FPGA is generally adopted to realize multi-drive resistor control, so that the cost and complexity of the system are increased.
Therefore, the existing technology cannot solve the problems of current overshoot, system reliability and conduction loss at the same time.
Disclosure of Invention
The invention aims to provide a gate electrode driving circuit and a driving method of a silicon carbide device, which can inhibit current overshoot in the conduction process, effectively improve the reliability of a circuit system and reduce the conduction loss of the silicon carbide device.
A first aspect of the present invention provides a gate drive circuit for a silicon carbide device, comprising:
the device comprises a driving module, a voltage dividing module, an integrating module and a differential module;
the driving module is connected with the voltage dividing module;
the voltage dividing module is connected with the integrating module and the difference module;
the differential module is connected with the grid electrodes of the integrating module, the voltage dividing module and the silicon carbide device;
the driving module generates an original driving signal according to the pulse width modulation signal, and sends the original driving signal to the voltage dividing module, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;
the voltage division module carries out voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, the first voltage signal is sent to the integration module, the second voltage signal is sent to the differential module, and the second voltage signal is identical to the original driving signal;
the integration module delays the first voltage signal for a preset time, wherein the preset time is in the rising stage of the drain current of the silicon carbide device;
the difference module performs difference operation on the first voltage signal and the second voltage signal after delay processing to obtain an output signal, so that the output signal is the second voltage signal before the preset time, and the voltage value of the output signal is smaller than the voltage value of the second voltage signal after the preset time.
Further, the voltage dividing module includes:
the first voltage dividing unit and the second voltage dividing unit;
the first end of the second voltage division unit is connected with the driving module and the differential module;
the first end of the first voltage division unit is connected with the second end of the second voltage division unit and the integration module, and the second end of the first voltage division unit is grounded.
Further, the integrating module includes:
an integrating resistor unit and an integrating capacitor unit;
the first end of the integrating resistor unit is connected with the first end of the first voltage dividing unit and the second end of the second voltage dividing unit;
the second end of the integrating resistor unit is connected with the first end of the integrating capacitor unit and the differential module, and the second end of the integrating capacitor unit is grounded.
Further, the differential module includes:
the first resistor unit, the second resistor unit, the third resistor unit, the fourth resistor unit and the subtracter;
the first end of the first resistor unit is connected with the second end of the integrating resistor unit and the first end of the integrating capacitor unit, and the second end of the first resistor unit is connected with the first end of the second resistor unit and the positive input end of the subtracter;
the second end of the second resistance unit is connected with the output end of the subtracter;
the first end of the third resistor unit is connected with the first end of the second voltage division unit, and the second end of the third resistor unit is connected with the first end of the fourth resistor unit and the negative input end of the subtracter;
the second end of the fourth resistor unit is grounded.
Further, the method comprises the steps of,
the first voltage dividing unit and the second voltage dividing unit are respectively a first voltage dividing resistor and a second voltage dividing resistor;
the resistance value of the first voltage dividing resistor is R1, the resistance value of the second voltage dividing resistor is R2, the voltage value of the first voltage signal is U1, the voltage value of the second voltage signal is U2, and the resistance relationship between the first voltage dividing resistor and the second voltage dividing resistor is:
U1/U2＝R3/(R3+R4)。
further, the method comprises the steps of,
the integrating resistor unit is an integrating resistor, and the integrating capacitor unit is an integrating capacitor;
the resistance value of the integrating resistor is R3, the capacitance value of the integrating capacitor is C, and the value of the preset time is T;
the relation between the resistance value of the integrating resistor and the capacitance value of the integrating capacitor is:
T＝R3*C。
further, the method comprises the steps of,
the resistance value of the first resistance unit is R4, the resistance value of the second resistance unit is R5, the resistance value of the third resistance unit is R6, and the resistance value of the fourth resistance unit is R7;
the resistance relationships of the first resistance unit, the second resistance unit, the third resistance unit and the fourth resistance unit are as follows:
R5/R4＝R7/R6＝1。
further, the gate driving circuit further includes:
a positive driving single-phase conducting diode, a negative driving single-phase conducting diode, a positive driving resistor and a negative driving resistor;
the positive electrode of the positive driving single-phase conducting diode is connected with the driving module, and the negative electrode of the positive driving single-phase conducting diode is connected with the first end of the second voltage division unit;
the first end of the positive driving resistor is connected with the output end of the subtracter, and the second end of the positive driving resistor is connected with the grid electrode of the silicon carbide device;
the first end of the negative driving resistor is connected with the grid electrode of the silicon carbide device, the second end of the negative driving resistor is connected with the positive electrode of the negative driving single-phase conduction diode, and the negative electrode of the negative driving single-phase conduction diode is connected with the driving module.
A second aspect of the present invention provides a driving method of a silicon carbide device, applied to a gate driving circuit of the silicon carbide device in the first aspect, comprising:
the driving module receives the pulse width modulation signal and generates an original driving signal, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;
the voltage division module performs voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, wherein the second voltage signal is identical to the original driving signal;
the integration module carries out delay processing of preset time on the first voltage signal;
before a preset time, the output signal of the differential module is a second voltage signal;
after the preset time, the difference module performs difference operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, wherein the voltage value of the output signal is smaller than that of the second voltage signal.
From the above, the gate driving circuit of the silicon carbide device comprises a driving module, a voltage division module, an integration module and a differential module, wherein the driving module is connected with the voltage division module, the voltage division module is connected with the integration module and the differential module, the differential module is connected with the integration module, the voltage division module and the gate of the silicon carbide device, the driving module generates an original driving signal according to a pulse width modulation signal, the original driving signal is sent to the voltage division module, the voltage value of the original driving signal is a positive driving voltage value of the silicon carbide device, the voltage division module carries out voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, the first voltage signal is sent to the integration module, the second voltage signal is sent to the differential module, the second voltage signal is identical to the original driving signal, the integration module carries out delay processing on the first voltage signal for a preset time, the preset time is within the rising stage of drain current of the silicon carbide device, and the differential module carries out differential operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, and the output signal is the second voltage signal before the preset time, and the voltage value of the output signal is smaller than the voltage value of the second voltage signal after the preset time. The first voltage signal of the original driving signal is intercepted through the voltage division module, delay is realized through the integration module, after the preset time, the silicon carbide device is in the second half stage of drain current rising in the conducting process, the differential operation is carried out on the first voltage signal and the second voltage signal obtained after the voltage division through the differential module, the voltage value of the obtained output signal is reduced compared with the voltage value of the original driving signal, accordingly the rising speed of the drain current is reduced, current overshoot in the conducting process is restrained, meanwhile, the reliability of the system is effectively improved, and the conducting loss is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of one embodiment of a gate drive circuit for a silicon carbide device according to the present invention;
FIG. 2 is a schematic diagram of another embodiment of a gate drive circuit for a silicon carbide device according to the present invention;
FIG. 3 is a schematic diagram of a gate driving circuit of a silicon carbide device according to another embodiment of the present invention;
FIG. 4 is a flow chart of one embodiment of a method of driving a silicon carbide device according to the present invention;
fig. 5 is a current-voltage waveform diagram provided by the present invention.
Detailed Description
The invention provides a gate electrode driving circuit and a driving method of a silicon carbide device, which can inhibit current overshoot in the conducting process, effectively improve the reliability of a circuit system and reduce the conducting loss of the silicon carbide device.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The general silicon carbide device turn-on process can be divided into four phases: the switching delay stage, the current rising stage, the voltage falling stage and the saturated switching stage are different in corresponding direct-current side current voltage waveform and voltage switching signal waveform. In the turn-on process of the silicon carbide device, the switching speed is very high and is extremely sensitive to parasitic inductance in a circuit, so that the problem of current overshoot is inevitably generated in the turn-on process of the device. Magnitude of current overshoot and drain current I D Rise speed dI of (d) D Relevant to/dt and current overshoot value I rr And dI D The relational expression of/dt is:
wherein dI D The formula of the/dt is:
Q rr representing reverse recovery charge of anti-parallel diode, V CC Representing positive driving voltage, V TH Representing the on threshold voltage of a silicon carbide device, I load Represents the load current g m Representing the transconductance, C, of a silicon carbide device iss Representing the input capacitance of a silicon carbide device, C iss ＝C gd +C gs ，R on Represents the resistance of the open grid electrode, L s Representing the source parasitic inductance.
It can be seen that the rising speed dI of the drain current is regulated under the condition of a certain parasitic inductance D The/dt can effectively improve the problem of current overshoot, and the reduction of the driving voltage in the current rising stage can reduce the current change rate dI D And/dt, thereby reducing the current overshoot of the switching-on process.
As shown in fig. 1, an embodiment of the present invention provides a gate driving circuit of a silicon carbide device, including:
a driving module 101, a voltage dividing module 102, an integrating module 103 and a differential module 104;
the driving module 101 is connected with the voltage dividing module 102;
the voltage division module 102 is connected with the integration module 103 and the difference module 104;
the differential module 104 is connected with the gates of the integrating module 103, the voltage dividing module 102 and the silicon carbide device 105;
the driving module 101 generates an original driving signal according to the pulse width modulation signal, and sends the original driving signal to the voltage dividing module, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;
the voltage division module 102 performs voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, the first voltage signal is sent to the integration module 103, the second voltage signal is sent to the difference module 104, and the second voltage signal is identical to the original driving signal;
the integrating module 103 delays the first voltage signal for a preset time, wherein the preset time is in the drain current rising stage of the silicon carbide device 105;
the difference module 104 performs a difference operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, so that the output signal is the second voltage signal before a preset time, and the voltage value of the output signal is smaller than the voltage value of the second voltage signal after the preset time.
In the embodiment of the invention, the voltage division module 102 divides and intercepts the first voltage signal of the original driving signal, the integration module 103 realizes delay, after a preset time, the silicon carbide device 105 is in the latter half stage of the rise of the drain current in the conduction process, the voltage value of the obtained output signal is reduced compared with the voltage value of the original driving signal by carrying out differential operation on the first voltage signal and the second voltage signal obtained after the voltage division through the differential module 104, thereby reducing the rise speed of the drain current, inhibiting the current overshoot in the conduction process, effectively improving the reliability of the system and reducing the conduction loss.
Alternatively, as shown in fig. 2, in some embodiments of the present invention, the voltage dividing module 102 includes:
a first voltage dividing unit 201, a second voltage dividing unit 202;
the first end of the second voltage division unit 202 is connected with the driving module 101 and the differential module 104;
the first end of the first voltage division unit 201 is connected to the second end of the second voltage division unit 202 and the integration module 103, and the second end of the first voltage division unit 201 is grounded.
Alternatively, as shown in fig. 2, in some embodiments of the present invention, the integrating module 103 includes:
an integrating resistor unit 203 and an integrating capacitor unit 204;
a first end of the integrating resistor unit 203 is connected with a first end of the first voltage dividing unit 201 and a second end of the second voltage dividing unit 202;
the second end of the integrating resistor 203 is connected to the first end of the integrating capacitor 204 and the differential module 104, and the second end of the integrating capacitor 204 is grounded.
Alternatively, as shown in fig. 2, in some embodiments of the present invention, the differential module 104 includes:
a first resistance unit 205, a second resistance unit 206, a third resistance unit 207, a fourth resistance unit 208, and a subtractor 209;
a first end of the first resistor unit 205 is connected to a second end of the integrating resistor unit 203 and a first end of the integrating capacitor unit 204, and a second end of the first resistor unit 205 is connected to a first end of the second resistor unit 206 and a positive input end of the subtractor 209;
a second terminal of the second resistor unit 206 is connected to an output terminal of the subtractor 209;
a first end of the third resistor unit 207 is connected to a first end of the second voltage dividing unit 202, and a second end of the third resistor unit 207 is connected to a first end of the fourth resistor unit 208 and a negative input end of the subtractor 209;
the second terminal of the fourth resistor unit 208 is grounded.
The specific examples of the units in the modules are defined in connection with the embodiment shown in fig. 2 above, and optionally, as shown in fig. 3, in some embodiments of the invention,
the first voltage dividing unit and the second voltage dividing unit are respectively a first voltage dividing resistor and a second voltage dividing resistor;
the resistance value of the first voltage dividing resistor is R1, the resistance value of the second voltage dividing resistor is R2, the voltage value of the first voltage signal is U1, the voltage value of the second voltage signal is U2, and the resistance relationship between the first voltage dividing resistor and the second voltage dividing resistor is:
U1/U2＝R1/(R1+R2)。
in the embodiment of the invention, the driving level is assumed to need positive and negative voltages, which are respectively V CC : +20V, and V EE : 5V, i.e. the +20V voltage is modulated accordingly, and the voltage is dividedThe main function is to pass a voltage of 20V through R 3 And R is 4 The voltage division is converted into two voltages of 5V and 20V, and then the resistance relationship between R1 and R2 is as follows:
alternatively, as shown in fig. 3, in some embodiments of the invention,
the integrating resistor unit is an integrating resistor, and the integrating capacitor unit is an integrating capacitor;
the resistance value of the integrating resistor is R3, the capacitance value of the integrating capacitor is C, and the value of the preset time is T;
the relation between the resistance value of the integrating resistor and the capacitance value of the integrating capacitor is:
T＝R3*C。
in the embodiment of the invention, the integrating module can be an R-C circuit, and the main function is to delay the 5V voltage signal obtained by voltage division for a period of time and then transmit the signal to the differential module, wherein the preset time T can be calculated by the following formula:
T＝R3*C
if the capacitance is in μf (microfarads), R is in mΩ (mega ohm), and the time constant is in seconds. The turn-on process of SiC MOSFETs is typically on the order of nanoseconds (ns), so the capacitance unit level of this embodiment is pF (picofarad) and the resistance unit level is kΩ (kiloohm).
Alternatively, as shown in fig. 3, in some embodiments of the invention,
the resistance value of the first resistance unit is R4, the resistance value of the second resistance unit is R5, the resistance value of the third resistance unit is R6, and the resistance value of the fourth resistance unit is R7;
the resistance relationships of the first resistance unit, the second resistance unit, the third resistance unit and the fourth resistance unit are as follows:
R5/R4＝R7/R6＝1。
in the embodiment of the invention, under the ideal operational amplifier condition, the circuit is regarded as a virtual short phenomenon, and the voltages of the node P and the node N are equal (U P ＝U N ) Specific node equationThe formula is as follows:
wherein U is P ＝U N The formula can be obtained:
the resistor R is usually taken 1 、R 2 、R f 、R p The resistance relationship between them satisfies:
at this time, the output voltage U of the differential circuit o And input voltage U 1 、U 2 The relation between them is:
the differential circuit used in the invention does not need to amplify the signals after differential, so the resistor R is arranged f ＝R 1 。
Optionally, as shown in fig. 3, in some embodiments of the present invention, the gate driving circuit further includes:
positive driving single-phase conducting diode D1, negative driving single-phase conducting diode D2 and positive driving resistor R on Negative drive resistor R off ；
The positive electrode of the positive driving single-phase conducting diode D1 is connected with the driving module, and the negative electrode of the positive driving single-phase conducting diode D1 is connected with the first end of the second voltage division unit;
positive drive resistor R on Is connected with the output end of the subtracter, and a positive driving resistor R on Is connected with the grid electrode of the silicon carbide device;
negative drive resistor R off Is connected to the gate (G) of the silicon carbide device, a negative drive resistor R off The second end of the negative driving single-phase conducting diode D2 is connected with the positive electrode of the negative driving single-phase conducting diode D2, and the negative electrode of the negative driving single-phase conducting diode D2 is connected with the driving module.
As shown in fig. 4, an embodiment of the present invention provides a driving method of a silicon carbide device, which is applied to a gate driving circuit of the silicon carbide device described in the above embodiment, including:
401. the driving module receives the pulse width modulation signal and generates an original driving signal, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;
402. the voltage division module performs voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, wherein the second voltage signal is identical to the original driving signal;
403. the integration module carries out delay processing of preset time on the first voltage signal;
404. before a preset time, the output signal of the differential module is a second voltage signal;
405. after the preset time, the difference module performs difference operation on the first voltage signal and the second voltage signal after the delay processing to obtain an output signal, wherein the voltage value of the output signal is smaller than that of the second voltage signal.
In the embodiment of the invention, the working principle of the driving circuit is as follows:
switching on the delay stage (t 0-t 1): the driving signal rises from low level to high level of 20V and passes through the unidirectional diode D 1 At this time, the voltage U of the second voltage signal 2 The voltage of the first voltage signal is due to the presence of the voltage dividing resistor R1, at this time U 1 =5v. The voltage at U2 is passed through R6, subtracter and R on Acting on the gate, U, of SiCNOSFET 1 The voltage at the node P charges the capacitor C through the resistor R5, and the voltage V at the node P p Approximately 0, as shown in FIG. 5, when the differential circuitPart is equivalent to a voltage follower, and the input-output voltage is equal to the input voltage U 2 The gate voltage U of the SiC MOSFET at this stage g ＝U 2 ＝20V。
First half of the current rising stage (t 1 -t 2 ): the voltage state of the second voltage signal is kept unchanged, U 2 The differential block is still equivalent to a follower circuit, with an output voltage equal to 20V. The voltage of the first voltage signal is divided by the voltage dividing resistors R1 and R2, U 1 =5v, and then through an R-C delay circuit composed of a resistor R3 and a capacitor C, the voltage charges the capacitor C, so that the voltage signal is not transmitted to the differential module at the first time, but is delayed by a certain time, i.e. V shown in fig. 5 N Is delayed until it becomes 5V after t2, and the current is in the first half of the rising phase, the gate voltage U g Still at large voltage, V shown in FIG. 5 g Namely the gate voltage U g 20V in the period of t1-t2, current I D Rise speed dI of (d) D The/dt is faster and the SiC MOSFET does not reach a fully on state.
Second half of the current rising stage (t 2 -t 3 ): after the voltage of the first voltage signal is delayed by a preset time T, the voltage is continuously transmitted to the next stage and acts on the differential module, at the moment, the voltage of the positive input end of the subtracter is 20V, the voltage of the negative input end is 5V, and the voltage of the output ends of the voltage signals after the two voltage signals are modulated by the differential circuit is 15V. Gate voltage U of SiC MOSFET g The voltage relative to the first half of turn on is reduced, as shown in FIG. 5V g After t2, it drops to 15V, at which point the current I D Rise speed dI of (d) D Reduced/dt, falling back after reaching the maximum current value, maintaining a stable current value after t3, according to the formulaIt can be known the current overshoot I at the time of conduction rr And the inhibition is reduced, the system reliability is effectively improved, and the conduction loss is reduced.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (8)
1. A gate drive circuit for a silicon carbide device, comprising:
the device comprises a driving module, a voltage dividing module, an integrating module and a differential module;
the driving module is connected with the voltage dividing module;
the voltage division module is connected with the integration module and the difference module;
the differential module is connected with the grid electrodes of the integrating module, the voltage dividing module and the silicon carbide device;
the driving module generates an original driving signal according to the pulse width modulation signal, and sends the original driving signal to the voltage dividing module, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;
the voltage division module performs voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, the first voltage signal is sent to the integration module, the second voltage signal is sent to the difference module, and the second voltage signal is identical to the original driving signal;
the integration module delays the first voltage signal for a preset time, wherein the preset time is in a drain current rising stage of the silicon carbide device;
the difference module performs difference operation on the first voltage signal and the second voltage signal after delay processing to obtain an output signal, so that the output signal is the second voltage signal before preset time, and the voltage value of the output signal is smaller than the voltage value of the second voltage signal after preset time;
the voltage dividing module includes:
the first voltage dividing unit and the second voltage dividing unit;
the first end of the second voltage division unit is connected with the driving module and the differential module;
the first end of the first voltage division unit is connected with the second end of the second voltage division unit and the integration module, and the second end of the first voltage division unit is grounded.
2. The gate drive circuit of claim 1, wherein the integration module comprises:
an integrating resistor unit and an integrating capacitor unit;
the first end of the integrating resistor unit is connected with the first end of the first voltage dividing unit and the second end of the second voltage dividing unit;
the second end of the integrating resistor unit is connected with the first end of the integrating capacitor unit and the differential module, and the second end of the integrating capacitor unit is grounded.
3. The gate drive circuit of claim 2, wherein the differential module comprises:
the first resistor unit, the second resistor unit, the third resistor unit, the fourth resistor unit and the subtracter;
the first end of the first resistor unit is connected with the second end of the integrating resistor unit and the first end of the integrating capacitor unit, and the second end of the first resistor unit is connected with the first end of the second resistor unit and the positive input end of the subtracter;
the second end of the second resistance unit is connected with the output end of the subtracter;
the first end of the third resistor unit is connected with the first end of the second voltage division unit, and the second end of the third resistor unit is connected with the first end of the fourth resistor unit and the negative input end of the subtracter;
the second end of the fourth resistor unit is grounded.
4. The gate driving circuit according to claim 1, wherein,
the first voltage dividing unit and the second voltage dividing unit are respectively a first voltage dividing resistor and a second voltage dividing resistor;
the resistance value of the first voltage dividing resistor is R1, the resistance value of the second voltage dividing resistor is R2, the voltage value of the first voltage signal is U1, the voltage value of the second voltage signal is U2, and the resistance relationship between the first voltage dividing resistor and the second voltage dividing resistor is:
U1/U2＝R1/(R1+R2)。
5. the gate driving circuit according to claim 2, wherein,
the integrating resistor unit is an integrating resistor, and the integrating capacitor unit is an integrating capacitor;
the resistance value of the integrating resistor is R3, the capacitance value of the integrating capacitor is C, and the value of the preset time is T;
the relation between the resistance value of the integrating resistor and the capacitance value of the integrating capacitor is as follows:
T＝R3*C。
6. the gate driving circuit according to claim 3, wherein,
the resistance value of the first resistance unit is R4, the resistance value of the second resistance unit is R5, the resistance value of the third resistance unit is R6, and the resistance value of the fourth resistance unit is R7;
the resistance relationships of the first resistance unit, the second resistance unit, the third resistance unit and the fourth resistance unit are as follows:
R5/R4＝R7/R6＝1。
7. a gate drive circuit as claimed in claim 3, further comprising:
a positive driving single-phase conducting diode, a negative driving single-phase conducting diode, a positive driving resistor and a negative driving resistor;
the positive electrode of the positive driving single-phase conduction diode is connected with the driving module, and the negative electrode of the positive driving single-phase conduction diode is connected with the first end of the second voltage division unit;
the first end of the positive driving resistor is connected with the output end of the subtracter, and the second end of the positive driving resistor is connected with the grid electrode of the silicon carbide device;
the first end of the negative driving resistor is connected with the grid electrode of the silicon carbide device, the second end of the negative driving resistor is connected with the positive electrode of the negative driving single-phase conduction diode, and the negative electrode of the negative driving single-phase conduction diode is connected with the driving module.
8. A driving method of a silicon carbide device, characterized by being applied to the gate driving circuit of the silicon carbide device according to any one of claims 1 to 7, comprising:
the driving module receives the pulse width modulation signal and generates an original driving signal, wherein the voltage value of the original driving signal is the positive driving voltage value of the silicon carbide device;
the voltage division module carries out voltage division processing on the original driving signal to obtain a first voltage signal and a second voltage signal, wherein the second voltage signal is identical to the original driving signal;
the integration module delays the first voltage signal for a preset time, wherein the preset time is in the rising stage of the drain current of the silicon carbide device;
before a preset time, the output signal of the differential module is a second voltage signal;
after the preset time, the difference module performs difference operation on the first voltage signal and the second voltage signal after delay processing to obtain an output signal, wherein the voltage value of the output signal is smaller than that of the second voltage signal.
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| CN101421910A (en) * | 2006-04-06 | 2009-04-29 | 三菱电机株式会社 | The drive circuit of semiconductor element |
| JP2014230410A (en) * | 2013-05-23 | 2014-12-08 | 国立大学法人九州工業大学 | Gate control device of semiconductor element for electric power |
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