CN111627950A - Display panel, manufacturing method thereof and display device - Google Patents

Abstract

The present invention relates to the field of display technology, and in particular, to a display panel, a manufacturing method thereof, and a display device, wherein the display panel includes a first substrate, a second substrate and a conductive layer assembly, the first substrate and the second substrate are parallel and spaced apart, and two Both are transparent, and the conductive layer assembly includes a first part covering one side of the first substrate close to the second substrate, a second part covering one side of the second substrate close to the first substrate, and a third part connecting the first part and the second part A thin film transistor component is arranged on a side of the first part away from the first substrate, a pixel component is arranged on a side of the second part away from the second substrate, and an encapsulation glue is filled between the first part and the second part. The display panel of the present invention has simple structure, high stability, simple wiring, low cost, and is convenient for realizing high-density pixel arrangement.

Description

A display panel, its manufacturing method, and display device

technical field

The present invention relates to the field of display technology, and in particular, to a display panel, a method for manufacturing the display panel, and a display device including the display panel.

Background technique

Transparent display technology is becoming more and more common in daily life, such as outdoor advertising machines. Transparent display devices have high visibility and can present more colorful image effects, and because transparent display devices use transparent materials such as glass, their heat dissipation effect is also much lower than that of conventional display devices, effectively reducing energy consumption.

At present, the thin film transistor and the chip of the transparent display device are arranged on the same glass substrate. When the chip is printed and bonded, it is easy to press the thin film transistor, which leads to disconnection and short circuit of the thin film transistor, which reduces the yield of the product. The chip and the chip are arranged on the same glass substrate, and high-density chip arrangement cannot be realized. The number of chips is small, and the display brightness of the transparent display device is low. manufacturing cost.

SUMMARY OF THE INVENTION

Embodiments of the present invention provide a display panel, a method for manufacturing the same, and a display device to solve the above-mentioned technical problems.

In a first aspect, a display panel is provided, comprising a first substrate, a second substrate and a conductive layer assembly, the first substrate and the second substrate are parallel and spaced apart, and both are transparent, and the conductive layer assembly includes a cover A first part of a side surface of the first substrate close to the second substrate, a second part covering a side surface of the second substrate close to the first substrate, and a connection between the first part and the second part In the third part, a thin film transistor component is provided on a side of the first part away from the first substrate, a pixel component is provided on a side of the second part away from the second substrate, and the first part is connected to the first part. An encapsulant is filled between the two parts.

By arranging the thin film transistor components and the pixel components on different substrates, the extrusion of the thin film transistor components can be avoided during the printing process, that is, the problem of short circuit of the thin film transistor components caused by pressure is not considered, and the printing effect and product yield are improved. And the separate arrangement can simplify the arrangement of the thin film transistor components and the pixel components, which is convenient for realizing the requirement of high-density transparent display. In addition, the same conductive layer component is used for wiring and realizing electrical conduction, which effectively simplifies the circuit layout and reduces the manufacturing cost. ; By arranging two layers of substrates, the thin film transistor components and the pixel components can be protected, and the reliability of the display panel can be improved.

In a possible implementation manner of the present invention, the first substrate and the second substrate have the same size, and the encapsulant does not protrude from the peripheries of the first substrate and the second substrate.

In a possible implementation manner of the present invention, the conductive layer assembly includes a first passivation layer, an insulating layer, a second passivation layer and a conductive layer sequentially arranged along the thickness direction of the display panel, and the conductive layer is transparent conductive film.

In a possible embodiment of the present invention, the conductive layer is an ITO thin film layer or a nanotransistor thin film layer.

In a possible embodiment of the present invention, both the first passivation layer and the second passivation layer are flexible passivation layers.

In a possible embodiment of the present invention, the pixel assembly includes a plurality of pixel units, each of the pixel units includes a plurality of sub-pixels, the sub-pixels are flip chips, and the second substrate faces away from the pixels One side of the component is the display side.

In a possible embodiment of the present invention, the pixel assembly includes a plurality of pixel units, each of the pixel units includes a plurality of sub-pixels, and the thin film transistor assembly includes a plurality of thin film transistors, and the thin film transistors are at least partially positive to the area between two of the sub-pixels.

In a possible implementation manner of the present invention, the encapsulating adhesive is a light-curing adhesive.

In a possible embodiment of the present invention, the encapsulation glue is UV glue.

In a possible implementation manner of the present invention, the thickness of the display panel is 1.2 mm˜2.6 mm.

In a second aspect, a method for manufacturing a display panel is provided, comprising the following steps:

Step S100, providing a transparent first substrate and a second substrate, so that the first substrate and the second substrate are side by side and spaced apart;

Step S200, a conductive layer component is arranged above the first substrate and the second substrate, and thin film transistor components and pixels are arranged on the conductive layer component at positions corresponding to the first substrate and the second substrate, respectively components;

Step S300, turning the second substrate 180 degrees, so that the second substrate is spaced right above the first substrate;

Step S400, injecting encapsulation glue between the first substrate and the second substrate for encapsulation.

In a possible implementation of the present invention, a step S210 is further provided between the step S200 and the step S300, and the first substrate is annularly coated with the encapsulant along the circumference thereof to form a ring on the first substrate. A support wall is formed on the first substrate, and a glue injection port is left on the support wall.

In a possible implementation manner of the present invention, the step S400 is specifically as follows: first, the area between the first substrate and the second substrate is evacuated through the glue injection port, and then through the glue injection The encapsulant is injected into the area between the first substrate and the second substrate.

In a third aspect, a display device is provided, including the display panel.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or related technologies, the following briefly introduces the accompanying drawings required for the description of the embodiments or related technologies. Obviously, the accompanying drawings in the following description are only the For the simplified schematic diagrams of some embodiments of the invention or related technologies, for those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative efforts.

FIG. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of a state of disposing a first passivation layer on a first substrate and a second substrate according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of the state of the conductive layer component after forming and the arrangement of the thin film transistor component according to the embodiment of the present invention.

FIG. 4 is a schematic diagram of a state after arrangement of pixel components according to an embodiment of the present invention.

FIG. 5 is a schematic diagram of a state in which the second substrate is turned over relative to the first substrate according to an embodiment of the present invention.

FIG. 6 is a schematic diagram of a state after the second substrate is turned 180 degrees relative to the first substrate according to an embodiment of the present invention.

FIG. 7 is a schematic front view of a display panel according to an embodiment of the present invention.

FIG. 8 is a schematic cross-sectional view of a sub-pixel according to an embodiment of the present invention.

FIG. 9 is a schematic cross-sectional view of a conventional flip chip.

In the picture:

1. The first substrate; 2. The second substrate; 3. The conductive layer assembly; 31, the first part; 32, the second part; 33, the third part; 34, the first passivation layer; 35, the insulating layer; 36, second passivation layer; 37, conductive layer; 4, thin film transistor; 41, source electrode; 42, drain electrode; 43, gate electrode; 44, active layer; 45, ohmic contact layer; 5, sub-pixel; 51, Substrate layer; 52, buffer layer; 53, DBR reflection layer; 54, n-type semiconductor layer; 55, quantum well light-emitting layer; 56, p-type semiconductor layer; 57, p-type contact layer; 58, passivation layer; 59, P electrode; 510, N electrode; 6, encapsulant.

Detailed ways

The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.

In the description of the embodiments of the present invention, unless otherwise expressly specified and limited, the terms "connected", "connected" and "fixed" should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection, or It can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal communication between the two elements or the interaction relationship between the two elements. Those of ordinary skill in the art can understand the specific meanings of the above terms in the embodiments of the present invention in specific situations.

In the embodiments of the present invention, unless otherwise expressly specified and limited, the first feature "on" or "under" the second feature may include the first and second features in direct contact, or may include the first and second features The two features are not in direct contact but through another feature between them. Also, the first feature being "above", "over" and "above" the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is level higher than the second feature. The first feature is "below", "below" and "below" the second feature includes the first feature being directly below and diagonally below the second feature, or simply means that the first feature has a lower level than the second feature.

FIG. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention. As shown in FIG. 1 , the display panel of the embodiment of the present invention includes a first substrate 1, a second substrate 2 and a conductive layer assembly 3. The first substrate 1 and the second substrate 2 are parallel and spaced apart, and both are transparent. The conductive layer assembly 3 includes a first part 31 covering one side of the first substrate 1 close to the second substrate 2, a second part 32 covering a side of the second substrate 2 close to the first substrate 1, and a first part 31 connecting the first part 31 and the second part 32. Three parts 33 , a thin film transistor component is provided on the side of the first part 31 away from the first substrate 1 , a pixel component is provided on the side of the second part 32 away from the second substrate 2 , and the space between the first part 31 and the second part 32 is filled with Encapsulant 6. By arranging the thin film transistor components and the pixel components on different substrates, the extrusion of the thin film transistor components can be avoided during the printing process, that is, the problem of short circuit of the thin film transistor components caused by pressure is not considered, and the printing effect and product yield are improved. And the separate arrangement can simplify the arrangement of the thin film transistor components and the pixel components, which is convenient for realizing the requirement of high-density transparent display. In addition, the same conductive layer component 3 is used for wiring and realizing electrical conduction, which effectively simplifies the circuit layout and reduces the manufacturing time. Cost; by setting two-layer substrates, the thin film transistor components and the pixel components can be protected, and the reliability of the display panel can be improved.

In one embodiment, the size of the first substrate 1 and the second substrate 2 are the same, and the encapsulant 6 does not protrude from the peripheries of the first substrate 1 and the second substrate 2 . By setting the size of the two substrates to be the same, it is ensured that all pixel components are located between the two substrates, and the protection effect is more comprehensive; Implementing more comprehensive protection for pixel components can also improve the overall appearance of the display panel.

Preferably, the encapsulant 6 is flush with the peripheries of the first substrate 1 and the second substrate 2 .

In this embodiment, the first substrate 1 and the second substrate 2 may be made of glass with high light transmittance. The light transmittance of glass is high, and the material properties determine that it is not easily deformed, so it will not squeeze the thin film transistor components and pixel components. Preferably, the first substrate 1 and the second substrate 2 are made of tempered glass. Of course, the first substrate 1 and the second substrate 2 are not limited to be made of glass, and other transparent materials, such as PI (polyimide) transparent plates, may also be used.

More preferably, the thickness of the first substrate 1 is equal to the thickness of the second substrate 2 . The thicknesses of the two substrates are the same, which can ensure that the upper surfaces of the two substrates can be located on the same plane, so that the thickness of the formed conductive layer assembly 3 can be uniform. Specifically, the thickness of the first substrate 1 and the second substrate 2 is 0.5 mm to 1.2 mm, and the thickness of the assembled display panel is 1.2 mm to 2.6 mm.

Of course, it is not limited to set the thicknesses of the first substrate 1 and the second substrate 2 to be the same, and the thickness of the second substrate 2 can also be set to be greater than the thickness of the first substrate 1, or the thickness of the first substrate 1 is greater than that of the second substrate 1. Thickness of substrate 2. In addition, the materials of the two substrates may be the same or different.

In one embodiment, the conductive layer component 3 includes a first passivation layer 34 , an insulating layer 35 , a second passivation layer 36 and a conductive layer 37 that are sequentially arranged along the thickness direction of the first substrate 1 , and the conductive layer 37 is a transparent conductive film . By setting the conductive layer 37 as a transparent conductive film, it can not only be used as a connecting line to achieve electrical conduction between the thin film transistor component and the pixel component, but also improve the transparency of the entire display panel.

Optionally, the conductive layer 37 is an ITO thin film layer or a nanotransistor thin film layer.

ITO thin film is an n-type semiconductor material with high electrical conductivity, high visible light transmittance, high mechanical hardness and good chemical stability. It is the most commonly used thin film material for transparent electrodes of liquid crystal displays (LCD), plasma displays (PDP), electroluminescent displays (EL/OLED), touch screens (TouchPanel), solar cells and other electronic instruments.

Nanocrystals (NCs) refer to crystalline materials with a grain size of 1 to 100 nm. Because the grains are extremely small, the proportion of the crystal surface is correspondingly large, which becomes an important part of its structure, making the nanocrystals exhibit Different properties from ordinary single crystal and polycrystalline. Semiconductor nanocrystals are a special class of nanocrystal materials whose particle size generally does not exceed the Bohr radius of their excitons, so they have quantum confinement effects and other unique properties.

Preferably, the conductive layer 37 is a CdSe nanocrystalline thin film, a HgTe nanocrystalline thin film, a PbSe nanocrystalline thin film, a PbTe nanocrystalline thin film, a Ge nanocrystalline thin film, a Si nanocrystalline thin film, and the like.

Both the first passivation layer 34 and the second passivation layer 36 are flexible passivation layers. By setting the passivation layer as a flexible structure, it can be ensured that the passivation layer will not be broken when the second substrate 2 is turned over relative to the first substrate 1 , and the flexible passivation layer can also protect the conductive layer 37 to a certain extent. , to prevent the lines of the conductive layer 37 from being broken.

Specifically, the first passivation layer 34 and the second passivation layer 36 are thin film layers formed by depositing SiNx.

In one embodiment, the thin film transistor component includes a plurality of thin film transistors 4, and the plurality of thin film transistors 4 are arranged on the conductive layer component 3 at intervals, and the arrangement of the plurality of thin film transistors 4 may be orderly or disorderly, In this embodiment, the plurality of thin film transistors 4 are arranged in an orderly manner. Specifically, the plurality of thin film transistors 4 are arranged in an array on the conductive layer component 3 .

The thin film transistor 4 includes a source electrode 41, a drain electrode 42 and a gate electrode 43, the source electrode 41 and the drain electrode 42 are arranged between the second passivation layer 36 and the insulating layer 35, and the gate electrode 43 is arranged between the insulating layer 35 and the first passivation layer 35. Between the passivation layers 34, corresponding to the position of the active layer 44, the source electrode 41 and the drain electrode 42 are connected through the active layer 44, the conductive layer 37 is connected to the drain electrode 42 through the second passivation layer 36, and the insulating layer 35 is the gate The electrode insulating layer 35 and the ohmic contact layer 45 are provided above the active layer 44 , and the ohmic contact layer 45 connects the source electrode 41 and the drain electrode 42 . The active layer 44 is made of semiconductor material, which is the carrier transport layer of the thin film transistor 4 (TFT), and is the most critical component of the entire thin film transistor 4 .

The TFT driving circuit may be a circuit for driving an active matrix (AM: active matrix), or a circuit for driving a passive matrix (PM: passive matrix).

In one embodiment, the pixel assembly includes a plurality of pixel units, each pixel unit includes a plurality of sub-pixels 5, the sub-pixels 5 are flip chips, and a side of the second substrate 2 facing away from the pixel assembly is a display side. By setting the sub-pixel 5 as a flip chip, the light extraction rate of the sub-pixel 5 can be increased.

As shown in FIG. 7 , each sub-pixel 5 emits light from the side of the display side of the second substrate 2 , that is, the front of the display panel emits light, which can effectively improve the light extraction rate, thereby improving the front brightness of the display panel.

As shown in FIG. 8 , the sub-pixel 5 includes a substrate layer 51 on which a buffer layer 52 , a DBR (Distributed Bragg Reflection) reflection layer 53 , an n-type semiconductor layer 54 , a quantum well light-emitting layer 55 , and a p-type semiconductor layer are arranged in sequence. Layer 56 , p-type contact layer 57 and passivation layer 58 , p-electrode 59 is in contact with p-type semiconductor layer 56 , and N-electrode 510 is in contact with n-type semiconductor layer 54 . In this embodiment, the DBR reflective layer 53 is disposed above the quantum well light-emitting layer 55, so that light can be emitted from the display side of the second substrate 2 on which the sub-pixels 5 are fixed, thereby realizing light emission from the front of the display panel.

A conventional flip-chip is shown in FIG. 9, the DBR reflective layer 53 is arranged below the quantum well light-emitting layer 55, so the conventional flip-chip emits light toward the back of the display panel, and then the light is reflected from the display panel. The front of the display panel emits light, so that the light path is increased, the energy of the light is consumed, and the brightness of the front of the display panel is reduced.

Specifically, a plurality of pixel unit arrays are arranged on the second portion 32 .

In addition, the thin film transistor 4 at least partially faces the area between the two sub-pixels 5 . The area between the sub-pixels 5 accommodates some of the thin film transistors 4 , which can reduce the distance between the first substrate 1 and the second substrate 2 , thereby reducing the overall thickness of the display panel, which facilitates the realization of a thin display panel.

In one embodiment, the encapsulating adhesive 6 is a light curing adhesive. By setting the encapsulation adhesive 6 as a photocurable adhesive, the photocurable adhesive will not affect the thin film transistor 4 and the sub-pixels 5 during the curing process. Preferably, the encapsulating glue 6 is UV glue. More preferably, the encapsulant 6 is epoxy acrylate.

The sub-pixels 5 are LED chips, and each pixel unit includes three LED chips with different light-emitting colors. For example, the pixel unit includes a red light-emitting chip that emits red light, a green light-emitting chip that emits green light, and a blue light-emitting chip that emits blue light. Or use the same color or at least two chips of the same color with different phosphors to emit three different luminescent colors.

The LED chip can be fixed on the conductive layer 37 by using an adhesive material. The bonding material is flux or solder paste or silver paste or anisotropic conductive glue.

The film layer formed of the anisotropic conductive paste is an anisotropic conductive film provided to electrically connect the LED chip and the thin film transistor 4 to each other. The anisotropic conductive film includes an insulating adhesive organic material, and the conductive particles for electrical connection are uniformly dispersed therein. In addition, the anisotropic conductive film has the property of having conductivity in the thickness direction but insulating properties in the plane direction. Moreover, since it has adhesiveness, the LED chip and the thin film transistor 4 which need to be electrically connected can be joined. In particular, it may be advantageous to join electrodes such as ITO, which are difficult to solder at high temperatures.

An embodiment of the present invention also provides a method for manufacturing a display panel, which is used to manufacture the display panel according to any of the above embodiments. As shown in FIGS. 1 to 6 , the method includes the following steps:

Step S100, providing a transparent first substrate 1 and a second substrate 2, so that the first substrate 1 and the second substrate 2 are side by side and spaced apart;

In step S200, a conductive layer component 3 is arranged above the first substrate 1 and the second substrate 2, and the thin film transistor component and the pixel component are arranged on the conductive layer component 3 at positions corresponding to the first substrate 1 and the second substrate 2, respectively;

In step S300, the second substrate 2 is turned over by 180 degrees, so that the second substrate 2 is spaced right above the first substrate 1;

Step S400 , injecting encapsulant 6 between the first substrate 1 and the second substrate 2 for encapsulation.

By arranging the first substrate 1 and the second substrate 2 side by side, it is convenient to arrange the conductive layer component 3 and the thin film transistor component and the pixel component on the two substrates, and the pixel component can be printed and fixed separately without affecting the thin film transistor component. The thin film transistor component will not be squeezed, and the circuit damage and short circuit on the thin film transistor component are completely eliminated; by turning the second substrate 2 180 degrees after arranging the thin film transistor component and the pixel component, the second substrate 2 can be located in the first Just above the substrate 1, and the thin film transistor components and the pixel components are located on the inner side of the two substrates, the substrate can effectively protect the thin film transistor components and the pixel components, and reduce the difficulty of injection and packaging, and also reduce the entire display. The panel shows the flatness requirements on the sides.

In this embodiment, a step S210 is further set between steps S200 and S300, and a ring of encapsulant 6 is annularly coated on the first substrate 1 along its circumference to form a supporting wall on the first substrate 1 (as shown in the figure). Not shown), leave a glue injection port on the support wall (not shown in the figure). By packaging the edge portion first, a supporting wall can be formed to support the second substrate 2 , thereby effectively preventing the thin film transistor component and the pixel component from colliding with each other during the packaging process.

Specifically, the thickness of the supporting surrounding wall is 100 μm˜200 μm. This height of the supporting wall can effectively prevent the TFT and pixel components from colliding with each other during the packaging process.

Further, after the encapsulation glue 6 is annularly coated on the periphery of the first substrate 1, the second substrate 2 is turned over to be located directly above the first substrate 1, and the position of the second substrate 2 is adjusted, and then the packaging at this position is carried out. Adhesive 6 is fully cured. Preferably, the encapsulant 6 is UV light curing adhesive, so the encapsulant 6 is cured by ultraviolet light irradiation, and the curing time is 10s˜50s.

Step S400 is specifically as follows: first, the area between the first substrate 1 and the second substrate 2 is evacuated through the glue injection port, and then the encapsulant is injected into the area between the first substrate 1 and the second substrate 2 through the glue injection port 6. Vacuuming is performed first after edge encapsulation, which can effectively prevent defects such as bubbles from being generated in the middle area of the two substrates during glue injection.

Specifically, the size of the glue injection port is larger than that of the glue injection nozzle of the glue injection equipment, so as to facilitate the escape of air bubbles and the like during the glue injection process. Preferably, the size of the glue injection port is 1 mm to 2 mm larger than the size of the glue injection nozzle of the glue injection equipment.

After the encapsulant 6 fills the entire area between the first substrate 1 and the second substrate 2, thermal curing is performed to effectively protect the display panel.

The present invention also provides a display device, including the display panel of any of the above embodiments, and the specific structure of the display panel will not be repeated here.

In the description of this specification, reference to the description of the terms "an embodiment", "example", etc. means that a particular feature, structure, material or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention middle. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

The technical principle of the present invention has been described above with reference to the specific embodiments. These descriptions are only for explaining the principle of the present invention, and should not be construed as limiting the protection scope of the present invention in any way. Based on the explanations herein, those skilled in the art can think of other specific embodiments of the present invention without creative efforts, and these methods will all fall within the protection scope of the present invention.

Claims (14)

1. A display panel, characterized by comprising a first substrate, a second substrate and a conductive layer assembly, wherein the first substrate and the second substrate are parallel and spaced apart, and both are transparent, and the conductive layer assembly includes Covering a first portion of a side surface of the first substrate close to the second substrate, covering a second portion of a side surface of the second substrate close to the first substrate, and connecting the first portion and the second portion The third part of the first part is provided with a thin film transistor component on a side away from the first substrate, a pixel component is provided on a side of the second part away from the second substrate, and the first part and the The second part is filled with encapsulant. 2 . The display panel according to claim 1 , wherein the first substrate and the second substrate have the same size, and the encapsulant does not protrude from the first substrate and the second substrate. 3 . Zhou Department. 3 . The display panel according to claim 1 , wherein the conductive layer component comprises a first passivation layer, an insulating layer, a second passivation layer and a conductive layer which are sequentially arranged along the thickness direction of the display panel. The conductive layer is a transparent conductive film. 4 . The display panel according to claim 3 , wherein the conductive layer is an ITO thin film layer or a nano-transistor thin film layer. 5 . 5 . The display panel of claim 3 , wherein the first passivation layer and the second passivation layer are both flexible passivation layers. 6 . 6 . The display panel of claim 1 , wherein the pixel component comprises a plurality of pixel units, each of the pixel units comprises a plurality of sub-pixels, the sub-pixels are flip chips, and the first One side of the two substrates facing away from the pixel element is the display side. 7 . The display panel according to claim 1 , wherein the pixel component comprises a plurality of pixel units, each of the pixel units comprises a plurality of sub-pixels, the thin film transistor component comprises a plurality of thin film transistors, and the The thin film transistor is at least partially facing the area between the two sub-pixels. 8 . The display panel of claim 1 , wherein the encapsulating adhesive is a light-curing adhesive. 9 . 9 . The display panel of claim 8 , wherein the encapsulating glue is UV glue. 10 . 10 . The display panel according to claim 1 , wherein the thickness of the display panel is 1.2 mm˜2.6 mm. 11 . 11. A method for manufacturing a display panel, characterized in that: for manufacturing the display panel as claimed in any one of claims 1 to 10, comprising the steps of: Step S100, providing a transparent first substrate and a second substrate, so that the first substrate and the second substrate are side by side and spaced apart; Step S200, a conductive layer component is arranged above the first substrate and the second substrate, and thin film transistor components and pixels are arranged on the conductive layer component at positions corresponding to the first substrate and the second substrate, respectively components; Step S300, turning the second substrate 180 degrees, so that the second substrate is spaced right above the first substrate; Step S400 , injecting encapsulant between the first substrate and the second substrate for encapsulation. 12 . The manufacturing method of the display panel according to claim 11 , wherein a step S210 is further provided between the step S200 and the step S300 , and the first substrate is coated with a circular coating along its circumference. 13 . The encapsulant is circled to form a support wall on the first substrate, and a glue injection port is left on the support wall. 13 . The manufacturing method of the display panel according to claim 12 , wherein the step S400 is specifically as follows: firstly, the area between the first substrate and the second substrate is pumped through the glue injection port. 14 . vacuum, and then inject the encapsulant into the area between the first substrate and the second substrate through the injection port. 14. A display device, comprising the display panel according to any one of claims 1 to 10.

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