CN111584518B - Array substrate, manufacturing method thereof and display panel - Google Patents

Abstract

An array substrate and a manufacturing method thereof, and a display panel, the array substrate includes a side binding structure connected to a flexible circuit board, the flexible circuit board includes a driving chip, and the side binding structure is The driving chip is electrically connected through the flexible circuit board. The side bonding structure includes a first region and a second region, the first region includes a substrate, a multi-layer non-metal film layer and a multi-layer metal film layer, and the second region includes the substrate and the multi-layer metal film layer. Multi-layer metal film layers.

Description

Array substrate and manufacturing method thereof, display panel

technical field

The present invention relates to the field of display technology, in particular to an array substrate and a manufacturing method thereof, and a display panel.

Background technique

With the continuous development of liquid crystal display (LCD) technology, consumers have higher and higher requirements for the screen ratio of thin and light electronic products, and full screen has become the mainstream of mobile terminal development. Therefore, various micro-component technologies have been developed, such as: chip on glass (COG) technology and chip on film (COF) technology. Specifically, the COG technology is to bind the driver wafer on the glass bottom plate of the thin film transistor array substrate (TFT array substrate), while the COF technology is to bind the driver wafer to the flexible board, and then the flexible plate and the TFT array substrate are bound. The glass substrate of the TFT array substrate is connected. However, neither COG technology nor COF technology can meet the needs of full screen, which prompted the birth of side binding technology.

The traditional side bonding technology is limited by the metal area on the side of the thin film transistor array substrate (usually only the gate layer is connected to the flexible plate), which makes the number of conductive ions less and the conductivity of the device is poor. .

SUMMARY OF THE INVENTION

The purpose of the present application is to provide an array substrate and a manufacturing method thereof, and a display panel, which optimizes the side film layer of a thin film transistor array substrate (TFT array substrate) through a mask, which greatly improves the binding area. conduction area.

The present application provides an array substrate, which includes a side binding structure connected to a flexible circuit board, the flexible circuit board includes a driving chip, and the side binding structure and the driving chip pass through the flexible circuit board electrical connection;

Wherein, the side bonding structure includes a first region and a second region, the first region includes a substrate, a multi-layer non-metal film layer and a multi-layer metal film layer, and the second region includes the substrate and the multi-layer metal film layer. the multi-layer metal film layer.

According to an embodiment of the present invention, the multi-layer metal film layer in the first region and the multi-layer metal film layer in the second region are continuous structures.

According to an embodiment of the present invention, the first region includes from bottom to top: the substrate, the composite layer, the gate insulating layer, the gate layer, the interlayer dielectric layer, the first metal layer, the flat layer, the first An indium tin oxide layer, an interlayer insulating layer, a second metal layer, a passivation layer and a second indium tin oxide layer.

According to an embodiment of the present invention, the second region includes from bottom to top: the substrate, a gate layer, a first metal layer, a first indium tin oxide layer, a second metal layer, and a second indium tin oxide layer .

According to an embodiment of the present invention, the side binding structure is connected to the flexible circuit board by welding.

Further, the present application also provides a method for fabricating an array substrate, comprising the following steps:

provide a substrate;

depositing a composite layer on the substrate, depositing a gate insulating layer on the composite layer;

etching the composite layer and the gate insulating layer in the second region using a mask;

depositing a gate layer over the gate insulating layer in the first region and over the substrate in the second region;

depositing an interlayer dielectric layer on the gate layer, and etching the interlayer dielectric layer in the second region using a mask;

depositing a first metal layer over the interlayer dielectric layer in the first region and over the gate layer in the second region;

depositing a flat layer on the first metal layer, and etching the flat layer in the second region using a mask;

depositing a first indium tin oxide layer over the planar layer in the first region and over the first metal layer in the second region;

depositing an interlayer insulating layer on the first indium tin oxide layer, and etching the interlayer insulating layer in the second region using a mask;

depositing a second metal layer over the interlayer insulating layer in the first region and over the first indium tin oxide layer in the second region;

depositing a passivation layer over the second metal layer, and etching the passivation layer in the second region using a mask; and

A second indium tin oxide layer is deposited over the passivation layer in the first region and over the second metal layer in the second region.

Further, the present application also provides a display panel, including an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate, the array substrate including a flexible circuit board connected The side binding structure, the flexible circuit board includes a driving chip, and the side binding structure and the driving chip are electrically connected through the flexible circuit board;

Wherein, the side bonding structure includes a first region and a second region, the first region includes a substrate, a multi-layer metal film layer and a multi-layer metal film layer, and the second region includes the substrate and the The multi-layer metal film layer.

According to an embodiment of the present invention, the multi-layer metal film layer in the first region and the multi-layer metal film layer in the second region are continuous structures.

According to an embodiment of the present invention, the first region includes from bottom to top: the substrate, the composite layer, the gate insulating layer, the gate layer, the interlayer dielectric layer, the first metal layer, the flat layer, the first An indium tin oxide layer, an interlayer insulating layer, a second metal layer, a passivation layer and a second indium tin oxide layer.

According to an embodiment of the present invention, the second region includes from bottom to top: the substrate, a gate layer, a first metal layer, a first indium tin oxide layer, a second metal layer, and a second indium tin oxide layer .

The present application provides an array substrate and a manufacturing method thereof, and a display panel. The side film layer of a thin film transistor array substrate (TFT array substrate) is optimized through a mask, which greatly improves the conduction of the bonding area. It solves the problem that the traditional side bonding technology is limited by the metal area on the side of the thin film transistor array substrate (TFT array substrate), so that the number of conductive ions is small and the conductivity of the device is poor.

Description of drawings

In order to more clearly illustrate the embodiments or technical solutions in the prior art, the following briefly introduces the accompanying drawings that are used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only for invention. In some embodiments, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.

In the attached drawings,

FIG. 1 is a schematic cross-sectional view of a side bonding structure of an array substrate according to an embodiment of the present application.

FIG. 2 is a flow chart of steps of a method for fabricating an array substrate provided by an embodiment of the present application.

FIG. 3 is a schematic perspective view of a display panel provided by an embodiment of the present application.

FIG. 4 is a side view of a display panel provided by an embodiment of the present application.

Detailed ways

In order to further illustrate the technical means adopted by the present invention and its effects, a detailed description is given below in conjunction with the preferred embodiments of the present invention and the accompanying drawings.

In the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present application and simplifying the description, It is not intended to indicate or imply that the device or element referred to must have a particular orientation, be constructed and operate in a particular orientation, and therefore should not be construed as limiting the application.

Referring to FIG. 1 , an embodiment of the present application provides an array substrate, which includes a side bonding structure 100 connected to a flexible circuit board, the flexible circuit board includes a driving chip, and the side bonding structure 100 is connected to a flexible circuit board. The driving chip is electrically connected through the flexible circuit board.

Referring to FIG. 1 , the side bonding structure 100 may include a first region and a second region, and the first region includes from bottom to top: the substrate 1000 , the composite layer 1001 , the gate insulating layer 1002 , and the gate layer 1003, interlayer dielectric layer 1004, first metal layer 1005, planarization layer 1006, first indium tin oxide layer 1007, interlayer insulating layer 1008, second metal layer 1009, passivation layer 1010 and second indium tin oxide layer Layer 1011. The second region includes from bottom to top: the substrate 1000 , a first metal layer 1005 , a first indium tin oxide layer 1007 , a second metal layer 1009 and a second indium tin oxide layer 1011 . In this embodiment, the first region includes the substrate 1000, the multi-layer metal film layers and the multi-layer non-metal film layers, and the second region only includes the substrate 1000 and the multi-layer metal film layers, Therefore, the upper surface of the side bonding structure 100 is a convex-concave structure, and the first region has more non-metallic film layers than the second region. Compared with the conventional side bonding structure, the side bonding structure 100 provided in this embodiment has multiple metal film layers. Therefore, the conduction area with the flexible circuit board with the driving chip is greatly increased, which overcomes the traditional side bonding structure. The side-bonding technology has fewer conductive ions and poor device conductivity, and significantly reduces the risk of product failure. On the other hand, the non-metal film layer can increase the stability of the multi-layer metal film layer, prevent it from peeling off or produce abnormality, and ensure the normal operation of the device.

It should be noted that, the first region and the second region defined in this embodiment may have irregular shapes.

In this embodiment, the array substrate may be a thin film transistor array substrate.

In this embodiment, the composite layer 1001 may include a silicon nitride (SIN) layer, a silicon oxide (SIO) layer, and a polysilicon (Poly-Si) layer.

In this embodiment, the first metal layer 1005 may be a source and drain layer.

In this embodiment, the material of the interlayer insulating layer 1008 may be SIN or SIO.

In this embodiment, the second metal layer 1009 may be a pixel electrode layer.

In this embodiment, since the multi-layer metal film layer in the first area and the multi-layer metal film layer in the second area are integrally formed, they have a continuous structure, which can ensure the The side binding structure 100 is electrically connected to the flexible circuit board, and enhances the stability of the device.

In this embodiment, the number of the first area and the second area may be multiple and alternately arranged, so that the surface of the side binding structure 100 forms an uneven structure. The number of the first region and the second region is limited, and those skilled in the art can determine that the number has reached the preset device performance according to the concept provided in this embodiment.

In this embodiment, since the conductive area between the side binding structure 100 and the flexible circuit board is increased, the binding structure 100 and the flexible circuit board can be directly electrically connected by welding, There is no need to use an intermediate to bond the two, which reduces the production cost of the product, simplifies the production process, and increases the reliability of the product.

Further, please refer to FIG. 2 , another embodiment of the present application further provides a method for fabricating an array substrate, including the following steps:

S1: Provide substrate;

S2: depositing a composite layer on the substrate, and depositing a gate insulating layer on the composite layer;

S3: etching the composite layer and the gate insulating layer in the second region using a mask;

S4: depositing a gate layer on the gate insulating layer in the first region and on the substrate in the second region;

S5: depositing an interlayer dielectric layer on the gate layer, and etching the interlayer dielectric layer in the second region using a mask;

S6: depositing a first metal layer on the interlayer dielectric layer in the first region and on the gate layer in the second region;

S7: deposit a flat layer on the first metal layer, and use a mask to etch the flat layer in the second region;

S8: depositing a first indium tin oxide layer on the flat layer in the first region and on the first metal layer in the second region;

S9: depositing an interlayer insulating layer on the first indium tin oxide layer, and etching the interlayer insulating layer in the second region using a mask;

S10: depositing a second metal layer on the interlayer insulating layer in the first region and on the first indium tin oxide layer in the second region;

S11: depositing a passivation layer on the second metal layer, and etching the passivation layer in the second region using a mask; and

S12: Deposit a second indium tin oxide layer on the passivation layer in the first region and on the metal layer in the second region.

It should be noted that, since the multi-layer metal film layer in the first area and the multi-layer metal film layer in the second area are integrally formed, they have a continuous structure, which can ensure the side surface. The binding structure is electrically connected to the flexible circuit board and enhances the stability of the device.

The manufacturing method of the array substrate provided in this embodiment is simple. By optimizing the film layer design of the bonding area of the array substrate, the traditional side bonding technology is limited by the metal area on the side of the TFT array substrate, so that the number of conductive ions is small. The problem of poor conductivity of the device.

Further, please refer to FIG. 3 and FIG. 4 , another embodiment of the present application further provides a display panel 1 , which includes an array substrate 10 , a color filter substrate 30 , and a display panel 10 disposed on the array substrate 10 and the color filter substrate 30 . Between the liquid crystal layer 20, the array substrate 10 includes a side binding structure 100 connected to a flexible circuit board 50, the flexible circuit board 50 includes a driving chip 40, and the side binding structure 100 is connected to the flexible circuit board 50. The driving chip 40 is electrically connected through the flexible printed circuit board 50 . For the specific structure of the side binding structure 100 , reference may be made to the foregoing embodiments, which will not be repeated here.

It should be noted that, please refer to FIG. 4 , since the conductive area between the side binding structure 100 and the flexible circuit board 50 is increased, the flexible circuit board 50 can be directly welded to the side binding structure 100 The side of the driving chip 40 and the array substrate 10 are electrically connected, and there is no need to bond the two through an intermediate, which reduces the production cost of the product, simplifies the production process, and increases the reliability of the product.

The present application provides an array substrate and a manufacturing method thereof, and a display panel. The side film layer of a thin film transistor array substrate (TFT array substrate) is optimized through a mask, which greatly improves the conduction of the bonding area. It solves the problem that the traditional side bonding technology is limited by the metal area on the side of the thin film transistor array substrate (TFT array substrate), so that the number of conductive ions is small and the conductivity of the device is poor.

The above are only preferred embodiments of the present invention, and do not limit the present invention in any form. Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Technical personnel, within the scope of the technical solution of the present invention, can make some changes or modifications to equivalent examples of equivalent changes by using the technical content disclosed above, provided that the content of the technical solution of the present invention is not deviated from, according to the present invention. Any simple modifications, equivalent changes and modifications made to the above embodiments still fall within the scope of the technical solutions of the present invention.

Claims (7)

1. An array substrate, characterized in that it comprises a side binding structure connected to a flexible circuit board, the flexible circuit board includes a driving chip, and the side binding structure and the driving chip pass through the flexible circuit board. The electrical connection of the circuit board; Wherein, the side bonding structure includes a first region and a second region, the first region includes a substrate, a multi-layer non-metal film layer and a multi-layer metal film layer, and the second region includes the substrate and the multi-layer metal film layer. The multi-layer metal film layer, the second region includes from bottom to top: the substrate, the gate layer, the first metal layer, the first indium tin oxide layer, the second metal layer and the second indium tin oxide layer . 2 . The array substrate according to claim 1 , wherein the multi-layer metal film layer in the first region and the multi-layer metal film layer in the second region have a continuous structure. 3 . 3 . The array substrate according to claim 1 , wherein the first region comprises from bottom to top: the substrate, the composite layer, the gate insulating layer, the gate layer, the interlayer dielectric layer, the first A metal layer, a flat layer, a first indium tin oxide layer, an interlayer insulating layer, a second metal layer, a passivation layer and a second indium tin oxide layer. 4 . The array substrate according to claim 1 , wherein the side binding structure and the flexible circuit board are connected by welding. 5 . 5. A display panel, characterized by comprising an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate, the array substrate comprising a flexible circuit board connected to a side binding structure, the flexible circuit board includes a driving chip, and the side binding structure and the driving chip are electrically connected through the flexible circuit board; Wherein, the side bonding structure includes a first area and a second area, the first area includes a substrate, a multi-layer metal film layer and a multi-layer metal film layer, and the second area includes the substrate and the The multi-layer metal film layer, the second region includes from bottom to top: the substrate, the gate layer, the first metal layer, the first indium tin oxide layer, the second metal layer and the second indium tin oxide layer. 6 . The display panel of claim 5 , wherein the multi-layer metal film layer in the first region and the multi-layer metal film layer in the second region are continuous structures. 7 . 7 . The display panel according to claim 5 , wherein the first region comprises from bottom to top: the substrate, the composite layer, the gate insulating layer, the gate layer, the interlayer dielectric layer, the first A metal layer, a flat layer, a first indium tin oxide layer, an interlayer insulating layer, a second metal layer, a passivation layer and a second indium tin oxide layer.

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