CN1115780C - Level Mobile Digital-to-Analog Converter - Google Patents

Abstract

The present invention relates to a level-shifted digital-to-analog converter, which includes a multiplexer, a step voltage (current) output circuit, a level voltage (current) output circuit, and a level-shifted buffer stage circuit. The present invention mainly utilizes the step voltage (current) output circuit and the level voltage (current) output circuit to simplify the complex circuit design of the traditional digital-to-analog converter, improves the traditional digital-to-analog converter which is not conducive to precision control due to the large number of components, and effectively reduces the cost.

Description

Level Mobile Digital-to-Analog Converter

field of invention

The invention relates to a level shifting digital-to-analog converter, in particular to a level shifting digital-to-analog converter which can improve the complex circuit of the traditional digital-to-analog converter.

Background technique

According to the traditional digital-to-analog converter, the pre-solved corresponding code is directly input into the voltage of the digital-to-analog converter to take out the line, and then the analog output signal is obtained by one-to-one correspondence; as shown in Figure 1, for The schematic diagram of the known digital-to-analog converter mainly uses R-2R resistance combination to achieve the effect of voltage division, among which 10 is a multiplexer I, which mainly converts the input value into a switch control code (digital signal) And output to the control switch, 12 is a buffer I, and as shown in Figure 2, it is a schematic diagram of another known digital-to-analog converter. Its function of device II is as described in above-mentioned multiplexer I (10), and 14 is a buffer II, as can be seen from Fig. 2, if want to obtain the analog output signal of 50 orders, at first must produce the corresponding sign indicating number of 50 groups, yet, this Multiple corresponding codes must achieve the output of analog signals through the combination of switches and resistors. In this way, the number of switches and resistor segments required for the line is very large. Take the resistor series voltage divider in Figure 2 as an example. If you want to convert 0 to 4.9V is divided into 50-level signals, and at least 50 switches and 49 resistors are required. In addition, for the circuit in Figure 1R-2R, since the component itself as a switch has current passing through it, the characteristics of the component will affect R. ~2R network accuracy. For example, when CMOS, PMOS, NMOS and other components are used as switches, the impedance characteristics of MOS will vary with changes in voltage and temperature, making the magnitude of the flowing current drift, so the output signal of the R~2R network will be distorted. , generally speaking, R~2R cannot achieve the accuracy of the resistance series voltage divider type; and if the same number of bits is used, the MOS area and resistance value required by the R~2R network are larger than the resistance series type To come big. Therefore, a conventional DAC must use a large number of components, a larger circuit area or a more complex circuit to achieve the required accuracy. This increases the cost, and the more components there are, the higher the complexity of the circuit, and of course there are more factors affecting the accuracy of the circuit, which are difficult to control.

Therefore, it can be seen from the above that the traditional digital-to-analog converter still has some inconveniences and defects in design and practical application. There are many problems such as the interference of environmental noise and the difficulty in controlling the accuracy, which need to be improved.

Contents of the invention

The main purpose of the present invention is to use the design of the step-by-step voltage (current) output circuit and level voltage (current) output circuit to generate the required voltage output value, so as to solve the problem that traditional digital-to-analog converters need to use multi-element design or complex circuits. The design of the circuit is easy to be affected by the environment, causing many factors such as noise and unfavorable accurate control, and causing a large burden on the production cost. Therefore, the circuit not only reduces the cost, but also greatly reduces the complexity of the circuit.

Another object of the present invention is to use a level shifting buffer stage circuit to process the voltage values output by the step voltage output circuit and the level voltage output circuit through the buffer stage circuit to obtain the desired output voltage signal.

Another object of the present invention is to use a conversion circuit to convert the current signal output by the step-by-step current output circuit and the level current output circuit into a voltage signal, and then process it through the level shifting buffer stage circuit to obtain the required output voltage signal.

One aspect of the present invention is mainly to divide the traditional step voltage output circuit into two parts: one is the step voltage output circuit, and the other is the level voltage output circuit, wherein the step voltage output circuit and level The voltage output circuit can be achieved in many ways; for example, if the circuit originally formed by 7bit R~2R can use 5bit R~2R step-by-step voltage output circuit, and use 2bit R~2R as level voltage output The circuit can reduce the complexity of the overall circuit through the combined design of the two circuits, and cooperate with the use of a level shifting buffer stage to obtain the required output voltage signal.

A digital-to-analog converter according to this aspect of the invention comprises:

—Multiplexer, which converts the original digital value into the digital code required by the digital-to-analog converter and outputs the signal of the multiple digital codes;

- The step-by-step voltage output circuit is electrically connected to the multiplexer, receives the signal of at least one digital code output by the multiplexer, and cooperates with the planned order S and the voltage difference of each order to output a voltage signal;

- Level voltage output circuit, which is electrically connected to the multiplexer, receives the signal of at least one digital code output by the multiplexer, and cooperates with the planned level number X and the voltage of each level number The difference is to output a voltage signal, where the level number depends on the output voltage range required by the user, and has the following relationship: Ve=ΔVn·X,

Among them, Ve represents the output voltage value of the level voltage output circuit, and ΔVn represents the fixed voltage difference planned for each level;

- a level shifting buffer stage circuit, which is electrically connected to the step voltage output circuit and the level voltage output circuit, and is used to output the sum of the step voltage output and the level voltage output according to the required analog voltage form, Wherein, the product of the order number of the step-by-step voltage output circuit and the level number of the level voltage output circuit is the same as the order number of the analog output voltage that the user wants to obtain.

Another aspect of the present invention mainly uses the same principle as the above aspect to change the above-mentioned step voltage output circuit and level voltage output circuit into a step current output circuit and level current output circuit, and convert the current through a conversion circuit The output signal is converted into a voltage output signal, and then used with a quasi-movable buffer stage circuit to obtain the required output voltage signal.

A digital-to-analog converter according to this aspect of the invention comprises:

—Multiplexer, which converts the original digital value into the digital code required by the data converter and outputs the signal of the multiple digital codes;

- The step-by-step current output circuit is electrically connected to the multiplexer, receives the signal of at least one digital code output by the multiplexer, and cooperates with its planned order and the current difference of each order to generate Output a current signal;

- Level current output circuit, which is electrically connected to the multiplexer, receives at least one digital code signal output by the multiplexer, and cooperates with the planned level number and the current difference of each level number value to output a current signal, where the level number depends on the output voltage range required by the user, and has the following relationship: I _L (Z+1)=I _L (Z)+ΔI _L ,

Where I _L represents the output current value of the level current output circuit, ΔI _L represents the fixed current difference planned for each level, and Z represents the Zth level in the planned level number;

- The current-voltage conversion circuit is electrically connected to the step-by-step current output circuit and the level current output circuit, receives the output current signals from the two current output circuits, and combines and converts the current signals into a required analog Voltage signal and output;

The product of the order number of the step-by-step current output circuit and the level number of the level current output circuit is the same as the order number of the analog output signal that the user wants to obtain.

Thus, the level-moving digital-to-analog converter of the present invention has the following advantages compared with traditional digital-to-analog converters:

(1) The present invention can achieve better accuracy with the same circuit complexity, that is, achieve the same accuracy as the traditional circuit with simpler circuits.

(2) The present invention can reduce the complexity of the traditional circuit (the number of components is less), which is beneficial to the control of precision. In addition, the degree of influence of the environment can also be reduced accordingly.

(3) The present invention reduces the number of switches used, so the noise generated when the switches are switched can be effectively reduced.

(4) The present invention reduces the production cost due to the large reduction in the number of components used.

Description of drawings

In order to make the purpose of the present invention, features and effects have a further understanding and recognition, now cooperate with the accompanying drawings to describe in detail as follows:

FIG. 1 is a schematic diagram of a known digital-to-analog converter.

FIG. 2 is a schematic diagram of another known DAC.

FIG. 3 is a circuit block diagram of the first embodiment of the present invention.

FIG. 4 is a circuit diagram of a level shifting buffer stage circuit according to the first embodiment of the present invention.

FIG. 5 is a circuit block diagram of the second embodiment of the present invention.

FIG. 6 is a schematic diagram of generating an output voltage according to a second embodiment of the present invention.

Detailed ways

At first, referring to accompanying drawing 3, it is the circuit block diagram of the first embodiment of the present invention, and it comprises a multiplexer III (24), a sub-level voltage output circuit (26), a quasi-voltage output circuit (28 ), a level mobile buffer stage circuit (30), wherein the step-by-step voltage output circuit (26) and the level voltage output circuit (28) are respectively intended to produce voltage steps, level numbers and the first The voltage difference value of the first order is planned and designed by each user, please refer to the explanation of the following principles:

Vn(S): the output voltage value of the step voltage output circuit S: order

Ve(X): the output voltage value of the level voltage output circuit X: the level number

Vo: the output voltage value of the combination of the two

→Vo＝Vn(S)+Ve(X)

To divide 0~4.9V into 50 voltage levels

First, let its order S be divided into 10 orders, then the level number X is divided into 50/10=5 orders, that is

S = 0, 1, 2, 3, ..., 8, 9

X=0, 1, 2, 3, 4

And it is planned that the voltage difference of each order of the sub-level voltage output circuit is 0.1V, then the voltage difference of each digit of the level voltage output circuit is 1V, then

Vn(S)=0.1V×S

Ve(X)＝1V×X

If you want to get the required voltage output value of 3.5V and 0.8V by

Vo=Vn(S)+Ve(X)

3.5V＝Vn(5)+Ve(3)

0.8V＝Vn(8)+Ve(O)

As shown in Figure 3, at first the original digital value is converted into the digital code required by the digital-to-analog converter by the multiplexer III (24) and the multiple digital code signals are output to be sent to the stepped voltage output circuit (26) respectively And the level voltage output circuit (28), the sub-level voltage output circuit (26) and the level voltage output circuit (28) are based on the signal input by the multiplexer (24) and cooperate with its planned order, bit The standard number and the voltage difference between each order and the level number output a voltage signal to the level shifting buffer stage circuit (30), after further processing by the level shifting buffer stage circuit (30) ( will be described in detail in the next paragraph) to output the required analog voltage output signal.

In addition, please refer to FIG. 4 , which is a circuit diagram of a level shifting buffer stage according to the first embodiment of the present invention, wherein Vn is the voltage value output by the step voltage output circuit, Ve is the voltage value output by the level voltage output circuit, And Vn=Vn ^AC +Vn ^DC (Vn ^AC is the AC signal output by the step voltage output circuit, Vn ^DC is the DC signal output by the step voltage output circuit), Ve=Ve ^DC (Ve ^DC is the level voltage output circuit output DC signal), from the graphic calculation, it can be known that Vo=(1+R2/R1)Vn ^AC +[(1+R2/R1)Vn ^DC -(R2/R1)Ve ^DC ](where (1+R2/ R1)Vn ^AC is an AC signal, [(1+R2/R1)Vn ^DC -(R2/R1)Ve ^DC ] is a DC signal, so only the resistance value of R1 and R2 and the level voltage output circuit output need to be adjusted The value of the signal voltage Ve can get the required output voltage Vo.

In addition, referring to Fig. 5, it is a circuit block diagram of the second embodiment of the present invention, which includes a multiplexer IV (32), a sub-level current output circuit (34), a quasi-current output circuit (36 ), a current-voltage conversion circuit (38) and a buffer stage circuit (40), wherein the order and the level numbers to be produced by the step-by-step current output circuit (34) and the level current output circuit (36) are the same as The same principle of the first embodiment is not repeated here, but for the required output voltage Vo, please refer to FIG. 6, which is a schematic diagram of the output voltage generated by the second embodiment of the present invention, and its description is as follows:

IL(a): the output current value of the level current circuit a: the level number

I _s (b): Output current value of the step-by-step current circuit b: Order number

Resistor R1 is used as a converter of current and voltage

Vo: the output voltage value of this embodiment

→Vo＝[IL(a)+IS(b)]×R1

This embodiment is also designed to have a voltage value of 50 steps, then

a=0, 1, 2, 3, 4

b=0, 1, 2, 3...8, 9

And plan the current difference of each order of the level current output circuit to be ΔIL, then the current difference of each order of the output circuit of the sub-level current circuit ΔIS=ΔIL/10, you can get

IL(Z+1)=IL(Z)+ΔIL Z=0, 1, 2, 3

IS(W+1)=IS(W)+ΔIS W=0, 1, 2, 3...7, 8

Where ΔIL and ΔIS are certain values

As shown in Figure 5, firstly, the step-by-step current output circuit (34) and the level current output circuit (36) cooperate with the planned level number, order number, each order number and bit number according to the signal input by the multiplexer. The current difference values of the quasi-numbers output a current signal to the current-voltage conversion circuit (38), and the current-voltage conversion circuit (38) converts the current value combination into a voltage value and outputs it to the buffer stage circuit (40). The circuit (40) can output the required analog voltage output signal after further processing.

From the above, it can be seen that the present invention mainly utilizes the combination of the step-by-step voltage output circuit and the level voltage output circuit, and then cooperates with the use of a level shifting buffer stage circuit to combine the voltage values output by the two circuits, or use the divided The combination of the first-order current output circuit and the level current output circuit, combined with the use of a current-voltage conversion circuit and a buffer stage circuit to convert the current value output by the two circuits, can obtain the required analog voltage signal. The design of the stepped voltage (current) output circuit and the level voltage (current) output circuit greatly reduces the number of switches and resistance segments required by the traditional circuit, which not only reduces the complexity of the circuit, but also facilitates the control of precision, and reduces the number of switches. Noise during switching further reduces production cost and effectively improves the efficiency of the level mobile digital-to-analog converter.

The above description is only a preferred embodiment of the present invention, and should not be used to limit the implementation scope of the present invention. That is, all the various changes and amendments made within the scope defined by the claims of the present invention shall fall within the scope covered by the patent of the present invention.

Claims (3)

1, a kind of bit quasi-shifting D/A converter, it includes:

-multiplexer is the signal that former digital value is changed into the required digital code of this digital to analog converter and export these a plurality of digital codes;

-sublevel voltage follower circuit is to be electrically connected to this multiplexer, receives the signal by at least one digital code of this multiplexer output, and the voltage difference that cooperates its exponent number S that has planned and each exponent number is with output-voltage signal;

The accurate voltage follower circuit in-position, be to be electrically connected to this multiplexer, reception is by the signal of at least one digital code of this multiplexer output, and the voltage difference that cooperates the accurate number X in position that it has planned and each accurate number is with output-voltage signal, the accurate number of its meta depends on the required output voltage range of user, and has following relation: Ve=Δ VnX

Wherein Ve represents the output voltage values of the accurate voltage follower circuit in position, and Δ Vn represents the fixed voltage difference that each standard is planned;

-bit quasi-shifting buffer stage circuit is to be electrically connected to this sublevel voltage follower circuit and this accurate voltage follower circuit, is used for exporting this sublevel voltage output and the accurate voltage output in position sum according to required aanalogvoltage form,

Wherein, the product of the accurate number in position of the exponent number of this sublevel voltage follower circuit and this accurate voltage follower circuit is that to wish to get the exponent number of analog output voltage identical with the user.

2, a kind of bit quasi-shifting D/A converter, it includes:

-multiplexer is the signal that former digital value is changed into the required digital code of this data converter and export these a plurality of digital codes;

-sublevel current output circuit is to be electrically connected to this multiplexer, receives the signal by at least one digital code of this multiplexer output, and the electric current difference that cooperates its exponent number of having planned and each exponent number is with output-current signal;

The accurate current output circuit in-position, be to be electrically connected to this multiplexer, reception is by the signal of at least one digital code of this multiplexer output, and the electric current difference that cooperates the accurate number in position that it has planned and each accurate number is to export a current signal, the accurate number of its meta depends on the required output voltage range of user, and tool

Following relation: I is arranged _L(Z+1)=I _L(Z)+Δ I _L,

I wherein _LRepresent the output current value of the accurate current output circuit in position, Δ I _LRepresent the fixed current difference that each standard is planned, Z position in the Z representative planning accurate number in position well is accurate;

-current-to-voltage converting circuit, be to be electrically connected to this sublevel current output circuit and this accurate current output circuit, the output current signal of reception both current output circuits by this, and combination is a needed analog voltage signal and exports with this current signal of conversion;

Wherein the product of the accurate number in position of the exponent number of this sublevel current output circuit and this accurate current output circuit is that to wish to get the exponent number of analog output signal identical with the user.

3, digital to analog converter as claimed in claim 2 wherein also comprises a buffer stage circuit, is used to cushion the analog voltage signal that this current-to-voltage converting circuit is exported.

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