CN111555605A - Control method for reducing critical mode three-level converter switching frequency range - Google Patents

Abstract

The invention discloses a control method for reducing the switching frequency range of a critical mode three-level converter. Calculate the average value of the input current in , calculate the on-time and off-time of the power device according to the average value of the input current, send the on-time and off-time to the SVPWM modulation module, and synthesize the space vector through the three-level converter voltage vector , adjust the sequence of the synthetic space vector according to the input voltage, obtain the three-level switching state and the corresponding PWM pulse, and transmit the PWM pulse to each power device through the driving circuit, that is, to reduce the switching frequency of the critical mode three-level converter. range control.

Description

A control method for reducing the switching frequency range of a critical mode three-level converter

technical field

The invention belongs to the technical field of electronic power, and relates to a control method for reducing the switching frequency range of a critical mode three-level converter.

Background technique

Power Factor Correction (PFC) technology is an important part of power electronics technology. PFC converters are often used in chargers for electric vehicles, chargers and adapters for mobile phones and computers. In low-power applications, in order to save costs and improve power density, PFC converters usually use Buck, Boost, Flyback and other topologies; in medium and high-power applications, PFC converters usually use Totem-Pole, single-phase full bridge, or even Multilevel topology. Therefore, different control strategies need to be selected for different topologies.

According to the inductor current waveform on the AC side of the PFC converter, the operating modes of the PFC converter can be divided into Continuous Conduction Mode (CCM), Discontinuous Conduction Mode (DCM) and Critical Conduction Mode (Critical Conduction Mode). Conduction Mode, CRM). The PFC converter in CRM mode has the advantages of high power factor and simple control strategy design. The constant on-time (COT) control strategy commonly used in CRM mode enables the converter to obtain unity power factor. Taking into account the topology characteristics and control strategy performance, generally in the application of medium and high power, the Totem-Pole converter in CRM mode usually uses COT control. However, the disadvantage of this control method is that the switching frequency varies greatly, which increases the difficulty of EMI filter design.

In order to overcome the defect that the switching frequency of the PFC converter has a large variation range in the CRM mode, improvements can be made in terms of topology and control strategy. Three-level Neutral Point ClamPed (NPC) type three-level is one of the most commonly used three-level topology structures. Through the combination of N, O, and P three switching states, the AC side can be effectively reduced. THD and system average switching frequency. However, traditional three-level converters usually work in CCM mode. In this mode, although a higher power factor can be obtained and the switching frequency is constant, each power device cannot naturally turn on at zero current, which will increase system losses. At the same time, the control strategy and modulation strategy of the traditional three-level converter are complex and difficult to implement. Therefore, it is necessary to study a control strategy that can reduce the switching frequency range of the three-level PFC converter operating in CRM mode, in order to integrate the advantages of topology and control strategy.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a control method for reducing the switching frequency range of the critical mode three-level converter, which solves the problem that the switching frequency of the three-level converter in the existing critical mode changes too widely.

The technical solution adopted in the present invention is a control method for reducing the switching frequency range of a critical mode three-level converter, comprising the following steps:

Step 1, calculate the on-time of the three-level PFC converter power device;

Step 2, calculating the turn-off time of the three-level PFC converter power device;

Step 3, input the calculated on-time and off-time into the SVPWM modulation module, and synthesize the space vector by the three-level converter voltage vector;

Step 4: Adjust the sequence of the synthesized space vector according to the input voltage of the converter, adjust the switching state sequence accordingly, obtain the corresponding PWM pulse, convert the PWM pulse into a driving signal and then send it to each power device, that is, to complete the reduction of the three voltages. Control of switching frequency range of flat PFC converters.

The technical feature of the present invention is also that,

Among them, the specific process of step 1 is as follows:

Step 1.1, sample the input voltage V _in , the output voltage V _o and the inductor current of the three-level PFC converter, send the inductor current to the zero current detection module, and calculate the average value of the input current i _{in_av} in the CRM mode:

L为变换器主电感值；Among them, θ=ωt, v _{in_rms} is the effective value of the input voltage,

L is the main inductance value of the converter;

Step 1.2, calculate the on-time T _on of the three-level PFC converter power device

Among them, P _o is the output power of the converter; η is the efficiency of the converter, which can be approximated as 1.

The specific process of step 2 is as follows:

Step 2.1, when 0<V _in <V _o /2, when the inductor discharges, use a DC side capacitor to connect it to the equivalent circuit, and calculate the discharge time of the inductor at this time, that is, the turn-off time of the power device:

Step 2.2, when V _o /2<V _in <V _o , when the inductor discharges, use two DC side capacitors to connect to the equivalent circuit, and calculate the discharge time of the inductor at this time, that is, the turn-off time of the power device:

The specific process of step 3 is as follows:

Step 3.1, input the calculated on-time and off-time into the SVPWM modulation module, establish a single-phase three-level space two-phase static coordinate system, that is, the α, β coordinate system, and project the reference voltage vector on the α axis As the vector to be synthesized:

V _α = |V _ref |cosθ (5)

Among them, V _ref is the reference vector, and V _α is the projection of the reference vector on the α-axis;

Step 3.2, synthesizing V _α according to the principle of volt-second balance, and then synthesizing the space vectors V ₁ and V ₂ :

Among them, T _s is the switching period, the space vector V ₁ is the voltage vector corresponding to the three switching states when the inductor is charging; the space vector V ₂ is the voltage vector corresponding to the six switching states when the inductor is discharging.

The specific process of step 4 is as follows:

Step 4.1, when 0<V _in <V _o /2, adjust the sequence of the synthetic space vectors V ₁ and V ₂ , and then adjust the switch state sequence as: OO-PO-PP-PO-OO-ON-NN-ON- OO, get the corresponding PWM pulse;

Step 4.2, when V _o /2<V _in <V _o , adjust the order of the synthetic space vectors V ₁ and V ₂ , and then adjust the switch state order to be: OO-PN-PP-PN-NN-PN-OO, get Corresponding PWM pulse;

In step 4.3, the obtained PWM pulse is sent to the driving circuit to form a driving signal, and each power device is driven by the driving signal, that is, the control of the switching frequency variation range of the three-level PFC converter is reduced.

The beneficial effect of the present invention is that two control degrees of freedom of switching frequency discharge strategy and switching state sequence are added on the basis of traditional COT control, and by adjusting the discharge strategy and switching state sequence, the switching frequency and the frequency variation range can be significantly reduced, At the same time, the average switching times of the power device can be reduced, and the practical value is high.

Description of drawings

1 is a flowchart of a control method for reducing the switching frequency range of a critical mode three-level converter according to the present invention;

2 is a schematic diagram of an inductor current and an input current when a COT control strategy is adopted in an embodiment of the present invention;

Fig. 3 is the switching frequency change curve of the traditional PFC converter under the critical mode;

Fig. 4 is the contrast schematic diagram of the switching frequency of the three-level PFC converter in the present invention and the variation range of the switching frequency of the traditional PFC converter;

Fig. 5 is the space vector coordinate system of single-phase three-level topology in the embodiment of the present invention;

6 is a schematic diagram of the current flow and switching state of a three-level PFC converter in a half power frequency cycle in the NN state in the embodiment of the present invention;

7 is a schematic diagram of the current flow and switching state of the three-level PFC converter in the ON state in the embodiment of the present invention in half a power frequency cycle;

8 is a schematic diagram of the current flow and switching state of a three-level PFC converter in a PP state in an embodiment of the present invention within half a power frequency cycle;

9 is a schematic diagram of the current flow and switching state of the three-level PFC converter in the PO state in the embodiment of the present invention in half a power frequency cycle;

10 is a schematic diagram of a current flow and a switching state of a three-level PFC converter in a half power frequency cycle in an OO state in an embodiment of the present invention;

11 is a schematic diagram of the current flow and switching state of a three-level PFC converter in a PN state in an embodiment of the present invention in half a power frequency cycle;

Fig. 12 is the switching sequence and PWM pulse of converter optimization when 0<V _in <V _o /2 in the embodiment of the present invention;

Fig. 13 is the switching sequence and PWM pulse of converter optimization when V _o /2<V _in <V _o in the embodiment of the present invention;

Fig. 14 is the experimental waveform of input voltage and input current in the embodiment of the present invention;

FIG. 15 is an experimental curve of the switching frequency variation of the two converters in the embodiment of the present invention.

Detailed ways

The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

The invention is a control method for reducing the switching frequency range of a critical mode three-level converter. It optimizes the charging and discharging strategy and switching sequence of the inductor, reduces the switching frequency variation range, and is beneficial to the design of EMI filters.

1 is a block diagram of a control method for reducing the switching frequency variation range of a three-level PFC converter in a CRM mode according to the present invention. In a single-phase NPC three-level topology, each phase bridge arm has four power devices, namely S ₁₁ , S 11 , S ₁₂ , S ₁₃ , S ₁₄ , there are eight power devices in the whole topology.

In the one-phase bridge arm, when S ₁₁ and S ₁₂ are turned on, the switch state is defined as P; when S ₁₂ and S ₁₃ are turned on, the switch state is defined as O; when S ₁₃ and S ₁₄ are turned on, the switch state The state is defined as N. Therefore, the two-phase bridge arm has nine switching states after the combination, namely PP, PO, PN, OP, ON, OO, NP, NO, NN.

In the control process, the input voltage of the grid side, the inductor current, and the two capacitor voltages of the DC side are firstly sampled, and then input to the DSP through the A/D conversion module.

Secondly, according to the relationship between input current and inductor current, switching cycle, etc., and the principle of volt-second balance, the on-time of the power device is calculated in DSP.

Thirdly, according to the change of the input voltage, the operation of the converter is divided into two working conditions. In each working condition, the turn-off time of the power device is calculated by controlling the number of DC capacitors and changing the discharge time of the inductor.

Finally, the turn-on and turn-off times are sent to the SVPWM modulation module, and the switching sequence is optimized to obtain PWM pulses, which are sent to the power device through the drive circuit.

The topology adopted in the present invention is the NPC three-level topology. The sampling circuit includes a voltage sensor and a current sensor. At the same time, the A/D conversion module is used to send the sampling signal into the digital controller, and the digital controller is controlled and modulated to send out a PWM pulse, and finally generate the drive signal of the power device through the drive circuit, and input the drive signal to each power device, which reduces the switching frequency range of the three-level converter in the CRM mode.

Example

A control method for reducing the switching frequency range of a critical mode three-level converter of the present invention specifically includes the following steps:

Step 1, calculate the on-time of the three-level PFC converter power device

The input voltage, output voltage and inductor current of the converter are sampled and input to the digital controller to calculate the on-time of the power device of the PFC converter.

Step 1.1, sample the input voltage V _in , the output voltage V _o and the inductor current of the three-level PFC converter, send the inductor current to the zero current detection module, and calculate the average value of the input current i _{in_αv} (θ) in the digital controller .

For the main inductance L of the three-level PFC converter, according to the principle of volt-second balance in one switching cycle, it can be obtained:

T_on是开关器件的恒定导通时间，t_off(θ)是开关器件的关断时间，其根据输入输出电压的变化而变化。Among them, θ=ωt, v _{in_rms} is the effective value of the input voltage,

T _on is the constant on-time of the switching device, and t _off (θ) is the off-time of the switching device, which varies according to changes in the input and output voltages.

According to formula (1), the peak value of the inductor current in one switching cycle can be obtained as:

where i _{L_pk} (θ) is the peak inductor current.

In CRM mode, the average value of the input current i _{in_αv} (θ) is half of the peak value of the inductor current, namely:

The relationship between the input voltage, the instantaneous value of the input current, the average value of the input current and the switching pulse of the PFC converter in the CRM mode is shown in Figure 2. At this time, equation (3) is an expression of the average value of the input current. As can be seen from Figure 2, the on-time is constant at this time, and the average value of the input current is a linear function of the input voltage. Therefore, the input voltage and the input current are in phase, and the input current is also a perfect sinusoidal shape. According to the Fourier decomposition According to the principle, at this time, the input current has no distortion, and the THD is zero. At this time, the system can obtain the unity power factor.

Step 1.2, calculate the on-time T _on of the three-level PFC converter power device

According to the obtained average value of input current, the on-time of the power device under this working condition is calculated by parameters such as output power and inductance value.

According to formula (3), the system input power P _in can be:

Assume that the system efficiency is η, and the input and output power has the following relationship with the efficiency:

P _in η = P _o (5)

Bringing (4) and (5) into (3), the constant on-time T _on can be obtained as:

Among them, P _o is the output power of the converter; η is the efficiency of the converter, which can be approximated as 1.

The traditional COT control is applied in the PFC converter. If no improvement is made, the ripple frequency of the inductor current can be:

The switching frequency is in turn half the inductor current ripple frequency. At the same time, since L and P _o are constants in practical applications, only the voltage gain will change, so the switching frequency can be normalized. First, simplify the switching frequency:

where G is the DC voltage gain,

Take the constant in formula (8) as the reference value:

Combining (8) and (9), the normalized value of the switching frequency of the improved PFC converter is:

According to (10), it can be concluded that the switching frequency variation range of the traditional three-level PFC converter is theoretically shown in Figure 3, and the switching frequency variation range can be obtained at this time, and it can be known that the conversion range is wider.

Step 2, Calculate the turn-off time of the three-level PFC converter power device

Step 2.1, determine the input voltage V _in , when 0<V _in <V _o /2, when the inductor discharges, use a DC side capacitor to connect it to the equivalent circuit, calculate the inductor discharge time at this time, and the discharge time at this time will be extended, ie, the off-time of each switching device will be extended, thus reducing the equivalent switching frequency.

The discharge time of the inductor, that is, the turn-off time of the power device:

Then the ripple frequency of the inductor current can be:

At this time, the power device only performs 0.5 switching operations on average in one switching cycle, and the average switching frequency of the power device is 1/4 of the inductor current ripple frequency:

The average switching frequency of each power device in this case is:

Step 2.2, determine the input voltage V _in , when V _o /2<V _in <V _o , when the inductor discharges, use two DC side capacitors to connect to the equivalent circuit, and calculate the discharge time of the inductor at this time, that is, the power device Off time:

At this time, the ripple frequency of the inductor current is the same as that of equation (7).

At this time, the power device performs one switching operation on average in one switching cycle, and the average switching frequency of the power device is 1/2 of the inductor current ripple frequency;

The average switching frequency of each power device in this case is:

Combining (13) and (15), the switching frequency of the three-level PFC converter of the present invention can be obtained as:

where α is the electrical angle when the number of capacitors is switched,

This control method is switched at the moment of V _in =V _o /2, so

Similar to step 1, normalize equation (16):

According to (17), taking G=1.5 as an example, the comparison of the switching frequency variation range between the three-level PFC converter in the present invention and the PFC converter using traditional control can be obtained in theory, as shown in FIG. 4 .

Step 3, the calculated on-time and off-time are input into the SVPWM modulation module, and the space vector is synthesized by nine voltage vectors of the three-level converter;

The specific process is as follows:

Step 3.1, as shown in Figure 5, establish a single-phase three-level space two-phase stationary coordinate system, namely α, β coordinate system, the entire vector space can be divided into four regions, the projection of the reference voltage vector on the α axis is used as Vector to be synthesized:

Vα＝|V _ref |cosθ (18)

Among them, V _ref is the reference vector, and V _α is the projection of the reference vector on the α-axis;

Step 3.2, synthesizing V _α according to the principle of volt-second balance, and then synthesizing the space vectors V ₁ and V ₂ :

Among them, T _on is the turn-on time of the power device calculated in step 1, t _off is the turn-off time of the power device calculated in step 2, and is also the vector action time, T _s is the switching period of the three-level PFC converter, and the space The vector V ₁ is the voltage vector corresponding to the three switching states when the inductor is charged; the space vector V ₂ is the voltage vector corresponding to the six switching states when the inductor is discharging.

The current flow and switching state of the three-level PFC converter in half the power frequency cycle are shown in Figure 6-11. There are six switching states, namely PP, OO, NN, PN, PO and ON. Figure 6 is NN The schematic diagram of the current flow and switching state of the three-level PFC converter in the half power frequency cycle in the state of Figure 8 is a schematic diagram of the current flow and switching state of the three-level PFC converter in a half power frequency cycle in the PP state, and Figure 9 is a current flow and a half power frequency cycle of the three-level PFC converter in the PO state. Schematic diagram of the switching state, Figure 10 is a schematic diagram of the current flow and switching state of the three-level PFC converter in the OO state in half a power frequency cycle, and Figure 11 is a three-level PFC converter in the PN state in a half power frequency cycle. Schematic diagram of current flow and switching state.

Combining Figure 4 with equations (18) and (19), the values of V ₁ , V ₂ , T ₁ , and T ₂ are obtained when the reference vector is in each region, as shown in Table 1, respectively.

Table 1 Single-phase three-level space vector and vector action time

It can be known from Table 1 that the space vector V ₁ is PP, OO, NN respectively; the space vector V ₂ is PN, PO, ON, NO, OP or NP respectively.

Step 4: Adjust the sequence of the synthesized voltage space vector according to the input voltage V _in of the converter, determine the sequence of switching states and the corresponding PWM pulses, and convert the PWM pulses into drive signals and send them to each power device.

The specific process of step 4 is as follows:

Step 4.1, determine the input voltage V _in , when 0<V _in <V _o /2, the switch state sequence is: OO-PO-PP-PO-OO-ON-NN-ON-OO, and the corresponding PWM pulse is obtained, As shown in Figure 12;

Step 4.2, determine the input voltage V _in , when V _o /2<V _in <V _o , the switching state sequence is: OO-PN-PP-PN-NN-PN-OO, and the corresponding PWM pulse is obtained, as shown in Figure 13 shown;

Step 4.3, the obtained PWM pulse is sent to the drive circuit to form a drive signal, and then the drive signal is sent to each power device to drive each power device, that is, the reduction of the switching frequency change of the three-level PFC converter is completed. range control.

Aiming at the control method for reducing the switching frequency variation range of the three-level converter in the CRM mode proposed by the present invention, a 2kW hardware platform is established, and the experimental verification is carried out. The experimental parameters are shown in Table 2.

Table 2 Experimental parameters of 2kW three-level PFC converter

According to the experimental parameters in Table 2, the voltage gain G=1.29 can be obtained.

Figure 14 shows the input voltage and input current waveforms of the three-level PFC converter. It can be seen from Figure 14 that after filtering, the input current is sinusoidal. After analysis, it can be seen that the input current THD=1.6%, which meets IEC 61000-3 -2Class D harmonic standards.

FIG. 15 is the switching frequency curve of the conventional PFC converter and the three-level PFC converter proposed by the present invention obtained after experimental testing. It can be known by calculation that, compared with the traditional PFC converter, the switching frequency variation range of the three-level PFC converter proposed by the present invention is reduced by 36.48%.

Claims (5)

1. a control method for reducing the switching frequency range of a critical mode three-level converter, is characterized in that, comprises the following steps: Step 1, calculate the on-time of the three-level PFC converter power device; Step 2, calculating the turn-off time of the three-level PFC converter power device; Step 3, input the calculated on-time and off-time into the SVPWM modulation module, and synthesize the space vector by the three-level converter voltage vector; Step 4: Adjust the sequence of the synthesized space vector according to the input voltage of the converter, adjust the switching state sequence accordingly, obtain the corresponding PWM pulse, convert the PWM pulse into a driving signal and then send it to each power device, that is, to complete the reduction of the three voltages. Control of switching frequency range of flat PFC converters. 2. a kind of control method reducing the switching frequency range of critical mode three-level converter according to claim 1, is characterized in that, the concrete process of described step 1 is as follows: Step 1.1, sample the input voltage V _in , the output voltage V _o and the inductor current of the three-level PFC converter, send the inductor current to the zero current detection module, and calculate the average value of the input current i _{in_av} in the CRM mode:

Among them, θ=ωt, v _{in_rms} is the effective value of the input voltage,

L is the main inductance value of the converter; Step 1.2, calculate the on-time T _on of the three-level PFC converter power device

Among them, P _o is the output power of the converter; η is the efficiency of the converter, which can be approximated as 1. 3. a kind of control method reducing the switching frequency range of critical mode three-level converter according to claim 2, is characterized in that, the concrete process of described step 2 is as follows: Step 2.1, when 0<V _in <V _o /2, when the inductor discharges, use a DC side capacitor to connect it to the equivalent circuit, and calculate the discharge time of the inductor at this time, that is, the turn-off time of the power device:

Step 2.2, when V _o /2<V _in <V _o , when the inductor discharges, use two DC side capacitors to connect to the equivalent circuit, and calculate the discharge time of the inductor at this time, that is, the turn-off time of the power device:

4. a kind of control method reducing the switching frequency range of critical mode three-level converter according to claim 3, is characterized in that, the concrete process of described step 3 is as follows: Step 3.1, input the calculated on-time and off-time into the SVPWM modulation module, establish a single-phase three-level space two-phase static coordinate system, that is, the α, β coordinate system, and project the reference voltage vector on the α axis As the vector to be synthesized: V _α = |V _ref |cosθ (5) Among them, V _ref is the reference vector, and V _α is the projection of the reference vector on the α-axis; Step 3.2, synthesizing V _α according to the principle of volt-second balance, and then synthesizing the space vectors V ₁ and V ₂ :

Among them, T _s is the switching period, the space vector V ₁ is the voltage vector corresponding to the three switching states when the inductor is charging; the space vector V ₂ is the voltage vector corresponding to the six switching states when the inductor is discharging. 5. a kind of control method reducing the switching frequency range of critical mode three-level converter according to claim 4, is characterized in that, the concrete process of described step 4 is as follows: Step 4.1, when 0<V _in <V _o /2, adjust the sequence of the synthetic space vectors V ₁ and V ₂ , and then adjust the switch state sequence as: OO-PO-PP-PO-OO-ON-NN-ON- OO, get the corresponding PWM pulse; Step 4.2, when V _o /2<V _in <V _o , adjust the order of the synthetic space vectors V ₁ and V ₂ , and then adjust the switch state order to be: OO-PN-PP-PN-NN-PN-OO, get Corresponding PWM pulse; In step 4.3, the obtained PWM pulse is sent to the driving circuit to form a driving signal, and each power device is driven by the driving signal, that is, the control of the switching frequency variation range of the three-level PFC converter is reduced.

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