CN111524924A - Chip packaging method and chip packaging structure - Google Patents

Abstract

The present application provides a chip packaging method and a chip packaging structure, which relate to the technical field of chip packaging. The chip packaging method includes: providing a wafer, the wafer includes a plurality of wafer regions, each of the wafer regions includes a photosensitive region and a pad region, and the pad region is provided with a pad; A light-transmitting film layer is arranged on the upper surface of the circle; the part of the light-transmitting film layer located on each of the pad regions is removed to expose the pads of each of the pad regions, thereby obtaining a wafer structure ; Perform cutting and packaging operations on the wafer structure to obtain a plurality of chip packaging structures. Compared with other packaging methods, the chip packaging method provided by the present application has the advantages of short processing flow, low difficulty in process control, thinner thickness of the obtained package body, and fewer materials used.

Description

Chip packaging method and chip packaging structure

technical field

The present application relates to the technical field of chip packaging, and in particular, to a chip packaging method and a chip packaging structure.

Background technique

CIS (Contact Image Sensor), also known as contact image sensor, is a new type of line image sensor. It can perceive optical signals and convert them into electronic signals that carry image information. As such a processing electronic device, it has a wide range of applications in the market, such as applications in smart terminals, cameras, scanning situational awareness, etc. . At the beginning of the design of this kind of device, in order to improve the imaging quality and practicability of the product, it generally needs to be packaged and then installed in the terminal equipment.

At present, the traditional packaging structure mainly uses a piece of glass on the photosensitive area of the chip for light-transmitting sealing. When manufacturing, it is necessary to use glue or other materials to make a support structure around the photosensitive area, so that there is a gap between the glass cover and the chip. a certain height. However, the existing production method has too high requirements for packaging and complicated processes, which poses new challenges to the quality and efficiency control during mass production.

SUMMARY OF THE INVENTION

The purpose of the embodiments of the present application is to provide a chip packaging method and a chip packaging structure. During chip packaging, only one material is used above the photosensitive area, which can reduce the number of refractions of light between the interfaces. The light-transmitting film layer is arranged above the photosensitive area, and the encapsulation process is simpler.

In a first aspect, an embodiment of the present application provides a chip packaging method, the method includes: providing a wafer, the wafer includes a plurality of chip areas, each of the chip areas includes a photosensitive area and a pad area, so The pad area is provided with pads; a light-transmitting film layer is arranged on the upper surface of the wafer; the part of the light-transmitting film layer located on each of the pad areas is removed to expose each of the pads in the pad area to obtain a wafer structure; cutting and packaging operations are performed on the wafer structure to obtain a plurality of chip packaging structures.

Compared with other packaging methods, the chip packaging method provided by the present application has the advantages of short processing flow, low process control difficulty, and fewer materials used. The packaging method of various materials can effectively reduce the number of refractions of light between the interfaces, and the photosensitive effect is better.

In a possible implementation manner, the cutting and packaging operations on the wafer structure to obtain a plurality of chip packaging structures include: cutting and separating the wafer structure into a plurality of chips corresponding to the chip regions , using wires to connect the pads on the wafer to the carrier board; apply glue between the carrier board and the wires, and cure the glue to support and fix the arc formed by the wires.

In a possible implementation manner, after disposing a light-transmitting film layer on the upper surface of the wafer, the method further includes: thinning the lower surface of the wafer.

Since the light-transmitting film layer is cured on the upper surface of the wafer before thinning the wafer, the wafer can be thinner during the thinning operation, so that the thickness of the obtained chip package structure will also be thinner. Thin, after being put into application, such as for the manufacture of cameras, the resulting cameras will also be thinner.

In a possible implementation manner, arranging a light-transmitting film layer on the upper surface of the wafer includes: coating the upper surface of the wafer, and curing the film-coated material to make the film The surface is attached to the upper surface to form a light-transmitting film layer.

In a possible implementation manner, the curing of the coating material includes: performing ultraviolet curing or baking curing on the coating material, so that the coating material is cured on the upper surface.

In a possible implementation manner, the removing the part of the light-transmitting film layer located on each of the pad regions to expose the pads of each of the pad regions includes: using laser distance measurement Determine the distance from the surface of the light-transmitting film layer away from the upper surface to the pad, and use a mechanical removal method to remove the light-transmitting film layer on the pad area according to the distance; Film removal.

In a second aspect, an embodiment of the present application provides a chip package structure, the chip package structure includes: a carrier board; a chip, which is disposed on the carrier board, and the chip includes a photosensitive area and a pad area, and the The pad area is provided with a pad; a light-transmitting film layer is arranged on the photosensitive area of the wafer; and a wire is used for electrically connecting the carrier board and the pad.

In a possible implementation manner, the chip packaging structure further includes: a support glue between the carrier board and the wires, so as to support and fix the arcs formed by the wires.

In a possible embodiment, the thickness of the light-transmitting film layer is 65 to 95 microns.

In a possible implementation manner, the light transmittance of the light-transmitting film layer for light in the wavelength band of 380 to 780 nanometers is greater than 93%.

In order to make the above-mentioned objects, features and advantages to be achieved by the embodiments of the present application more obvious and easy to understand, the preferred embodiments are hereinafter described in detail together with the accompanying drawings.

Description of drawings

In order to explain the technical solutions of the embodiments of the present application more clearly, the following briefly introduces the accompanying drawings that need to be used in the embodiments of the present application. It should be understood that the following drawings only show some embodiments of the present application, therefore It should not be regarded as a limitation of the scope. For those of ordinary skill in the art, other related drawings can also be obtained from these drawings without any creative effort.

FIG. 1 is a flowchart of a chip packaging method provided by an embodiment of the present application;

2 is a schematic diagram of a wafer provided by an embodiment of the present application;

FIG. 3 is a schematic diagram of the execution process of steps 10-40 provided in this embodiment of the present application;

4 is a schematic diagram of a chip packaging structure provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of an application example of the chip packaging structure provided by the embodiment of the present application.

Icons: 100-wafer; 101-wafer area; 102-pad; 110-transparent film; 120-carrier; 130-wafer; 140-wire; 150-supporting colloid.

Detailed ways

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.

The embodiments of the present application provide a chip packaging method, which can be used in the packaging process of light-transmitting chips (CIS chips), and at the same time, provide a chip packaging structure, which can be fabricated by the above-mentioned chip packaging method to obtain light-transmitting chips. chip package. Figure 1 shows a flowchart of a chip packaging method. As shown in Figure 1, the chip packaging method includes:

Step 10: Provide a wafer, the wafer includes a plurality of wafer regions, each wafer region includes a photosensitive region and a pad region, and the pad region is provided with pads.

2 shows a schematic diagram of a wafer, the wafer 100 includes a plurality of wafer areas 101, each wafer area 101 is fabricated with required integrated functional circuits, and the integrated functional circuits convert sensed optical signals into electrical signals. The wafer 100 includes an upper surface and a lower surface, and a photosensitive area and a pad area (not shown) are provided on the upper surface of each wafer area 101 , and the integrated functional circuit senses external light through the photosensitive area on the wafer area 101 .

Step 20: Disposing a light-transmitting film layer on the upper surface of the wafer.

A schematic diagram of the execution process of steps 10-40 is shown in FIG. 3 . In FIG. 3( a ), a wafer is provided, and in FIG. 3( a ), only two wafer regions on the wafer can be seen, and pads 102 are provided on the wafer regions. Specifically, in step 20, the upper surface of the wafer is covered with a film, and the material of the film is cured, so that the film surface is attached to the upper surface of the wafer to form a light-transmitting film layer. Wherein, the method of curing the material of the coating includes: ultraviolet (UV) curing or baking curing.

As shown in (b) of Figure 3, the entire wafer is covered with a film, and a thin film (transparent film layer 110) is formed on the upper surface of the wafer. The thickness of the thin film is 65 to 95 microns. The principle of thickness selection is : Ensure the light transmittance of the light-transmitting film and the material strength of the film, and reduce the difficulty of removing the film material on the surface of the pad in the next step. If the film is too thick, it will affect the light transmittance parameters of the light-transmitting film. This leads to a decrease in the light transmittance of the light-transmitting film layer, which is not conducive to the light-sensing of the chip. If the film layer is too thin (such as 1 micron), the material strength of the film layer will be too low, resulting in the film layer being fragile, which is not conducive to chip packaging and Next step material removal operation. The light-transmitting film layer 110 is a high light-transmittance film. In one embodiment, the light-transmitting film layer requires that the light-transmitting rate for light in the wavelength band of 380 to 780 nanometers be greater than 93%. It can be understood that, for some products with lower requirements, the light transmittance requirement can also be appropriately reduced, for example, the light transmittance for the light in the 380 to 780 nm wavelength band is greater than 60%.

After lamination, ultraviolet (UV) curing or baking curing is used to cure the coating material on the upper surface of the wafer, and high pressure baking is used for baking curing to eliminate lamination bubbles, or, vacuum lamination is used. And bake in a regular oven.

Step 30: Remove the part of the transparent film layer on each pad area to expose the pads of each pad area, thereby obtaining a wafer structure.

After laminating the entire wafer, the pads on the pad area on each wafer area are covered with a light-transmitting film layer, which is removed by technical means to facilitate subsequent connection of wires, as shown in (c) in Figure 3 , it can be seen that the light-transmitting film layer above the pad 102 is removed, thereby exposing the pad 102 .

The material removal method includes: positioning through the wafer surface pattern or the position of the conductive pads, and removing the light-transmitting film layer on each pad area by mechanical removal or laser laser to expose the pads in each pad area. For the mechanical removal method, the distance from the surface of the light-transmitting film layer away from the upper surface to the pad must be determined by ranging means (such as laser ranging), and the mechanical removal is performed according to the determined distance. For example, use a wide tool to cut the position of the pad, Thus, the pads originally covered under the light-transmitting film layer are exposed. Laser laser removal can control the amount of laser energy, no need for ranging, low precision requirements, stability, no residual mechanical cutting stress, and better removal effect.

Optionally, after step 20, that is, after disposing a light-transmitting film layer on the upper surface of the wafer, the chip packaging method further includes: thinning the lower surface of the wafer, that is, removing excess film on the lower surface of the wafer. The base material is removed by a certain thickness. After the thinning process, the device thermal resistance of the integrated functional circuit can be further reduced, the working heat dissipation and cooling capacity of the chip can be improved, and subsequent packaging can be facilitated. Wafer thinning is a conventional process and can be thinned by a grinder. The wafer thinning process may be performed after step 20, before step 30, or after step 30, and the order of the process is not limited in this embodiment.

Step 40: Perform cutting and packaging operations on the wafer structure to obtain a plurality of chip packaging structures.

As shown in (d) of FIG. 3 , the obtained wafer structure is cut into single wafers to obtain multiple wafers. A single chip is mounted on a carrier board, and the chip and the carrier board are connected by wires to complete the circuit connection. Specifically, step 140 includes: cutting and separating the wafer structure into a plurality of wafers corresponding to the wafer area, mounting the wafers on the carrier board, and connecting the pads on the wafer to the carrier board by using wires; Apply glue to the wire and cure the glue to support and secure the arc formed by the wire.

The wafer structure from the previous process is cut into a plurality of small wafers after the cutting process, each wafer corresponds to a wafer area on the wafer, and each wafer includes a photosensitive area and a pad area, and the pad area is set There are corresponding pads, and then the cut chip is attached to the corresponding carrier board using glue or other connection methods, and then, the pads of the chip are connected to the The corresponding pins of the carrier board form the required circuit. In the next step, glue is used to secure and protect the wire arcs, and the glue is cured to form a support gel between the carrier board and the wires. The above-mentioned packaging steps are respectively performed on each wafer obtained by cutting to obtain a plurality of chip packaging structures.

FIG. 4 shows a schematic diagram of a chip packaging structure provided by an embodiment of the present application. The chip packaging structure can be manufactured by the above-mentioned chip packaging method. Please refer to FIG. 4 . The chip packaging structure includes:

a carrier board 120;

A wafer 130, which is disposed on the carrier board 120, the wafer 130 includes a photosensitive area and a pad area, and the pad area is provided with the pad 102;

a light-transmitting film layer 110 disposed on the photosensitive area of the wafer 130;

Wires 140 are used to electrically connect the carrier board 120 to the pads 102 .

Optionally, during the chip packaging process, glue is applied between the carrier board 120 and the wires 140, and the glue is cured. After curing, a support glue 150 is formed between the carrier board 120 and the wires 140 for supporting and fixing the wires. arc formed.

Optionally, the thickness of the light-transmitting film layer 110 is 65 to 95 microns, and within this thickness range, the light transmittance of the light-transmitting film layer and the material strength of the film layer can be guaranteed. The light-transmitting film layer 110 is a high light-transmittance film. In one embodiment, the light-transmitting film layer requires that the light-transmitting rate for light in the wavelength band of 380 to 780 nanometers be greater than 93%. It can be understood that, for some products with lower requirements, the light transmittance requirement can also be appropriately reduced, for example, the light transmittance for the light in the 380 to 780 nm wavelength band is greater than 60%.

An application example of the chip packaging structure provided in this embodiment is shown in FIG. 5 . When external light is incident, the light enters the transparent light-transmitting film layer. Due to the high light transmittance of the light-transmitting film layer, most of the light passes through The film layer enters and is sensed by the light-sensitive area of the chip under the light-transmitting film layer.

It can be understood that the process flow of the chip packaging method provided in this embodiment includes: wafer coating, curing, wafer thinning, material removal, wafer cutting, wafer loading (making the wafer and the carrier into a whole), printing. It can be seen that compared with other chip packaging methods in the prior art, the processing flow is shorter. Moreover, since only one material (ie, a light-transmitting film layer) is used above the photosensitive area in this embodiment, compared with the packaging method in which multiple materials are arranged above the photosensitive area, the number of refractions of light between the interfaces can be effectively reduced, and the photosensitive area can be effectively reduced. Better results. Further, since the light-transmitting film layer is a very thin film, the light-transmitting film layer, the wafer and the carrier only need to be simply installed to ensure the level of each other, avoiding the loss of optical signals due to refraction after the light arrives. It is more difficult to control the process. Since the light-transmitting film layer is cured on the upper surface of the wafer before thinning the wafer, the wafer can be thinner during the thinning operation, so that the thickness of the obtained chip package structure will also be thinner. Thin, after being put into application, such as for the manufacture of cameras, the resulting cameras will also be thinner.

In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", " rear, left, right, vertical, horizontal, top, bottom, inside, outside, clockwise, counterclockwise, etc., or The positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, Therefore, it should not be construed as a limitation of the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, features defined as "first", "second" may expressly or implicitly include one or more of said features. In the description of the present invention, "plurality" means two or more, unless otherwise expressly and specifically defined.

The above descriptions are merely examples of the present application, and are not intended to limit the protection scope of the present application. For those skilled in the art, various modifications and changes may be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of this application shall be included within the protection scope of this application.

Claims (10)

1. A method of chip packaging, the method comprising:

providing a wafer, wherein the wafer comprises a plurality of chip areas, each chip area comprises a photosensitive area and a bonding pad area, and the bonding pad area is provided with a bonding pad;

arranging a light-transmitting film layer on the upper surface of the wafer;

removing the part of the light-transmitting film layer, which is positioned on each bonding pad area, so as to expose the bonding pad of each bonding pad area, thereby obtaining a wafer structure;

and cutting and packaging the wafer structure to obtain a plurality of chip packaging structures.

2. The method of claim 1, wherein the dicing and packaging the wafer structure to obtain a plurality of chip package structures comprises:

cutting and separating the wafer structure into a plurality of chips corresponding to the chip areas, mounting the chips on a carrier plate, and connecting bonding pads on the chips to the carrier plate by using wires;

and coating glue between the carrier plate and the lead, and curing the glue to support and fix the arc formed by the lead.

3. The method of claim 1 or 2, wherein after disposing a light-transmissive film on the top surface of the wafer, the method further comprises:

and thinning the lower surface of the wafer.

4. The method of claim 1, wherein disposing a light-transmissive film on the top surface of the wafer comprises:

and carrying out film coating treatment on the upper surface of the wafer, and curing the film coated material to enable the film surface to be attached to the upper surface to form a light-transmitting film layer.

5. The method of claim 4, wherein curing the material of the cover film comprises: and carrying out ultraviolet curing or baking curing on the material of the coating film to cure the material of the coating film on the upper surface.

6. The method of claim 1, wherein removing the portion of the light-transmissive film layer over each of the pad regions to expose the pad of each of the pad regions comprises:

determining the distance from the surface of the light-transmitting film layer far away from the upper surface to the bonding pad by using laser ranging, and removing the light-transmitting film layer on the bonding pad region by using a mechanical removal mode according to the distance; or, removing the light-transmitting film layer on the bonding pad area by using a laser mode.

7. A chip package structure, comprising:

a carrier plate;

the wafer is arranged on the carrier plate and comprises a photosensitive area and a bonding pad area, and the bonding pad area is provided with a bonding pad;

a light-transmitting film layer arranged on the photosensitive region of the wafer;

and the wire is used for electrically connecting the carrier plate with the bonding pad.

8. The structure of claim 7, wherein the chip package structure further comprises:

and the support colloid is positioned between the carrier plate and the lead so as to support and fix a wire arc formed by the lead.

9. The structure of claim 7 or 8, wherein the light-transmissive film layer has a thickness of 65 to 95 microns.

10. The structure of claim 7 or 8, wherein the light-transmissive film layer has a light transmittance of greater than 93% for light in the 380-780 nm wavelength band.

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