CN111508445B

CN111508445B - Time sequence controller

Info

Publication number: CN111508445B
Application number: CN201910099328.6A
Authority: CN
Inventors: 林衣修; 蔡政哲; 翁铭鸿; 吴东颖; 张家荣
Original assignee: Himax Technologies Ltd
Current assignee: Himax Technologies Ltd
Priority date: 2019-01-31
Filing date: 2019-01-31
Publication date: 2022-02-22
Anticipated expiration: 2039-01-31
Also published as: CN111508445A

Abstract

A timing controller is suitable for a liquid crystal display, the liquid crystal display includes a liquid crystal display panel; a scan driver, controlled by the timing controller, turns on pixel rows of the liquid crystal display panel in a default order through a plurality of scan control signals; and a data driver, Controlled by the timing controller, the image signal is transmitted to the liquid crystal display panel through multiple channels. The timing controller transmits the charge sharing control signal to the data driver for dynamically controlling the charge sharing of the data driver.

Description

Time sequence controller

[ technical field ] A method for producing a semiconductor device

The present invention relates to a charge sharing method, and more particularly, to a dynamic charge sharing method applicable to a liquid crystal display.

[ background of the invention ]

As the resolution of the liquid crystal display becomes higher and the panel size becomes larger, the driver of the liquid crystal display will consume more power supply power. In addition, the ac current consumption of the lcd is also affected by the capacitive load. Accordingly, a charge sharing mechanism is generated, in which an electrical short is formed between channels of the data driver before the output level of the image data is generated, so as to obtain an average output level. Some power is conserved through charge sharing.

Fig. 1A is a signal waveform diagram illustrating image data. In this example, the previous image data is at a low voltage level, whereas the next image data is at a high voltage level, as shown by the signal waveforms in the middle of FIG. 1A. If charge sharing is used (e.g., the bottom signal waveform shown in FIG. 1A), the image data is first pulled to an average voltage level, thereby conserving some power. Fig. 1B is a signal waveform diagram illustrating another image data. In this example, the previous image data is at a low voltage level, and the next image data is also at a low voltage level, as shown by the signal waveforms in the middle of fig. 1B. If charge sharing (such as the bottom signal waveform shown in FIG. 1B) is used, the image data is first pulled up to the average voltage level and then pulled down to the low voltage level, thereby wasting some power.

The charge sharing function of the conventional lcd is fixed, so that the charge sharing is continuously performed for all image frames (image frames) and all image rows. As illustrated in fig. 1B, for some pixel patterns, using conventional charge sharing does not save power, but increases power consumption. Overall, the conventional charge sharing method cannot achieve substantial power saving.

Therefore, a need exists for a novel method to efficiently perform charge sharing, thereby substantially reducing power consumption.

[ summary of the invention ]

In view of the above, an objective of the embodiments of the present invention is to provide a dynamic charge sharing method applicable to a liquid crystal display, which determines whether each image column performs charge sharing according to the magnitude of a charging voltage required by each image column, so as to effectively save power consumption of a data driver and reduce operating temperature.

The time schedule controller suitable for the liquid crystal display comprises a liquid crystal display panel; the scanning driver is controlled by the time sequence controller and starts the pixel rows of the liquid crystal display panel according to a default sequence through a plurality of scanning control signals; and a data driver controlled by the timing controller for transmitting the image signal to the liquid crystal display panel through a plurality of channels. The time schedule controller executes the following steps: transmitting a charge sharing control signal to the data driver for dynamically controlling charge sharing of the data driver, wherein the timing controller performs the following steps: converting the image row signal into a voltage level; determining an average level of each image row according to the voltage level; determining a first charge value representing a charge voltage required when displaying a next image row if charge sharing is performed; determining a second charge value representing a charge voltage required when displaying a next image row if charge sharing is not performed; comparing the first charge value with the second charge value; and if the first charge value is smaller than the second charge value, performing charge sharing, and if the first charge value is not smaller than the second charge value, not performing charge sharing.

[ description of the drawings ]

Fig. 1A is a signal waveform diagram illustrating image data.

Fig. 1B is a signal waveform diagram illustrating another image data.

FIG. 2 is a system block diagram of an embodiment of a liquid crystal display with dynamic charge sharing.

Fig. 3 is a flowchart illustrating a dynamic charge sharing method according to an embodiment of the invention.

FIG. 4 illustrates a plurality of image columns and converted voltage levels.

Fig. 5A illustrates first charge values of respective image rows.

Fig. 5B illustrates second charge values of each of a plurality of image rows.

Fig. 5C illustrates a comparison of the first charge value and the second charge value.

FIG. 6 is a current waveform diagram illustrating an embodiment of the present invention and a conventional method.

[ notation ] to show

100 liquid crystal display with dynamic charge sharing

11 liquid crystal display panel

12 scan driver

13 data driver

14 time sequence controller

200 dynamic charge sharing method

21 converting the video column signal to a voltage level

22 determining the average level of each image row

23 determine a first charge value

24 determining a second charge value

25 determining whether the first charge value is less than the second charge value

26 for charge sharing

27 next image row

Curve of 61 wave form

62 wave curve

63 wave curve

G1-Gm scanning control signal

S1-Sn image signal

STV start pulse signal

CPV shift frequency signal

TP/POL load/polarity select signal

CS charge sharing control signal

CH 1-CH 6 channel

L0-L5 video sequences

First charge value of CSDV

nCSDV second charging value

[ detailed description ] embodiments

Fig. 2 is a system block diagram of a dynamic charge sharing lcd 100 according to an embodiment of the present invention. In the present embodiment, the liquid crystal display with dynamic charge sharing (hereinafter referred to as the liquid crystal display) 100 may include a liquid crystal display panel 11, a scan driver (or referred to as a gate driver) 12, a data driver (or referred to as a source driver) 13, and a timing controller 14. The scan driver 12 turns on the pixel rows of the liquid crystal display panel 11 in a default order by the scan control signals G1 to Gm. The data driver 13 transmits the video signals S1 Sn to the liquid crystal display panel 11 through a plurality of (column) channels. The timing controller 14 controls the scan driver 12 and the data driver 13. For example, the timing controller 14 transmits a start pulse (start pulse) signal STV to the scan driver 12 at the beginning of the image frame (image frame), and transmits a shift clock (shift clock) signal CPV to a shifter (not shown) of the scan driver 12. In addition, the timing controller 14 transmits a load/polarity select (polarity select) signal TP/POL to the data driver 13 to control polarity inversion of the video signals S1 to Sn. According to one feature of the present embodiment, the timing controller 14 transmits the charge sharing control signal CS to the data driver 13 for dynamically controlling the charge sharing of the data driver 13, which will be described in detail below.

Fig. 3 is a flowchart illustrating a dynamic charge sharing method 200 according to an embodiment of the invention, which is applicable to the lcd 100 shown in fig. 2. First, in step 21, the video column signals (e.g., video signals S1 to Sn) are converted into voltage levels. FIG. 4 illustrates a plurality of video lines L0-L5 and the converted voltage levels. For ease of understanding, only six signal channels CH 1-CH 6 are shown. It should be noted that the present embodiment may perform the voltage level conversion for all channels, but may also perform the voltage level conversion for only a part of the channels. Although fig. 4 illustrates a plurality of image rows, the embodiment can store only two image rows at adjacent times to save the storage space. Next, in step 22, the average level (i.e. the charge sharing voltage) of each image row is determined according to the voltage level of each image row obtained in the previous step (step 21). Generally, the average levels of the image rows are different from each other.

In step 23, a first charge value is determined, which represents (the absolute value of) the charge voltage required when displaying the next image row if charge sharing is performed. Fig. 5A illustrates the first charge value CSDV of each of the plurality of image rows. In the present embodiment, the first charge value is the total value of the charge voltage (i.e. the voltage level minus the average level) of the corresponding image row. However, in other embodiments, the first charging value may be an average value of the charging voltages of the corresponding image rows. It should be noted that the first charging value may be determined for all channels in the embodiment, but may be determined for only a part of the channels.

In step 24, a second charge value is determined, which represents (the absolute value of) the charge voltage required when displaying the next image row, if no charge sharing is performed. Fig. 5B illustrates the second charge value nCSDV of each of the plurality of image rows. In the present embodiment, the second charging value is the total value of the charging voltage of the corresponding image row (i.e. the current row minus the previous row). However, in other embodiments, the second charging value may be an average value of the charging voltages of the corresponding image rows. It should be noted that the second charging value may be determined for all channels in the embodiment, but may also be determined for only a part of the channels.

At step 25, the first charge value CSDV (determined at step 23) and the second charge value nCSDV (determined at step 24) are compared, as shown in FIG. 5C. If the first charge value CSDV is less than the second charge value nCSDV (i.e., CSDV < nCSDV), the timing controller 14 transmits an asserted charge sharing control signal CS to the data driver 13 for controlling the data driver 13 to perform charge sharing (step 26). Then, the above steps are repeated for the next image row (step 27). In contrast, if the first charge value CSDV is not less than the second charge value nCSDV (i.e., CSDV > ═ nCSDV), the timing controller 14 transmits the inactive (de-asserted) charge sharing control signal CS to the data driver 13, and the data driver 13 does not perform charge sharing. Then, the above steps are repeated for the next image row (step 27).

According to the above, in the present embodiment, before displaying each image row, the magnitude of the required charging voltage is calculated to determine whether each image row performs charge sharing, so that the power consumption of the data driver 13 can be effectively saved to achieve the power saving effect, and the operating temperature of the data driver 13 can be reduced. FIG. 6 is a current waveform diagram illustrating an embodiment of the present invention and a conventional method. The waveform curve 61 represents the current required for the conventional charge sharing for all the image rows, the waveform curve 62 represents the current required for the conventional charge sharing for all the image rows, and the waveform curve 63 represents the current required for the dynamic charge sharing according to the present embodiment, which is significantly lower than the current consumed by the conventional method.

The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention; other equivalent changes and modifications without departing from the spirit of the disclosure are intended to be included within the scope of the following claims.

Claims

1. A timing controller, suitable for a liquid crystal display, the liquid crystal display comprising a liquid crystal display panel; a scan driver, controlled by the timing controller, opens pixel rows of the liquid crystal display panel in a default order through a plurality of scan control signals; and a data driver, controlled by the timing controller, to transmit image signals to the liquid crystal display panel through a plurality of channels, and the timing controller performs the following steps:

The timing controller transmits a charge sharing control signal to the data driver for dynamically controlling the charge sharing of the data driver, wherein the timing controller performs the following steps:

Convert the image column signal to a voltage level;

according to the voltage level, to determine the average level of each image row;

determining the first charge value, which represents the charge voltage required when the next image row is displayed if charge sharing is performed;

determining the second charging value, which represents the charging voltage required when the next image row is displayed if the charge sharing is not performed;

comparing the first charge value with the second charge value; and

If the first charging value is less than the second charging value, charge sharing is performed, and if the first charging value is not less than the second charging value, charge sharing is not performed.

2. The timing controller of claim 1, wherein the step of converting to a voltage level is performed for at least some of the channels.

3. The timing controller according to claim 1, wherein the timing controller further comprises performing the following steps:

The voltage levels of at least two image columns at adjacent times are stored.

4 . The timing controller of claim 1 , wherein the first charging value is equal to a total value or an average value of the next row of images minus the average level. 5 .

5. The timing controller of claim 1, wherein the step of determining the first charge value is performed for at least part of the channels.

6 . The timing controller of claim 1 , wherein the second charging value is equal to the total value or average value of the next row of images minus the previous row of images. 7 .

7. The timing controller of claim 1, wherein the step of determining the second charge value is performed for at least part of the channels.

8. The timing controller according to claim 1, wherein if the first charging value is less than the second charging value, the timing controller generates an effective charge sharing control signal to the data driver to perform charge sharing; if The first charging value is not smaller than the second charging value, and the timing controller generates an inactive charge sharing control signal to the data driver to prevent charge sharing.