CN111488720B - A method, device and equipment for obtaining circuit wiring topology information - Google Patents

Abstract

The invention discloses a method for acquiring circuit connection topology information, which comprises the following steps: s1, obtaining a circuit layout pattern; s2, acquiring all edges of the layout pattern according to the circuit layout pattern; s3, obtaining edges in a corresponding relation among the parallel edges; wherein the corresponding side is that two line segments have projection between each other and the central lines of the two line segments are in the polygon; s4, obtaining mutually corresponding edges from the non-parallel edges; s5, acquiring a central line segment according to the mutually corresponding edges; and S6, acquiring the circuit connection topology information according to the center line segment. The invention obtains the topological information of the circuit connecting line corresponding to the circuit layout by obtaining the layout pattern and solving the center line segment of the edge according to the information of the edge of the circuit layout pattern.

Description

A method, device and equipment for obtaining circuit connection topology information

technical field

The invention relates to the field of integrated circuit manufacturing, in particular to a method for acquiring circuit connection topology information.

Background technique

Given the layout of an integrated circuit, in order to deduce the circuit connection and analyze it, it is necessary to extract the center line including the wiring pattern of the layout. Referring to Figure 1, the layout pattern can be regarded as a pattern composed of a series of polygons, and the center line of each layout polygon can represent the direction and shape of the polygon.

In addition to the regular right-angled polygons in Figure 1, some layouts will become less regular after Optical Proximity Correction (OPC), as shown in Figure 2. If the given layout reticle is the pattern after OPC (Figure 2(b)), it is necessary to calculate the centerline of the layout pattern before OPC (Figure 2(a)).

The background description provided herein is for the purpose of generally presenting the context of the disclosure. Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.

Contents of the invention

Aiming at the above-mentioned technical problems in the related art, the present invention proposes a method for obtaining circuit connection topology information, which can obtain circuit connection topology information from a circuit layout.

In order to achieve the above-mentioned technical purpose, an embodiment of the present invention provides a method for obtaining circuit connection topology information, which includes the following steps:

S1, obtaining a circuit layout pattern;

S2. Obtain all sides of the layout pattern according to the circuit layout pattern;

S3, among the sides parallel to each other, obtain the sides corresponding to each other; wherein the corresponding side is that two line segments have projections between each other and the centerlines of the two line segments are within the polygon;

S4, obtain the sides corresponding to each other from the non-parallel sides;

S5. Obtain a center line segment according to the sides corresponding to each other;

S6. Obtain topology information of the circuit connection according to the central line segment.

Further, step S3 specifically includes:

S31, judging whether the two sides are parallel; if not parallel, return not corresponding to each other; if parallel, continue;

S32, judging whether the two parallel sides have overlapping intervals; if not, return not corresponding to each other; if yes, continue;

S33, judging whether the centerlines of two sides that are both parallel and overlapped are within the polygon; if not, then return; if yes, return the two sides corresponding to each other.

Further, step S4 specifically includes:

S41, judging whether the two sides have overlapping intervals; if not, return not corresponding to each other; if yes, continue;

S42, whether the center line formed by these two sides is in the polygon; if yes, return the correspondence between the two sides.

Further, step S5 specifically includes:

S51, when one side only corresponds to another side, directly find the center line segment;

S52. When one side and multiple sides correspond to each other, first merge the multiple sides into one, and then find the center line segment.

Further, after step S6, one or more of the following steps are included:

S7, delete miscellaneous edges: delete the center line segment whose distance from other center line segments is greater than its own length;

or/and

S8, merging parallel lines: merging parallel center line segments with coincident projections and a distance smaller than a threshold;

or/and

S9, intersecting lines: remove the intersection of two line segments with intersection points;

or/and

S10, extend and stretch the center line: extend and stretch the line segment to intersect;

or/and

S11, connect the connected subsets, and find the closest endpoints to connect, so that the connected subsets are merged in pairs until all the connected subsets are one.

In order to achieve the purpose of the present invention, an embodiment of the present invention also provides a device for obtaining circuit connection topology information, which includes the following units:

A circuit layout acquisition unit, configured to acquire a circuit layout pattern;

an edge acquiring unit, configured to acquire all edges of the layout pattern according to the circuit layout pattern;

The first corresponding side obtaining unit is used to obtain the side corresponding to each other among the sides parallel to each other; wherein the corresponding side is that two line segments have projections between each other and the centerlines of the two line segments are within the polygon;

The second corresponding edge obtaining unit is used to obtain mutually corresponding edges from non-parallel edges;

The central line segment obtaining unit is used to obtain the central line segment according to the sides corresponding to each other;

The circuit connection topology information obtaining unit is configured to obtain the circuit connection topology information according to the central line segment.

Further, the first corresponding edge obtaining unit of the device also includes:

Parallel side judging unit, used to judge whether two sides are parallel; if not parallel, return not corresponding to each other; if parallel, continue;

The first overlapping interval judging unit is used to judge whether there is an overlapping interval between two parallel sides; if there is no overlapping interval, then return not corresponding to each other; if yes, continue;

The first polygon judging unit is used for judging whether the centerlines of two sides that are both parallel and overlapping are within the polygon; if they are not, then return; if they are, then return that the two sides correspond to each other.

Further, the second corresponding edge obtaining unit of the device also includes:

The second overlapping interval judging unit is used to judge whether there is an overlapping interval between two sides; if not, then return not corresponding to each other; if yes, continue;

The second polygon judging unit is used for judging whether the center line formed by the two sides is in the polygon; if yes, it returns that the two sides correspond to each other.

Further, the central line acquisition unit of the device also includes:

The first acquisition unit is used to directly find the center line segment when one side only corresponds to another side;

The second acquisition unit is used to merge the multiple sides into one when one side and multiple sides correspond to each other, and then find the center line segment.

Further, the device also includes one or more of the following units:

Delete miscellaneous edge unit, used to delete the center line segment whose distance from other center line segments is greater than its own length;

or/and

Merging parallel line units, used for merging parallel central line segments with overlapping projections and a distance less than a threshold;

or/and

A cross-line processing unit, configured to remove the intersection of two line segments with intersection points;

or/and

Extend and stretch centerline processing unit for extending and stretching line segments to intersection;

or/and

The connected subset processing unit is used to find the closest endpoints for connection, so that the connected subsets are merged in pairs until all the connected subsets become one.

To achieve the purpose of the present invention, this embodiment also provides a device for obtaining circuit connection topology information, the device includes a processor, a non-volatile storage medium, codes are stored on the non-volatile storage medium, When the code is executed by the processor, it is used to realize the method of the steps S1-S6.

The present invention acquires the layout pattern, and according to the edge information of the circuit layout file, obtains the circuit connection topology information corresponding to the circuit layout by solving the center line segment of the edge. The solution of the edge center line in the present invention is divided into parallel line segments and The non-parallel line segment can obtain the center line segment of the edge more accurately, so as to obtain the topological information of the circuit connection more accurately. Further, the embodiment of the present invention can also optimize the obtained center line segment, such as deleting edges, merging, etc., so as to obtain the center line segment more accurately, especially for the circuit layout due to optical proximity correction (OPC) processing The post-reticle pattern can effectively restore the centerline of the original layout before processing, so that the topological information of the circuit wiring can be obtained more accurately.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the accompanying drawings required in the embodiments. Obviously, the accompanying drawings in the following description are only some of the present invention. Embodiments, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without any creative effort.

Figure 1 is an example of a polygonal pattern in a circuit layout;

Figure 2 is the layout mask pattern after OPC;

Fig. 3 is a schematic flowchart of a method for obtaining circuit connection topology information provided by an embodiment of the present invention;

Fig. 4 is a schematic diagram of projection of a line segment on a straight line in an embodiment of the present invention;

Fig. 5 is a schematic diagram of calculating a projection between two line segments in an embodiment of the present invention;

Fig. 6 is a schematic diagram of finding a central line segment from parallel line segments in an embodiment of the present invention;

Fig. 7 is a schematic diagram of finding a central line segment from non-parallel line segments in an embodiment of the present invention;

Fig. 8 is a schematic diagram of the central line segment of optimization processing in the embodiment of the present invention;

FIG. 9 is a schematic diagram of a topology information device for obtaining circuit connections provided by an embodiment of the present invention;

Fig. 10 is a schematic diagram of a device for obtaining topology information of circuit connections provided by an embodiment of the present invention.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments of the present invention belong to the protection scope of the present invention.

Embodiment one

With reference to accompanying drawing 1, present embodiment has realized a kind of method for obtaining circuit connection topology information, and it comprises the following steps:

S1, obtaining a circuit layout pattern;

The circuit layout pattern in this embodiment may be a GDSII file, or other files representing the circuit layout pattern, such as a formatted file, which stores edge information of the circuit layout file and so on.

S2. Obtain all sides of the layout pattern according to the circuit layout pattern;

Specifically, if the GDSII file is obtained, it needs to be converted into a formatted file. The formatted file stores edge information, and the edge information is expressed in the form of edge data structure. In the data structure Stores the basic information of a line segment, including the two endpoints of the line segment, and the parameters of the line segment corresponding to the straight line, such as slope. Furthermore, all edges of the layout pattern can be obtained from the formatted file.

S3, among the sides parallel to each other, obtain the sides corresponding to each other; wherein the corresponding side is that two line segments have projections between each other and the centerlines of the two line segments are within the polygon;

When acquiring the center line segment in this embodiment, first obtain the corresponding side, the corresponding side in this embodiment is defined as: if two sides correspond to each other, then the center line segment obtained by it is similar to a certain section of the standard center line or coincide.

Specifically, the following two methods can be used to determine whether the two sides correspond: 1) the two line segments have projections between each other; 2) the central line segment of the two parallel line segments is within the polygon.

The projection of a line segment on another line segment is its projection on the line of the other line segment. The projection of the line segment on the straight line is shown in Figure 4, where the thick line area is the projection area.

In order to find the corresponding edge, it is necessary to confirm whether there is a projection overlap between the two line segments. For example, there are two line segments AB and CD, and the projection line segment of AB on the straight line where CD is located is set as EF. If the line segments EF and CD overlap, it means that the line segment AB has a projection overlapping area on the line segment CD. And only when the line segment AB has a projection on the line segment CD, and the line segment CD has a projection on the line segment AB, it is said that the two line segments have a projection on each other.

Step S3 in this embodiment further includes:

S31, judging whether the two sides are parallel; if not parallel, return not corresponding to each other; if parallel, continue;

S32, judging whether the two parallel sides have overlapping intervals; if not, return not corresponding to each other; if yes, continue;

S33, judging whether the centerlines of two sides that are both parallel and overlapped are within the polygon; if not, then return; if yes, return the two sides corresponding to each other.

In this embodiment, all sides are firstly obtained, and according to the method referring to FIG. 5( a ), a combination of two parallel and projections is found as alternative corresponding sides.

In addition to judging whether there is a projection between the two sides, it is necessary to further judge whether the two sides form the corresponding side, and whether the center line segment is inside the polygon. Specifically, the scan line can be used to first mark all the pixels in the polygon, and then judge the current center line Whether the trajectory of is within the polygon. Only if their center line segments are inside the polygon can the two sides finally form corresponding sides.

S4, unpaired sides, from the non-parallel sides, get the sides corresponding to each other;

After step S3, there are still some sides in the layout file that are not parallel. For other sides that do not find corresponding sides in step S3, refer to Fig. 5(b), and further use the following steps to determine whether there are corresponding sides:

S41, judging whether the two sides have overlapping intervals; if not, return not corresponding to each other; if yes, continue;

S42, whether the center line formed by these two sides is in the polygon; if yes, return the correspondence between the two sides.

After step S3, S4 finds out all the corresponding sides existing in the layout file.

S5. Obtain a center line segment according to the mutually corresponding sides, and obtain topology information of the circuit connection according to the center line segment.

According to the obtained center line segments, the circuit connection information can be obtained by connecting the center line segments, so as to obtain the circuit connection topology information from the layout file.

Specifically, it further includes:

S51, when one side only corresponds to another side, directly find the center line segment;

S52. When one side and multiple sides correspond to each other, first merge the multiple sides into one, and then find the center line segment.

Find the center line segment of the corresponding side, divided into two cases: the corresponding side is parallel and the corresponding side is not parallel:

1. The center line segment when the corresponding sides are parallel

In the case where the corresponding sides are parallel, one side may correspond to multiple parallel sides, or may only correspond to one parallel side. When it corresponds to only one side, directly calculate the center line segment. When it corresponds to multiple sides, then among the corresponding multiple sides, take out the multiple sides closest to it (the distance is less than a threshold, indicating that the distance is the same) to synthesize a long side, and find the center line segment.

Referring to Figure 6, the process is as follows:

S521: From among the corresponding multiple sides, first take out a parallel side with the closest distance. Then take out other parallel edges whose distance from this edge does not exceed a given threshold, if not, do not continue to take.

S522: If only one parallel corresponding side is taken out, directly calculate the central line segment.

S533: If multiple parallel corresponding sides are taken out, consider their respective lengths as weights, calculate a long side to represent the multiple parallel sides, and then sum the central line segments of the long sides. Assuming that there are n parallel short line segments to be merged, the slopes are all k, the formula of the straight line corresponding to the i-th line segment is y _i =k× _xi +b _i , and the length of the line segment is l _i , after the line segments are merged, the corresponding straight line y is shown in formula (1).

2. The center line segment when the corresponding sides are not parallel

When the corresponding sides are not parallel, one side may correspond to multiple non-parallel sides, or it may correspond to one. Corresponding to the case of one, find the center line segment directly. For the case of multiple non-parallel sides, it is sufficient to calculate the sum of the center line segment of each corresponding side.

The method of directly finding the center line segment of each corresponding side: first find the angle bisector of the straight line where the two line segments are located, and then find the intersection of the angle bisector and the overlapping area as the center line segment. Figure 7 shows the center line segment of two non-parallel sides.

The result of the center line segment obtained in step S5 is relatively close to the actual center line, but it is still a series of disordered, disconnected or partially overlapping line segments. Integration processing is also required, including: 1) delete the miscellaneous edges; 2) merge the overlapping line segments; 3) remove the intersection of the intersecting line segments; 4) connect the front and rear center line segments. Finally, all the center line segments are combined into a whole, which is converted into points and output in order.

Specifically include:

S6. Delete matte: if the current center line segment is far away from all other center line segments, for example, the minimum distance between it and all center line segments is greater than its length, then the current line segment can be removed.

S7. Merging line segments that overlap: if multiple line segments are parallel to each other and have overlapping projections, and the distance between them is less than a threshold, then these line segments can be merged, as shown in Figure 8 (a), the calculation method is as in formula (1 ) shown.

S8. Remove the intersection part of the intersecting line segments: if two line segments intersect, the self-intersection point is the boundary point of the respective line segments, and each line segment is divided into two parts, and the shorter part of the overlapping part is removed respectively. As shown in Figure 8(b), when the line segments intersect, the intersection point is used as the boundary to divide the segments, and then the longer parts of the respective segments are taken for combination.

S9. Connecting the front and back center line segments: For the two endpoints of each line segment, find the line segment closest to the end point, if the distance is less than a certain threshold, which can be 1 times the length of the current line segment, then perform connection processing. If the adjacent line segment is not parallel to the current line segment, it will be extended when connecting; if it is parallel, it will be stretched when connecting.

After the above steps are processed, all line segments will still be disconnected. S9, the connected line segments are called connected subsets. Between the connected subsets, find the nearest endpoint to connect, so that the connected subsets are merged in pairs until all the connected subsets are one. Figure 8(c)(d)(e) give examples of extending, stretching and merging connected subsets, respectively.

Convert to output format: Finally, traverse all line segments and output points in order. Of course, in order to control the number of output points, denoising operation can also be performed, that is, when traversing a line segment, it is judged whether each endpoint falls on the connecting line formed by its front and back endpoints. If true, no output is required for this endpoint.

In this embodiment, by optimizing the obtained center line segment, the center line segment can be obtained more accurately, so that the topological information of the circuit connection can be obtained more accurately.

Embodiment two

Referring to FIG. 9, this embodiment provides a device for obtaining topology information of circuit connections, which includes the following units:

A circuit layout acquisition unit, configured to acquire a circuit layout pattern;

an edge acquiring unit, configured to acquire all edges of the layout pattern according to the circuit layout pattern;

The first corresponding side obtaining unit is used to obtain the side corresponding to each other among the sides parallel to each other; wherein the corresponding side is that two line segments have projections between each other and the centerlines of the two line segments are within the polygon;

The second corresponding edge obtaining unit is used to obtain mutually corresponding edges from non-parallel edges;

The central line segment obtaining unit is used to obtain the central line segment according to the sides corresponding to each other;

The circuit connection topology information obtaining unit is configured to obtain the circuit connection topology information according to the central line segment.

Further, the first corresponding edge obtaining unit of the device also includes:

Parallel side judging unit, used to judge whether two sides are parallel; if not parallel, return not corresponding to each other; if parallel, continue;

The first overlapping interval judging unit is used to judge whether there is an overlapping interval between two parallel sides; if there is no overlapping interval, then return not corresponding to each other; if yes, continue;

The first polygon judging unit is used for judging whether the centerlines of two sides that are both parallel and overlapping are within the polygon; if they are not, then return; if they are, then return that the two sides correspond to each other.

Further, the second corresponding edge obtaining unit of the device also includes:

The second overlapping interval judging unit is used to judge whether there is an overlapping interval between two sides; if not, then return not corresponding to each other; if yes, continue;

The second polygon judging unit is used for judging whether the center line formed by the two sides is in the polygon; if yes, it returns that the two sides correspond to each other.

Further, the central line acquisition unit of the device also includes:

The first acquisition unit is used to directly find the center line segment when one side only corresponds to another side;

The second acquisition unit is used to merge the multiple sides into one when one side and multiple sides correspond to each other, and then find the center line segment.

Further, the device also includes one or more of the following units:

Delete miscellaneous edge unit, used to delete the center line segment whose distance from other center line segments is greater than its own length;

or/and

Merging parallel line units, used for merging parallel central line segments with overlapping projections and a distance less than a threshold;

or/and

A cross-line processing unit, configured to remove the intersection of two line segments with intersection points;

or/and

Extend and stretch centerline processing unit for extending and stretching line segments to intersection;

or/and

The connected subset processing unit is used to find the closest endpoints for connection, so that the connected subsets are merged in pairs until all the connected subsets become one.

Embodiment Three

Referring to FIG. 10 , this embodiment provides a schematic structural diagram of a topology information device 20 for acquiring circuit connections. The device 20 for obtaining topology information of circuit connections in this embodiment includes a processor 21 , a memory 22 and a computer program stored in the memory 22 and operable on the processor 21 . When the processor 21 executes the computer program, the steps in the above embodiment of the method for obtaining topology information of circuit connections are implemented, for example, step S1 shown in FIG. 2 . Alternatively, when the processor 21 executes the computer program, it realizes the functions of the modules/units in the above-mentioned device embodiments, such as the first acquisition module 11 .

Exemplarily, the computer program can be divided into one or more modules/units, and the one or more modules/units are stored in the memory 22 and executed by the processor 21 to complete this invention. The one or more modules/units may be a series of computer program instruction segments capable of accomplishing specific functions, and the instruction segments are used to describe the execution process of the computer program in the circuit connection topology information acquisition device 20 .

The device 20 for acquiring circuit connection topology information may include, but is not limited to, a processor 21 and a memory 22 . Those skilled in the art can understand that the schematic diagram is only an example of the topology information device 20 for obtaining circuit connections, and does not constitute a limitation on the topology information device 20 for obtaining circuit connections, and may include more or less than those shown in the illustration. components, or a combination of certain components, or different components, for example, the device 20 for acquiring circuit connection topology information may also include input and output devices, network access devices, buses, and the like.

The processor 21 may be a central processing unit (Central Processing Unit, CPU), and may also be other general-purpose processors, a digital signal processor (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), Off-the-shelf programmable gate array (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc., the processor 21 is the control center of the topology information device 20 for obtaining circuit connections, and is connected by various interfaces and lines Each part of the topological information device 20 of the whole acquisition circuit connection.

The memory 22 can be used to store the computer programs and/or modules, and the processor 21 runs or executes the computer programs and/or modules stored in the memory 22, and calls the data stored in the memory 22, Various functions of the topology information device 20 for acquiring circuit connections are realized. The memory 22 can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one function required application program (such as a sound playback function, an image playback function, etc.) etc.; the storage data area can be Store data (such as audio data, phone book, etc.) created according to the use of the mobile phone. In addition, the memory 22 can include a high-speed random access memory, and can also include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, flash memory card (Flash Card), at least one magnetic disk storage device, flash memory device, or other volatile solid state storage devices.

Wherein, if the integrated modules/units of the device 20 for acquiring circuit connection topology information are realized in the form of software function units and sold or used as independent products, they may be stored in a computer-readable storage medium. Based on this understanding, the present invention realizes all or part of the processes in the methods of the above embodiments, and can also be completed by instructing related hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer When the program is executed by the processor 21, the steps of the above-mentioned various method embodiments can be realized. Wherein, the computer program includes computer program code, and the computer program code may be in the form of source code, object code, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer memory, and a read-only memory (ROM, Read-Only Memory) , Random Access Memory (RAM, Random Access Memory), electrical carrier signal, telecommunication signal, and software distribution medium, etc. It should be noted that the content contained in the computer-readable medium may be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable Excludes electrical carrier signals and telecommunication signals.

It should be noted that the device embodiments described above are only illustrative, and the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physically separated. A unit can be located in one place, or it can be distributed to multiple network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. In addition, in the drawings of the device embodiments provided by the present invention, the connection relationship between the modules indicates that they have a communication connection, which can be specifically implemented as one or more communication buses or signal lines. It can be understood and implemented by those skilled in the art without creative effort.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the scope of the present invention. within the scope of protection.

Claims (7)

1. A method for obtaining circuit connection topology information, comprising the steps of: S1, obtaining a circuit layout pattern; S2. Obtain all sides of the layout pattern according to the circuit layout pattern; S3, among the sides parallel to each other, obtain the sides corresponding to each other; where the sides corresponding to each other are two line segments that have projections between each other and the center lines of the two line segments are within the polygon; S4, obtain the sides corresponding to each other from the non-parallel sides; S5. Obtain a center line segment according to the sides corresponding to each other; When the sides corresponding to each other are parallel, one side corresponds to at least one parallel side; S51, when one side only corresponds to one parallel side, directly find the central line segment; S52, when a side corresponds to a plurality of parallel sides, first merge the plurality of parallel sides into one, and then find the center line segment; Among the corresponding multiple parallel edges, first take out the parallel edge closest to one edge, and then take out other parallel edges whose distance from this parallel edge does not exceed a given threshold; When only one parallel corresponding side is taken out, the center line segment is directly calculated; When multiple parallel corresponding sides are taken out, the respective lengths of multiple parallel corresponding sides are used as weights, and one long side is calculated to represent multiple parallel sides, and then the center line segment of the long side is summed; Suppose there is

Parallel short lines need to be merged, and the slopes are

, No.

The formula for a straight line corresponding to a line segment is

, whose line segment length is

, then after merging line segments, the corresponding straight line

Calculated as follows:

in,

is the straight line equation of the merged line segments,

is the slope,

is the number of parallel short lines,

is the length of the line segment; When the sides corresponding to each other are not parallel, one side corresponds to at least one non-parallel side; S53, when a side corresponds to a non-parallel side, directly find the center line segment; S54, when a side corresponds to a plurality of non-parallel sides, respectively seek a side and the center line segment of each non-parallel side; Methods for finding the centerline segment of a side and each nonparallel side include: First find the angle bisector of a side and a line where a non-parallel side is located; Then find the intersecting part of the angle bisector and the coincident area as the center line segment; S6, delete miscellaneous edges: delete the center line segment whose distance from other center line segments is greater than its own length; or/and S7, merging parallel lines: merging parallel center line segments with coincident projections and a distance smaller than a threshold; or/and S8, intersecting lines: remove the intersection of two line segments with intersection points; or/and S9, extend and stretch the center line: extend and stretch the line segment to intersect; or/and S10, connecting the connected subsets, finding the closest endpoints to connect, so that the connected subsets are merged in pairs until all the connected subsets are one; S11. Obtain topology information of the circuit connection according to the central line segment. 2. The method according to claim 1, wherein step S3 specifically comprises: S31, judging whether the two sides are parallel; if not parallel, return not corresponding to each other; if parallel, continue; S32, judging whether the two parallel sides have overlapping intervals; if not, return not corresponding to each other; if yes, continue; S33, judging whether the centerlines of two sides that are both parallel and overlapped are within the polygon; if not, then return; if yes, return the two sides corresponding to each other. 3. The method according to claim 1, step S4 specifically comprising: S41, judging whether the two sides have overlapping intervals; if not, return not corresponding to each other; if yes, continue; S42, whether the center line formed by these two sides is in the polygon; if yes, return the correspondence between the two sides. 4. A device for obtaining circuit topology information, comprising the following units: A circuit layout acquisition unit, configured to acquire a circuit layout pattern; an edge acquiring unit, configured to acquire all edges of the layout pattern according to the circuit layout pattern; The first corresponding side obtaining unit is used to obtain the side corresponding to each other among the sides parallel to each other; where the side corresponding to each other is that two line segments have projections between each other and the center lines of the two line segments are in the polygon; The second corresponding edge obtaining unit is used to obtain mutually corresponding edges from non-parallel edges; a central line segment obtaining unit, configured to obtain a central line segment according to the sides corresponding to each other; When the sides corresponding to each other are parallel, one side corresponds to at least one parallel side; when one side only corresponds to one parallel side, the center line segment is directly calculated; when one side corresponds to multiple parallel sides, the multiple Merge the parallel sides into one, and then find the center line segment; Among the corresponding multiple parallel edges, first take out the parallel edge closest to one edge, and then take out other parallel edges whose distance from this parallel edge does not exceed a given threshold; When only one parallel corresponding side is taken out, the center line segment is directly calculated; When multiple parallel corresponding sides are taken out, the respective lengths of multiple parallel corresponding sides are used as weights, and one long side is calculated to represent multiple parallel sides, and then the center line segment of the long side is summed; Suppose there is

Parallel short lines need to be merged, and the slopes are

, No.

The formula for a straight line corresponding to a line segment is

, whose line segment length is

, then after merging line segments, the corresponding straight line

Calculated as follows:

in,

is the straight line equation of the merged line segments,

is the slope,

is the number of parallel short lines,

is the length of the line segment; When the sides corresponding to each other are not parallel, one side corresponds to at least one non-parallel side; when one side corresponds to one non-parallel side, directly find the center line segment; when one side corresponds to multiple non-parallel sides, find one the center line segment of the sides and each non-parallel side; Methods for finding the centerline segment of a side and each nonparallel side include: First find the angle bisector of a side and a line where a non-parallel side is located; Then find the intersecting part of the angle bisector and the coincident area as the center line segment; Delete miscellaneous edge unit, used to delete the center line segment whose distance from other center line segments is greater than its own length; or/and Merging parallel line units, used for merging parallel central line segments with overlapping projections and a distance less than a threshold; or/and A cross-line processing unit, configured to remove the intersection of two line segments with intersection points; or/and Extend and stretch centerline processing unit for extending and stretching line segments to intersection; or/and A connected subset processing unit is used to find the closest endpoints for connection, so that the connected subsets are merged in pairs until all the connected subsets become one; The circuit connection topology information obtaining unit is configured to obtain the circuit connection topology information according to the central line segment. 5. The device according to claim 4, wherein the first acquisition unit further comprises: Parallel side judging unit, used to judge whether two sides are parallel; if not parallel, return not corresponding to each other; if parallel, continue; The first overlapping interval judging unit is used to judge whether there is an overlapping interval between two parallel sides; if there is no overlapping interval, then return not corresponding to each other; if yes, continue; The first polygon judging unit is used for judging whether the centerlines of two sides that are both parallel and overlapping are within the polygon; if they are not, then return; if they are, then return that the two sides correspond to each other. 6. The device according to claim 4, the second corresponding edge acquisition unit further comprising: The second overlapping interval judging unit is used to judge whether there is an overlapping interval between two sides; if not, then return not corresponding to each other; if yes, continue; The second polygon judging unit is used for judging whether the center line formed by the two sides is in the polygon; if yes, it returns that the two sides correspond to each other. 7. The device according to claim 4, the centerline segment acquisition unit further comprising: The first acquisition unit is used to directly find the center line segment when one side only corresponds to another side; The second acquisition unit is used to merge the multiple sides into one when one side and multiple sides correspond to each other, and then find the center line segment.

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