CN111477619A - Chip packaging structure and packaging method - Google Patents

Abstract

The invention discloses a packaging structure and packaging method for a chip. The packaging structure includes a first circuit board, a substrate, a first chip, a first metal ball, a second circuit board, a second chip and a second metal ball. The board includes a first surface and a second surface arranged oppositely, and a through hole penetrating the first surface and the second surface; the substrate is located on the first surface and covers the through hole; the first chip is located on the side of the substrate facing the through hole, and the first chip is located on the side of the substrate facing the through hole. The chip extends toward the through hole; the first metal ball is connected to the substrate and the first surface; the second circuit board is located on the second surface and covers the through hole; the second chip is located on the side of the second circuit board facing the through hole, and the second chip faces The through hole extends; the second metal ball is connected to the second circuit board and the second surface. The first metal ball and the second metal ball of the present invention can not only effectively adjust the distance between the first chip and the second chip, but also realize signal transmission.

Description

Chip packaging structure and packaging method

technical field

The invention relates to the technical field of chip packaging, in particular to a chip packaging structure and a packaging method.

Background technique

With the continuous development of science and technology, more and more electronic devices are widely used in people's daily life and work, which has brought great convenience to people's daily life and work, and has become an indispensable and important part of today's people. tool.

The main component of electronic equipment to achieve preset functions is the chip. With the continuous advancement of integrated circuit technology, the integration of the chip is getting higher and higher, the function of the chip is getting more and more powerful, and the size of the chip is getting smaller and smaller, so the chip needs A package structure is formed by packaging, so that the chip is electrically connected to an external circuit board.

In the prior art, referring to FIG. 1 , the package structure 100 includes a first chip 11 and a second chip 12 , and the distance between the first chip 11 and the second chip 12 needs to be precisely controlled to realize the first chip 11 and the second chip 12 precision between.

For example, the first chip 11 is a transmitter. Here, a laser transmitter is taken as an example. It has optical properties such as high brightness, good directivity, good monochromaticity and good coherence. In particular, due to the good directivity of the laser , making the laser the preferred light source for barcode scanning.

In the barcode scanning process, in addition to the laser chip, a scanning device for scanning light emitted from the laser chip is also required, and the second chip 12 is a diffractive optical element that plays a scanning role.

In the prior art, the first chip 11 is fixed on the frame 13 , the second chip 12 is fixed on the substrate 14 , and the end of the frame 13 is fixed with the substrate 14 by the glue 15 . The distance B between the first chip 11 and the second chip 12 is adjusted by the thickness of the first chip 11 and the distance B between the second chip 12 is adjusted. This adjustment method requires special equipment and materials, and the cost is high, the processing time is long, and the yield is low.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a chip packaging structure and packaging method which can improve optical precision, assembly efficiency and reduce cost.

To achieve one of the above purposes of the invention, an embodiment of the present invention provides a chip packaging structure, including:

a first circuit board, comprising a first surface and a second surface disposed opposite to each other, and a through hole penetrating the first surface and the second surface;

a substrate, located on the first surface and covering the through hole;

a first chip, located on the side of the substrate facing the through hole, and the first chip extends toward the through hole;

a first metal ball, connected to the substrate and the first surface;

a second circuit board, located on the second surface and covering the through hole;

a second chip, located on the side of the second circuit board facing the through hole, and the second chip extends toward the through hole;

The second metal ball is connected to the second circuit board and the second surface.

As a further improvement of an embodiment of the present invention, both the first metal ball and the second metal ball are gold balls.

As a further improvement of an embodiment of the present invention, the first chip includes an emitter, and the second chip includes a diffractive optical element.

As a further improvement of an embodiment of the present invention, the package structure further includes a first encapsulant for connecting the side edge of the substrate and the first surface, and connecting the side edge of the second circuit board and the first surface. The second encapsulant on the two surfaces.

As a further improvement of an embodiment of the present invention, the substrate is a transparent substrate.

As a further improvement of an embodiment of the present invention, the side of the substrate facing the through hole is provided with a metal circuit layer, the first circuit board includes a first interconnection circuit, and the second circuit board includes a second interconnection circuit and a third interconnection circuit, the first chip is electrically connected to the metal circuit layer through a first bonding wire, the metal circuit layer is electrically connected to the first interconnection circuit through the first metal ball, and the first metal circuit layer is electrically connected to the first interconnection circuit through the first metal ball. An interconnection circuit is electrically connected to the second interconnection circuit through the second metal ball, and the second chip is electrically connected to the third interconnection circuit through a second bonding wire.

As a further improvement of an embodiment of the present invention, a side of the second circuit board away from the through hole is provided with a second connection terminal and a third connection terminal, and the second connection terminal conducts the second interconnection circuit and the third connection terminal conducts the third interconnection circuit, and the second circuit board is electrically connected to an external circuit board through the second connection terminal and the third connection terminal.

As a further improvement of an embodiment of the present invention, the first circuit board and the second circuit board are both printed circuit boards.

To achieve one of the above purposes of the invention, an embodiment of the present invention provides a method for packaging a chip, comprising the steps of:

fixing the first chip on a substrate, and forming a first metal ball on the substrate to form a first part;

fixing the second chip on the second circuit board, and forming a second metal ball on the second circuit board to form a second part;

forming a through hole on the first circuit board penetrating the first surface and the second surface oppositely disposed on the first circuit board;

bonding the first portion to the first surface of the first circuit board through a flip-chip process, the first chip extending toward the through hole;

The second portion is bonded to the second surface of the first circuit board by a flip-chip process, and the second chip extends toward the through hole.

As a further improvement of an embodiment of the present invention, the step of "bonding the second part to the second surface of the first circuit board through a flip-chip process, the second chip extending toward the through hole" further includes:

Obtain the first distance between the second surface of the first circuit board away from the first part and the first active surface of the first chip away from the substrate, and according to the second active surface of the second chip The desired height of the second metal ball is obtained from the target distance from the first active surface of the first chip and the first distance;

During the flip-chip process, the forming height of the second metal ball is controlled to the desired height by controlling the welding force.

As a further improvement of an embodiment of the present invention, the step "fixing the first chip on the substrate, and forming the first metal ball on the substrate to form the first part" specifically includes:

forming a metal circuit layer on the substrate;

Fixing the first chip on the side of the substrate on which the metal circuit layer is provided by a die bonding process;

The first chip and the metal circuit layer are electrically connected through a wire bonding process;

A first metal ball electrically connected to the metal circuit layer is formed to form a first portion.

As a further improvement of an embodiment of the present invention, the step of "fixing the second chip on the second circuit board, and forming a second metal ball on the second circuit board to form a second part" specifically includes:

Fixing the second chip on the second circuit board through a die bonding process;

Electrically connecting the second chip and the third interconnecting circuit in the second circuit board through a wire bonding process;

A second metal ball is formed to be electrically connected to the second interconnecting circuit in the second circuit board and is configured as a second portion.

As a further improvement of an embodiment of the present invention, the step "bonding the first part to the first surface of the first circuit board by a flip-chip process, the first chip extending toward the through hole; by a flip-chip process Bonding the second part to the second surface of the first circuit board, the second chip extending toward the through hole "specifically includes:

The first metal ball is electrically connected to the first interconnection circuit in the first circuit board through a flip-chip process;

The second metal ball is electrically connected to the first interconnection circuit and the second interconnection circuit in the second circuit board through a flip-chip process.

As a further improvement of an embodiment of the present invention, the method further includes the steps:

A second connection terminal for conducting the second interconnection circuit and a third connection terminal for conducting the third interconnection circuit are formed on the side of the second circuit board away from the through hole.

Compared with the prior art, the beneficial effect of the present invention is that the heights of the first metal ball and the second metal ball in one embodiment of the present invention can be effectively controlled by the welding strength, that is, the first metal ball can be effectively controlled by adjusting the welding strength. The height of a metal ball and a second metal ball can effectively control the distance between the first chip and the second chip, greatly improve the optical accuracy between the first chip and the second chip, and greatly improve the assembly efficiency and reduce the cost. ; In addition, the signal transmission between the substrate, the first circuit board and the second circuit board can be directly realized through the first metal ball and the second metal ball. In other words, the first metal ball and the second metal ball can not only effectively adjust the The distance between the first chip and the second chip can also realize signal transmission.

Description of drawings

1 is a schematic diagram of a package structure in the prior art;

2 is a schematic diagram of a package structure according to an embodiment of the present invention;

3 is a step diagram of a packaging method according to an embodiment of the present invention;

4 to 13 are schematic diagrams of various steps of a packaging method according to an embodiment of the present invention.

Detailed ways

The present invention will be described in detail below with reference to the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and structural, method, or functional changes made by those skilled in the art according to these embodiments are all included in the protection scope of the present invention.

In various drawings of the present invention, some dimensions of structures or parts are exaggerated relative to other structures or parts for convenience of illustration, and thus, are only used to illustrate the basic structure of the subject matter of the present invention.

2 is a schematic diagram of a package structure 200 of a chip according to an embodiment of the present invention.

The package structure 200 includes a first circuit board 20 , a substrate 30 , a first chip 31 , a first metal ball 32 , a second circuit board 40 , a second chip 41 and a second metal ball 42 .

The first circuit board 20 includes a first surface 21 and a second surface 22 disposed opposite to each other, and a through hole 23 penetrating the first surface 21 and the second surface 22 .

The substrate 30 is located on the first surface 21 and covers the through holes 23 .

The first chip 31 is located on the side of the substrate 30 facing the through hole 23 , and the first chip 31 extends toward the through hole 23 .

The first metal balls 32 are connected to the substrate 30 and the first surface 21 .

The second circuit board 40 is located on the second surface 22 and covers the through holes 23 .

The second chip 41 is located on the side of the second circuit board 40 facing the through hole 23 , and the second chip 41 extends toward the through hole 23 .

The second metal balls 42 are connected to the second circuit board 40 and the second surface 22 .

Here, the substrate 30 and the first circuit board 20 are connected through the first metal balls 32 , the second circuit board 40 and the first circuit board 20 are connected through the second metal balls 42 , and the first metal balls 32 and the second metal The height of the balls 42 can be effectively controlled by the welding strength, that is, the heights of the first metal balls 32 and the second metal balls 42 can be effectively controlled by adjusting the welding strength, thereby effectively controlling the distance between the first chip 31 and the second chip 41 . The distance between the first chip 31 and the second chip 41 can be greatly improved, the assembly efficiency can be greatly improved, and the cost can be reduced.

In addition, the substrate 30 and the first circuit board 20 and between the first circuit board 20 and the second circuit board 40 are respectively connected by the first metal balls 32 and the second metal balls 42 having electrical conductivity, and the first metal balls 32 and 42 are respectively connected. The balls 32 and the second metal balls 42 directly realize the signal transmission between the substrate 30 , the first circuit board 20 and the second circuit board 40 . In other words, the first metal balls 32 and the second metal balls 42 can not only effectively adjust the The distance between one chip 31 and the second chip 41 can also realize signal transmission.

It should be noted that the first chip 31 and the second chip 41 are aligned in the vertical direction X, so that light can be transmitted between the first chip 31 and the second chip 41, and the vertical direction X is defined as the substrate 30 , the superposition direction of the first circuit board 20 and the second circuit board 40 .

In addition, "the first metal balls 32 are connected to the substrate 30" means that the first metal balls 32 are located on one side of the substrate 30, and the first metal balls 32 and the substrate 30 may be directly or indirectly connected. When one component is connected to, fixed to, or located at another component in the embodiments, it means that the two components are directly connected or indirectly connected.

In this embodiment, the first chip 31 includes a transmitter 31, and the second chip 41 includes a diffractive optical element 41 (Diffractive Optical Elements, DOE). The first chip 31 and the second chip 41 cooperate with each other to realize barcode scanning, but do not This is the limit.

When the diffractive optical element 41 receives the downward scanning light sent by the transmitter 31, the diffractive optical element 41 divides the scanning light into multiple beams of scanning light to achieve a scanning effect. At this time, it is necessary to effectively control the emission surface of the transmitter 31 and the The distance between the receiving surfaces of the diffractive optical element 41 enables the diffractive optical element 41 to completely receive the scanning light, that is, it is necessary to control the distance between the first working surface 311 of the first chip 31 and the second working surface 411 of the second chip 41 . The target distance H can be effectively controlled by the first metal balls 32 and the second metal balls 42 in this embodiment.

In this embodiment, the substrate 30 is a transparent substrate, so that the multiple beams of scanning light emitted by the diffractive optical element 41 can be transmitted to the outside of the package structure 100 .

The first metal ball 32 and the second metal ball 42 are both gold balls, which can effectively improve signal transmission performance.

The first circuit board 20 and the second circuit board 40 are both printed circuit boards to ensure the overall strength of the package structure 100 and the accuracy of the target distance H adjustment process.

In this embodiment, the first circuit board 20 includes a first interconnection circuit 201 , the first interconnection circuit 201 is a circuit provided by the first circuit board 20 itself, and the first interconnection circuit 201 extends to the first circuit board 20 respectively. A surface 21 and a second surface 22; the second circuit board 40 includes a second interconnection circuit 401 and a third interconnection circuit 402, and the second interconnection circuit 401 and the third interconnection circuit 402 are the circuits of the second circuit board 40 itself, Both the second interconnection line 401 and the third interconnection line 402 extend to the upper surface 43 and the lower surface 44 of the second circuit board 40 , respectively.

The side of the second circuit board 40 away from the through hole 23 (ie, the lower surface 44 of the second circuit board 40 ) is provided with a second connection terminal 4011 and a third connection terminal 4021 , and the second connection terminal 4011 conducts the second interconnection circuit 401 The third connection terminal 4021 conducts the third interconnection circuit 402, and the second circuit board 40 is electrically connected to an external circuit board, such as a system control board, through the second connection terminal 4011 and the third connection terminal 4021.

The side of the substrate 30 facing the through hole 23 is provided with a metal circuit layer 33 , and the first chip 31 is electrically connected to the metal circuit layer 33 through a first bonding wire 34 .

Here, the metal circuit layer 33 includes a protective layer 301, a redistribution layer 302 and a solder resist layer 303 that are connected to the substrate 30 in sequence. The thermal expansion coefficient of the protective layer 301 may be between the substrate 30 and the redistribution layer 302, but it is not However, the disposition of the protective layer 301 can prevent the redistribution layer 301 and the substrate 30 from being separated from each other under stress pulling.

One end of the first metal ball 32 is electrically connected to the solder resist layer 303 , and the first chip 31 is electrically connected to the redistribution layer 302 through the first bonding wire 34 .

The metal circuit layer 33 is electrically connected to the first interconnection circuit 201 through the first metal ball 32 , and the first interconnection circuit 201 is electrically connected to the second interconnection circuit 401 through the second metal ball 42 . In this way, the first chip 31 can pass through the first The bonding wire 34 , the metal circuit layer 33 , the first metal ball 32 , the first interconnecting circuit 201 , the second interconnecting circuit 401 and the second connecting terminal 4011 are electrically connected to the external circuit board, so that the external circuit board can realize the The control of a chip 31 , for example, controls the power-on and shutdown operations of the first chip 31 .

The second chip 41 is electrically connected to the third interconnecting circuit 402 through the second bonding wire 45 . In this way, the second chip 41 can be electrically connected to the third interconnecting circuit 402 through the second bonding wire 45 , the third interconnecting circuit 402 and the third connecting terminal 4021 in sequence. The external circuit board, so that the control of the second chip 41 can be realized through the external circuit board, for example, the scanning direction and the scanning range of the second chip 41 can be controlled.

It can be seen that in this embodiment, conduction between the substrate 30 , the first circuit board 20 and the second circuit board 40 can be achieved through the first metal balls 32 and the second metal balls 42 , so that the first chip 31 and the second circuit board 40 can be connected to each other. The two chips 41 are electrically connected to the external circuit board, and the control of the chips is realized through a simple structure.

In this embodiment, the package structure 100 further includes a first encapsulant 35 connecting the side edge 304 of the substrate 30 and the first surface 21 of the first circuit board 20 , and connecting the side edge 403 and the second circuit board 40 The second encapsulant 46 and the first encapsulant 35 on the surface 22 can improve the stability of the cooperation between the substrate 30 and the first circuit board 20. Similarly, the arrangement of the second encapsulant 46 can improve the stability of the second circuit board 40. Stability of cooperation with the first circuit board 20 .

An embodiment of the present invention also provides a method for packaging a chip. With reference to the description of the packaging structure 100 and FIGS. 3 to 13, the method for packaging a chip includes the steps:

S1 : with reference to FIGS. 4 to 7 , fix the first chip 31 on the substrate 30 , and form the first metal balls 32 on the substrate 30 to form the first portion P1 ;

Step S1 specifically includes:

forming a metal circuit layer 33 on the substrate 30;

Here, the metal wiring layer 33 includes a protective layer 301 , a redistribution layer 302 and a solder resist layer 303 which are sequentially connected to the substrate 30 .

The first chip 31 is fixed on the side of the substrate 30 where the metal circuit layer 33 is provided by a die bonding process;

The first chip 31 and the metal circuit layer 33 are electrically connected through a wire bonding process;

Here, the first chip 31 is electrically connected to the redistribution layer 302 through the first bonding wire 34 .

The first metal balls 32 that are electrically connected to the metal wiring layer 33 are formed to form the first portion P1.

Here, one end of the first metal ball 32 is electrically connected to the solder resist layer 303 , and the first part P1 includes the substrate 30 , the first chip 31 , the first metal ball 32 , the metal circuit layer 33 and the first bonding wire 34 .

S3: With reference to FIG. 8 and FIG. 9, the second chip 41 is fixed on the second circuit board 40, and the second metal ball 42 is formed on the second circuit board 40 to form a second portion P2;

Step S3 specifically includes:

The second chip 41 is fixed on the second circuit board 40 through a die bonding process;

Here, the second chip 41 is fixed to the upper surface 43 of the second circuit board 40 .

The second chip 41 and the third interconnection circuit 402 in the second circuit board 40 are electrically connected through a wire bonding process;

Here, the second chip 41 is electrically connected to the third interconnection circuit 402 through the second bonding wire 45 .

The second metal balls 42 that are electrically connected to the second interconnecting lines 401 in the second circuit board 40 are formed to form the second portion P2.

Here, one end of the second metal ball 42 is electrically connected to the second interconnecting circuit 401 , and the second portion P2 includes the second circuit board 40 , the second chip 41 , the second metal ball 42 and the second bonding wire 45 .

S5: Referring to FIG. 10, forming a through hole 23 on the first circuit board 20 penetrating the first surface 21 and the second surface 22 oppositely disposed on the first circuit board 20;

S7: Referring to FIG. 11, the first part P1 is bonded to the first surface 21 of the first circuit board 20 through a flip-chip process, and the first chip 31 extends toward the through hole 23;

S9 : Referring to FIG. 12 , the second part P2 is bonded to the second surface 22 of the first circuit board 20 through a flip-chip process, and the second chip 41 extends toward the through hole 23 .

Specifically, in steps S7 and S9, the first metal ball 32 is electrically connected to the first interconnection circuit 201 in the first circuit board 20 through a flip-chip process. Similarly, the second metal ball 42 is electrically connected to the second metal ball 42 through the flip-chip process. Connect the first interconnecting circuit 201 in the first circuit board 20 and the second interconnecting circuit 401 in the second circuit board 40, so that the interconnection between the first part P1 and the first circuit board 20, and the second part P2 and the Interconnection of the first circuit board 20 .

Here, it should be noted that, in order to improve the stability of the cooperation between the substrate 30 and the first circuit board 20, and improve the stability of the cooperation between the first circuit board 20 and the second circuit board 40, steps S7 and S9 further include:

The first encapsulant 35 connecting the side edge 304 of the substrate 30 and the first surface 21 of the first circuit board 20 is formed, and the second encapsulant 46 connecting the side edge 403 of the second circuit board 40 and the second surface 22 is formed.

The specific operation flow of steps S7 and S9 is as follows:

Obtain the first distance H1 between the second surface 22 of the first circuit board 20 away from the first part P1 and the first active surface 311 of the first chip 31 away from the substrate 30, and according to the relationship between the second active surface 411 of the second chip 41 and the first active surface 311 of the first chip 31 The target distance H and the first distance H1 between the first active surfaces 311 of the first chip 31 obtain the desired height H' of the second metal ball 42;

During the flip-chip process, the forming height of the second metal balls 42 is made to be a desired height H' by controlling the welding force.

Here, it is assumed that the distance between the first working surface 311 of the first chip 31 and the surface of the substrate 30 on the side close to the through hole 23 is H2, and the distance between the first metal ball 32 and the surface of the substrate 30 on the side close to the through hole 23 is H2. The distance is H3, and the thickness of the first circuit board 20 is H4. Then, the first distance H1=H4+H3-H2. The distances H1 and H2 can be effectively controlled by controlling the process, materials, welding strength, etc., and then by selecting a certain specification The thickness H4 of the first circuit board 20 is obtained. In this way, the first distance H1 can be obtained. In actual operation, the distances H1 and H2 can be set to a fixed value through a certain process, material, welding strength, etc. The first distance H1 can be directly obtained by knowing the thickness H4 of the first circuit board 20 .

Then, according to different packaging structures 100 , the target distance H between the second active surface 411 of the second chip 41 and the first active surface 311 of the first chip 31 is different, and the corresponding packaging structure 100 can be obtained in advance at this time. The desired height H' of the second metal ball 42 can be obtained according to the target distance H and the first distance H1.

Here, assuming that the distance between the second active surface 411 of the second chip 41 and the upper surface 43 of the second circuit board 40 is H5, then the desired height of the second metal ball 42 H'=H+H5-H1, the actual In operation, the distance H5 can be set to a constant value through a certain process, material, etc. At this time, the desired height H' of the second metal ball 42 can be directly obtained according to the first distance H1 obtained above.

After obtaining the desired height H' of the second metal ball 42, the welding force can be controlled during the flip-chip process in step S9, so that the molding height of the second metal ball 42 is the desired height H', which ensures the first The distance between the second working surface 411 of the two chips 41 and the first working surface 311 of the first chip 31 is the desired target distance H.

In addition, the process method of this embodiment also includes the steps:

S11 : Referring to FIG. 13 , on the side of the second circuit board 40 away from the through hole 23 , a second connection terminal 4011 for conducting the second interconnection circuit 401 and a third connection terminal 4021 for conducting the third interconnection circuit 402 are formed.

It can be seen that the substrate 30 and the first circuit board 20 are connected by the first metal balls 32, and the second circuit board 40 and the first circuit board 20 are connected by the second metal balls 42, which can be effectively controlled by adjusting the welding strength The desired height H' of the second metal ball 42 can effectively control the target distance H between the first chip 31 and the second chip 41, greatly improve the optical precision between the first chip 31 and the second chip 41, and can greatly Improve assembly efficiency and reduce costs.

In addition, the first chip 31 can be electrically connected to an external circuit through the first bonding wire 34 , the metal circuit layer 33 , the first metal ball 32 , the first interconnecting circuit 201 , the second interconnecting circuit 401 and the second connecting terminal 4011 in sequence. board, so that the control of the first chip 31 can be realized through the external circuit board, for example, the power-on and shutdown operations of the first chip 31 are controlled, and the second chip 41 is electrically connected to the third interconnection line 402 through the second bonding wire 45, so that , the second chip 41 can be electrically connected to the external circuit board through the second bonding wire 45, the third interconnection circuit 402 and the third connection terminal 4021 in sequence, so that the control of the second chip 41 can be realized through the external circuit board, for example , control the scanning direction, scanning range, etc. of the second chip 41. In this embodiment, the first metal ball 32 and the second metal ball 42 can realize the conduction between the substrate 30, the first circuit board 20 and the second circuit board 40. , so that the first chip 31 and the second chip 41 can be electrically connected to the external circuit board, and the control of the chips can be realized through a simple structure.

For other descriptions of the process method in this embodiment, reference may be made to the description of the aforementioned packaging structure 100 , which will not be repeated here.

It should be emphasized that the above step labels S1, S3, S5, S7, S9, and S11 do not actually limit the context of the steps. For example, the second part P2 forming step S3 can be located before the first part P1 forming step S1, in addition, The second part P2 can also be combined with the first circuit board 20 first, and then the height of the first metal ball 32 can be controlled by adjusting the bonding force to control the target distance H between the first chip 31 and the second chip 41 .

It should be understood that although this specification is described in terms of embodiments, not every embodiment only includes an independent technical solution, and this description in the specification is only for the sake of clarity, and those skilled in the art should take the specification as a whole, and each The technical solutions in the embodiments can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

The series of detailed descriptions listed above are only specific descriptions for the feasible embodiments of the present invention, and they are not used to limit the protection scope of the present invention. Changes should all be included within the protection scope of the present invention.

Claims (14)

1. A chip package structure, comprising:

the first circuit board comprises a first surface, a second surface and a through hole, wherein the first surface and the second surface are oppositely arranged, and the through hole penetrates through the first surface and the second surface;

the substrate is positioned on the first surface and covers the through hole;

the first chip is positioned on one side, facing the through hole, of the substrate and extends towards the through hole;

a first metal ball connecting the substrate and the first surface;

the second circuit board is positioned on the second surface and covers the through hole;

the second chip is positioned on one side, facing the through hole, of the second circuit board and extends towards the through hole;

and the second metal ball is connected with the second circuit board and the second surface.

2. The package structure of claim 1, wherein the first metal balls and the second metal balls are gold balls.

3. The package structure of claim 1, wherein the first chip comprises an emitter and the second chip comprises a diffractive optical element.

4. The package structure of claim 1, further comprising a first encapsulant coupling the side edge of the substrate and the first surface, and a second encapsulant coupling the side edge of the second circuit board and the second surface.

5. The package structure of claim 1, wherein the substrate is a transparent substrate.

6. The package structure according to claim 1, wherein a metal circuit layer is disposed on a side of the substrate facing the through hole, the first circuit board includes a first interconnection circuit, the second circuit board includes a second interconnection circuit and a third interconnection circuit, the first chip is electrically connected to the metal circuit layer through a first wire, the metal circuit layer is electrically connected to the first interconnection circuit through the first metal ball, the first interconnection circuit is electrically connected to the second interconnection circuit through the second metal ball, and the second chip is electrically connected to the third interconnection circuit through the second wire.

7. The package structure according to claim 6, wherein a second connection terminal and a third connection terminal are disposed on a side of the second circuit board away from the through hole, the second connection terminal connects the second interconnection line, the third connection terminal connects the third interconnection line, and the second circuit board is electrically connected to an external circuit board through the second connection terminal and the third connection terminal.

8. The package structure of claim 1, wherein the first circuit board and the second circuit board are both printed circuit boards.

9. A method for packaging a chip, comprising the steps of:

fixing a first chip on a substrate, and forming first metal balls on the substrate to form a first portion;

fixing a second chip on a second circuit board, and forming second metal balls on the second circuit board to form a second part;

forming a through hole penetrating through a first surface and a second surface which are oppositely arranged on the first circuit board;

bonding the first portion to a first surface of the first circuit board by a flip-chip process, the first chip extending toward the via;

bonding the second portion to a second surface of the first circuit board by a flip-chip process, the second chip extending toward the via.

10. The packaging method according to claim 9, wherein the step of bonding the second portion to the second surface of the first circuit board by a flip-chip process, the second chip extending toward the via hole further comprises:

acquiring a first distance between a second surface of the first circuit board, which is far away from the first part, and a first active surface of the first chip, which is far away from the substrate, and acquiring an expected height of the second metal ball according to a target distance between a second active surface of the second chip and the first active surface of the first chip and the first distance;

and controlling the welding force during the flip-chip process to enable the molding height of the second metal balls to be the expected height.

11. The method according to claim 9, wherein the step of fixing the first chip to the substrate and forming the first metal balls on the substrate to configure the first portion specifically comprises:

forming a metal circuit layer on the substrate;

fixing the first chip on one side of the substrate, which is provided with the metal circuit layer, through a die bonding process;

electrically connecting the first chip and the metal circuit layer through a routing process;

first metal balls electrically connected with the metal circuit layer are formed to be constructed into a first part.

12. The method of claim 11, wherein the step of fixing a second chip to a second circuit board and forming second metal balls on the second circuit board to construct a second portion specifically comprises:

fixing the second chip on the second circuit board through a die bonding process;

electrically connecting the second chip and a third interconnection circuit in the second circuit board through a routing process;

second metal balls electrically connected to second interconnection lines in the second circuit board are formed to constitute a second portion.

13. The method of packaging of claim 12, wherein the step of "bonding the first portion to the first surface of the first circuit board by a flip-chip process, the first chip extending toward the via; bonding the second portion to the second surface of the first circuit board by a flip-chip process, the second chip extending toward the via "specifically includes:

enabling the first metal balls to be electrically connected with first interconnection lines in the first circuit board through a flip-chip process;

and enabling the second metal balls to be electrically connected with the first interconnection lines and the second interconnection lines in the second circuit board through a flip chip process.

14. The method of packaging of claim 12, further comprising the steps of:

and forming a second connecting terminal for conducting the second interconnection line and a third connecting terminal for conducting the third interconnection line on one side of the second circuit board, which is far away from the through hole.

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