CN111446946B - Single-ended output low-noise fully-differential switched capacitor filter - Google Patents
Single-ended output low-noise fully-differential switched capacitor filter Download PDFInfo
- Publication number
- CN111446946B CN111446946B CN202010419345.6A CN202010419345A CN111446946B CN 111446946 B CN111446946 B CN 111446946B CN 202010419345 A CN202010419345 A CN 202010419345A CN 111446946 B CN111446946 B CN 111446946B
- Authority
- CN
- China
- Prior art keywords
- switching tube
- capacitor
- differential amplifier
- resistor
- grounded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 198
- 238000005070 sampling Methods 0.000 claims description 41
- 238000010586 diagram Methods 0.000 description 13
- 230000000694 effects Effects 0.000 description 9
- 238000001228 spectrum Methods 0.000 description 5
- 230000007547 defect Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000003750 conditioning effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/04—Frequency selective two-port networks
- H03H11/12—Frequency selective two-port networks using amplifiers with feedback
Landscapes
- Amplifiers (AREA)
Abstract
The invention provides a low-noise fully-differential switched capacitor filter with single-ended output. The structure of the invention not only can realize the function of traditional double-end to single-end output, but also can restrain the noise and mismatch influence of the double-end to single-end circuit and the signal nonlinearity caused by slew rate.
Description
Technical Field
The invention relates to acquisition, amplification and analog-to-digital conversion (ADC) of sensors and other physical signals, is suitable for a high-sensitivity signal link system, particularly for signal acquisition and conditioning of a weak signal sensor, and has wide applicability in the fields of automobiles, household appliances, industrial automation, robots, internet of things and military industry.
Background
In order to obtain a single-ended signal from the double-ended output signal of a switched capacitor filter, a conventional manner is shown in fig. 1. The double-ended output of the fully differential switched capacitor filter (SCF is shown as a 1-order low-pass filter, but is not limited thereto) is directly connected to a double-ended to single-ended circuit to achieve the desired requirements.
Where 119 is the input signal and 120 is the input dc bias voltage;
128 is a fully differential amplifier and 124 is a differential amplifier;
114 111 is the integral capacitance of SCF;
103 116 is the input stage sampling capacitance of the SCF;
102 112 is the feedback capacitance of the SCF;
108 110 is a switching component of SCF, which is time-controlled by 131 in the time chart;
107 The switch components 109, 106, 115 are SCF, and are controlled by the timing 132 in the timing diagram, so as to avoid the influence of charge injection on the signal when the switch is turned off, the falling edge of the timing 132 is later than the timing 131;
104 117 is a switching component of SCF, controlled by the timing of 133 in the timing diagram;
101 118, 105, 113 are switching elements of SCF, controlled by the timing 134 in the timing diagram, the falling edge of the timing 134 being later than the timing 133 in order to avoid the effect of charge injection on the signal when the switch is turned off;
133 The 134 timing and 131, 132 timing are non-overlapping with each other.
121 The reference numerals 122, 126, 127 are impedance components in a double-to-single ended circuit, although illustrated as resistors, the reference is not limited thereto, and may be, for example, impedance components implemented using switched capacitor technology;
123 125 are capacitive devices in a double-to-single ended circuit.
What has been described above is a conventional fully differential switched capacitor filter double-to-single ended circuit architecture. Because the double-to-single-ended circuit and the fully differential switched capacitor filter circuit are relatively independent and are realized in a direct cascade manner, the following defects are unavoidable:
1) Noise and offset of the double-to-single-ended circuit can directly affect the output voltage. These sources of noise and misalignment include differential amplifier 124, impedance devices 121, 126, 127, etc.;
2) If one wants to remedy the defect 1), one would need to increase the area and power consumption of the differential amplifier 124, and the area of the resistors 121, 127, 122, 126, to reduce the mismatch and noise that they bring. At the same time, careful placement is also required for layout of these devices in the wafer to reduce mismatch.
3) The effect of the slew rate of the switched capacitor filter can aggravate the signal nonlinearity of the final single-ended output. The reason is that, as shown in fig. 5, the slew rate causes the switched capacitor filter output to have a signal dependent gain that varies with the signal amplitude, and the larger the signal amplitude, the larger the effect of the gain on the signal, which exacerbates signal nonlinearity.
Based on the above conventional structure, an innovative structure is provided, and the novel structure can complete the conventional task and simultaneously solve the defects.
Disclosure of Invention
The invention solves the technical problem of providing a low-noise fully-differential switched capacitor filter with single-ended output, which is characterized in that a double-ended-to-single-ended circuit is built in a loop of the fully-differential switched capacitor filter, so that the noise and mismatch influence of the double-ended-to-single-ended circuit and signal nonlinearity caused by slew rate are inhibited.
The technical solution for realizing the purpose of the invention is as follows:
a low-noise fully-differential switch capacitor filter with single-ended output is characterized in that a loop of the fully-differential switch capacitor filter is internally provided with a double-ended to single-ended circuit, and the output end of the double-ended to single-ended circuit is connected with a feedback capacitor pair of the fully-differential switch capacitor filter through a switch tube.
Furthermore, the low-noise fully-differential switched capacitor filter with single-ended output is characterized in that a buffer is arranged between the output end of the double-ended to single-ended circuit and the switching tube, and the buffer consists of a resistor capacitor or an operational amplifier.
Further, the single-ended output low-noise fully differential switched capacitor filter of the present invention comprises: the device comprises a signal source, a square wave generator, a fully differential amplifier, a differential amplifier, 1 pair of sampling capacitors, 1 pair of feedback capacitors, 1 pair of integrating capacitors, 6 pairs of switching tubes, 4 resistors and 2 capacitors, wherein the 6 pairs of switching tubes are connected with the square wave generator; the signal source comprises an input signal source and a direct current bias voltage source, wherein the input signal source and the direct current bias voltage source are sequentially connected, and the other end of the direct current bias voltage source is grounded; one end of the ninth switching tube is connected with an input signal source to acquire an input signal, the other end of the ninth switching tube is commonly connected with one end of the third switching tube and one end of the first sampling capacitor, and the other end of the third switching tube is grounded; the other end of the first sampling capacitor is commonly connected with one end of a first switching tube, one end of a seventh switching tube and one end of a first feedback capacitor, and the other end of the first switching tube is grounded; the other end of the seventh switching tube and one end of the first integrating capacitor are both connected with the inverting input end of the full-differential amplifier, and the other end of the first integrating capacitor and one end of the first resistor are both connected with the in-phase output end of the full-differential amplifier; the other end of the first resistor, one end of the second resistor and one end of the first capacitor are connected with the inverting input end of the differential amplifier, the other end of the second resistor and the other end of the first capacitor are connected with the output end of the differential amplifier, and the output end of the differential amplifier is used as the output end of the low-noise fully-differential switched capacitor filter with single-ended output; the other end of the first feedback capacitor is commonly connected with one end of an eleventh switching tube and one end of a fifth switching tube, and the other end of the fifth switching tube is grounded; the other end of the eleventh switching tube and one end of the sixth switching tube are connected with the output end of the differential amplifier; one end of a tenth switching tube is connected with a direct-current bias voltage source to acquire an input signal, the other end of the tenth switching tube is commonly connected with one end of a fourth switching tube and one end of a second sampling capacitor, and the other end of the fourth switching tube is grounded; the other end of the second sampling capacitor is commonly connected with one end of a second switching tube, one end of an eighth switching tube and one end of a second feedback capacitor, and the other end of the second switching tube is grounded; the other end of the eighth switching tube and one end of the second integrating capacitor are both connected with the non-inverting input end of the full-differential amplifier, and the other end of the second integrating capacitor and one end of the fourth resistor are both connected with the inverting output end of the full-differential amplifier; the other end of the fourth resistor, one end of the third resistor and one end of the second capacitor are all connected with the non-inverting input end of the differential amplifier, and the other end of the third resistor and the other end of the second capacitor are all grounded; the other end of the second feedback capacitor is commonly connected with one end of the twelfth switching tube and the other end of the sixth switching tube, and the other end of the twelfth switching tube is grounded.
Further, the single-ended output low-noise fully differential switched capacitor filter of the present invention comprises: the device comprises a signal source, a square wave generator, a fully differential amplifier, a differential amplifier, 1 pair of sampling capacitors, 1 pair of feedback capacitors, 1 pair of integrating capacitors, 6 pairs of switching tubes, 5 resistors and 3 capacitors, wherein the 6 pairs of switching tubes are connected with the square wave generator; the signal source comprises an input signal source and a direct current bias voltage source, wherein the input signal source and the direct current bias voltage source are sequentially connected, and the other end of the direct current bias voltage source is grounded; one end of the ninth switching tube is connected with an input signal source to acquire an input signal, the other end of the ninth switching tube is commonly connected with one end of the third switching tube and one end of the first sampling capacitor, and the other end of the third switching tube is grounded; the other end of the first sampling capacitor is commonly connected with one end of a first switching tube, one end of a seventh switching tube and one end of a first feedback capacitor, and the other end of the first switching tube is grounded; the other end of the seventh switching tube and one end of the first integrating capacitor are both connected with the inverting input end of the full-differential amplifier, and the other end of the first integrating capacitor and one end of the first resistor are both connected with the in-phase output end of the full-differential amplifier; the other end of the first resistor, one end of the second resistor and one end of the first capacitor are connected with the inverting input end of the differential amplifier, the other end of the second resistor and the other end of the first capacitor are connected with the output end of the differential amplifier, and the output end of the differential amplifier is used as the output end of the low-noise fully-differential switched capacitor filter with single-ended output; the other end of the first feedback capacitor is commonly connected with one end of an eleventh switching tube and one end of a fifth switching tube, and the other end of the fifth switching tube is grounded; the other end of the eleventh switch tube is commonly connected with one end of the third capacitor, one end of the fifth resistor and one end of the sixth switch tube, the other end of the third capacitor is grounded, and the other end of the fifth resistor is connected with the output end of the differential amplifier; one end of a tenth switching tube is connected with a direct-current bias voltage source to acquire an input signal, the other end of the tenth switching tube is commonly connected with one end of a fourth switching tube and one end of a second sampling capacitor, and the other end of the fourth switching tube is grounded; the other end of the second sampling capacitor is commonly connected with one end of a second switching tube, one end of an eighth switching tube and one end of a second feedback capacitor, and the other end of the second switching tube is grounded; the other end of the eighth switching tube and one end of the second integrating capacitor are both connected with the non-inverting input end of the full-differential amplifier, and the other end of the second integrating capacitor and one end of the fourth resistor are both connected with the inverting output end of the full-differential amplifier; the other end of the fourth resistor, one end of the third resistor and one end of the second capacitor are all connected with the non-inverting input end of the differential amplifier, and the other end of the third resistor and the other end of the second capacitor are all grounded; the other end of the second feedback capacitor is commonly connected with one end of the twelfth switching tube and the other end of the sixth switching tube, and the other end of the twelfth switching tube is grounded.
Furthermore, in the single-ended output low-noise fully-differential switched capacitor filter, the first switching tube and the second switching tube are controlled by a first time sequence, the third switching tube, the fourth switching tube, the fifth switching tube and the sixth switching tube are controlled by a second time sequence, and the falling edge of the second time sequence is later than the falling edge of the first time sequence; the seventh switching tube and the eighth switching tube are controlled by a third time sequence, the ninth switching tube, the fourth switching tube, the eleventh switching tube and the twelfth switching tube are controlled by a fourth time sequence, and the falling edge of the fourth time sequence is later than the falling edge of the third time sequence; the first, second, third and fourth timings are non-overlapping with each other.
Furthermore, the low-noise fully-differential switched capacitor filter with single-ended output has the capacity value of the feedback capacitor pair being half of the original capacity value.
Furthermore, the low-noise fully-differential switched capacitor filter with single-ended output has the capacitance value of the sampling capacitor pair being twice as large as that of the original sampling capacitor pair.
Compared with the prior art, the technical scheme provided by the invention has the following technical effects:
1. according to the invention, the resistor device and the capacitor device are added at the output port of the double-end-to-single-end circuit, so that faults caused by clock switching are eliminated.
2. The invention realizes that the direct current gain is kept unchanged by changing the capacitance of the feedback capacitor pair to 1/2 or increasing the capacitance of the sampling capacitor pair by one time.
Drawings
Fig. 1 is a schematic diagram of a conventional fully differential switched capacitor filter from double-ended to single-ended.
Fig. 2 is a schematic diagram of a single-ended output low-noise fully differential switched capacitor filter of the present invention.
Fig. 3 is a simplified block diagram of a conventional structure and the structure of the present invention, fig. a is a simplified block diagram of a conventional structure, and fig. B is a simplified block diagram of the structure of the present invention.
Fig. 4 is a diagram showing the effect of the conventional structure compared with that of the structure of the present invention, fig. a is a diagram showing the effect of the conventional structure, and fig. B is a diagram showing the effect of the structure of the present invention.
Fig. 5 is a diagram showing the influence of the slew rate on the signal in the conventional structure.
Fig. 6 is a graph of the slew rate versus the frequency spectrum of the conventional structure versus the structure of the present invention, where a is the output spectrum of the fully differential switched capacitor filter, B is the output signal spectrum of the conventional structure, and C is the output signal spectrum of the structure of the present invention.
Reference numerals meaning: 101: ninth switching tube, 102: first feedback capacitance, 103: first sampling capacitance, 104: seventh switching tube, 105: eleventh switching tube, 106: fifth switching tube, 107: third switching tube, 108: first switching tube, 109: fourth switching tube, 110: second switching tube, 111: second integrating capacitance, 112: second feedback capacitance, 113: twelfth switching transistor, 114: first integrating capacitance, 115: sixth switching tube, 116: second sampling capacitance, 117: eighth switching tube, 118: tenth switching tube, 119: input signal source, 120: dc bias voltage source, 121: first resistor, 122: second resistor, 123: first capacitance, 124: differential amplifier, 125: second capacitance, 126: third resistor, 127: fourth resistor, 128: fully differential amplifier, 129: fifth resistor, 130: and a third capacitor.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for explaining the present invention and are not to be construed as limiting the present invention.
The low-noise fully-differential switched capacitor filter with single-ended output is characterized in that a loop of the fully-differential switched capacitor filter is internally provided with a double-ended to single-ended circuit, the output end of the double-ended to single-ended circuit is connected with a feedback capacitor pair of the fully-differential switched capacitor filter through a switch tube, a buffer is arranged between the output end of the double-ended to single-ended circuit and the switch tube, and the buffer consists of a resistor capacitor or an operational amplifier.
The invention eliminates the influence of noise, mismatch and the like caused by the double-ended to single-ended circuit in the traditional structure of figure 1 by utilizing the loop gain characteristic of the switched capacitor filter on the premise of not influencing the normal function. The detailed mode is as follows:
1) The connection relation between the switching devices 105 and 113 and the output ends Vop and Von of the fully differential operational amplifier 128 is disconnected, and the connection relation between the switching devices 115 and the ground is disconnected.
2) A 129 resistor and a 130 capacitor device are added at the output end Vout of the double-ended-to-single-ended circuit, one end of the resistor 129 is connected with the output Vout, the other end of the resistor 129 is connected with one end of the capacitor 130, the line connected with the 129 and the 130 is named as Vfb for convenience of subsequent description, and the other end of the capacitor 130 is grounded. 129. 130 are primarily aimed at isolating the direct effect of the switching instant of the switching device on the output Vout. The value of the two values can be determined according to the actual situation.
3) In step 1), the end of 105 disconnected from Vop is in turn connected to Vfb, and the end of 115 disconnected from ground is also in turn connected to Vfb. The end of 113 disconnected from Von is in turn connected to ground.
4) In order to ensure that the signal gain of the whole circuit structure is unchanged, the capacitance of the feedback capacitors 102 and 112 needs to be changed to be 1/2 of the original capacitance, or the capacitance of the input capacitors 103 and 116 needs to be increased to be 2 times of the original capacitance. The reason for this modification is that the feedback part of the circuit has been switched off from the original fully differential output terminals Vop, von to the present single ended output Vout, if the capacitance values of 102, 112, or 103, 116 are not changed, the equivalent feedback amount is directly increased to 2 times the original value, which is equivalent to 1 time the signal gain decay. Either the feedback capacitance 102, 112 is reduced or the input capacitance 103, 116 is increased, depending on the actual circuit's choice of trade-off against noise performance and speed.
Thus, only a small amount of modification is needed, and the rest of the parts can be unchanged, including the time sequence part, as shown in fig. 3, which is a simplified block diagram of the conventional structure and the structure of the present invention. The purpose of the invention can be achieved: reducing the influence of noise, mismatch and the like of a double-end-to-single-end circuit in a traditional structure (such as figure 1) on the circuit performance; and the nonlinear influence caused by the slew rate is reduced.
As only the connection relationship is modified and a small number of devices 129, 130 are added. The invention does not burden the area and power consumption of the wafer, but conversely, because the invention reduces the influence of noise, mismatch and the like of the double-end-to-single-end circuit, that is, the invention reduces the design area and power consumption requirement of the double-end-to-single-end circuit under the same performance index, thereby further reducing the area and power consumption of the wafer.
The improved circuit has the characteristics of wide application and flexibility and variability, and can be applied to a signal acquisition system of a sensor, and can also be applied to signal processing circuits of high-precision ADC (analog to digital converter), DAC (digital to analog converter) and other switch capacitors.
As for the noise and mismatch effects of the double-ended to single-ended circuit, as can be seen from fig. 4, 3 sets of comparison tests are performed on the conventional structure and the improved structure respectively: a, the operational amplifier 124 of the double-end-to-single-end circuit has no offset, and the resistors 121 and 127 have no mismatch; b, the operational amplifier 124 of the double-end-to-single-end circuit has offset of 200mV, and the resistors 121 and 127 have no mismatch; c, the operational amplifier 124 of the double-end-to-single-end circuit has offset of 200mV, and the resistors 121 and 127 have mismatch of 25%. As apparent from the results, the conventional structure is sensitive to the offset of the op amp 124 and the mismatch of the resistors 121 and 127, and the output result is changed severely; and the improved structure has the advantages that under the same comparison condition, the output result is insensitive to the offset of the operational amplifier 124 and the mismatch of the resistors 121 and 127, and no obvious change exists.
From the comparison experiment results, the improved structure of the invention can obviously improve the defects of the traditional structure.
And signal nonlinearity caused by the slew rate is also suppressed by the loop. As shown in fig. 6, a comparison of the spectra of the output signals of the two conventional and modified configurations is shown. It is obvious that the improved structure can inhibit the offset voltage which changes along with the signal amplitude.
Example 1
A single ended output low noise fully differential switched capacitor filter comprising: the signal source, the square wave generator, the full differential amplifier 128, the differential amplifier 124, 1 pair of sampling capacitors, 1 pair of feedback capacitors, 1 pair of integrating capacitors, 6 pairs of switching tubes, 4 resistors and 2 capacitors, and the 6 pairs of switching tubes are connected with the square wave generator. The signal source comprises an input signal source 119 and a direct current bias voltage source 120, the input signal source 119 and the direct current bias voltage source 120 are sequentially connected, and the other end of the direct current bias voltage source 120 is grounded.
One end of the ninth switching tube 101 is connected with an input signal source 119 to acquire an input signal, the other end of the ninth switching tube 101 is commonly connected with one end of the third switching tube 107 and one end of the first sampling capacitor 103, and the other end of the third switching tube 107 is grounded. The other end of the first sampling capacitor 103 is commonly connected with one end of the first switching tube 108, one end of the seventh switching tube 104 and one end of the first feedback capacitor 102, and the other end of the first switching tube 108 is grounded. The other end of the seventh switching tube 104 and one end of the first integrating capacitor 114 are both connected with the inverting input end of the fully differential amplifier 128, and the other end of the first integrating capacitor 114 and one end of the first resistor 121 are both connected with the non-inverting output end of the fully differential amplifier 128. The other end of the first resistor 121, one end of the second resistor 122 and one end of the first capacitor 123 are all connected with the inverting input end of the differential amplifier 124, the other end of the second resistor 122 and the other end of the first capacitor 123 are all connected with the output end of the differential amplifier 124, and the output end of the differential amplifier 124 serves as the output end of the low-noise fully-differential switched capacitor filter with single-ended output.
The other end of the first feedback capacitor 102 is commonly connected with one end of the eleventh switching tube 105 and one end of the fifth switching tube 106, and the other end of the fifth switching tube 106 is grounded. The other end of the eleventh switching tube 105 and one end of the sixth switching tube 115 are connected to the output end of the differential amplifier 124.
One end of the tenth switching tube 118 is connected with a direct current bias voltage source 120 to acquire an input signal, the other end of the tenth switching tube 118 is commonly connected with one end of the fourth switching tube 109 and one end of the second sampling capacitor 116, and the other end of the fourth switching tube 109 is grounded. The other end of the second sampling capacitor 116 is commonly connected with one end of the second switching tube 110, one end of the eighth switching tube 117 and one end of the second feedback capacitor 112, and the other end of the second switching tube 110 is grounded. The other end of the eighth switching tube 117 and one end of the second integrating capacitor 111 are both connected to the non-inverting input end of the fully differential amplifier 128, and the other end of the second integrating capacitor 111 and one end of the fourth resistor 127 are both connected to the inverting output end of the fully differential amplifier 128. The other end of the fourth resistor 127, one end of the third resistor 126 and one end of the second capacitor 125 are all connected to the non-inverting input terminal of the differential amplifier 124, and the other end of the third resistor 126 and the other end of the second capacitor 125 are all grounded.
The other end of the second feedback capacitor 112 is commonly connected with one end of the twelfth switching tube 113 and the other end of the sixth switching tube 115, and the other end of the twelfth switching tube 113 is grounded.
Meanwhile, the first switching tube 108, the second switching tube 110 are controlled by the first timing sequence 131, the third switching tube 107, the fourth switching tube 109, the fifth switching tube 106, the sixth switching tube 115 are controlled by the second timing sequence 132, and the falling edge of the second timing sequence 132 is slightly later than the falling edge of the first timing sequence 131. The seventh switching tube 104, the eighth switching tube 117 are controlled by the third timing sequence 133, the ninth switching tube 101, the tenth switching tube 118, the eleventh switching tube 105, the twelfth switching tube 113 are controlled by the fourth timing sequence 134, and the falling edge of the fourth timing sequence 134 falls slightly later than the falling edge of the third timing sequence 133. The first, second, third, and fourth timings 131, 132, 133, and 134 are non-overlapping with each other. The capacitance of the feedback capacitor pair is half of the original capacitance. The capacitance of the sampling capacitor pair is twice that of the original sampling capacitor pair.
Example 2
A single ended output low noise fully differential switched capacitor filter, as shown in fig. 2, comprising: the signal source, the square wave generator, the full differential amplifier 128, the differential amplifier 124, 1 pair of sampling capacitors, 1 pair of feedback capacitors, 1 pair of integrating capacitors, 6 pairs of switching tubes, 5 resistors and 3 capacitors, and the 6 pairs of switching tubes are connected with the square wave generator. The signal source comprises an input signal source 119 and a direct current bias voltage source 120, the input signal source 119 and the direct current bias voltage source 120 are sequentially connected, and the other end of the direct current bias voltage source 120 is grounded.
One end of the ninth switching tube 101 is connected with an input signal source 119 to acquire an input signal, the other end of the ninth switching tube 101 is commonly connected with one end of the third switching tube 107 and one end of the first sampling capacitor 103, and the other end of the third switching tube 107 is grounded. The other end of the first sampling capacitor 103 is commonly connected with one end of the first switching tube 108, one end of the seventh switching tube 104 and one end of the first feedback capacitor 102, and the other end of the first switching tube 108 is grounded. The other end of the seventh switching tube 104 and one end of the first integrating capacitor 114 are both connected with the inverting input end of the fully differential amplifier 128, and the other end of the first integrating capacitor 114 and one end of the first resistor 121 are both connected with the non-inverting output end of the fully differential amplifier 128. The other end of the first resistor 121, one end of the second resistor 122 and one end of the first capacitor 123 are all connected with the inverting input end of the differential amplifier 124, the other end of the second resistor 122 and the other end of the first capacitor 123 are all connected with the output end of the differential amplifier 124, and the output end of the differential amplifier 124 serves as the output end of the low-noise fully-differential switched capacitor filter with single-ended output.
The other end of the first feedback capacitor 102 is commonly connected with one end of the eleventh switching tube 105 and one end of the fifth switching tube 106, and the other end of the fifth switching tube 106 is grounded. The other end of the eleventh switching tube 105 is commonly connected with one end of the third capacitor 130, one end of the fifth resistor 129 and one end of the sixth switching tube 115, the other end of the third capacitor 130 is grounded, and the other end of the fifth resistor 129 is connected with the output end of the differential amplifier 124.
One end of the tenth switching tube 118 is connected with a direct current bias voltage source 120 to acquire an input signal, the other end of the tenth switching tube 118 is commonly connected with one end of the fourth switching tube 109 and one end of the second sampling capacitor 116, and the other end of the fourth switching tube 109 is grounded. The other end of the second sampling capacitor 116 is commonly connected with one end of the second switching tube 110, one end of the eighth switching tube 117 and one end of the second feedback capacitor 112, and the other end of the second switching tube 110 is grounded. The other end of the eighth switching tube 117 and one end of the second integrating capacitor 111 are both connected to the non-inverting input end of the fully differential amplifier 128, and the other end of the second integrating capacitor 111 and one end of the fourth resistor 127 are both connected to the inverting output end of the fully differential amplifier 128. The other end of the fourth resistor 127, one end of the third resistor 126 and one end of the second capacitor 125 are all connected to the non-inverting input terminal of the differential amplifier 124, and the other end of the third resistor 126 and the other end of the second capacitor 125 are all grounded.
The other end of the second feedback capacitor 112 is commonly connected with one end of the twelfth switching tube 113 and the other end of the sixth switching tube 115, and the other end of the twelfth switching tube 113 is grounded.
Meanwhile, the first switching tube 108, the second switching tube 110 are controlled by the first timing sequence 131, the third switching tube 107, the fourth switching tube 109, the fifth switching tube 106, the sixth switching tube 115 are controlled by the second timing sequence 132, and the falling edge of the second timing sequence 132 is slightly later than the falling edge of the first timing sequence 131. The seventh switching tube 104, the eighth switching tube 117 are controlled by the third timing sequence 133, the ninth switching tube 101, the tenth switching tube 118, the eleventh switching tube 105, the twelfth switching tube 113 are controlled by the fourth timing sequence 134, and the falling edge of the fourth timing sequence 134 is slightly later than the falling edge of the third timing sequence 133. The first, second, third, and fourth timings 131, 132, 133, and 134 are non-overlapping with each other. The capacitance of the feedback capacitor pair is half of the original capacitance. The capacitance of the sampling capacitor pair is twice that of the original sampling capacitor pair.
While only a few embodiments of the present invention have been described, it should be noted that modifications could be made by those skilled in the art without departing from the principles of the present invention, which modifications are to be regarded as being within the scope of the invention.
Claims (5)
1. A low-noise fully-differential switched-capacitor filter with single-ended output, characterized in that a loop of the fully-differential switched-capacitor filter is internally provided with a double-to-single-ended circuit, an output end of the double-to-single-ended circuit is connected with a feedback capacitor pair of the fully-differential switched-capacitor filter through a switching tube, and the low-noise fully-differential switched-capacitor filter with single-ended output specifically comprises: the full-differential amplifier comprises a signal source, a square wave generator, a full-differential amplifier (128), a differential amplifier (124), 1 pair of sampling capacitors, 1 pair of feedback capacitors, 1 pair of integrating capacitors, 6 pairs of switching tubes, 4 resistors and 2 capacitors, wherein the 6 pairs of switching tubes are connected with the square wave generator;
the signal source comprises an input signal source (119) and a direct current bias voltage source (120), wherein the input signal source (119) and the direct current bias voltage source (120) are sequentially connected, and the other end of the direct current bias voltage source (120) is grounded;
one end of the ninth switching tube (101) is connected with an input signal source (119) to acquire an input signal, the other end of the ninth switching tube (101) is commonly connected with one end of the third switching tube (107) and one end of the first sampling capacitor (103), and the other end of the third switching tube (107) is grounded; the other end of the first sampling capacitor (103) is commonly connected with one end of a first switching tube (108), one end of a seventh switching tube (104) and one end of a first feedback capacitor (102), and the other end of the first switching tube (108) is grounded; the other end of the seventh switching tube (104) and one end of the first integrating capacitor (114) are both connected with the inverting input end of the full-differential amplifier (128), and the other end of the first integrating capacitor (114) and one end of the first resistor (121) are both connected with the non-inverting output end of the full-differential amplifier (128); the other end of the first resistor (121), one end of the second resistor (122) and one end of the first capacitor (123) are connected with the inverting input end of the differential amplifier (124), the other end of the second resistor (122) and the other end of the first capacitor (123) are connected with the output end of the differential amplifier (124), and the output end of the differential amplifier (124) is used as the output end of the low-noise fully-differential switched capacitor filter with single-ended output;
the other end of the first feedback capacitor (102) is commonly connected with one end of an eleventh switching tube (105) and one end of a fifth switching tube (106), and the other end of the fifth switching tube (106) is grounded; the other end of the eleventh switching tube (105) and one end of the sixth switching tube (115) are connected with the output end of the differential amplifier (124);
one end of a tenth switching tube (118) is connected with a direct current bias voltage source (120) to acquire an input signal, the other end of the tenth switching tube (118) is commonly connected with one end of a fourth switching tube (109) and one end of a second sampling capacitor (116), and the other end of the fourth switching tube (109) is grounded; the other end of the second sampling capacitor (116) is commonly connected with one end of the second switching tube (110), one end of the eighth switching tube (117) and one end of the second feedback capacitor (112), and the other end of the second switching tube (110) is grounded; the other end of the eighth switching tube (117) and one end of the second integrating capacitor (111) are both connected with the non-inverting input end of the full-differential amplifier (128), and the other end of the second integrating capacitor (111) and one end of the fourth resistor (127) are both connected with the inverting output end of the full-differential amplifier (128); the other end of the fourth resistor (127), one end of the third resistor (126) and one end of the second capacitor (125) are all connected with the non-inverting input end of the differential amplifier (124), and the other end of the third resistor (126) and the other end of the second capacitor (125) are all grounded;
the other end of the second feedback capacitor (112) is commonly connected with one end of a twelfth switching tube (113) and the other end of a sixth switching tube (115), and the other end of the twelfth switching tube (113) is grounded.
2. The single-ended output low-noise fully-differential switched-capacitor filter according to claim 1, wherein a buffer is arranged between the output end of the double-ended to single-ended circuit and the switching tube, the buffer is composed of a resistor capacitor or an operational amplifier, and the single-ended output low-noise fully-differential switched-capacitor filter specifically comprises: the full-differential amplifier comprises a signal source, a square wave generator, a full-differential amplifier (128), a differential amplifier (124), 1 pair of sampling capacitors, 1 pair of feedback capacitors, 1 pair of integrating capacitors, 6 pairs of switching tubes, 5 resistors and 3 capacitors, wherein the 6 pairs of switching tubes are connected with the square wave generator;
the signal source comprises an input signal source (119) and a direct current bias voltage source (120), wherein the input signal source (119) and the direct current bias voltage source (120) are sequentially connected, and the other end of the direct current bias voltage source (120) is grounded;
one end of the ninth switching tube (101) is connected with an input signal source (119) to acquire an input signal, the other end of the ninth switching tube (101) is commonly connected with one end of the third switching tube (107) and one end of the first sampling capacitor (103), and the other end of the third switching tube (107) is grounded; the other end of the first sampling capacitor (103) is commonly connected with one end of a first switching tube (108), one end of a seventh switching tube (104) and one end of a first feedback capacitor (102), and the other end of the first switching tube (108) is grounded; the other end of the seventh switching tube (104) and one end of the first integrating capacitor (114) are both connected with the inverting input end of the full-differential amplifier (128), and the other end of the first integrating capacitor (114) and one end of the first resistor (121) are both connected with the non-inverting output end of the full-differential amplifier (128); the other end of the first resistor (121), one end of the second resistor (122) and one end of the first capacitor (123) are connected with the inverting input end of the differential amplifier (124), the other end of the second resistor (122) and the other end of the first capacitor (123) are connected with the output end of the differential amplifier (124), and the output end of the differential amplifier (124) is used as the output end of the low-noise fully-differential switched capacitor filter with single-ended output;
the other end of the first feedback capacitor (102) is commonly connected with one end of an eleventh switching tube (105) and one end of a fifth switching tube (106), and the other end of the fifth switching tube (106) is grounded; the other end of the eleventh switching tube (105) is commonly connected with one end of the third capacitor (130), one end of the fifth resistor (129) and one end of the sixth switching tube (115), the other end of the third capacitor (130) is grounded, and the other end of the fifth resistor (129) is connected with the output end of the differential amplifier (124);
one end of a tenth switching tube (118) is connected with a direct current bias voltage source (120) to acquire an input signal, the other end of the tenth switching tube (118) is commonly connected with one end of a fourth switching tube (109) and one end of a second sampling capacitor (116), and the other end of the fourth switching tube (109) is grounded; the other end of the second sampling capacitor (116) is commonly connected with one end of the second switching tube (110), one end of the eighth switching tube (117) and one end of the second feedback capacitor (112), and the other end of the second switching tube (110) is grounded; the other end of the eighth switching tube (117) and one end of the second integrating capacitor (111) are both connected with the non-inverting input end of the full-differential amplifier (128), and the other end of the second integrating capacitor (111) and one end of the fourth resistor (127) are both connected with the inverting output end of the full-differential amplifier (128); the other end of the fourth resistor (127), one end of the third resistor (126) and one end of the second capacitor (125) are all connected with the non-inverting input end of the differential amplifier (124), and the other end of the third resistor (126) and the other end of the second capacitor (125) are all grounded;
the other end of the second feedback capacitor (112) is commonly connected with one end of a twelfth switching tube (113) and the other end of a sixth switching tube (115), and the other end of the twelfth switching tube (113) is grounded.
3. The single-ended output low-noise fully differential switched capacitor filter according to claim 1 or 2, characterized in that the first switching tube (108), the second switching tube (110) are controlled by a first timing (131), the third switching tube (107), the fourth switching tube (109), the fifth switching tube (106), the sixth switching tube (115) are controlled by a second timing (132), and the falling edge of the second timing (132) is later than the falling edge of the first timing (131);
the seventh switching tube (104) and the eighth switching tube (117) are controlled by a third time sequence (133), the ninth switching tube (101), the tenth switching tube (118), the eleventh switching tube (105) and the twelfth switching tube (113) are controlled by a fourth time sequence (134), and the falling edge of the fourth time sequence (134) is later than the falling edge of the third time sequence (133);
the first timing (131), the second timing (132), the third timing (133), and the fourth timing (134) are non-overlapping with each other.
4. The single-ended output low-noise fully differential switched capacitor filter of claim 1 or 2 wherein the capacitance of the feedback capacitor pair is half the original capacitance.
5. A single ended output low noise fully differential switched capacitor filter according to claim 1 or 2, wherein the capacitance of the sampling capacitor pair is twice the original capacitance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010419345.6A CN111446946B (en) | 2020-05-18 | 2020-05-18 | Single-ended output low-noise fully-differential switched capacitor filter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010419345.6A CN111446946B (en) | 2020-05-18 | 2020-05-18 | Single-ended output low-noise fully-differential switched capacitor filter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111446946A CN111446946A (en) | 2020-07-24 |
| CN111446946B true CN111446946B (en) | 2023-07-21 |
Family
ID=71652137
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010419345.6A Active CN111446946B (en) | 2020-05-18 | 2020-05-18 | Single-ended output low-noise fully-differential switched capacitor filter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111446946B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104101368A (en) * | 2014-07-07 | 2014-10-15 | 湘潭大学 | Fully-differential switched capacitor principle-based capacitive sensor detection readout circuit |
| CN104485897A (en) * | 2014-12-09 | 2015-04-01 | 中国航空工业集团公司第六三一研究所 | Correlated double sampling switch capacity amplifier with offset compensation |
| CN104639068A (en) * | 2014-12-09 | 2015-05-20 | 中国航空工业集团公司第六三一研究所 | Linear programmable gain amplifier realized by switched capacitor |
| CN107294501A (en) * | 2017-05-11 | 2017-10-24 | 华南理工大学 | A kind of chopper amplification circuit and its implementation |
| CN109450402A (en) * | 2018-11-08 | 2019-03-08 | 哈尔滨工业大学 | Ten quadravalence switched capacitor bandpass filters |
-
2020
- 2020-05-18 CN CN202010419345.6A patent/CN111446946B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104101368A (en) * | 2014-07-07 | 2014-10-15 | 湘潭大学 | Fully-differential switched capacitor principle-based capacitive sensor detection readout circuit |
| CN104485897A (en) * | 2014-12-09 | 2015-04-01 | 中国航空工业集团公司第六三一研究所 | Correlated double sampling switch capacity amplifier with offset compensation |
| CN104639068A (en) * | 2014-12-09 | 2015-05-20 | 中国航空工业集团公司第六三一研究所 | Linear programmable gain amplifier realized by switched capacitor |
| CN107294501A (en) * | 2017-05-11 | 2017-10-24 | 华南理工大学 | A kind of chopper amplification circuit and its implementation |
| CN109450402A (en) * | 2018-11-08 | 2019-03-08 | 哈尔滨工业大学 | Ten quadravalence switched capacitor bandpass filters |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111446946A (en) | 2020-07-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7764118B2 (en) | Auto-correction feedback loop for offset and ripple suppression in a chopper-stabilized amplifier | |
| US8330537B1 (en) | Low noise, high CMRR and PSRR input buffer | |
| US9525426B2 (en) | Cross-coupled input voltage sampling and driver amplifier flicker noise cancellation in a switched capacitor analog-to-digital converter | |
| US8072262B1 (en) | Low input bias current chopping switch circuit and method | |
| US7786767B2 (en) | Common-mode insensitive sampler | |
| US20100219864A1 (en) | Dual Mode, Single Ended to Fully Differential Converter Structure | |
| US6700417B2 (en) | Sampling and hold circuit | |
| TW201310898A (en) | Pseudo differential switched capacitor circuit | |
| CN111555727B (en) | High-gain low-noise switched capacitor adjustable gain amplifier | |
| US6970038B2 (en) | Switching scheme to improve linearity and noise in switched capacitor stage with switched feedback capacitor | |
| CN115189653A (en) | Chopper modulation instrument amplifier with offset voltage elimination circuit | |
| CN109212448B (en) | Self-stabilizing zero circuit | |
| CN114978054B (en) | Self-zeroing operational amplifier | |
| EP2779444B1 (en) | Leakage Compensation For Switched Capacitor Integrators | |
| US20090167362A1 (en) | Comparator | |
| CN111446946B (en) | Single-ended output low-noise fully-differential switched capacitor filter | |
| US20060125674A1 (en) | Efficient Amplifier Sharing in a Multi-stage Analog to Digital Converter | |
| EP3661054B1 (en) | Preamplifier circuit with floating transconductor | |
| US7898331B2 (en) | Increasing the common mode range of a circuit | |
| US20230188105A1 (en) | Analog signal processing circuit and method for eliminating dc offset voltage | |
| KR20190021634A (en) | Discrete-time integrator circuit with operational amplifier gain compensation function | |
| CN213213433U (en) | Single-ended input low-temperature drift data converter and data reading circuit | |
| US20070164888A1 (en) | Robust reference generation circuit for A/D converter | |
| US11095262B2 (en) | Circuit arrangement and a method for operating a circuit arrangement | |
| US11533060B2 (en) | Multipath sampling circuits |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: No. 8 Changjiang Road, Fenghuang Town, Zhangjiagang City, Suzhou City, Jiangsu Province 215600 Patentee after: Xinpu (Suzhou) Sensing Technology Co.,Ltd. Country or region after: China Address before: 215614 Zhenganwei, Floor 2, Building E, Phoenix Technology Pioneer Park, Phoenix Town, Zhangjiagang City, Suzhou City, Jiangsu Province Patentee before: SUZHOU ZHENGAN MICROELECTRONIC TECHNOLOGY CO.,LTD. Country or region before: China |