CN111430513A - Preparation method of nano-column and preparation method of nano-column L ED device - Google Patents
Preparation method of nano-column and preparation method of nano-column L ED device Download PDFInfo
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- 239000010409 thin film Substances 0.000 claims abstract description 122
- 239000010408 film Substances 0.000 claims abstract description 82
- 239000002061 nanopillar Substances 0.000 claims abstract description 64
- 238000000034 method Methods 0.000 claims abstract description 32
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- 238000000151 deposition Methods 0.000 claims description 8
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- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 4
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- 229910052757 nitrogen Inorganic materials 0.000 description 2
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- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
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Abstract
本发明实施例提供了一种纳米柱的制备方法和纳米柱LED器件的制备方法。该纳米柱的制备方法包括:在LED晶片的上表面蒸镀第一薄膜,其中,LED晶片包括p型GaN层、量子阱有源层、n型GaN层和衬底;对蒸镀有第一薄膜的LED晶片进行热退火处理,以使第一薄膜与p型GaN层形成欧姆接触;在第一薄膜的上表面沉积第二薄膜,第二薄膜的下表面与第一薄膜接触;在第二薄膜的上表面制备多个辅助纳米图形;通过辅助纳米图形对第二薄膜进行刻蚀以形成多个掩膜;通过掩膜对第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,LED纳米柱的两端用于与电极连接。达到提高纳米LED的P型欧姆接触性能的效果。
Embodiments of the present invention provide a method for preparing a nano-column and a method for preparing a nano-column LED device. The preparation method of the nano-pillar includes: evaporating a first thin film on the upper surface of an LED wafer, wherein the LED wafer includes a p-type GaN layer, a quantum well active layer, an n-type GaN layer and a substrate; The thin-film LED wafer is thermally annealed to make the first thin film form ohmic contact with the p-type GaN layer; a second thin film is deposited on the upper surface of the first thin film, and the lower surface of the second thin film is in contact with the first thin film; A plurality of auxiliary nano-patterns are prepared on the upper surface of the film; the second film is etched through the auxiliary nano-pattern to form a plurality of masks; the first film, the p-type GaN layer, the quantum well active layer and the n-type film are etched through the mask. The GaN layer is etched to form a plurality of LED nano-pillars, and both ends of the LED nano-pillars are used to connect with electrodes. The effect of improving the P-type ohmic contact performance of the nano-LED is achieved.
Description
技术领域technical field
本发明实施例涉及微纳器件制造技术领域,尤其涉及一种纳米柱的制备方法和纳米柱LED器件的制备方法。Embodiments of the present invention relate to the technical field of micro-nano device manufacturing, and in particular, to a method for preparing nano-pillars and a method for preparing nano-pillar LED devices.
背景技术Background technique
低维半导体器件在光学、电学等方面表现出与体材料截然不同的特性,近年来备受学术界和产业界关注,典型的如二维量子阱、一维纳米柱以及零维量子点。以氮化镓基(GaN)纳米级LED器件为例,由于其在沿量子阱生长方向及平行于量子阱方向均受到较强量子限制,其发光核心InGaN阱层的类量子点特性使其具有独特的光电特性。当器件尺寸减小到纳米量级时,量子阱所受应力基本被释放,量子限制斯塔克效应(QCSE)被消除。此外由于纳米级LED类量子点特性以及GaN较强的激子束缚能,GaN基纳米级LED也可用来作为单光子光源,用于量子计算、量子通讯等领域。Low-dimensional semiconductor devices have different optical and electrical properties from bulk materials, and have attracted much attention from academia and industry in recent years. Typical examples are two-dimensional quantum wells, one-dimensional nanopillars, and zero-dimensional quantum dots. Taking the gallium nitride-based (GaN) nanoscale LED device as an example, because of its strong quantum confinement along the quantum well growth direction and the direction parallel to the quantum well, the quantum dot-like characteristics of the luminescent core InGaN well layer make it have strong quantum confinement. Unique optoelectronic properties. When the size of the device is reduced to the nanometer level, the stress on the quantum well is basically released, and the quantum confinement Stark effect (QCSE) is eliminated. In addition, due to the quantum dot-like characteristics of nanoscale LEDs and the strong exciton binding energy of GaN, GaN-based nanoscale LEDs can also be used as single-photon light sources for quantum computing, quantum communication and other fields.
目前,制备纳米柱的常规方法包括:电子束曝光(EBL)或聚焦离子束刻蚀(FIB)。以电子束曝光(EBL)为例,电子束曝光是利用电子束较短的德布罗意波长,对样品进行曝光显影,进一步蒸镀电极金属。Currently, conventional methods for preparing nanopillars include: electron beam exposure (EBL) or focused ion beam etching (FIB). Taking electron beam exposure (EBL) as an example, electron beam exposure uses the shorter de Broglie wavelength of the electron beam to expose and develop the sample, and further evaporate the electrode metal.
然而,虽然EBL工艺精度高,但同时对电极金属厚度有所限制,因此在一定程度上削弱其导电性,导致纳米LED的P型欧姆接触性能较差。However, although the EBL process has high precision, it also limits the thickness of the electrode metal, thus weakening its conductivity to a certain extent, resulting in poor P-type ohmic contact performance of nano-LEDs.
发明内容SUMMARY OF THE INVENTION
本发明实施例提供一种纳米柱的制备方法和纳米柱LED器件的制备方法,以实现提高纳米LED的P型欧姆接触性能的效果。The embodiments of the present invention provide a method for preparing a nano-pillar and a method for preparing a nano-pillar LED device, so as to achieve the effect of improving the P-type ohmic contact performance of the nano-LED.
第一方面,本发明实施例提供了一种纳米柱的制备方法,包括:In a first aspect, an embodiment of the present invention provides a method for preparing a nanopillar, including:
在LED晶片的上表面蒸镀第一薄膜,其中,所述LED晶片包括p型GaN层、量子阱有源层、n型GaN层和衬底,其中p型GaN层的上表面作为所述LED晶片的上表面,p型GaN层的下表面与量子阱有源层的上表面接触,量子阱有源层的下表面与n型GaN层的上表面接触,n型GaN层的下表面和衬底的上表面接触;A first thin film is evaporated on the upper surface of an LED wafer, wherein the LED wafer includes a p-type GaN layer, a quantum well active layer, an n-type GaN layer and a substrate, wherein the upper surface of the p-type GaN layer serves as the LED The upper surface of the wafer, the lower surface of the p-type GaN layer is in contact with the upper surface of the quantum well active layer, the lower surface of the quantum well active layer is in contact with the upper surface of the n-type GaN layer, the lower surface of the n-type GaN layer and the lining The top surface of the bottom is in contact;
对蒸镀有所述第一薄膜的LED晶片进行热退火处理,以使所述第一薄膜与所述p型GaN层形成欧姆接触;thermally annealing the LED wafer on which the first thin film is evaporated, so that the first thin film forms an ohmic contact with the p-type GaN layer;
在所述第一薄膜的上表面沉积第二薄膜,所述第二薄膜的下表面与所述第一薄膜接触;depositing a second film on the upper surface of the first film, and the lower surface of the second film is in contact with the first film;
在所述第二薄膜的上表面制备多个辅助纳米图形;preparing a plurality of auxiliary nano-patterns on the upper surface of the second film;
通过所述辅助纳米图形对所述第二薄膜进行刻蚀以形成多个掩膜;etching the second thin film through the auxiliary nanopattern to form a plurality of masks;
通过所述掩膜对所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,所述LED纳米柱的两端用于与电极连接。The first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer are etched through the mask to form a plurality of LED nano-pillars, and both ends of the LED nano-pillars are used for connecting with electrodes .
可选的,所述通过所述辅助纳米图形对所述第二薄膜进行刻蚀以形成多个掩膜,包括:Optionally, the etching of the second thin film through the auxiliary nano-pattern to form a plurality of masks includes:
将第一刻蚀气体沿第一目标方向喷射,所述第一目标方向为与所述第二薄膜的上表面垂直的方向,所述辅助纳米图形用于阻挡所述第一刻蚀气体;spraying the first etching gas along a first target direction, where the first target direction is a direction perpendicular to the upper surface of the second thin film, and the auxiliary nano-pattern is used to block the first etching gas;
所述第二薄膜在所述第一刻蚀气体的刻蚀下形成多个掩膜。The second thin film forms a plurality of masks under the etching of the first etching gas.
可选的,所述第一刻蚀气体为CHF3或O2。Optionally, the first etching gas is CHF 3 or O 2 .
可选的,所述通过所述掩膜对所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,包括:Optionally, the etching of the first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer through the mask to form a plurality of LED nano-pillars includes:
将第二刻蚀气体沿第二目标方向喷射,所述第二目标方向为与所述第一薄膜的上表面垂直的方向,所述掩膜用于阻挡所述第二刻蚀气体;spraying a second etching gas along a second target direction, where the second target direction is a direction perpendicular to the upper surface of the first thin film, and the mask is used to block the second etching gas;
所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层在所述第二刻蚀气体的刻蚀下形成多个中间纳米柱;The first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer are etched by the second etching gas to form a plurality of intermediate nano-columns;
去除所述中间纳米柱的掩膜以形成多个LED纳米柱。The mask of the middle nanopillars is removed to form a plurality of LED nanopillars.
可选的,所述第二刻蚀气体为Cl2或Cl3B。Optionally, the second etching gas is Cl 2 or Cl 3 B.
可选的,所述去除所述中间纳米柱的掩膜以形成多个LED纳米柱,包括:Optionally, removing the mask of the middle nano-pillars to form a plurality of LED nano-pillars includes:
通过氢氟酸对所述掩膜去除以形成多个LED纳米柱。The mask is removed by hydrofluoric acid to form a plurality of LED nanopillars.
可选的,所述第一薄膜为氧化硅薄膜。Optionally, the first film is a silicon oxide film.
可选的,所述第二薄膜为ITO薄膜。Optionally, the second film is an ITO film.
可选的,热退火处理的温度为650℃-850℃,退火时间为0.5分钟-10分钟。Optionally, the temperature of the thermal annealing treatment is 650°C-850°C, and the annealing time is 0.5 minutes-10 minutes.
第二方面,本发明实施例提供了一种纳米柱LED器件的制备方法,包括:In a second aspect, an embodiment of the present invention provides a method for preparing a nano-pillar LED device, including:
在LED晶片的上表面蒸镀第一薄膜,其中,所述LED晶片包括p型GaN层、量子阱有源层、n型GaN层和衬底,其中p型GaN层的上表面作为所述LED晶片的上表面,p型GaN层的下表面与量子阱有源层的上表面接触,量子阱有源层的下表面与n型GaN层的上表面接触,n型GaN层的下表面和衬底的上表面接触;A first thin film is evaporated on the upper surface of an LED wafer, wherein the LED wafer includes a p-type GaN layer, a quantum well active layer, an n-type GaN layer and a substrate, wherein the upper surface of the p-type GaN layer serves as the LED The upper surface of the wafer, the lower surface of the p-type GaN layer is in contact with the upper surface of the quantum well active layer, the lower surface of the quantum well active layer is in contact with the upper surface of the n-type GaN layer, the lower surface of the n-type GaN layer and the lining The top surface of the bottom is in contact;
对蒸镀有所述第一薄膜的LED晶片进行热退火处理,以使所述第一薄膜与所述p型GaN层形成欧姆接触;thermally annealing the LED wafer on which the first thin film is evaporated, so that the first thin film forms an ohmic contact with the p-type GaN layer;
在所述第一薄膜的上表面沉积第二薄膜,所述第二薄膜的下表面与所述第一薄膜接触;depositing a second film on the upper surface of the first film, and the lower surface of the second film is in contact with the first film;
在所述第二薄膜的上表面制备多个辅助纳米图形;preparing a plurality of auxiliary nano-patterns on the upper surface of the second film;
通过所述辅助纳米图形对所述第二薄膜进行刻蚀以形成多个掩膜;etching the second thin film through the auxiliary nanopattern to form a plurality of masks;
通过所述掩膜对所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,所述LED纳米柱的两端用于与电极连接;The first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer are etched through the mask to form a plurality of LED nano-pillars, and both ends of the LED nano-pillars are used for connecting with electrodes ;
在所述LED纳米柱的携带有第一薄膜的一端制备第一电极,在所述LED纳米柱的n型GaN层的一端制备第二电极,以形成纳米柱LED器件,其中,所述量子阱有源层不与所述第一电极和第二电极接触。A first electrode is prepared at one end of the LED nanocolumn carrying the first thin film, and a second electrode is prepared at one end of the n-type GaN layer of the LED nanocolumn to form a nanocolumn LED device, wherein the quantum well The active layer is not in contact with the first and second electrodes.
本发明实施例通过在LED晶片的上表面蒸镀第一薄膜,其中,所述LED晶片包括p型GaN层、量子阱有源层、n型GaN层和衬底,其中p型GaN层的上表面作为所述LED晶片的上表面,p型GaN层的下表面与量子阱有源层的上表面接触,量子阱有源层的下表面与n型GaN层的上表面接触,n型GaN层的下表面和衬底的上表面接触;对蒸镀有所述第一薄膜的LED晶片进行热退火处理,以使所述第一薄膜与所述p型GaN层形成欧姆接触;在所述第一薄膜的上表面沉积第二薄膜,所述第二薄膜的下表面与所述第一薄膜接触;在所述第二薄膜的上表面制备多个辅助纳米图形;通过所述辅助纳米图形对所述第二薄膜进行刻蚀以形成多个掩膜;通过所述掩膜对所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,所述LED纳米柱的两端用于与电极连接,解决了常用的制备方法对电极金属厚度有所限制,因此在一定程度上削弱其导电性,导致纳米LED的P型欧姆接触性能较差的问题,实现了提高纳米LED的P型欧姆接触性能的效果。In the embodiment of the present invention, the first thin film is evaporated on the upper surface of the LED wafer, wherein the LED wafer includes a p-type GaN layer, a quantum well active layer, an n-type GaN layer and a substrate, wherein the upper surface of the p-type GaN layer is The surface is used as the upper surface of the LED wafer, the lower surface of the p-type GaN layer is in contact with the upper surface of the quantum well active layer, the lower surface of the quantum well active layer is in contact with the upper surface of the n-type GaN layer, and the n-type GaN layer The lower surface of the substrate is in contact with the upper surface of the substrate; thermal annealing is performed on the LED wafer on which the first thin film is evaporated, so that the first thin film and the p-type GaN layer form ohmic contact; A second film is deposited on the upper surface of a film, and the lower surface of the second film is in contact with the first film; a plurality of auxiliary nano-patterns are prepared on the upper surface of the second film; The second thin film is etched to form a plurality of masks; the first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer are etched through the masks to form a plurality of LED nano-pillars , the two ends of the LED nano-columns are used to connect with the electrodes, which solves the limitation of the thickness of the electrode metal by the commonly used preparation methods, so its conductivity is weakened to a certain extent, resulting in poor P-type ohmic contact performance of the nano-LED The effect of improving the P-type ohmic contact performance of the nano-LED is realized.
附图说明Description of drawings
图1是本发明实施例一提供的一种纳米柱的制备方法的流程示意图;Fig. 1 is the schematic flow sheet of the preparation method of a kind of nano-pillar provided in the embodiment of the present invention;
图2是本发明实施例一提供的一种在LED晶片的上表面蒸镀第一薄膜的示意图;FIG. 2 is a schematic diagram of evaporating a first thin film on an upper surface of an LED wafer according to Embodiment 1 of the present invention;
图3是本发明实施例一提供的一种在第一薄膜的上表面沉积第二薄膜的示意图;3 is a schematic diagram of depositing a second film on the upper surface of the first film according to Embodiment 1 of the present invention;
图4是本发明实施例一提供的一种在第二薄膜的上表面制备多个辅助纳米图形的示意图;4 is a schematic diagram of preparing a plurality of auxiliary nano-patterns on the upper surface of the second film according to Embodiment 1 of the present invention;
图5是本发明实施例一提供的一种对第二薄膜进行刻蚀以形成多个掩膜的示意图;5 is a schematic diagram of etching a second thin film to form a plurality of masks according to Embodiment 1 of the present invention;
图6是本发明实施例一提供的一种中间纳米柱的结构示意图;6 is a schematic structural diagram of an intermediate nanocolumn provided in Embodiment 1 of the present invention;
图7是本发明实施例一提供的一种LED纳米柱的结构示意图;FIG. 7 is a schematic structural diagram of an LED nanocolumn according to Embodiment 1 of the present invention;
图8是本发明实施例二提供的一种纳米柱LED器件的制备方法的流程示意图;8 is a schematic flowchart of a method for preparing a nano-pillar LED device according to Embodiment 2 of the present invention;
图9是本发明实施例二提供的一种纳米柱LED器件的结构示意图。FIG. 9 is a schematic structural diagram of a nano-pillar LED device according to Embodiment 2 of the present invention.
具体实施方式Detailed ways
下面结合附图和实施例对本发明作进一步的详细说明。可以理解的是,此处所描述的具体实施例仅仅用于解释本发明,而非对本发明的限定。另外还需要说明的是,为了便于描述,附图中仅示出了与本发明相关的部分而非全部结构。The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, the drawings only show some but not all structures related to the present invention.
在更加详细地讨论示例性实施例之前应当提到的是,一些示例性实施例被描述成作为流程图描绘的处理或方法。虽然流程图将各步骤描述成顺序的处理,但是其中的许多步骤可以被并行地、并发地或者同时实施。此外,各步骤的顺序可以被重新安排。当其操作完成时处理可以被终止,但是还可以具有未包括在附图中的附加步骤。处理可以对应于方法、函数、规程、子例程、子计算机程序等等。Before discussing the exemplary embodiments in greater detail, it should be mentioned that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowchart depicts the steps as a sequential process, many of the steps may be performed in parallel, concurrently, or concurrently. Furthermore, the order of the steps can be rearranged. The process may be terminated when its operation is complete, but may also have additional steps not included in the figures. A process may correspond to a method, function, procedure, subroutine, subcomputer program, or the like.
此外,术语“第一”、“第二”等可在本文中用于描述各种方向、动作、步骤或元件等,但这些方向、动作、步骤或元件不受这些术语限制。这些术语仅用于将第一个方向、动作、步骤或元件与另一个方向、动作、步骤或元件区分。举例来说,在不脱离本申请的范围的情况下,可以将第一薄膜为第二薄膜,且类似地,可将第二薄膜称为第一薄膜。第一薄膜和第二薄膜两者都是薄膜,但其不是同一薄膜。术语“第一”、“第二”等而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本发明的描述中,“多个”的含义是至少两个,例如两个,三个等,除非另有明确具体的限定。Furthermore, the terms "first," "second," etc. may be used herein to describe various directions, acts, steps or elements, etc., but are not limited by these terms. These terms are only used to distinguish a first direction, act, step or element from another direction, act, step or element. For example, a first film may be referred to as a second film, and similarly, a second film may be referred to as a first film, without departing from the scope of this application. Both the first film and the second film are films, but they are not the same film. The terms "first", "second" and the like should not be understood as indicating or implying relative importance or implying the number of technical features indicated. Thus, a feature defined as "first" or "second" may expressly or implicitly include one or more of that feature. In the description of the present invention, "plurality" means at least two, such as two, three, etc., unless otherwise expressly and specifically defined.
实施例一Example 1
图1为本发明实施例一提供的一种纳米柱的制备方法的流程示意图,可适用于制备LED纳米柱的场景。FIG. 1 is a schematic flowchart of a method for preparing a nano-column according to Embodiment 1 of the present invention, which can be applied to the scene of preparing an LED nano-column.
如图1所示,本发明实施例一提供的纳米柱的制备方法包括:As shown in FIG. 1 , the preparation method of the nanocolumn provided in the first embodiment of the present invention includes:
S110、在LED晶片的上表面蒸镀第一薄膜,其中,所述LED晶片包括p型GaN层、量子阱有源层、n型GaN层和衬底,其中p型GaN层的上表面作为所述LED晶片的上表面,p型GaN层的下表面与量子阱有源层的上表面接触,量子阱有源层的下表面与n型GaN层的上表面接触,n型GaN层的下表面和衬底的上表面接触。S110. Evaporate a first thin film on the upper surface of the LED wafer, wherein the LED wafer includes a p-type GaN layer, a quantum well active layer, an n-type GaN layer and a substrate, wherein the upper surface of the p-type GaN layer serves as the The upper surface of the LED wafer, the lower surface of the p-type GaN layer is in contact with the upper surface of the quantum well active layer, the lower surface of the quantum well active layer is in contact with the upper surface of the n-type GaN layer, and the lower surface of the n-type GaN layer in contact with the upper surface of the substrate.
其中,LED晶片可以是GaN基蓝光LED晶片,也可以是GaN基绿光LED晶片,本实施例的LED晶片不作具体限定,可以根据需要进行选择。其中,LED晶片包括p型GaN层、量子阱有源层、n型GaN层和衬底,其中p型GaN层的上表面作为LED晶片的上表面,p型GaN层的下表面与量子阱有源层的上表面接触,量子阱有源层的下表面与n型GaN层的上表面接触,n型GaN层的下表面和衬底的上表面接触。可选的,量子阱有源层可以是InxGa1XN量子阱有源层或GaN量子阱有源层,本实施例不作具体限定。衬底可以是蓝宝石材料制成的平滑衬底,本实施例不作具体限定。The LED chip may be a GaN-based blue LED chip or a GaN-based green LED chip. The LED chip in this embodiment is not specifically limited, and can be selected according to needs. Wherein, the LED wafer includes a p-type GaN layer, a quantum well active layer, an n-type GaN layer and a substrate, wherein the upper surface of the p-type GaN layer serves as the upper surface of the LED wafer, and the lower surface of the p-type GaN layer is connected to the quantum well. The upper surface of the source layer is in contact, the lower surface of the quantum well active layer is in contact with the upper surface of the n-type GaN layer, and the lower surface of the n-type GaN layer is in contact with the upper surface of the substrate. Optionally, the quantum well active layer may be an InxGa1XN quantum well active layer or a GaN quantum well active layer, which is not specifically limited in this embodiment. The substrate may be a smooth substrate made of sapphire material, which is not specifically limited in this embodiment.
可选的,第一薄膜可以是导电透明材料,例如是ITO(掺锡氧化铟,IndiumTinOxide)薄膜等,此处不作限制。具体的,可以是通过磁控溅射或电子束蒸发工艺在LED晶片的上表面沉积100-200nm的ITO薄膜。可选的,第一薄膜可以是单层或多层,可以根据需要设置。Optionally, the first film may be a conductive transparent material, such as an ITO (IndiumTinOxide) film, etc., which is not limited here. Specifically, a 100-200 nm ITO film can be deposited on the upper surface of the LED wafer by magnetron sputtering or electron beam evaporation. Optionally, the first film can be a single layer or a multi-layer, which can be set as required.
参考图2,图2是本实施例提供的在LED晶片的上表面蒸镀第一薄膜的示意图。通过图2可知,LED晶片300包括p型GaN层301、量子阱有源层302、n型GaN层303和衬底304,其中p型GaN层301的上表面作为所述LED晶片300的上表面,p型GaN层301的下表面与量子阱有源层302的上表面接触,量子阱有源层302的下表面与n型GaN层303的上表面接触,n型GaN层303的下表面和衬底304的上表面接触,第一薄膜200与LED晶片300的上表面接触。Referring to FIG. 2 , FIG. 2 is a schematic diagram of evaporating a first thin film on the upper surface of the LED wafer provided by this embodiment. As can be seen from FIG. 2 , the
S120、对蒸镀有所述第一薄膜的LED晶片进行热退火处理,以使所述第一薄膜与所述p型GaN层形成欧姆接触。S120 , thermally annealing the LED wafer on which the first thin film is evaporated, so that the first thin film and the p-type GaN layer form an ohmic contact.
在本步骤中,对蒸镀有第一薄膜热退火处理后,第一薄膜已经能与LED晶片的P型GaN层形成良好的欧姆接触。可选的,热退火处理的温度为650℃-850℃,退火时间为0.5分钟-10分钟,可以根据需要选择热退火处理的温度和时间,本实施例不作具体限定。优选的,热退火处理的工艺参数为:温度为800℃,退火时间为0.5分钟。In this step, after thermal annealing of the vapor-deposited first thin film, the first thin film can already form a good ohmic contact with the P-type GaN layer of the LED wafer. Optionally, the temperature of the thermal annealing treatment is 650°C-850°C, and the annealing time is 0.5 minutes-10 minutes. The temperature and time of the thermal annealing treatment can be selected as required, which is not specifically limited in this embodiment. Preferably, the process parameters of the thermal annealing treatment are: the temperature is 800° C., and the annealing time is 0.5 minutes.
在一个可选的实施方式中,对蒸镀有所述第一薄膜的LED晶片进行热退火处理包括:In an optional embodiment, thermally annealing the LED wafer on which the first thin film is evaporated includes:
将蒸镀有所述第一薄膜的LED晶片放置在密闭空间,所述密闭空间具有预设比例的氮气和氧气;在所述密闭空间对蒸镀有所述第一薄膜的LED晶片进行热退火处理。placing the LED wafer on which the first thin film is evaporated in a closed space with a preset ratio of nitrogen and oxygen; thermally annealing the LED chip on which the first thin film is evaporated in the closed space deal with.
在本实施方式中,将蒸镀有所述第一薄膜的LED晶片放置在具有预设比例的氮气和氧气的密闭空间中进行热退火处理。可选的,预设比例可以是4:1,可以根据需要设定此预设比例,从而达到退火效果最佳,本实施例不作具体限定。In this embodiment, the LED wafer on which the first thin film is evaporated is placed in a closed space with a preset ratio of nitrogen and oxygen for thermal annealing. Optionally, the preset ratio may be 4:1, and the preset ratio may be set as required, so as to achieve the best annealing effect, which is not specifically limited in this embodiment.
S130、在所述第一薄膜的上表面沉积第二薄膜,所述第二薄膜的下表面与所述第一薄膜接触。S130 , depositing a second thin film on the upper surface of the first thin film, and the lower surface of the second thin film is in contact with the first thin film.
其中,第二薄膜可以是绝缘的薄膜,例如一氧化硅或二氧化硅等,此处不作具体限制。可选的,第二薄膜可以是单层或多层,此处不作具体限制。具体的,可以利用等离子体增强化学的气相沉积法(PECVD)在第一薄膜上沉积第二薄膜。参考图3,图3是本实施例提供的一种在第一薄膜的上表面沉积第二薄膜的示意图。通过图3可知,第一薄膜200的上表面沉积有第二薄膜100,第一薄膜200的上表面和第二薄膜100的下表面接触。Wherein, the second film may be an insulating film, such as silicon monoxide or silicon dioxide, which is not specifically limited here. Optionally, the second film may be a single layer or a multi-layer, which is not specifically limited here. Specifically, plasma enhanced chemical vapor deposition (PECVD) may be used to deposit the second thin film on the first thin film. Referring to FIG. 3 , FIG. 3 is a schematic diagram of depositing a second thin film on the upper surface of the first thin film according to the present embodiment. It can be seen from FIG. 3 that the
S140、在所述第二薄膜的上表面制备多个辅助纳米图形。S140, preparing a plurality of auxiliary nano-patterns on the upper surface of the second thin film.
其中,辅助纳米图形是指用于辅助刻蚀第二薄膜的纳米图形。具体的,可以利用纳米压印工艺在第二薄膜的上表面制备辅助纳米图形。参考图4,图4是本实施例提供的一种在第二薄膜的上表面制备多个辅助纳米图形的示意图。通过图4可知,在第二薄膜100的上表面制备有多个辅助纳米图形400。Wherein, the auxiliary nano-pattern refers to the nano-pattern used for auxiliary etching of the second thin film. Specifically, an auxiliary nano-pattern can be prepared on the upper surface of the second thin film by using a nano-imprinting process. Referring to FIG. 4 , FIG. 4 is a schematic diagram of preparing a plurality of auxiliary nano-patterns on the upper surface of the second thin film according to the present embodiment. It can be seen from FIG. 4 that a plurality of auxiliary nano-
S150、通过所述辅助纳米图形对所述第二薄膜进行刻蚀以形成多个掩膜。S150 , etching the second thin film through the auxiliary nano-pattern to form a plurality of masks.
其中,掩膜用于辅助对第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀。掩膜可以是包括辅助纳米图形和第二薄膜;也可以是只包括第二薄膜。具体的,当掩膜包括辅助纳米图形和第二薄膜时,则对第二薄膜刻蚀后,将辅助纳米图形和第二薄膜作为掩膜;当掩膜包括第二薄膜时,可以先对辅助纳米图形的压印胶去除,剩余第二薄膜,将第二薄膜作为掩膜。The mask is used to assist in etching the first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer. The mask may include the auxiliary nano-pattern and the second thin film; or may only include the second thin film. Specifically, when the mask includes the auxiliary nano-pattern and the second thin film, after etching the second thin film, the auxiliary nano-pattern and the second thin film are used as the mask; when the mask includes the second thin film, the auxiliary nano-pattern and the second thin film can be used as the mask first; The embossing glue of the nano-pattern is removed, and the second thin film remains, and the second thin film is used as a mask.
在一个可选的实施方式中,通过所述辅助纳米图形对所述第二薄膜进行刻蚀以形成多个掩膜,包括:In an optional embodiment, the second thin film is etched through the auxiliary nanopattern to form a plurality of masks, including:
将第一刻蚀气体沿第一目标方向喷射,所述第一目标方向为与所述第二薄膜的上表面垂直的方向,所述辅助纳米图形用于阻挡所述第一刻蚀气体;所述第二薄膜在所述第一刻蚀气体的刻蚀下形成多个掩膜。The first etching gas is sprayed along a first target direction, the first target direction is a direction perpendicular to the upper surface of the second thin film, and the auxiliary nano-pattern is used to block the first etching gas; so The second thin film forms a plurality of masks under the etching of the first etching gas.
其中,第一刻蚀气体用于刻蚀第二薄膜,但无法刻蚀辅助纳米图形和LED晶片的p型GaN层的气体,可以根据需要进行选择,第二薄膜在第一刻蚀气体的刻蚀下形成掩膜。可选的,第一刻蚀气体包括但不限于CHF3或O2。Among them, the first etching gas is used to etch the second thin film, but the gas that cannot etch the auxiliary nano-pattern and the p-type GaN layer of the LED wafer can be selected according to needs. etch to form a mask. Optionally, the first etching gas includes but is not limited to CHF 3 or O 2 .
参考图5,图5是本实施例提供的一种对所述第二薄膜进行刻蚀以形成多个掩膜的示意图。通过图5可知,对第二薄膜进行刻蚀后形成多个掩膜500。Referring to FIG. 5 , FIG. 5 is a schematic diagram of etching the second thin film to form a plurality of masks provided by this embodiment. It can be seen from FIG. 5 that a plurality of
S160、通过所述掩膜对所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,所述LED纳米柱的两端用于与电极连接。S160. Etch the first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer through the mask to form a plurality of LED nano-columns, and two ends of the LED nano-columns are used for connecting with the LED nano-columns. electrode connection.
在本步骤中,LED纳米柱包括第一薄膜、p型GaN层、量子阱有源层和n型GaN层。In this step, the LED nanocolumns include a first thin film, a p-type GaN layer, a quantum well active layer and an n-type GaN layer.
在一个可选的实施方式中,通过所述掩膜对所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,包括:In an optional embodiment, the first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer are etched through the mask to form a plurality of LED nanopillars, including:
将第二刻蚀气体沿第二目标方向喷射,所述第二目标方向为与所述第一薄膜的上表面垂直的方向,所述掩膜用于阻挡所述第二刻蚀气体;所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层在所述第二刻蚀气体的刻蚀下形成多个中间纳米柱;去除所述中间纳米柱的掩膜以形成多个LED纳米柱。spraying a second etching gas along a second target direction, the second target direction being a direction perpendicular to the upper surface of the first thin film, and the mask is used to block the second etching gas; the The first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer are etched by the second etching gas to form a plurality of middle nanopillars; the mask of the middle nanopillars is removed to form a plurality of middle nanopillars. LED nanopillars.
其中,第二刻蚀气体是指用于刻蚀第一薄膜、p型GaN层、量子阱有源层和n型GaN层的气体,但无法刻蚀掩膜和衬底的气体,可以根据需要进行选择。可选的,第二刻蚀气体包括但不限于Cl2或Cl3B。中间纳米柱是指通过掩膜对第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀得到的结果。其中,中间纳米柱包括掩膜、第一薄膜、p型GaN层、量子阱有源层和n型GaN层。去除中间纳米柱的掩膜后可以得到LED纳米柱。可选的,可以通过氢氟酸对所述掩膜去除以形成多个LED纳米柱。具体的,可以用氢氟酸容易对中间纳米柱进行浸泡,以形成LED纳米柱。Among them, the second etching gas refers to the gas used for etching the first thin film, p-type GaN layer, quantum well active layer and n-type GaN layer, but the gas that cannot etch the mask and the substrate can be used as required. to make a selection. Optionally, the second etching gas includes but is not limited to Cl 2 or Cl 3 B. The middle nanopillar refers to the result obtained by etching the first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer through a mask. Wherein, the middle nano-column includes a mask, a first thin film, a p-type GaN layer, a quantum well active layer and an n-type GaN layer. The LED nanopillars can be obtained after removing the mask of the middle nanopillars. Optionally, the mask may be removed by hydrofluoric acid to form a plurality of LED nanopillars. Specifically, the middle nano-columns can be easily soaked with hydrofluoric acid to form LED nano-columns.
参考图6,图6是本实施例提供的一种中间纳米柱的结构示意图。通过图6可知,中间纳米柱50包括掩膜500、第一薄膜200、p型GaN层301、量子阱有源层302和n型GaN层303。Referring to FIG. 6 , FIG. 6 is a schematic structural diagram of an intermediate nanocolumn provided in this embodiment. It can be seen from FIG. 6 that the
参考图7,图7是本实施例提供的一种LED纳米柱的结构示意图。通过图7可知,LED纳米柱40包括第一薄膜200、p型GaN层301、量子阱有源层302和n型GaN层303。其中,第一薄膜200已经与p型GaN层301形成良好的欧姆接触。Referring to FIG. 7 , FIG. 7 is a schematic structural diagram of an LED nanocolumn provided in this embodiment. As can be seen from FIG. 7 , the
本发明实施例的技术方案,通过在LED晶片的上表面蒸镀第一薄膜,其中,所述LED晶片包括p型GaN层、量子阱有源层、n型GaN层和衬底,其中p型GaN层的上表面作为所述LED晶片的上表面,p型GaN层的下表面与量子阱有源层的上表面接触,量子阱有源层的下表面与n型GaN层的上表面接触,n型GaN层的下表面和衬底的上表面接触;对蒸镀有所述第一薄膜的LED晶片进行热退火处理,以使所述第一薄膜与所述p型GaN层形成欧姆接触;在所述第一薄膜的上表面沉积第二薄膜,所述第二薄膜的下表面与所述第一薄膜接触;在所述第二薄膜的上表面制备多个辅助纳米图形;通过所述辅助纳米图形对所述第二薄膜进行刻蚀以形成多个掩膜;通过所述掩膜对所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,所述LED纳米柱的两端用于与电极连接,由于第一薄膜具有导电性,并且第一薄膜已经与p型GaN层形成良好的欧姆接触,从而提高了p型GaN层和电极欧姆接触的面积,达到提高纳米LED的P型欧姆接触性能的技术效果。The technical solution of the embodiment of the present invention is to evaporate a first thin film on the upper surface of an LED wafer, wherein the LED wafer includes a p-type GaN layer, a quantum well active layer, an n-type GaN layer and a substrate, wherein the p-type GaN layer The upper surface of the GaN layer is used as the upper surface of the LED wafer, the lower surface of the p-type GaN layer is in contact with the upper surface of the quantum well active layer, and the lower surface of the quantum well active layer is in contact with the upper surface of the n-type GaN layer, The lower surface of the n-type GaN layer is in contact with the upper surface of the substrate; thermal annealing is performed on the LED wafer on which the first thin film is evaporated, so that the first thin film forms an ohmic contact with the p-type GaN layer; A second film is deposited on the upper surface of the first film, and the lower surface of the second film is in contact with the first film; a plurality of auxiliary nano-patterns are prepared on the upper surface of the second film; The nanopattern etches the second thin film to form a plurality of masks; the first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer are etched through the masks to form a plurality of masks; LED nano-columns, the two ends of the LED nano-columns are used to connect with electrodes, since the first thin film has conductivity, and the first thin film has formed a good ohmic contact with the p-type GaN layer, thereby improving the p-type GaN layer. The area of ohmic contact with the electrode achieves the technical effect of improving the P-type ohmic contact performance of the nano-LED.
实施例二Embodiment 2
图8是本发明实施例二提供的一种纳米柱LED器件的制备方法的流程示意图,本实施例可适用于制备纳米柱LED器件的场景。FIG. 8 is a schematic flowchart of a method for preparing a nano-pillar LED device according to Embodiment 2 of the present invention, and this embodiment can be applied to a scenario of preparing a nano-pillar LED device.
如图8所示,本实施例提供的纳米柱LED器件的制备方法可以包括,其中:As shown in FIG. 8 , the preparation method of the nano-pillar LED device provided in this embodiment may include, wherein:
S210、在LED晶片的上表面蒸镀第一薄膜,其中,所述LED晶片包括p型GaN层、量子阱有源层、n型GaN层和衬底,其中p型GaN层的上表面作为所述LED晶片的上表面,p型GaN层的下表面与量子阱有源层的上表面接触,量子阱有源层的下表面与n型GaN层的上表面接触,n型GaN层的下表面和衬底的上表面接触。S210. Evaporate a first thin film on the upper surface of the LED wafer, wherein the LED wafer includes a p-type GaN layer, a quantum well active layer, an n-type GaN layer and a substrate, wherein the upper surface of the p-type GaN layer serves as the The upper surface of the LED wafer, the lower surface of the p-type GaN layer is in contact with the upper surface of the quantum well active layer, the lower surface of the quantum well active layer is in contact with the upper surface of the n-type GaN layer, and the lower surface of the n-type GaN layer in contact with the upper surface of the substrate.
S220、对蒸镀有所述第一薄膜的LED晶片进行热退火处理,以使所述第一薄膜与所述p型GaN层形成欧姆接触。S220, thermally annealing the LED wafer on which the first thin film is evaporated, so that the first thin film and the p-type GaN layer form an ohmic contact.
S230、在所述第一薄膜的上表面沉积第二薄膜,所述第二薄膜的下表面与所述第一薄膜接触。S230 , depositing a second thin film on the upper surface of the first thin film, and the lower surface of the second thin film is in contact with the first thin film.
S240、在所述第二薄膜的上表面制备多个辅助纳米图形。S240 , preparing a plurality of auxiliary nano-patterns on the upper surface of the second thin film.
S250、通过所述辅助纳米图形对所述第二薄膜进行刻蚀以形成多个掩膜。S250 , etching the second thin film through the auxiliary nano-pattern to form a plurality of masks.
S260、通过所述掩膜对所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,所述LED纳米柱的两端用于与电极连接。S260, etching the first thin film, the p-type GaN layer, the quantum well active layer, and the n-type GaN layer through the mask to form a plurality of LED nano-columns, and two ends of the LED nano-columns are used for connecting with the LED nano-columns. electrode connection.
S270、在所述LED纳米柱的携带有第一薄膜的一端制备第一电极,在所述LED纳米柱的n型GaN层的一端制备第二电极,以形成纳米柱LED器件,其中,所述量子阱有源层不与所述第一电极和第二电极接触。S270, preparing a first electrode at one end of the LED nano-column carrying the first thin film, and preparing a second electrode at one end of the n-type GaN layer of the LED nano-column, so as to form a nano-column LED device, wherein the The quantum well active layer is not in contact with the first and second electrodes.
在本步骤中,在LED纳米柱的携带有第一薄膜的一端制备第一电极,在LED纳米柱的n型GaN层的一端制备第二电极。具体的,本实施例对于如何在LED纳米柱的两端制备电极不作具体限制。In this step, a first electrode is prepared at one end of the LED nanocolumn carrying the first thin film, and a second electrode is prepared at one end of the n-type GaN layer of the LED nanocolumn. Specifically, this embodiment does not specifically limit how to prepare electrodes at both ends of the LED nanocolumns.
在一个可选的实施方式中,在所述LED纳米柱的携带有第一薄膜的一端制备第一电极,在所述LED纳米柱的n型GaN层的一端制备第二电极可以包括:In an optional embodiment, preparing a first electrode at one end of the LED nanocolumn carrying the first thin film, and preparing a second electrode at one end of the n-type GaN layer of the LED nanocolumn may include:
将衬底和连接的多个LED纳米柱作为一个样品放入溶液(例如酒精或异丙醇)中,以在酒精或异丙醇中进行超声,利用超声的能量将LED纳米柱转移至溶液中,形成携带有LED纳米柱的悬浮液,再利用滴定管或移液枪,将悬浮液滴在绝缘衬底,并加热该绝缘衬底,使得溶液蒸发,剩下干燥的LED纳米柱。将放置有LED纳米柱的绝缘衬底放入至聚焦离子束(FIB)设备或电子束曝光(EBL)设备中,从而在LED纳米柱的携带有第一薄膜的一端制备第一电极,LED纳米柱的n型GaN层的一端制备第二电极,从而形成纳米柱LED器件。The substrate and connected multiple LED nanopillars are placed as a sample in a solution (such as alcohol or isopropanol) for sonication in alcohol or isopropanol, and the energy of the ultrasound is used to transfer the LED nanopillars into the solution , forming a suspension carrying the LED nanocolumns, and then using a burette or a pipette to drop the suspension on an insulating substrate, and heating the insulating substrate to evaporate the solution, leaving the dried LED nanocolumns. The insulating substrate on which the LED nanocolumns are placed is placed in a focused ion beam (FIB) device or an electron beam exposure (EBL) device, so that a first electrode is prepared at the end of the LED nanocolumn that carries the first film, and the LED nanocolumn is A second electrode was prepared at one end of the n-type GaN layer of the pillar, thereby forming a nanopillar LED device.
具体的,聚焦离子束(FIB)设备或电子束曝光(EBL)设备中的扫描电子显微镜寻找出LED纳米柱的两端,再抓取第一电极放置在LED纳米柱的携带有第一薄膜的一端,抓取第二电极放置在LED纳米柱的n型GaN层的一端,再通过聚焦离子束或电子束对第一电极包裹有第一薄膜的一端的区域进行轰击,以及对第二电极包裹有n型GaN层的一端的区域进行轰击,从而得到纳米柱LED器件。可选的,第一电极和第二电极的材料可以是金属,例如铂(pt),可以根据需要选择其他材料等,此处不作具体限制。具体的,由于纳米柱LED器件的体积很小,则在测量纳米柱LED器件的正极(p极)和负极(n极)时,可以将纳米柱LED器件的一极放置在一个大面积(例如大于200纳米)的导电体上,再将纳米柱LED器件的另一极放置在另一个大面积的导电体上,通过探针测量两个导电体从而确定出纳米柱LED器件的正负极。Specifically, a scanning electron microscope in a focused ion beam (FIB) device or an electron beam exposure (EBL) device finds both ends of the LED nanocolumn, and then grabs the first electrode and places it on the LED nanocolumn carrying the first thin film. At one end, grab the second electrode and place it on one end of the n-type GaN layer of the LED nanopillar, and then bombard the area of the first electrode wrapped with the end of the first film by a focused ion beam or electron beam, and wrap the second electrode The region with one end of the n-type GaN layer is bombarded, thereby obtaining a nanopillar LED device. Optionally, the material of the first electrode and the second electrode may be metal, such as platinum (pt), and other materials may be selected as required, which is not specifically limited here. Specifically, due to the small size of the nano-pillar LED device, when measuring the positive electrode (p-pole) and negative electrode (n-pole) of the nano-pillar LED device, one pole of the nano-pillar LED device can be placed on a large area (for example, The other pole of the nano-pillar LED device is placed on another large-area electrical conductor, and the two electrical conductors are measured by a probe to determine the positive and negative electrodes of the nano-pillar LED device.
参考图9,图9是本实施例提供的一种纳米柱LED器件的结构示意图。通过图9可知,纳米柱LED器件包括第一电极10、第二电极20和LED纳米柱40,其中第一电极10制备在LED纳米柱40的携带有第一薄膜200的一端,第二电极20制备在LED纳米柱40的n型GaN层303的一端,且量子阱有源层302不与所述第一电极10和第二电极20接触。其中,可以是第一薄膜200单独和第一电极10接触,也可以是第一薄膜200以及p型GaN层301同时与第一电极10接触。Referring to FIG. 9 , FIG. 9 is a schematic structural diagram of a nano-pillar LED device provided in this embodiment. As can be seen from FIG. 9 , the nano-column LED device includes a
本发明实施例的技术方案,通过在LED晶片的上表面蒸镀第一薄膜,其中,所述LED晶片包括p型GaN层、量子阱有源层、n型GaN层和衬底,其中p型GaN层的上表面作为所述LED晶片的上表面,p型GaN层的下表面与量子阱有源层的上表面接触,量子阱有源层的下表面与n型GaN层的上表面接触,n型GaN层的下表面和衬底的上表面接触;对蒸镀有所述第一薄膜的LED晶片进行热退火处理,以使所述第一薄膜与所述p型GaN层形成欧姆接触;在所述第一薄膜的上表面沉积第二薄膜,所述第二薄膜的下表面与所述第一薄膜接触;在所述第二薄膜的上表面制备多个辅助纳米图形;通过所述辅助纳米图形对所述第二薄膜进行刻蚀以形成多个掩膜;通过所述掩膜对所述第一薄膜、p型GaN层、量子阱有源层和n型GaN层进行刻蚀形成多个LED纳米柱,所述LED纳米柱的两端用于与电极连接,在所述LED纳米柱的携带有第一薄膜的一端制备第一电极,在所述LED纳米柱的n型GaN层的一端制备第二电极,以形成纳米柱LED器件,其中,所述量子阱有源层不与所述第一电极和第二电极接触,由于第一薄膜具有导电性,并且第一薄膜已经与p型GaN层形成良好的欧姆接触,从而提高了p型GaN层和电极欧姆接触的面积,达到提高纳米LED的P型欧姆接触性能的技术效果。The technical solution of the embodiment of the present invention is to evaporate a first thin film on the upper surface of an LED wafer, wherein the LED wafer includes a p-type GaN layer, a quantum well active layer, an n-type GaN layer and a substrate, wherein the p-type GaN layer The upper surface of the GaN layer is used as the upper surface of the LED wafer, the lower surface of the p-type GaN layer is in contact with the upper surface of the quantum well active layer, and the lower surface of the quantum well active layer is in contact with the upper surface of the n-type GaN layer, The lower surface of the n-type GaN layer is in contact with the upper surface of the substrate; thermal annealing is performed on the LED wafer on which the first thin film is evaporated, so that the first thin film forms an ohmic contact with the p-type GaN layer; A second film is deposited on the upper surface of the first film, and the lower surface of the second film is in contact with the first film; a plurality of auxiliary nano-patterns are prepared on the upper surface of the second film; The nanopattern etches the second thin film to form a plurality of masks; the first thin film, the p-type GaN layer, the quantum well active layer and the n-type GaN layer are etched through the masks to form a plurality of masks; LED nano-columns, two ends of the LED nano-columns are used to connect with electrodes, a first electrode is prepared at the end of the LED nano-columns that carries the first thin film, and a first electrode is prepared at the end of the LED nano-column that carries the first film, and the n-type GaN layer of the LED nano-columns A second electrode is prepared at one end to form a nano-pillar LED device, wherein the quantum well active layer is not in contact with the first electrode and the second electrode, since the first thin film has conductivity, and the first thin film has been connected to the p The GaN layer forms a good ohmic contact, thereby increasing the area of ohmic contact between the p-type GaN layer and the electrode, and achieving the technical effect of improving the p-type ohmic contact performance of the nano-LED.
注意,上述仅为本发明的较佳实施例及所运用技术原理。本领域技术人员会理解,本发明不限于这里所述的特定实施例,对本领域技术人员来说能够进行各种明显的变化、重新调整和替代而不会脱离本发明的保护范围。因此,虽然通过以上实施例对本发明进行了较为详细的说明,但是本发明不仅仅限于以上实施例,在不脱离本发明构思的情况下,还可以包括更多其他等效实施例,而本发明的范围由所附的权利要求范围决定。Note that the above are only preferred embodiments of the present invention and applied technical principles. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and can also include more other equivalent embodiments without departing from the concept of the present invention. The scope is determined by the scope of the appended claims.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114441718A (en) * | 2021-03-15 | 2022-05-06 | 南方科技大学 | Low-dimensional material preparation and structural physical property analysis system and method |
WO2023152873A1 (en) * | 2022-02-10 | 2023-08-17 | 日本電信電話株式会社 | Method for fabricating nanostructure device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104409577A (en) * | 2014-10-17 | 2015-03-11 | 西安神光安瑞光电科技有限公司 | Epitaxial growth method for GaN-based LED epitaxial active area basic structure |
CN105206727A (en) * | 2015-10-08 | 2015-12-30 | 南京大学 | InGaN/GaN multi-quantum-well single-nano-pole LED device and manufacturing method thereof |
CN107706272A (en) * | 2017-10-09 | 2018-02-16 | 南京大学 | In the method that compound semiconductor surface makes nano graph |
US20190207054A1 (en) * | 2016-10-24 | 2019-07-04 | South China University Of Technology | Vertical structure nonpolar led chip on lithium gallate substrate and preparation method therefor |
-
2020
- 2020-04-29 CN CN202010354230.3A patent/CN111430513B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104409577A (en) * | 2014-10-17 | 2015-03-11 | 西安神光安瑞光电科技有限公司 | Epitaxial growth method for GaN-based LED epitaxial active area basic structure |
CN105206727A (en) * | 2015-10-08 | 2015-12-30 | 南京大学 | InGaN/GaN multi-quantum-well single-nano-pole LED device and manufacturing method thereof |
US20190207054A1 (en) * | 2016-10-24 | 2019-07-04 | South China University Of Technology | Vertical structure nonpolar led chip on lithium gallate substrate and preparation method therefor |
CN107706272A (en) * | 2017-10-09 | 2018-02-16 | 南京大学 | In the method that compound semiconductor surface makes nano graph |
Non-Patent Citations (1)
Title |
---|
闫晓密;姜红苓;贾美琳;: "纳米柱InGaN/GaN多量子阱的干法刻蚀制备技术" * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114441718A (en) * | 2021-03-15 | 2022-05-06 | 南方科技大学 | Low-dimensional material preparation and structural physical property analysis system and method |
WO2023152873A1 (en) * | 2022-02-10 | 2023-08-17 | 日本電信電話株式会社 | Method for fabricating nanostructure device |
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