CN111430379B - Display panel and manufacturing method thereof - Google Patents

Abstract

The present invention provides a display panel and a manufacturing method thereof. The method includes: using a fine metal mask to pattern a photoresist layer to form a plurality of flat parts and a plurality of raised parts, wherein the flat parts are in the The position of the orthographic projection on the base substrate does not overlap with the position of the orthographic projection of the gate on the base substrate and the position of the orthographic projection of the first metal portion on the base substrate ; etch away the metal oxide semiconductor layer corresponding to the flat portion to form a first sub-portion; remove the raised portion, and make a second metal layer on the remaining metal oxide semiconductor layer, The second metal layer is patterned to form a source electrode and a drain electrode; wherein the source electrode and the drain electrode cover the first subsection; a passivation layer is formed on the second metal layer; Pixel electrodes are fabricated on the layer. The display panel and the manufacturing method thereof of the present invention can improve the aperture ratio.

Description

A display panel and method of making the same

【Technical field】

The present invention relates to the field of display technology, in particular to a display panel and a manufacturing method thereof.

【Background technique】

Compared with amorphous silicon (A-si), the metal oxide semiconductor layer has the characteristics of high electron mobility and small size.

Common metal oxide thin film transistor structures mainly include coplanar (Coplanar), etch barrier layer (Island Stop/Etch Stop Layer, IS/ESL) and back channel etching (Back Channel Etch, BCE). Due to the limitation of the existing source and drain electrodes, the metal oxide semiconductor layer below the source electrode and the drain electrode will protrude outside the source electrode and the drain electrode, and this part is easily affected by the backlight to generate electrical drift, which will cause the display panel to generate vertical crosstalk, etc. phenomenon, which reduces the display quality.

At present, in order to prevent the exposed metal oxide semiconductor layer from being affected by the backlight, the size of the gate is increased to shield it, but this will reduce the aperture ratio.

Therefore, it is necessary to provide a display panel and a manufacturing method thereof to solve the problems existing in the prior art.

[Content of the invention]

An object of the present invention is to provide a display panel and a manufacturing method thereof, which can improve the aperture ratio.

In order to solve the above technical problems, the present invention provides a manufacturing method of a display panel, including:

forming a first metal layer on a base substrate, and patterning the first metal layer to form a gate electrode and a first metal portion;

forming a gate insulating layer, a metal oxide semiconductor layer and a photoresist layer in sequence on the first metal layer;

The photoresist layer is patterned by using a fine metal mask to form a plurality of flat parts and a plurality of raised parts, wherein the position of the orthographic projection of the flat parts on the base substrate is the same as that of the The position of the orthographic projection of the gate on the base substrate and the position of the orthographic projection of the first metal portion on the base substrate do not overlap;

etching away the metal oxide semiconductor layer corresponding to the flat portion to form a first sub-portion;

The raised portion is removed, a second metal layer is formed on the remaining metal oxide semiconductor layer, and the second metal layer is patterned to form a source electrode and a drain electrode; wherein the source electrode and the drain electrode covering the first subsection;

forming a passivation layer on the second metal layer;

A pixel electrode is fabricated on the passivation layer, wherein the pixel electrode is connected to the drain electrode.

The present invention also provides a display panel, comprising:

substrate substrate;

a first metal layer, including a gate electrode and a first metal part;

a gate insulating layer, disposed on the first metal layer;

a metal oxide semiconductor layer, disposed on the gate insulating layer, the metal oxide semiconductor layer includes a first subsection; the position of the first subsection corresponds to the position of the gate;

a second metal layer, disposed on the metal oxide semiconductor layer, the second metal layer includes a source electrode and a drain electrode; the source electrode covers one end of the first sub-section; the drain electrode covering the other end of the first subsection;

a passivation layer, disposed on the second metal layer;

The pixel electrode is arranged on the passivation layer.

The display panel and its manufacturing method of the present invention include patterning the photoresist layer using a fine metal mask to form a plurality of flat parts and a plurality of raised parts, wherein the flat parts are on the substrate The position of the orthographic projection on the base substrate does not overlap with the position of the orthographic projection of the gate on the base substrate and the position of the orthographic projection of the first metal part on the base substrate; The metal oxide semiconductor layer corresponding to the flat portion is etched away to form a first sub-portion; the raised portion is removed, and a second metal layer is formed on the remaining metal oxide semiconductor layer, and the second metal layer is formed on the remaining metal oxide semiconductor layer. The metal layer is patterned to form a source electrode and a drain electrode; wherein the source electrode and the drain electrode cover the first subsection; since the metal oxide semiconductor layer outside the source electrode and the drain electrode is etched away, the metal oxide semiconductor layer is avoided The oxide semiconductor layer is exposed to avoid affecting the display quality, and since it is not necessary to increase the size of the gate, the aperture ratio can be increased.

【Description of drawings】

1 is a schematic structural diagram of a conventional display panel;

FIG. 2 is a schematic diagram of a manufacturing process flow diagram of an existing display panel;

FIG. 3 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of the manufacturing process flow of the display panel of the present invention.

【Detailed ways】

The following descriptions of the various embodiments refer to the accompanying drawings to illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as "up", "down", "front", "rear", "left", "right", "inside", "outside", "side", etc., are only for reference Additional schema orientation. Therefore, the directional terms used are for describing and understanding the present invention, not for limiting the present invention. In the figures, structurally similar elements are denoted by the same reference numerals.

The terms "first", "second" and the like in the description and claims of the present application and the above drawings are used to distinguish different objects, rather than to describe a specific order. Furthermore, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion.

As shown in FIG. 1 , a conventional display panel includes a base substrate 11 , and a first metal layer 12 , a gate insulating layer 13 , a metal oxide semiconductor layer 14 , and a second metal layer 15 sequentially disposed on the base substrate 11 . , a passivation layer 16 , a color filter layer 17 , a protective layer 18 and a pixel electrode 19 . The metal oxide semiconductor layer 14 shown in the dotted frame in FIG. 1 is not covered by the second metal layer and the first metal layer, that is, exposed.

With reference to FIG. 2 and FIG. 1 , the manufacturing method of the existing display panel includes:

S101 , forming a first metal layer 12 on the base substrate 11 , and patterning the first metal layer 12 to form a gate electrode 121 and a first metal portion 122 .

S102 , forming a gate insulating layer 13 on the first metal layer 12 .

S103 , forming the metal oxide semiconductor layer 14 and the photoresist layer 20 on the gate insulating layer 13 in sequence.

S104 , patterning the photoresist layer 20 to form openings 211 .

S105, the metal oxide semiconductor layer 14 corresponding to the opening 211 is etched away.

S106 , etching the gate insulating layer 13 corresponding to the etched metal oxide semiconductor layer to form a connection hole 101 .

S107, peeling off the remaining photoresist layer, and then patterning the metal oxide semiconductor layer 14 again to form the first sub-section 141, the second sub-section 142 and the third sub-section 143;

S108 , forming a second metal layer 15 on the connection hole 101 and the metal oxide semiconductor layer 14 , and patterning the second metal layer 15 to form a source electrode 151 , a drain electrode 152 and a second metal portion 153 ;

The second metal portion 153 is connected to the first metal portion through the connection hole 101 .

S109, forming a passivation layer 16 on the second metal layer 15;

S110, forming a color filter layer 17 on the passivation layer 16;

S111, forming a protective layer 18 on the color filter layer 17;

S112 , forming a pixel electrode 19 on the protective layer 18 , wherein the pixel electrode 19 is connected to the drain electrode 152 .

Please refer to FIG. 3 to FIG. 4 . FIG. 3 is a schematic structural diagram of a display panel according to an embodiment of the present invention.

In one embodiment, as shown in FIG. 3 and FIG. 4 , the display panel of the present invention includes a base substrate 21 , a first metal layer 22 , a gate insulating layer 23 , and a metal oxide sequentially disposed on the base substrate 21 . The semiconductor layer 24 , the second metal layer 25 , the passivation layer 26 and the pixel electrode 29 may further include a color filter layer 27 and/or a protective layer 28 .

The base substrate 21 may be a glass substrate or a flexible substrate.

The first metal layer 22 includes a gate electrode 221 and a first metal part 222 . The material of the first metal layer 22 includes Mo, Al, Ti, Cu and other metals. The first metal part 222 can be used to form connection lines, and can also be used to form electrodes. Of course, the role of the first metal portion 222 is not limited to this.

The material of the gate insulating layer 23 may be SiNx, SiOx or the like, and the gate insulating layer 23 may be a single-layer film or a double-layer film. In one embodiment, a connection hole may be provided on the gate insulating layer 23 .

The metal oxide semiconductor layer 24 includes a first subsection 241 . In one embodiment, the metal oxide semiconductor layer 24 may further include a second sub-section 242 and a third sub-section 243; the position of the first sub-section 241 corresponds to the position of the gate electrode 221, so The second sub-portion 242 corresponds to the position of one end of the first metal portion 222 ; the third sub-portion 243 corresponds to the position of the other end of the first metal portion 222 . The material of the metal oxide semiconductor layer 24 includes but is not limited to IGZO and ITZO.

The second metal layer 25 includes a source electrode 251 and a drain electrode 252. In addition, in order to simplify the manufacturing process and improve production efficiency, the second metal layer 25 may further include a second metal portion 253; the source electrode 251 and the drain electrode 252 is located on the first sub-portion 241 , and the second metal portion 253 is located on the second sub-portion 242 and the third sub-portion 243 . The material of the second metal layer 25 includes Mo, Al, Ti, Cu and other metals, and the second metal layer 25 may be a single-layer film or a multi-layer film. The source electrode 251 covers one end of the first sub-section 241 ; the drain electrode 252 covers the other end of the first sub-section 241 . In one embodiment, in order to further improve the display quality, the second metal portion 253 covers the second sub-portion 242 and the third sub-portion 243 . In one embodiment, in order to reduce impedance, the second metal portion 253 may be connected to the first metal portion 222 through a connection hole.

The material of the passivation layer 26 may include at least one of SiO ₂ , SiNx and SiON, for example, it may be a composite layer of any two of the above materials.

The color filter layer 27 includes a plurality of color filter color resists 271 to 273 arranged at intervals, for example, including a red color filter, a green color filter, and a blue color filter. The positions of the plurality of color filter resists correspond to the positions of the second metal portion 242 .

The material of the protective layer 28 may include at least one of SiO ₂ , SiNx and SiON, for example, it may be a composite layer of any two of the above materials.

The material of the pixel electrode 29 can be indium tin oxide, and the pixel electrode 29 is connected to the drain electrode 252 .

4 and 3, in one embodiment, the manufacturing method of the display panel of the present invention includes:

S201 , forming a first metal layer 22 on the base substrate 21 , and patterning the first metal layer 22 to form a gate electrode 221 and a first metal portion 222 .

For example, a photoresist layer is coated on the first metal layer, and then the process of patterning the photoresist layer includes exposure, development, and then using the patterned photoresist layer to etch the first metal layer 22 to form the gate 221 and The first metal part 222 .

S202, forming a gate insulating layer, a metal oxide semiconductor layer and a photoresist layer in sequence on the first metal layer;

For example, a gate insulating layer 23 , a metal oxide semiconductor layer 24 and a photoresist layer 30 are sequentially formed on the first metal layer 22 .

S203 , using the fine metal mask 40 to pattern the photoresist layer 30 to form a plurality of flat portions 302 and a plurality of raised portions 303 , wherein the first opening 301 and the first metal portion 222 are formed The position of the orthographic projection of the flat portion 302 on the base substrate 21 corresponds to the position of the orthographic projection of the gate on the base substrate 21 and the first metal portion 222 The positions of the orthographic projections on the base substrate 21 do not overlap;

S204 , etch away the metal oxide semiconductor layer corresponding to the flat portion 302 to form the first subsection 241 ; that is, in this embodiment, the metal oxide semiconductor layer does not include the second subsection and the third subsection .

In one embodiment, the step of etching away the metal oxide semiconductor layer corresponding to the flat portion 302 includes:

S2041, performing ashing treatment on the flat portion 302 to remove the flat portion 302 to form a second opening (not marked in the figure);

S2042, the metal oxide semiconductor layer 24 corresponding to the second opening is etched away.

S205, removing the raised portion 303, forming a second metal layer 25 on the remaining metal oxide semiconductor layer 24, and patterning the second metal layer 25 to form a source electrode 251 and a drain electrode 252; wherein the source electrode 251 and the drain electrode 252 cover the first sub-section 241;

S206, forming a passivation layer 26 on the second metal layer 25;

S207 , forming a pixel electrode 29 on the protective layer 28 , wherein the pixel electrode 29 is connected to the drain electrode 252 .

In another embodiment, the manufacturing method of the display panel of the present invention includes:

S301 , forming a first metal layer 22 on the base substrate 21 , and patterning the first metal layer 22 to form a gate electrode 221 and a first metal portion 222 .

3 and FIG. 4, for example, a photoresist layer is coated on the first metal layer, and then the photoresist layer is patterned in the process including exposure, development, and then the first metal layer 22 using the patterned photoresist layer. Etching is performed to form the gate electrode 221 and the first metal portion 222 .

S302, forming a gate insulating layer, a metal oxide semiconductor layer and a photoresist layer in sequence on the first metal layer;

For example, a gate insulating layer 23 , a metal oxide semiconductor layer 24 and a photoresist layer 30 are sequentially formed on the first metal layer 22 .

S303 , using the fine metal mask 40 to pattern the photoresist layer 30 to form a first opening 301 , a plurality of flat portions 302 and a plurality of raised portions 303 , wherein the first opening 301 and the The position of the first metal portion corresponds to the position of the orthographic projection of the flat portion 302 on the base substrate 21 and the position of the orthographic projection of the gate on the base substrate 21 and the first The positions of the orthographic projections of the metal portions 222 on the base substrate 21 do not overlap.

S304, etching away the metal oxide semiconductor layer corresponding to the first opening, and etching the gate insulating layer under the first opening to form a connection hole;

For example, the metal oxide semiconductor layer 24 corresponding to the first opening can be etched away first, and then the lower gate insulating layer 23 can be etched again to form the connection hole 202 .

S305 , etching away the metal oxide semiconductor layer 24 corresponding to the flat portion 302 to form a first sub-portion 241 , a second sub-portion 242 and a third sub-portion 243 ;

In one embodiment, the step of etching away the metal oxide semiconductor layer corresponding to the flat portion 302 includes:

S3051, performing ashing treatment on the flat portion 302 to remove the flat portion 302 to form a second opening (not marked in the figure);

S3052, the metal oxide semiconductor layer 24 corresponding to the second opening is etched away.

S306, removing the raised portion 303, forming a second metal layer 25 on the remaining metal oxide semiconductor layer 24, and patterning the second metal layer 25 to form the source electrode 251, the drain electrode 252 and the The second metal portion 253 ; wherein the source electrode 251 and the drain electrode 252 cover the first sub-portion 241 , and the second metal portion 253 covers the second sub-portion 242 and the third sub-portion 243 .

S307, forming a passivation layer 26 on the second metal layer 25;

S308 , forming a color filter layer 27 on the passivation layer 26 , and the position of the color filter layer 27 corresponds to the position of the second metal portion 222 ;

S309 , forming a protective layer 28 on the color filter layer 27 . The passivation layer 26 and the protective layer 28 are formed with via holes.

S310 , forming a pixel electrode 29 on the protective layer 28 .

The pixel electrode 29 is connected to the drain electrode 252 through a via hole.

Of course, in other embodiments, the above manufacturing method may not include S308 and/or S309.

It can be understood that the specific manner of the above etching is not limited.

Since the metal oxide semiconductor layers located outside the source and drain electrodes are etched away, the metal oxide semiconductor layers are prevented from being exposed to the outside to avoid affecting the display quality. In addition, since the size of the gate does not need to be increased, the aperture ratio can be increased.

The display panel and its manufacturing method of the present invention include patterning the photoresist layer using a fine metal mask to form a plurality of flat parts and a plurality of raised parts, wherein the flat parts are on the substrate The position of the orthographic projection on the base substrate does not overlap with the position of the orthographic projection of the gate on the base substrate and the position of the orthographic projection of the first metal part on the base substrate; The metal oxide semiconductor layer corresponding to the flat portion is etched away to form a first sub-portion; the raised portion is removed, and a second metal layer is formed on the remaining metal oxide semiconductor layer, and the second metal layer is formed on the remaining metal oxide semiconductor layer. The metal layer is patterned to form a source electrode and a drain electrode; wherein the source electrode and the drain electrode cover the first subsection; since the metal oxide semiconductor layer outside the source electrode and the drain electrode is etched away, the metal oxide semiconductor layer is avoided The oxide semiconductor layer is exposed to avoid affecting the display quality, and since it is not necessary to increase the size of the gate, the aperture ratio can be increased.

In summary, although the present invention has been disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present invention. Those of ordinary skill in the art can make various Therefore, the protection scope of the present invention is subject to the scope defined by the claims.

Claims (8)

1. A method of making a display panel, comprising: forming a first metal layer on a base substrate, and patterning the first metal layer to form a gate electrode and a first metal portion; forming a gate insulating layer, a metal oxide semiconductor layer and a photoresist layer in sequence on the first metal layer; The photoresist layer is patterned using a fine metal mask to form a plurality of flat parts and a plurality of raised parts, wherein the position of the orthographic projection of the flat parts on the base substrate is the same as that of the gate The position of the orthographic projection of the pole on the base substrate and the position of the orthographic projection of the first metal portion on the base substrate do not overlap; etching away the metal oxide semiconductor layer corresponding to the flat portion to form a first sub-portion; The raised portion is removed, a second metal layer is formed on the remaining metal oxide semiconductor layer, and the second metal layer is patterned to form a source electrode and a drain electrode; wherein the source electrode and the drain electrode covering the first subsection; forming a passivation layer on the second metal layer; forming a pixel electrode on the passivation layer, wherein the pixel electrode is connected to the drain electrode; Wherein, the step of etching away the metal oxide semiconductor layer corresponding to the flat portion to form the first sub-portion includes: etching away the metal oxide semiconductor layer corresponding to the flat portion to form a first sub-section, a second sub-section and a third sub-section; The step of patterning the second metal layer to form a source electrode and a drain electrode includes: The second metal layer is patterned to form a source electrode, a drain electrode and a second metal portion, and the second metal portion covers the second sub-portion and the third sub-portion. 2. The manufacturing method of the display panel according to claim 1, wherein, The step of etching away the metal oxide semiconductor layer corresponding to the flat portion includes: performing ashing treatment on the flat portion to remove the flat portion to form a second opening; The metal oxide semiconductor layer corresponding to the second opening is etched away. 3 . The method for manufacturing a display panel according to claim 1 , wherein the photoresist layer is patterned by using a fine metal mask to form a plurality of flat portions and a plurality of raised portions. 4 . Steps include: The photoresist layer is patterned using a fine metal mask to form a plurality of flat parts, a plurality of raised parts and a first opening, wherein the first opening corresponds to the position of the first metal part. 4. The manufacturing method of the display panel according to claim 3, wherein, Before the step of etching away the metal oxide semiconductor layer corresponding to the flat portion to form the first sub-section, the second sub-section and the third sub-section, the method further includes: etching away the metal oxide semiconductor layer corresponding to the first opening, and etching the gate insulating layer under the first opening to form a connection hole; The step of forming the second metal layer on the remaining metal oxide semiconductor layer includes: A second metal layer is formed on the remaining metal oxide semiconductor layer and in the connection hole. 5. The manufacturing method of the display panel according to claim 1, wherein, After the step of forming a passivation layer on the second metal layer and before the step of forming a pixel electrode on the passivation layer, the method further includes: forming a color filter layer on the passivation layer, the position of the color filter layer corresponds to the position of the second metal part; The step of fabricating the pixel electrode on the passivation layer includes: Pixel electrodes are fabricated on the color filter layer. 6. The manufacturing method of the display panel according to claim 5, wherein, The step of fabricating pixel electrodes on the color filter layer includes: making a protective layer on the color filter layer; A pixel electrode is fabricated on the protective layer. 7. A display panel, comprising: substrate substrate; a first metal layer, including a gate electrode and a first metal part; a gate insulating layer, disposed on the first metal layer; a metal oxide semiconductor layer, disposed on the gate insulating layer, the metal oxide semiconductor layer includes a first subsection; the position of the first subsection corresponds to the position of the gate; A second metal layer is disposed on the metal oxide semiconductor layer, the second metal layer includes a source electrode and a drain electrode; the source electrode covers one end of the first sub-section; the drain electrode covering the other end of the first subsection; a passivation layer, disposed on the second metal layer; a pixel electrode, disposed on the passivation layer; Wherein, the metal oxide semiconductor layer further includes a second sub-section and a third sub-section; the second metal layer further includes a second metal section, one of the second sub-section and the first metal section The position of the end portion corresponds to that of the third sub-portion; the position of the third sub-portion corresponds to the position of the other end portion of the first metal portion; the second metal portion covers the second sub-portion and the third sub-portion. 8. The display panel according to claim 7, wherein, A connection hole is provided on the gate insulating layer, and the second metal part is connected to the first metal part through the connection hole.

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