CN111368492A - Method and system for setting identification information in integrated circuit layout - Google Patents
Method and system for setting identification information in integrated circuit layout Download PDFInfo
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- CN111368492A CN111368492A CN201811583899.9A CN201811583899A CN111368492A CN 111368492 A CN111368492 A CN 111368492A CN 201811583899 A CN201811583899 A CN 201811583899A CN 111368492 A CN111368492 A CN 111368492A
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Abstract
The invention discloses a method and a system for setting identification information in an integrated circuit layout, wherein the method comprises the following steps: obtaining the layout design of an integrated circuit layout to be processed and carrying out image recognition processing so as to determine a plurality of idle areas which can be used for containing identification information and are included in the layout design of the integrated circuit layout to be processed; performing pattern recognition on each of the plurality of free areas to determine a pattern shape and area information of each free area; determining the maximum number of characters which can be accommodated in each free area; determining the number of characters included in the character set data, and determining respective target positions for each character in the character set data in a target idle area; and generating identification information according to the respective target position of each character in the character set data by using the hierarchical data associated with the identification information in the target idle area of the integrated circuit layout to be processed.
Description
Technical Field
The present invention relates to the technical field of integrated circuit layout design, and in particular, to a method and system for generating identification information for an integrated circuit layout.
Background
The integrated circuit layout is a geometric figure on a mask used for manufacturing the integrated circuit, is an intermediate link between a circuit system and an integrated circuit process, and is an essential link. Through the layout design of the integrated circuit, a three-dimensional circuit system can be changed into a two-dimensional plane graph, and the two-dimensional plane graph is reduced into a three-dimensional structure based on silicon materials through technological processing. Therefore, the integrated circuit layout is an intermediate bridge manufactured by an upper circuit bearing system and a lower integrated circuit chip, and the importance of the integrated circuit layout is very important.
In the related art, in the layout design of a semiconductor integrated circuit, it is generally necessary to set identification information (e.g., LOGO) to distinguish and mark design products of a design company. The pattern and size of the identification information used in the layout design of different semiconductor integrated circuits may vary depending on the design.
Identification information in the layout design of a semiconductor integrated circuit is generally to generate specific patterns and characters using some layers of the semiconductor integrated circuit. The prior art method of generating identification information is to manually draw polygons to generate various patterns and characters, which is inefficient. For different layout designs of semiconductor integrated circuits, different layout sizes often require different patterns and different sizes of identification information, in which case, using traditional generation methods is time consuming and labor intensive.
Disclosure of Invention
In order to solve the defects in the prior art, the invention provides a method and a system for generating identification information such as LOGO in a semiconductor integrated circuit layout, which can form a specific LOGO pattern according to characters and character sizes specified by a user, and are convenient to use, time-saving and labor-saving.
According to one aspect of the invention, there is provided a method for setting identification information in an integrated circuit layout, the method comprising:
selecting an integrated circuit layout to be processed from a plurality of integrated circuit layouts, and obtaining the layout design of the integrated circuit layout to be processed;
performing image recognition processing on the layout design of the integrated circuit layout to be processed so as to determine a plurality of idle areas which can be used for containing identification information and are included in the layout design of the integrated circuit layout to be processed;
performing pattern recognition on each of the plurality of free areas to determine a pattern shape and area information of each free area;
acquiring hierarchy data and character size data associated with the identification information, and determining the maximum number of characters that can be accommodated by each free area based on the character size data associated with the identification information and the graphic shape and area information of each free area;
acquiring character set data associated with the identification information and a target idle area associated with the identification information, determining the number of characters included in the character set data, and determining a respective target position for each character in the character set data in the target idle area when the number of characters included in the character set data is less than or equal to the maximum number of characters that can be accommodated in the target idle area; and setting the identification information according to the respective target position of each character in the character set data by using the hierarchical data associated with the identification information in the target idle area of the integrated circuit layout to be processed.
The method comprises the steps of obtaining a request message for requesting to set identification information from a user, and analyzing the request message to select an integrated circuit layout to be processed from a plurality of integrated circuit layouts.
Further comprising storing the layout design for each of the plurality of integrated circuit layouts in a layout database associated with the integrated circuit layouts.
The layout design comprises an MOS tube, a resistor, a capacitor, a triode and a connecting wire, and the arrangement and the connecting wire of the MOS tube, the resistor, the capacitor and the triode. That is, the layout design includes various devices such as MOS transistors, resistors, capacitors, and transistors, and the placement and connection lines of the various devices.
The image recognition processing of the layout design of the integrated circuit layout to be processed comprises the following steps:
acquiring an image of the integrated circuit layout design to be processed;
identifying an image of the layout design of the integrated circuit layout to be processed to determine at least one free area which can be used for containing identification information and is included in the integrated circuit layout to be processed;
at least one idle area which can be used for containing identification information and is included in the integrated circuit layout to be processed is used as a plurality of idle areas which can be used for containing identification information and are included in the layout design of the integrated circuit layout to be processed.
Wherein an area of each of the at least one free area that can be used to accommodate the identification information is greater than or equal to an area threshold.
Each of the at least one free area capable of being used to accommodate the identification information is capable of accommodating a predetermined number of standard characters.
The standard character is a character with a character size of a preset standard size.
The pattern shapes include regular patterns and irregular patterns, wherein the regular patterns include rectangles, trapezoids, and L-shapes.
The region information includes: area information and side length information.
Layer data associated with the identification information is used to indicate a layer in the integrated circuit layout for setting the identification information.
Character size data associated with the identification information is used to indicate a character size for each character in the identification information generated for the integrated circuit layout.
Determining the maximum number of characters that can be accommodated by each free area based on the character size data associated with the identification information and the graphic shape and area information of each free area includes:
carrying out figure interception on the figure shape of each idle area to obtain a rectangular shape with the largest area included in each idle area;
determining rectangular area information of a maximum area included in each free area based on the area information of each free area and the graphic interception;
the maximum number of characters that can be accommodated by each free area is determined based on the rectangular-shaped area information of the maximum area included by each free area and the character size data associated with the identification information.
When the maximum number of characters that can be accommodated in each free area is determined, increasing the character size of any character or adding a character of the same character size causes the identification information to exceed the free area.
The method further comprises the steps of obtaining area selection information input by a user, and analyzing the area selection information to obtain a target free area associated with the identification information.
The method further comprises the steps of obtaining a character sequence input by a user, and analyzing the character sequence to obtain character set data associated with the identification information.
Determining a respective target location for each character in the character set data within the target free area includes:
determining respective target positions for each character in the character set data in the target idle area according to the sequence of the character sequence input by the user;
when the number of characters included in the character set data is larger than the maximum number of characters that can be accommodated by the target free area, a message indicating that the target free area cannot accommodate the current number of characters is fed back to the user.
Setting the identification information according to the respective target position of each character in the character set data includes:
identification information is set within a target region of the integrated circuit layout based on the respective target location of each character in the character set data.
According to yet another aspect of the present invention, there is provided a system for setting identification information in an integrated circuit layout, the system comprising:
the selection device selects an integrated circuit layout to be processed from a plurality of integrated circuit layouts and obtains the layout design of the integrated circuit layout to be processed;
the recognition device is used for carrying out image recognition processing on the layout design of the integrated circuit layout to be processed so as to determine a plurality of idle areas which can be used for containing identification information and are included in the layout design of the integrated circuit layout to be processed; performing pattern recognition on each of the plurality of free areas to determine a pattern shape and area information of each free area;
a determining device that acquires the gradation data and the character size data associated with the identification information, and determines the maximum number of characters that can be accommodated by each of the free areas based on the character size data associated with the identification information and the graphic shape and area information of each of the free areas;
the acquiring device acquires character set data associated with the identification information and a target idle area associated with the identification information, determines the number of characters included in the character set data, and determines a respective target position for each character in the character set data in the target idle area when the number of characters included in the character set data is less than or equal to the maximum number of characters that can be accommodated in the target idle area; and
and the generating device is used for setting the identification information according to the respective target position of each character in the character set data by using the hierarchical data associated with the identification information in the target idle area of the integrated circuit layout to be processed.
The selection device acquires a request message from a user requesting to set identification information, and analyzes the request message to select an integrated circuit layout to be processed from a plurality of integrated circuit layouts.
Further comprising storing the layout design for each of the plurality of integrated circuit layouts in a layout database associated with the integrated circuit layouts.
The layout design comprises an MOS tube, a resistor, a capacitor, a triode and a connecting wire, and the arrangement and the connecting wire of the MOS tube, the resistor, the capacitor and the triode. That is, the layout design includes various devices such as MOS transistors, resistors, capacitors, and transistors, and the placement and connection lines of the various devices.
The image recognition processing of the layout design of the integrated circuit layout to be processed by the recognition device comprises the following steps:
acquiring an image of the integrated circuit layout design to be processed;
identifying the image of the integrated circuit layout design to be processed to determine at least one idle area which is included in the integrated circuit layout to be processed and can be used for containing identification information;
the determining, by the identifying device, a plurality of free areas that can be used for accommodating identification information included in the layout design of the integrated circuit layout to be processed includes:
at least one idle area which can be used for containing identification information and is included in the integrated circuit layout to be processed is used as a plurality of idle areas which can be used for containing identification information and are included in the layout design of the integrated circuit layout to be processed.
Wherein an area of each of the at least one free area that can be used to accommodate the identification information is greater than or equal to an area threshold.
Each of the at least one free area capable of being used to accommodate the identification information is capable of accommodating a predetermined number of standard characters.
The standard character is a character with a character size of a preset standard size.
The pattern shapes include regular patterns and irregular patterns, wherein the regular patterns include rectangles, trapezoids, and L-shapes.
The region information includes: area information and side length information.
The hierarchy data associated with the identification information is used to indicate a hierarchy for setting the identification information in the integrated circuit layout.
Character size data associated with the identification information is used to indicate a character size for each character in the identification information generated for the integrated circuit layout.
The determining means determining the maximum number of characters that can be accommodated by each of the free areas based on the character size data associated with the identification information and the figure shape and area information of each of the free areas includes:
carrying out figure interception on the figure shape of each idle area to obtain a rectangular shape with the largest area included in each idle area;
determining rectangular area information of a maximum area included in each free area based on the area information of each free area and the graphic interception;
the maximum number of characters that can be accommodated by each free area is determined based on the rectangular-shaped area information of the maximum area included by each free area and the character size data associated with the identification information.
When the maximum number of characters that can be accommodated in each free area is determined, increasing the character size of any character or adding a character of the same character size causes the identification information to exceed the free area.
The method further comprises the steps of obtaining area selection information input by a user, and analyzing the area selection information to obtain a target free area associated with the identification information.
The method further comprises the steps of obtaining a character sequence input by a user, and analyzing the character sequence to obtain character set data associated with the identification information.
The obtaining device determines a respective target position for each character in the character set data in the target free area, including:
determining respective target positions for each character in the character set data in the target idle area according to the sequence of the character sequence input by the user;
when the number of characters included in the character set data is larger than the maximum number of characters that can be accommodated by the target free area, a message indicating that the target free area cannot accommodate the current number of characters is fed back to the user.
The generating means setting the identification information according to the respective target positions of each character in the character set data includes:
identification information is set within a target region of the integrated circuit layout based on the respective target location of each character in the character set data.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention. In the drawings, like reference numerals are used to indicate like elements. The drawings in the following description are directed to some, but not all embodiments of the invention. For a person skilled in the art, other figures can be derived from these figures without inventive effort.
FIG. 1 is a flow diagram of a method for setting identification information in an integrated circuit layout according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a shortcut key popup interface for setting identification information according to an embodiment of the present invention;
FIG. 3 is a schematic illustration of identification information generated according to an embodiment of the present invention; and
fig. 4 is a schematic structural diagram of a system for setting identification information in an integrated circuit layout according to an embodiment of the present invention.
Detailed Description
The exemplary embodiments of the present invention will now be described with reference to the accompanying drawings, however, the present invention may be embodied in many different forms and is not limited to the embodiments described herein, which are provided for complete and complete disclosure of the present invention and to fully convey the scope of the present invention to those skilled in the art. The terminology used in the exemplary embodiments illustrated in the accompanying drawings is not intended to be limiting of the invention. In the drawings, the same units/elements are denoted by the same reference numerals.
Unless otherwise defined, terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Further, it will be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense.
Fig. 1 is a flow chart of a method 100 for setting identification information for an integrated circuit layout according to an embodiment of the present invention. To generate identification information such as LOGO, the method 100 can determine a plurality of parameters, for example, a selected hierarchical layer, a character size, and LOGO content, and preset polygon coordinate points of respective parametric patterns and characters. The method 100 can set a shortcut key and create a shortcut key pop-up interface, and acquire information such as a hierarchy layer, a character size, LOGO content and the like through the shortcut key pop-up interface, thereby setting identification information.
In step 101, an integrated circuit layout to be processed is selected from a plurality of integrated circuit layouts, and a layout design of the integrated circuit layout to be processed is obtained. The present application acquires a request message requesting setting of identification information from a user through an interface unit or an interface part of a device or system for setting identification information. After obtaining the request message, the request message is parsed to select an integrated circuit layout to be processed from a plurality of integrated circuit layouts. The request message includes category information and name information of the integrated circuit layout. Or the request message comprises the model information of the integrated circuit layout.
After the integrated circuit layout to be processed is determined, the layout design for each of the plurality of integrated circuit layouts is stored in a layout database associated with the integrated circuit layout. In the present application, a layout database is utilized to store the layout design for each integrated circuit layout, and the layout database is capable of retrieving the corresponding layout design in accordance with a query request. The layout design comprises an MOS tube, a resistor, a capacitor, a triode and a connecting wire, and the arrangement and the connecting wire of the MOS tube, the resistor, the capacitor and the triode. That is, the layout design includes various devices such as MOS transistors, resistors, capacitors, and transistors, and the placement and connection lines of the various devices. Layout designs include hardware structures related to the design and implementation of integrated circuit layouts.
In step 102, image recognition processing is performed on the layout design of the integrated circuit layout to be processed, so as to determine a plurality of free areas which can be used for containing identification information and are included in the layout design of the integrated circuit layout to be processed. Wherein the image recognition processing of the layout design of the integrated circuit layout to be processed comprises: and acquiring an image of the integrated circuit layout design to be processed.
Specifically, an image of the layout design of the integrated circuit layout to be processed is identified to determine at least one free area included in the integrated circuit layout to be processed, where the at least one free area can be used for containing identification information.
Wherein an area of each of the at least one free area that can be used to accommodate the identification information is greater than or equal to an area threshold. That is, the present application sets a minimum area requirement for the idle region. When the area of the specific region is smaller than the area threshold, the specific region is not regarded as a free region. For example, when the area of the specific region is too small to accommodate a predetermined number of standard characters, the specific region cannot be selected as a free region. The standard character is a character with a character size of a preset standard size. The standard size may be a size set in advance by a user or a size set in advance by a device or system for setting the identification information.
In step 103, pattern recognition is performed on the region to be selected to determine the pattern shape and the region information of the free region. Since various types of devices can be accommodated on the integrated circuit layout, and various suitable device layout modes can be adopted, the region information includes: area information and side length information. The area information refers to the area of the free area. The side length information refers to the side length of each side of the free area.
At step 104, the gradation data and the character size data associated with the identification information are acquired, and the maximum number of characters that can be accommodated by each free area is determined based on the character size data associated with the identification information and the graphic shape and area information of each free area.
The hierarchy data associated with the identification information is used to indicate a hierarchy for setting the identification information among the plurality of hierarchies of the integrated circuit layout. The level at which the identification information needs to be generated is determined according to the user's instruction or input information. Character size data associated with the identification information is used to indicate a character size for each character in the identification information generated for the integrated circuit layout. Generally, the character size of each character in the identification information is the same. Alternatively, the character size of each character in the identification information may be different.
Determining the maximum number of characters that can be accommodated by each free area based on the character size data associated with the identification information and the graphic shape and area information of each free area includes: carrying out figure interception on the figure shape of each idle area to obtain a rectangular shape with the largest area included in each idle area; determining rectangular area information of a maximum area included in each free area based on the area information of each free area and the graphic interception; the maximum number of characters that can be accommodated by each free area is determined based on the rectangular-shaped area information of the maximum area included by each free area and the character size data associated with the identification information.
When the maximum number of characters that can be accommodated in each free area is determined, increasing the character size of any character or adding a character of the same character size causes the identification information to exceed the free area.
Alternatively, determining the maximum number of characters that can be accommodated by each of the free areas based on the character size data associated with each of the characters in the identification information and the graphic shape and area information of each of the free areas includes: carrying out figure interception on the figure shape of each idle area to obtain a rectangular shape with the largest area included in each idle area; determining rectangular area information of a maximum area included in each free area based on the area information of each free area and the graphic interception; the maximum number of characters of various sizes that can be accommodated by each free area is determined based on the rectangular-shaped area information of the maximum area included in each free area and the character size data associated with each character in the identification information.
In step 105, character set data associated with the identification information and a target free area associated with the identification information are acquired, the number of characters included in the character set data is determined, and when the number of characters included in the character set data is less than or equal to the maximum number of characters that can be accommodated in the target free area, a respective target position is determined for each character in the character set data in the target free area.
The method further comprises the steps of obtaining area selection information input by a user, and analyzing the area selection information to obtain a target free area associated with the identification information. When a user wishes to set identification information on an integrated circuit layout, the user is typically provided with a plurality of free areas. The user may select a target free area from the plurality of free areas by inputting information or instructions. For example, the area selection information includes an identification of the target free area.
The method further comprises the steps of obtaining a character sequence input by a user, and analyzing the character sequence to obtain character set data associated with the identification information. Where the character sequence is a plurality of characters having an order relationship, e.g., LOGO _ 2018.
Determining a respective target location for each character in the character set data within the target free area includes: determining a respective target position for each character in the character set data within the target free area according to the order of the character sequence entered by the user. For example, a respective target position is determined within the target free area for each character in LOGO _ 2018. When the number of characters included in the character set data is larger than the maximum number of characters that can be accommodated by the target free area, a message indicating that the target free area cannot accommodate the current number of characters is fed back to the user.
At step 106, the hierarchical data associated with the identification information is used within the target free area of the integrated circuit layout to be processed to set the identification information according to the respective target position of each character in the character set data.
Setting the identification information according to the respective target position of each character in the character set data includes: identification information is set within a target region of the integrated circuit layout based on the respective target location of each character in the character set data.
Fig. 2 is a schematic diagram of a shortcut key popup interface for setting identification information according to an embodiment of the present invention. To generate or print identification information such as LOGO on an integrated circuit layout, the present application is able to determine a number of parameters, such as a selected level layer, character size, and LOGO content. The method and the device can determine the levels and the character sizes related to the LOGO in the current identification information or the current design layout and the specific characters and patterns of the LOGO from the PDK (process design kit). As shown in fig. 2, "worksize" is a character size or character size, for example, the character size is 4, and the character size is 4 as a standard character. "Layer" is the selected level or level, and is, for example, 0M. "LOGO name" is the name of LOGO, such as LOGO _ 2018.
Subsequently, the method presets the polygonal coordinate points of each parameterized pattern and character. By taking characters as English and numbers as examples, all polygon coordinate vertexes and functions of 26 English letters, 10 numeric characters and the like of variable parameters are stored in a custom file. That is, polygon coordinate vertices and functions associated with the characters used are stored in a custom file in advance.
The application can also set shortcut keys for English letters and numbers. For example, the main function of the custom file is arranged in the shortcut key, so that the user can operate the file through the shortcut key conveniently. As shown in fig. 2, the user may determine the "LOGO name" LOGO _2018 by means of mouse selection or shortcut key input.
According to the method and the device, a shortcut key popup interface is created, and information such as a layer, a character size and LOGO content is acquired through the shortcut key popup interface, so that identification information is set. In the shortcut key pop-up window created by the application, the user can input the actual values of the parameters or variables by means of mouse selection or shortcut key input. According to the input information of the user, the identification information LOGO _2018 shown in fig. 3 can be generated.
As shown in fig. 2, a shortcut key popup interface "Create LOGO", where word size variable is size of LOGO, and Layer is hierarchical information used by LOGO in the layout. And creating a polygon coordinate point containing the parameter variable according to the set word size and layer variable. And directly entering a shortcut key popup interface in the layout design system after setting the shortcut key. The actual values of word size (LOGO size), layer (LOGO used level) and LOGO name (LOGO name required in layout) are input in the interface of fig. 2, for example, the LOGO name LOGO _2018 required in the design layout is 0M, and the LOGO size is 4. After the related information of LOGO is input, a LOGO pattern shown in fig. 3 is automatically called in a design layout, the size of the LOGO pattern is the input word size:4, and the displayed hierarchy is the input Layer: 0M. Thereby generating identification information LOGO _2018 as shown in fig. 3. Fig. 3 is a schematic diagram of identification information generated according to an embodiment of the present invention.
Fig. 4 is a schematic structural diagram of a system 400 for setting identification information for an integrated circuit layout according to an embodiment of the present invention. To generate identification information such as LOGO, the system 400 can determine a plurality of parameters, e.g., selected hierarchical layer, character size, and LOGO content, and preset polygon coordinate points for each parameterized pattern and character. The system 400 can set a shortcut key and create a shortcut key pop-up interface, and acquire information such as a hierarchy layer, a character size, and a LOGO content through the shortcut key pop-up interface, thereby setting identification information.
The system 400 includes: selection means 401, recognition means 402, determination means 403, acquisition means 404 and generation means 405. The selection device 401 selects an integrated circuit layout to be processed from a plurality of integrated circuit layouts, and obtains a layout design of the integrated circuit layout to be processed. The present application acquires a request message requesting setting of identification information from a user through an interface unit or an interface part of a device or system for setting identification information. After obtaining the request message, the request message is parsed to select an integrated circuit layout to be processed from a plurality of integrated circuit layouts. The request message includes category information and name information of the integrated circuit layout. Or the request message comprises the model information of the integrated circuit layout.
After the integrated circuit layout to be processed is determined, the layout design for each of the plurality of integrated circuit layouts is stored in a layout database associated with the integrated circuit layout. In the present application, a layout database is utilized to store the layout design for each integrated circuit layout, and the layout database is capable of retrieving the corresponding layout design in accordance with a query request. The layout design comprises an MOS tube, a resistor, a capacitor, a triode and a connecting wire, and the arrangement and the connecting wire of the MOS tube, the resistor, the capacitor and the triode. That is, the layout design includes various devices such as MOS transistors, resistors, capacitors, and transistors, and the placement and connection lines of the various devices. Layout designs include hardware structures related to the design and implementation of integrated circuit layouts.
The identifying device 402 performs image identification processing on the layout design of the integrated circuit layout to be processed to determine a plurality of free areas which can be used for containing identification information and are included in the layout design of the integrated circuit layout to be processed. Wherein the image recognition processing of the layout design of the integrated circuit layout to be processed comprises: and acquiring an image of the integrated circuit layout design to be processed.
Specifically, the image of the integrated circuit layout design to be processed is identified to determine at least one free area which is included in the integrated circuit layout to be processed and can be used for containing identification information. Determining a plurality of free areas that can be used to accommodate identification information included in a layout design of the integrated circuit layout to be processed includes: the integrated circuit layout to be processed comprises at least one free area which can be used for containing identification information.
Wherein an area of each of the at least one free area that can be used to accommodate the identification information is greater than or equal to an area threshold. That is, the present application sets a minimum area requirement for the idle region. When the area of the specific region is smaller than the area threshold, the specific region is not regarded as a free region. For example, when the area of the specific region is too small to accommodate a predetermined number of standard characters, the specific region cannot be selected as a free region. Each of the at least one free area capable of being used to accommodate the identification information is capable of accommodating a predetermined number of standard characters. The standard character is a character with a character size of a preset standard size. The standard size may be a size set in advance by a user or a size set in advance by a device or system for setting the identification information.
The identifying means 402 performs pattern identification on each of the plurality of free areas to determine a pattern shape and area information of each free area. Since various types of devices can be accommodated on the integrated circuit layout, and various suitable device layout manners can be adopted, the pattern of each free area is usually different. The figure shape includes a regular figure and an irregular figure. Wherein the regular pattern includes rectangle, trapezoid, L-shape, etc. The irregular pattern may be any type of pattern. The area information includes: area information and side length information. The area information refers to the area of the free area. The side length information refers to the side length of each side of the free area.
The determination means 403 acquires the gradation data and the character size data associated with the identification information, and determines the maximum number of characters that can be accommodated by each free area based on the character size data associated with the identification information and the graphic shape and area information of each free area.
The hierarchical data associated with the identification information is used to indicate a hierarchical name used by the identification information in the integrated circuit layout. The level at which the identification information needs to be generated can be determined according to the user's instruction or input information. Character size data associated with the identification information is used to indicate a character size for each character in the identification information generated for the integrated circuit layout. Generally, the character size of each character in the identification information is the same. Alternatively, the character size of each character in the identification information may be different.
Determining the maximum number of characters that can be accommodated by each free area based on the character size data associated with the identification information and the graphic shape and area information of each free area includes: carrying out figure interception on the figure shape of each idle area to obtain a rectangular shape with the largest area included in each idle area; determining rectangular area information of a maximum area included in each free area based on the area information of each free area and the graphic interception; the maximum number of characters that can be accommodated by each free area is determined based on the rectangular-shaped area information of the maximum area included by each free area and the character size data associated with the identification information.
When the maximum number of characters that can be accommodated in each free area is determined, increasing the character size of any character or adding a character of the same character size causes the identification information to exceed the free area.
Alternatively, determining the maximum number of characters that can be accommodated by each of the free areas based on the character size data associated with each of the characters in the identification information and the graphic shape and area information of each of the free areas includes: carrying out figure interception on the figure shape of each idle area to obtain a rectangular shape with the largest area included in each idle area; determining rectangular area information of a maximum area included in each free area based on the area information of each free area and the graphic interception; the maximum number of characters of various sizes that can be accommodated by each free area is determined based on the rectangular-shaped area information of the maximum area included in each free area and the character size data associated with each character in the identification information.
The obtaining means 404 obtains the character set data associated with the identification information and the target free area associated with the identification information, determines the number of characters included in the character set data, and determines a respective target position for each character in the character set data in the target free area when the number of characters included in the character set data is less than or equal to the maximum number of characters that can be accommodated in the target free area.
The method further comprises the steps of obtaining area selection information input by a user, and analyzing the area selection information to obtain a target free area associated with the identification information. When a user wishes to set identification information on an integrated circuit layout, the user is typically provided with a plurality of free areas. The user may select a target free area from the plurality of free areas by inputting information or instructions. For example, the area selection information includes an identification of the target free area.
The method further comprises the steps of obtaining a character sequence input by a user, and analyzing the character sequence to obtain character set data associated with the identification information. Where the character sequence is a plurality of characters having an order relationship, e.g., LOGO _ 2018.
Determining a respective target location for each character in the character set data within the target free area includes: determining a respective target position for each character in the character set data within the target free area according to the order of the character sequence entered by the user. For example, a respective target position is determined within the target free area for each character in LOGO _ 2018. When the number of characters included in the character set data is larger than the maximum number of characters that can be accommodated by the target free area, a message indicating that the target free area cannot accommodate the current number of characters is fed back to the user.
The generating means 405 uses the hierarchical data associated with the identification information in the target free area of the integrated circuit layout to be processed to set the identification information in dependence on the respective target position of each character in the character set data.
Setting the identification information according to the respective target position of each character in the character set data includes: identification information is set within a target region of the integrated circuit layout based on the respective target location of each character in the character set data.
The invention has been described with reference to a few embodiments. However, other embodiments of the invention than the one disclosed above are equally possible within the scope of the invention, as would be apparent to a person skilled in the art from the appended patent claims.
Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise herein. All references to "a/an/the [ device, component, etc ]" are to be interpreted openly as referring to at least one instance of said device, component, etc., unless explicitly stated otherwise. The steps of any method disclosed herein do not have to be performed in the exact order disclosed, unless explicitly stated.
Claims (10)
1. A method for setting identification information in an integrated circuit layout, the method comprising:
selecting an integrated circuit layout to be processed from a plurality of integrated circuit layouts, and obtaining the layout design of the integrated circuit layout to be processed;
performing image recognition processing on the layout design of the integrated circuit layout to be processed so as to determine a plurality of idle areas which can be used for containing identification information and are included in the layout design of the integrated circuit layout to be processed;
performing pattern recognition on each of the plurality of free areas to determine a pattern shape and area information of each free area;
acquiring hierarchy data and character size data associated with the identification information, and determining the maximum number of characters that can be accommodated by each free area based on the character size data associated with the identification information and the graphic shape and area information of each free area;
acquiring character set data associated with the identification information and a target idle area associated with the identification information, determining the number of characters included in the character set data, and determining a respective target position for each character in the character set data in the target idle area when the number of characters included in the character set data is less than or equal to the maximum number of characters that can be accommodated in the target idle area; and generating identification information according to the respective target position of each character in the character set data by using the hierarchical data associated with the identification information in the target idle area of the integrated circuit layout to be processed.
2. The method of claim 1, obtaining a request message from a user requesting generation of identification information, parsing the request message to select an integrated circuit layout to be processed from a plurality of integrated circuit layouts.
3. The method according to claim 1, further comprising storing the layout design for each of the plurality of integrated circuit layouts in a layout database associated with the integrated circuit layout.
4. The method of claim 3, the layout design comprising mos transistors, resistors, capacitors, transistors, and connecting lines.
5. The method of claim 1, wherein the image recognition processing of the layout design of the integrated circuit layout to be processed comprises:
acquiring an image of the layout design of the integrated circuit layout to be processed;
and identifying the image of the layout design of the integrated circuit layout to be processed so as to determine at least one free area which is included in the integrated circuit layout to be processed and can be used for containing identification information.
6. A system for setting identification information in an integrated circuit layout, the system comprising:
the selection device selects an integrated circuit layout to be processed from a plurality of integrated circuit layouts and obtains the layout design of the integrated circuit layout to be processed;
the recognition device is used for carrying out image recognition processing on the layout design of the integrated circuit layout to be processed so as to determine a plurality of idle areas which can be used for containing identification information and are included in the layout design of the integrated circuit layout to be processed; performing pattern recognition on each of the plurality of free areas to determine a pattern shape and area information of each free area;
a determining device that acquires the gradation data and the character size data associated with the identification information, and determines the maximum number of characters that can be accommodated by each of the free areas based on the character size data associated with the identification information and the graphic shape and area information of each of the free areas;
the acquiring device acquires character set data associated with the identification information and a target idle area associated with the identification information, determines the number of characters included in the character set data, and determines a respective target position for each character in the character set data in the target idle area when the number of characters included in the character set data is less than or equal to the maximum number of characters that can be accommodated in the target idle area; and
and the generating device is used for generating the identification information according to the respective target position of each character in the character set data by using the hierarchical data associated with the identification information in the target idle area of the integrated circuit layout to be processed.
7. The system according to claim 6, wherein said selection means obtains a request message from a user requesting generation of identification information, said request message being parsed to select the integrated circuit layout to be processed from the plurality of integrated circuit layouts.
8. The system according to claim 6, further comprising storing the layout design for each of the plurality of integrated circuit layouts in a layout database associated with the integrated circuit layout.
9. The system of claim 8, the layout design comprising MOS transistors, resistors, capacitors, transistors, and connecting lines.
10. The system according to claim 6, wherein the image recognition processing of the layout design of the integrated circuit layout to be processed by the recognition device comprises:
acquiring an image of the integrated circuit layout design to be processed;
and identifying the image of the integrated circuit layout design to be processed so as to determine at least one free area which is included in the integrated circuit layout to be processed and can be used for containing identification information.
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