CN111353590A - Synaptic simulation method and device with STDP synaptic plasticity - Google Patents
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Abstract
Description
技术领域 本发明为2014106066977号中国专利申请的根据审查员审查意见而进行的分案申请，具体涉及一类采用电子电路来模拟神经突触的突触模拟方法及其模拟装置。Technical Field The present invention is a divisional application of Chinese patent application No. 2014106066977 based on the examiner's review opinion, and specifically relates to a synapse simulation method and a simulation device for simulating neural synapses by using electronic circuits.
背景技术 大脑的工作机制是最重要的科学研究之一。目前的研究揭示大脑是依靠神经元及神经元之间互相连结的突触来实现信息的传递和处理，也在一定程度上揭示了单个的神经元及突触的很多结构特征和工作细节，但对于神经元及其突触到底如何通过连接关系和信号处理来实现大脑的高级功能，便仍是科学难题。这主要是因为单个的神经元和突触可以通过离体的神经元解剖和显微镜来观察其结构和工作，但离体的单个或多个神经元并无法组成信号处理通路，而我们又无法从微观角度来观察到生物整个活体大脑的工作过程。所以，即使有研究公布了神经元及突触的具体结构特征和工作特点，但对于它们在整个神经网络中起什么作用，如何起作用，如何与其他神经元发生关系，尤其是如何构成和实现宏观上的大脑功能，则往往仍得不到完整又合理的解释。Background Art The working mechanism of the brain is one of the most important scientific studies. Current research has revealed that the brain relies on neurons and synapses connected to each other to transmit and process information, and to a certain extent has revealed many structural features and working details of individual neurons and synapses. Exactly how neurons and their synapses achieve high-level brain functions through connections and signal processing remains a scientific puzzle. This is mainly because individual neurons and synapses can be used to observe their structure and work through isolated neuron dissection and microscopes, but isolated single or multiple neurons cannot form signal processing pathways, and we can’t learn from them. Observe the working process of the entire living brain of the organism from a microscopic perspective. Therefore, even if some studies have published the specific structural characteristics and working characteristics of neurons and synapses, there is still no understanding of what role they play in the entire neural network, how they work, and how they relate to other neurons, especially how they are constructed and implemented. The macroscopic brain function is often still not fully and reasonably explained.
为了模拟演示脑神经的工作，以及由此构造实现具有记忆和思维功能的人工智能，目前越来越多的研究采用建立数学仿真模型或神经元模拟装置的方法来模仿脑神经的工作。尤其是近几年，基于突触的STDP特性的突触可塑性的发现，及基于这种突触STDP可塑性的学习记忆模型的提出，很多申请人提交了很多神经元及突触模拟技术的专利申请。In order to simulate and demonstrate the work of cranial nerves, and to construct artificial intelligence with memory and thinking functions, more and more researches currently use the method of establishing mathematical simulation models or neuron simulation devices to imitate the work of cranial nerves. Especially in recent years, with the discovery of synaptic plasticity based on the STDP characteristics of synapses, and the proposal of a learning and memory model based on this synaptic STDP plasticity, many applicants have submitted many patent applications for neuron and synaptic simulation technology. .
目前神经突触的模拟技术，一般由突触前膜输入电路、突触后膜输出电路、和具有突触传递特性的模拟电路等构成，其中突触传递特性模拟电路能够按照化学突触传递的特性，尤其是突触的符合STDP特性的可塑性，通过输入信号来调整输出信号。突触可塑性的STDP特性，Spike Timing-Dependent Plasticity，即时序依赖的突触可塑性。目前的理论认为：突触传递的STDP可塑性，也即突触的传递效能，跟突触前后神经元的动作电位的锋电位的时序相关，如果突触前神经元的锋电位早于突触后神经元的锋电位，则产生突触传递长时程增强(long-term potentiation，即LTP)现象，而且锋电位的延迟越小则突触传递增强效应越大，(为了便于叙述，我们可把这种情况称为其锋电位信号具有LTP特征)；如果突触前神经元的锋电位慢于突触后神经元的锋电位，则产生突触传递长时程抑制(long-termdepression，即LTD)现象，而且锋电位的延迟越小则突触传递减弱效应越大，(为了便于叙述，我们可把这种情况称为其锋电位信号具有LTD特征)。显然，锋电位信号的LTP特征和LTD特征，都属于突触传递的STDP可塑性。At present, the simulation technology of neural synapses is generally composed of a presynaptic membrane input circuit, a postsynaptic membrane output circuit, and an analog circuit with synaptic transmission characteristics. Properties, especially STDP-compliant plasticity of synapses, modulate output signals by input signals. The STDP property of synaptic plasticity, Spike Timing-Dependent Plasticity, is timing-dependent synaptic plasticity. The current theory holds that the STDP plasticity of synaptic transmission, that is, the transmission efficiency of synapses, is related to the timing of the action potential spikes of presynaptic neurons. If the spikes of presynaptic neurons are earlier than postsynaptic The spike potential of a neuron produces a long-term potentiation (LTP) phenomenon of synaptic transmission, and the smaller the delay of the spike potential, the greater the synaptic transmission enhancement effect. This situation is called its spike signal with LTP characteristics); if the spike of the presynaptic neuron is slower than that of the postsynaptic neuron, long-term depression (LTD) of synaptic transmission occurs ) phenomenon, and the smaller the delay of the spike, the greater the weakening effect of synaptic transmission, (for the convenience of description, we can call this situation that the spike signal has LTD characteristics). Obviously, both the LTP and LTD characteristics of the spike signal belong to the STDP plasticity of synaptic transmission.
现有突触的模拟技术，存在的问题是：The existing synaptic simulation technology has the following problems:
1、没有充分考虑到大脑不同区域和不同功能的神经元之间存在不同传递特性的突触，往往只采用同一特性的突触来构建模拟神经网络，造成无法精确构造和模拟一个复杂功能的神经网络。1. It is not fully considered that there are synapses with different transmission characteristics between neurons in different areas of the brain and with different functions, and often only synapses with the same characteristics are used to build a simulated neural network, resulting in the inability to accurately construct and simulate a complex functional neural network. network.
2、尤其是现有突触模拟技术，基本是模拟已经发育成熟、具有正常突触传递效能的突触。而实际上大脑皮质中存在很多突触，在经过相关神经活动的协调刺激之前，只是一种“预置性”的突触，在胎儿和婴儿成长过程中自然发育生成的，这些“预置性”的突触尚未形成有效的突触传递效能，而在以后的学习记忆和思维过程，经过突触前后神经元的兴奋活动的协同刺激，才逐渐被“激活”发育成具备有效的突触传递效能。现有突触模拟技术并未注意和模拟这一过程。而申请人研究发现这一过程对于解释记忆、长时程记忆向长期记忆转化，解释皮层和海马的神经元在陈述性记忆形成过程中的不同作用是极其重要的。2. In particular, the existing synaptic simulation technology basically simulates mature synapses with normal synaptic transmission efficiency. In fact, there are many synapses in the cerebral cortex. Before the coordinated stimulation of related neural activities, it is just a "preset" synapse, which is naturally developed during the growth of fetuses and infants. These "preset" synapses ” synapses have not yet formed effective synaptic transmission efficiency, and in the later learning, memory and thinking processes, after the synaptic stimulation of the excitatory activities of pre- and post-synaptic neurons, they are gradually “activated” and developed into effective synaptic transmission. efficacy. Existing synapse simulation techniques do not pay attention to and simulate this process. The applicant's research found that this process is extremely important for explaining the transformation of memory, long-term memory to long-term memory, and explaining the different roles of neurons in the cortex and hippocampus in the formation of declarative memory.
发明内容 本发明的目的是公开几种突触的模拟方法及装置，它们能够更完善地模拟大脑中几种不同突触的工作，用于实现大脑中不同功能的神经活动。SUMMARY OF THE INVENTION The purpose of the present invention is to disclose several methods and devices for simulating synapses, which can more perfectly simulate the work of several different synapses in the brain, and are used to realize the neural activities of different functions in the brain.
与本发明配合工作的神经元模拟装置的技术，使用神经元模拟装置和本发明的突触模拟装置共同构建的神经网络，以及这些神经网络的对神经环路工作的模拟和演示，详见本发明的母案申请。The technology of the neuron simulation device that cooperates with the present invention, the neural network jointly constructed by the neuron simulation device and the synaptic simulation device of the present invention, and the simulation and demonstration of the neural circuit work of these neural networks, see this chapter for details. The parent application for the invention.
本发明的突触模拟方法及装置，涉及大脑神经网络中存在的三种不同特性的突触：“固化突触”，“可塑性突触”和“预置性突触”。以下内容直接摘自本发明的母案申请。The synapse simulation method and device of the present invention relate to three synapses with different characteristics existing in the neural network of the brain: "solidified synapse", "plastic synapse" and "preset synapse". The following content is taken directly from the parent application of the present invention.
本发明的“固化突触”模拟装置包括前膜输入端、后膜输出端，其特征在于；在前膜输入端与后膜输出端之间串接有一个电容放电电路，电容放电电路同时并接有一个电容泄放电路。以此构成最简单的具有固定突触传递效能的突触传递通道，也即没有具备突触可塑性的突触传递通道。作为一种最简单的方案，电容放电电路由一只放电电容构成，放电电容的前端连接前膜输入端，放电电容的后端通过一只传递电阻电阻连接后膜输出端；电容泄放电路用于将放电电容的电荷进行缓慢泄放；传递电阻上反向并联有一只充电二极管，用于给来自突触后膜输出端的动作电位脉冲提供一个反向给放电电容反向充电的特殊通路，用于产生突触传递效能的增强。工作时，如果前膜输入端输入的是低频动作电位脉冲，由于放电电容的作用，每一个动作电位脉冲通过后，需要有一段时间让放电电容通过泄放电路进行放电才能恢复。如果连续几个低频脉冲，由于放电电容被充电而来不及放电，会对后面紧接着的脉冲呈现更大的阻抗，也即使突触传递对低频动作电位产生突触抑制的现象。如果前膜输入端输入的是高频尖脉冲，由于电容对高频脉冲的阻抗较小，所以影响较小。特别是如果高频动作电位能够引起突触后膜的神经元整合爆发具有高阈值动作电位，则由于动作电位会反向传递到突触后膜，通过二极管使放电电容反向充电，从而使放电电容对下一个动作电位脉冲呈现明显增强的传递效能，也即使突触传递对高频动作电位产生突触增强(易化)现象。The "cured synapse" simulation device of the present invention includes an input end of the front film and an output end of the back film, and is characterized in that a capacitor discharge circuit is connected in series between the input end of the front film and the output end of the back film, and the capacitor discharge circuit is paralleled at the same time. A capacitor bleeder circuit is connected. This constitutes the simplest synaptic transmission channel with fixed synaptic transmission efficiency, that is, without synaptic plasticity. As a simplest solution, the capacitor discharge circuit is composed of a discharge capacitor, the front end of the discharge capacitor is connected to the input end of the front film, and the rear end of the discharge capacitor is connected to the output end of the rear film through a transfer resistor; It is used to slowly discharge the charge of the discharge capacitor; a charging diode is connected in anti-parallel to the transfer resistance, which is used to provide a special path for reverse charging the discharge capacitor for the action potential pulse from the output terminal of the postsynaptic membrane. for the enhancement of synaptic transmission efficiency. During operation, if a low-frequency action potential pulse is input to the input terminal of the anterior membrane, due to the action of the discharge capacitor, after each action potential pulse passes, it takes a period of time for the discharge capacitor to discharge through the discharge circuit to recover. If there are several low-frequency pulses in a row, because the discharge capacitor is charged and cannot discharge in time, it will present a larger impedance to the following pulses, even if synaptic transmission produces synaptic inhibition on low-frequency action potentials. If the input terminal of the anterior membrane is a high-frequency spike, the impact of the capacitor is small because the impedance of the capacitor to the high-frequency pulse is small. In particular, if high-frequency action potentials can cause neuronal integration bursts at the postsynaptic membrane with high-threshold action potentials, since the action potentials are transmitted in reverse to the postsynaptic membrane, the discharge capacitor is reversely charged through the diode, thereby causing the discharge Capacitance exhibits significantly enhanced transmission efficiency to the next action potential pulse, even if synaptic transmission produces synaptic enhancement (facilitation) to high-frequency action potentials.
本发明的“固化突触”模拟装置采用极其简单的电路来实现普通突触的突触传递功能，虽然对突触抑制和突触增强只是一种简单粗略的模拟，但具有电路极其简单，因而也有成本和体积极低的特点，可应用在模拟神经网络中的信号输入和输出通路，信号反馈通路等信号直接传导通路上，在模拟神经网络的规模较大时可明显节省成本。The "solidified synapse" simulation device of the present invention uses an extremely simple circuit to realize the synaptic transmission function of ordinary synapses. Although it is only a simple and rough simulation of synaptic inhibition and synaptic enhancement, the circuit is extremely simple, so It also has the characteristics of low cost and low volume, and can be applied to the signal input and output paths, signal feedback paths and other signal direct conduction paths in the analog neural network, which can significantly save costs when the scale of the analog neural network is large.
在现有技术中，采用电子电路的可塑性突触模拟装置，一般包括有前膜输入端、后膜输出端、STDP时序识别电路、STDP运算电路、和突触传递效能调整电路，STDP时序识别电路能够根据前膜输入端和后膜输出端所出现的锋电位信号，识别判断其锋电位信号是否具有STDP特征，并识别判断出是属于其中的LTP特征还是属于LTD特征，这两种特征的信号，被输出到一个STDP运算电路进行加减累积，运算后的输出数值用于控制突触传递效能调整电路，通过传递效能调整电路对突触传递效能的数值(也即是突触输出信号的强弱)进行调整，以此实现对突触传递输出信号的可塑性改变，即实现突触可塑性。现有技术大多采用微处理器通过程序来实现上述包括STDP时序识别电路、STDP运算电路和突触传递效能调整电路的功能。而本发明公开另一种可塑性突触的模拟方法和装置。In the prior art, a plastic synapse simulation device using an electronic circuit generally includes an anterior membrane input terminal, a posterior membrane output terminal, an STDP timing identification circuit, an STDP arithmetic circuit, and a synaptic transmission efficiency adjustment circuit, and a STDP timing identification circuit. It can identify and judge whether the spike potential signal has STDP characteristics according to the spike potential signals appearing at the input end of the anterior membrane and the output end of the posterior membrane, and identify and judge whether it belongs to the LTP characteristic or the LTD characteristic. The signals of these two characteristics , is output to an STDP operation circuit for addition and subtraction accumulation, the output value after operation is used to control the synaptic transmission efficiency adjustment circuit, and the value of the synaptic transmission efficiency (that is, the intensity of the synaptic output signal) Weak) adjustment, in order to achieve plastic changes to the output signal of synaptic transmission, that is, to achieve synaptic plasticity. In the prior art, microprocessors are mostly used to realize the above-mentioned functions including the STDP timing identification circuit, the STDP arithmetic circuit and the synaptic transmission efficiency adjustment circuit through programs. The present invention discloses another method and device for simulating plastic synapses.
本发明具有突触传递STDP可塑性功能的“可塑性突触”的模拟方法包括：The simulation method of the "plastic synapse" with synaptic transmission STDP plasticity function of the present invention includes:
⑴、由突触前膜输入端的输入信号来控制后膜输出端的输出信号，使输出信号与输入信号同步；⑵、检测突触前膜输入端和后膜输出端的锋电位信号；⑶、当识别到前膜输入端和后膜输出端之间出现符合STDP特性的锋电位信号，则根据信号的特征通过一个充电回路和一个放电回路对一个储电器件进行充放电：如果信号是LTP特征，则进行充电，如果信号是LDP特征，则进行放电；充电或放电的时间宽度由STDP特性决定；⑷、以储电器件的电压值，来调整突触输出信号的电压(或电流)幅度的大小，并输出到后膜输出端；⑸、储电器件在开始工作时被设置具有一定数值的初始化电压。⑴. The output signal at the output of the posterior membrane is controlled by the input signal at the input of the presynaptic membrane, so that the output signal is synchronized with the input signal; ⑵. Detect the spike potential signal at the input of the presynaptic membrane and the output of the posterior membrane; Between the input terminal of the front membrane and the output terminal of the rear membrane, a spike potential signal that conforms to the STDP characteristics appears, and then a charging circuit and a discharging circuit are used to charge and discharge a power storage device according to the characteristics of the signal: if the signal is an LTP characteristic, then Charge, if the signal is LDP characteristic, then discharge; the time width of charge or discharge is determined by STDP characteristics; (4) The voltage (or current) amplitude of the synaptic output signal is adjusted by the voltage value of the power storage device, And output to the output end of the rear film; ⑸, the power storage device is set to have an initialization voltage with a certain value when it starts to work.
作为一种优化方案，当储电器件上的电压大于或小于初始化电压时，通过一个双向泄放电路来缓慢消除这种电压差，直至储电器件上的电压等于初始化电压值。(该方案模拟对突触LTP和LTD效应的缓慢消除，使本发明的突触模拟方法更加完善)。As an optimal solution, when the voltage on the power storage device is greater than or less than the initialization voltage, a bidirectional bleeder circuit is used to slowly eliminate this voltage difference until the voltage on the power storage device is equal to the initialization voltage value. (This scheme simulates the slow elimination of synaptic LTP and LTD effects, making the synaptic simulation method of the present invention more complete).
本发明具有突触传递STDP可塑性功能的“可塑性突触”的模拟装置包括前膜输入端、后膜输出端、STDP时序识别电路、和传递效能调整电路。STDP时序识别电路属于现有技术，能够根据前膜输入端和后膜输出端所出现的锋电位信号，识别判断其锋电位信号是否具有STDP特征，并识别判断出是属于LTP特征还是属于LTD特征，另外，STDP时序识别电路对前膜输入端和后膜输出端所输入的信号都具有电压值检测，由于动作电位的锋电位的电压值明显大于经过突触传递后的信号电压值，所以STDP时序识别电路只对电压幅度较高的动作电位锋电位进行识别，而对于突触自身产生的突触输出信号、以及从后膜输出端所传递过来的其他突触装置的突触输出信号，由于信号电压幅度较低而不会被识别。STDP时序识别电路可以采用CPU或MCU等微处理器，对前膜输入端和后膜输出端的锋电位信号进行模数转换，再根据其时序先后和时间差，识别并输出LTP特征信号和LTD特征信号。也可以采用电压比较器和时基电路，根据锋电位信号的时序先后和时间差，通过逻辑识别并输出LTP特征信号和LTD特征信号。这属于现有技术，在公开的具有突触传递STDP可塑性的采用电子电路来实现的突触模拟技术中有相关技术。而且，这里所述的关于STDP时序识别电路的工作特点及实现技术，在本发明的其他部分都一样适用。The simulation device of the "plastic synapse" with synaptic transmission STDP plasticity function of the present invention includes an anterior membrane input terminal, a posterior membrane output terminal, an STDP sequence recognition circuit, and a transmission efficiency adjustment circuit. The STDP timing identification circuit belongs to the prior art, and can identify and judge whether the spike signal has STDP characteristics according to the spike potential signals appearing at the input end of the anterior membrane and the output end of the posterior membrane, and identify and determine whether it belongs to the LTP characteristic or the LTD characteristic. , In addition, the STDP timing identification circuit has voltage value detection for the input signal of the anterior membrane input terminal and the posterior membrane output terminal. Since the voltage value of the action potential spike is significantly larger than the signal voltage value after synaptic transmission, so STDP The sequence recognition circuit only recognizes the action potential spikes with higher voltage amplitudes, while for the synaptic output signals generated by the synapse itself and the synaptic output signals of other synaptic devices transmitted from the output terminal of the posterior membrane, due to The signal voltage amplitude is low and will not be recognized. The STDP sequence recognition circuit can use microprocessors such as CPU or MCU to perform analog-to-digital conversion on the spike potential signals at the input end of the front membrane and the output end of the rear membrane, and then identify and output the LTP characteristic signal and the LTD characteristic signal according to the sequence sequence and time difference. . A voltage comparator and a time base circuit can also be used to identify and output the LTP characteristic signal and the LTD characteristic signal through logic according to the time sequence and time difference of the spike potential signal. This belongs to the prior art, and there are related technologies in the disclosed synaptic simulation technology with synaptic transmission STDP plasticity implemented by electronic circuits. Moreover, the working characteristics and implementation techniques of the STDP timing identification circuit described here are equally applicable to other parts of the present invention.
本发明的“可塑性突触”的特征在于：STDP时序识别电路带有LTP输出端和LTD输出端；(所述STDP时序识别电路根据前膜输入端和后膜输出端出现锋电位的先后时序来控制LTP输出端和LTD输出端的输出信号)；LTP输出端和LTD输出端分别通过一个充电回路和一个放电回路连接到一个用于储存电能的储电器件上。STDP时序识别电路在识别出LTP特征时LTP输出端出现LTP脉冲输出，而且LTP脉冲的脉冲宽度与前后两个锋电位信号的时间间隔呈现负相关，也即符合STDP特性，LTP脉冲通过充电回路向储电器件充电；STDP时序识别电路在识别出LTD特征时LTD输出端出现LTD脉冲输出，而且LTD脉冲的脉冲宽度与前后两个锋电位信号的时间间隔呈现负相关，LTD脉冲通过放电回路向储电器件放电。The "plastic synapse" of the present invention is characterized in that: the STDP timing identification circuit has an LTP output terminal and a LTD output terminal; Control the output signal of the LTP output terminal and the LTD output terminal); the LTP output terminal and the LTD output terminal are respectively connected to a power storage device for storing electrical energy through a charging circuit and a discharging circuit. When the STDP sequence recognition circuit recognizes the LTP feature, LTP pulse output appears at the LTP output end, and the pulse width of the LTP pulse is negatively correlated with the time interval of the two front and back spike signals, which is in line with the STDP characteristic. The power storage device is charged; when the STDP timing identification circuit recognizes the LTD feature, the LTD output terminal appears LTD pulse output, and the pulse width of the LTD pulse is negatively correlated with the time interval of the two front and back spike signals, and the LTD pulse passes through the discharge loop to the storage electrical device discharge.
储电器件连接有一个初始化充电电路；(初始化充电电路用于在电路开始工作时使储电器件迅速被充电至初始化电压，具备初始电量，使突触在初始状态便具备传递效能，其初始化电压也即是储电器件的基准电压，这时突触输出为标准的突触传递效能)。The power storage device is connected with an initialization charging circuit; (the initialization charging circuit is used to quickly charge the power storage device to the initialization voltage when the circuit starts to work, and has the initial power, so that the synapse has transmission performance in the initial state, and its initialization voltage That is, the reference voltage of the power storage device, and the synaptic output is the standard synaptic transmission efficiency).
储电器件的输出连接到突触传递效能调整电路，作为其输出的基准电压；突触传递效能调整电路的输出信号作为突触信号输出连接到后膜输出端。突触传递效能调整电路同时接受前膜输入端输入信号的同步控制，其输出信号在强度上受储电器件输出电压的调制，在时间上受前膜输入端输入信号的同步控制。突触传递效能调整电路的输出端还可以包含有一个上述“固化突触”模拟装置的电路，使之同时具有突触增强和突触抑制的传递特性。The output of the power storage device is connected to the synaptic transmission efficiency adjustment circuit as a reference voltage of its output; the output signal of the synaptic transmission efficiency adjustment circuit is connected to the output terminal of the posterior membrane as a synaptic signal output. The synaptic transmission efficiency adjustment circuit simultaneously accepts the synchronous control of the input signal at the input terminal of the anterior membrane, and the output signal is modulated by the output voltage of the power storage device in intensity and synchronously controlled by the input signal at the input terminal of the anterior membrane in time. The output end of the synaptic transmission efficiency adjustment circuit can also include a circuit of the above-mentioned "solidified synapse" analog device, so that it has the transmission properties of synaptic enhancement and synaptic inhibition at the same time.
本发明的“可塑性突触”的模拟方法和装置，模拟了具有突触可塑性的化学突触的传递特性，但它不像现有技术一般采用改变电路传递阻抗(变阻电路)来实现传递效能的方法，而是通过STDP时序识别电路来识别LTP和LTD特征，并通过充电电路和放电电路来对一个储电器件进行充放电，使储电器件上的电压随着充电(LTP时)和放电(LTD时)而产生高低变化，并用于调制突触效能调整电路的输出，从而使突触输出脉冲的电压值产生高低的相应调整，以此实现对STDP突触可塑性的模拟。本发明的突触模拟装置，对突触可塑性也即突触传递效能的调整，体现的是输出电压变化而不是输出阻抗变化，所以更方便于跟各种神经元模拟装置配合工作，特别适合用于做出独立装置，构造神经网络的模拟演示装置，并能够方便地通过检测储电器件的电压数值来实时显示该突触目前的传递效能。而且，不需要编程的变阻电路，更接近于“天然”的实际工作情况。本发明的“可塑性突触”的模拟装置，模拟的是存在于大脑的海马、纹状体、杏仁核和部分皮层区域等位置的神经突触，具有很强的且能快速产生的STDP突触可塑性，是形成短时程和长时程记忆的重要特征。The method and device for simulating the "plastic synapse" of the present invention simulate the transmission characteristics of a chemical synapse with synaptic plasticity, but it does not use changing the transmission impedance of the circuit (varistor circuit) to achieve transmission efficiency as in the prior art. Instead, the STDP timing identification circuit is used to identify the LTP and LTD characteristics, and a charging circuit and a discharging circuit are used to charge and discharge a power storage device, so that the voltage on the power storage device follows the charging (LTP) and discharge. (LTD) to generate high and low changes, and used to modulate the output of the synaptic efficacy adjustment circuit, so that the voltage value of the synaptic output pulse can be adjusted accordingly, so as to achieve the simulation of STDP synaptic plasticity. The synaptic simulation device of the present invention can adjust the synaptic plasticity, that is, the synaptic transmission efficiency, by reflecting the output voltage change instead of the output impedance change, so it is more convenient to work with various neuron simulation devices, and is especially suitable for using In order to make an independent device, construct a simulation demonstration device of neural network, and can conveniently display the current transmission efficiency of the synapse in real time by detecting the voltage value of the power storage device. Also, varistor circuits that do not require programming are closer to "natural" actual operation. The "plastic synapse" simulation device of the present invention simulates the neuronal synapses existing in the hippocampus, striatum, amygdala and some cortical areas of the brain, and has strong and rapidly generated STDP synapses Plasticity is an important feature in the formation of short-term and long-term memory.
作为一种优化，储电器件还连接有一个双向泄放电路；双向泄放电路用于在一定时间内缓慢消除储电器件由于充放电而造成电压升高或降低的变化，直至储电器件上的电压等于初始化电压。从而模拟对突触LTP和LTD效应的缓慢消除，使本发明的突触模拟装置更加完善，能够适应于连续多进程的模拟工作。作为一种简单的方案，双向泄放电路包括一个稳压电路，(稳压电路的电压等于储电器件的初始化电压，也即基准电压)，稳压电路通过一个电阻连接到储电器件。当储电器件的电压大于稳压电路设定电压时，(也即出现突触LTP效应时)，储电器件通过电阻向稳压电路缓慢放电，(也即缓慢消除LTP效应)；当储电器件的电压小于稳压电压设定电压时，(也即出现突触LTD效应时)，稳压电路通过电阻向储电器件缓慢充电，(也即缓慢消除LTP效应)。在一定时间后，也即突触可塑性的有效期后，使储电器件的电压等于稳压电路设定电压，也即突触没有出现可塑性时的正常输出幅度。As an optimization, the power storage device is also connected with a bidirectional discharge circuit; the bidirectional discharge circuit is used to slowly eliminate the voltage increase or decrease caused by the charge and discharge of the power storage device within a certain period of time, until the power storage device is on the The voltage is equal to the initialization voltage. Therefore, the simulation can slowly eliminate the synaptic LTP and LTD effects, so that the synaptic simulation device of the present invention is more perfect and can be adapted to continuous multi-process simulation work. As a simple solution, the bidirectional discharge circuit includes a voltage regulator circuit (the voltage of the voltage regulator circuit is equal to the initialization voltage of the power storage device, that is, the reference voltage), and the voltage regulator circuit is connected to the power storage device through a resistor. When the voltage of the power storage device is greater than the voltage set by the voltage regulator circuit, (that is, when the synaptic LTP effect occurs), the power storage device slowly discharges to the voltage regulator circuit through the resistance (that is, the LTP effect is slowly eliminated); When the voltage of the device is lower than the set voltage of the regulated voltage, (that is, when the synaptic LTD effect occurs), the voltage stabilizing circuit slowly charges the power storage device through the resistor (that is, slowly eliminates the LTP effect). After a certain period of time, that is, after the validity period of synaptic plasticity, the voltage of the power storage device is made equal to the voltage set by the voltage regulator circuit, that is, the normal output amplitude when the synaptic plasticity does not appear.
本发明的“预置性突触”的模拟方法包括：⑴、在模拟突触的前膜输入端和后膜输出端之间预设一突触传递通道，但工作之始关闭该突触传递通道的工作；⑵、检测突触前膜输入端和后膜输出端的锋电位信号；⑶、当前膜输入端和后膜输出端之间出现符合STDP特性的锋电位信号，则对该信号的出现情况进行运算，(包括积分或计数)；⑷、当符合STDP特性的锋电位信号出现的情况满足设定规则，则启动预设的突触传递通道的工作，使突触的前膜输入端与后膜输出端建立起具有突触传递效能的传递通道。The simulation method of the "preset synapse" of the present invention includes: (1) Presetting a synaptic transmission channel between the pre-membrane input end and the posterior membrane output end of the simulated synapse, but closing the synaptic transmission at the beginning of the work (2) Detect the spike potential signal at the input end of the presynaptic membrane and the output end of the posterior membrane; (3) If there is a spike potential signal conforming to STDP characteristics between the input end of the current membrane and the output end of the posterior membrane, then the appearance of the signal (4) When the appearance of the spike potential signal conforming to the STDP characteristic meets the set rule, the preset synaptic transmission channel will be activated, so that the synaptic premembrane input is connected to the The post-membrane output terminal establishes a transmission channel with synaptic transmission efficiency.
所述的设定规则是以下两种中的一种：1、只计数符合STDP特性中的LTP特征的信号的次数，如果在一段设定的时间内，出现LTP的计数达到设定值，则启动预设的突触传递通道的工作；或者是2、不设定计数时间，同时计数符合LTP特征和LTD特征的信号的次数，其中出现LTP特征的信号次数做加法，出现LTD特征的信号次数做减法；如果总计数达到设定值，则启动预设的突触传递通道的工作。The setting rule is one of the following two: 1. Only count the number of signals that conform to the LTP characteristic in the STDP characteristic. If the LTP count reaches the set value within a set period of time, then Start the work of the preset synaptic transmission channel; or 2. Do not set the counting time, and count the number of signals that meet the LTP characteristics and LTD characteristics at the same time. The number of signals with LTP characteristics is added, and the number of signals with LTD characteristics is added. Do subtraction; if the total count reaches the set value, start the work of the preset synaptic transmission channel.
进一步改进，本发明的“预置性突触”的模拟方法，还包括：Further improvement, the simulation method of "preset synapse" of the present invention also includes:
⑸、在启动预设的突触传递通道的工作后，继续检测突触前膜输入端和后膜输出端的锋电位信号；⑹、当前膜输入端和后膜输出端之间出现符合STDP特性的锋电位信号，则对该信号的出现情况进行运算；当符合STDP特性的锋电位信号出现情况满足第二设定规则，则关闭预设的突触传递通道的工作，切断突触的前膜输入端与后膜输出端的传递通道。(5) After starting the preset synaptic transmission channel, continue to detect the spike potential signal at the input terminal of the presynaptic membrane and the output terminal of the post-synaptic membrane; If the spike potential signal is present, the occurrence of the signal is calculated; when the occurrence of the spike potential signal conforming to the STDP characteristic satisfies the second setting rule, the preset synaptic transmission channel will be closed, and the synaptic premembrane input will be cut off. The transfer channel between the end and the post-membrane output.
所述的第二设定规则是以下的两种中的一种：1、只计数符合LTD特征的信号的次数，如果在一段设定的时间内，出现LTD的计数达到设定值，则关闭预设的突触传递通道的工作；2、同时计数符合LTP特征和LTD特征的信号的次数，其中出现LTP特征的信号次数做加法，出现LTD特征的信号次数做减法；如果总计数低于设定值，则关闭突触传递通道的工作。显然在后一种的这种设定规则中，关闭突触传递通道的总计数的设定值，必然要小于启动突触传递通道的总计数的设定值。The second setting rule is one of the following two: 1. Only count the number of signals that meet the LTD characteristics. If the LTD count reaches the set value within a set period of time, it will be turned off. The work of the preset synaptic transmission channel; 2. Count the number of signals that meet the LTP characteristics and LTD characteristics at the same time. The number of signals with LTP characteristics is added, and the number of signals with LTD characteristics is subtracted; if the total count is lower than the set value. If the value is set, the work of the synaptic transmission channel will be closed. Obviously, in the latter setting rule, the set value of the total count of closing synaptic transmission channels must be smaller than the set value of the total count of activated synaptic transmission channels.
本发明“预置性突触”的模拟装置，包括有前膜输入端、后膜输出端、和预设的突触传递通道；其特征在于：还带有一个STDP时序识别电路，用于识别前膜输入端和后膜输入端之间具有STDP特征的锋电位信号；STDP时序识别电路的输出连接到一个STDP积分电路，STDP积分电路的输出连接到一个门限控制电路；门限控制电路的输出端连接到一个通道开关电路；通道开关电路用于控制突触传递通道的通断。The "preset synapse" simulation device of the present invention includes an anterior membrane input end, a posterior membrane output end, and a preset synaptic transmission channel; it is characterized in that it also has an STDP sequence identification circuit for identifying There is a spike potential signal with STDP characteristics between the input terminal of the front membrane and the input terminal of the rear membrane; the output of the STDP timing identification circuit is connected to a STDP integrating circuit, and the output of the STDP integrating circuit is connected to a threshold control circuit; the output of the threshold control circuit Connected to a channel switch circuit; the channel switch circuit is used to control the on and off of the synaptic transmission channel.
其工作过程为：STDP积分电路根据设定规则，累积在一定时间内STDP时序识别电路所识别输出的信号，并转化为其输出信号的输出值；门限控制电路用于检测积分电路的输出信号的输出值，当积分电路的输出值达到或高于设定门限1，则产生输出控制信号；并通过通道开关电路启动接通突触传递通道，在前膜输入端与后膜输出端之间建立具有突触传递效能的突触传递通道。Its working process is: the STDP integrating circuit accumulates the signals identified and output by the STDP timing identification circuit within a certain period of time according to the set rules, and converts it into the output value of its output signal; the threshold control circuit is used to detect the output signal of the integrating circuit. Output value, when the output value of the integrating circuit reaches or exceeds the set threshold of 1, an output control signal is generated; and the synaptic transmission channel is activated through the channel switch circuit to establish a connection between the input end of the anterior membrane and the output end of the posterior membrane. A synaptic transmission channel with synaptic transmission potency.
其工作过程进一步还包括：在通道开关电路启动接通突触传递通道后，门限控制电路继续检测积分电路的输出信号的输出值，当积分电路的输出值低于设定门限2，则关闭输出控制信号；并通过通道开关电路关闭突触传递通道。也即切断前膜输入端与后膜输出端之间的突触传递通道。显然，设定门限2需要小于设定门限1。作为一种较合理的设置，设定门限2可相当于设定门限1的值的65％至85％。The working process further includes: after the channel switch circuit starts and turns on the synaptic transmission channel, the threshold control circuit continues to detect the output value of the output signal of the integrating circuit, and when the output value of the integrating circuit is lower than the
所述预设的突触传递通道，是一个具有突触传递效能的突触传递通道，这些突触传递特性包括突触易化、突触抑制、突触长时程可塑性特别是具有STDP特性的突触可塑性、这些传递特性中的一种或多种。预设的突触传递通道实质上就是一个具有传递特性的突触模拟装置，它可以是一个前述的“固定突触”装置，也可以是一个前述的“可塑性突触”装置，或者是其他现有技术的突触模拟装置，包括采用记忆变阻材料制成的突触连接装置。The preset synaptic transmission channel is a synaptic transmission channel with synaptic transmission efficiency, and these synaptic transmission characteristics include synaptic facilitation, synaptic inhibition, synaptic long-term plasticity, especially with STDP characteristics. Synaptic plasticity, one or more of these transmission properties. The preset synaptic transmission channel is essentially a synaptic simulation device with transmission properties, which can be the aforementioned “fixed synapse” device, the aforementioned “plastic synapse” device, or other existing devices. The prior art synapse simulation device includes a synaptic connection device made of memristive materials.
所述积分电路的设定规则是：当出现LTP特征的信号时提高输出信号的输出值，当出现LTD特征的信号时降低输出信号的输出值。(相对于模拟方法，模拟装置对STDP的运算规则只采用其中一种更接近大脑工作特点的方式)。The setting rule of the integrating circuit is: when the signal with the LTP characteristic appears, the output value of the output signal is increased, and when the signal with the LTD characteristic appears, the output value of the output signal is decreased. (Compared to the simulation method, the simulation device only adopts one of the methods that are closer to the characteristics of the brain's working rules for STDP.)
本发明的“预置性突触”的模拟方法及装置，与现有技术的具有突触传递STDP可塑性的突触模拟技术相比较，虽然彼此都具有检测和识别突触前后膜之间符合STDP特性锋电位信号的技术，但其做出的处理是不同的。现有的STDP突触模拟技术，是一开始便具有突触传递效能，再根据检测识别的符合STDP特性的锋电位信号，来调整突触传递效能：如果是出现LTP特征信号，则提升突触传递效能，如果是出现LTD特征信号，则降低突触传递效能，以此来实现突触传递可塑性。从大脑结构来看，这一类突触更多地存在于海马、杏仁核、纹状体等区域的神经元之间，用于实现信息的短期记忆(或称长时程记忆)。Compared with the prior art synaptic simulation technology with synaptic transmission STDP plasticity, the "preset synapse" simulation method and device of the present invention both have the ability to detect and identify the presynaptic and presynaptic membranes in line with STDP. techniques to characterize spike signals, but their processing is different. The existing STDP synaptic simulation technology has synaptic transmission efficiency from the beginning, and then adjusts the synaptic transmission efficiency according to the detected and identified spike signals that meet the STDP characteristics: if there is an LTP characteristic signal, the synaptic transmission efficiency is improved. Transmission efficiency, if the characteristic signal of LTD appears, the synaptic transmission efficiency will be reduced, so as to achieve synaptic transmission plasticity. From the perspective of brain structure, this type of synapse exists more between neurons in the hippocampus, amygdala, striatum and other regions, and is used to realize short-term memory (or long-term memory) of information.
而本发明的“预置性突触”，本身便包含有一具备突触传递效能的突触传递通道，也即其本身包含有一个突触模拟装置，是在突触模拟装置的基础上，加上如何识别和判断信号、再以此进行启动或关闭突触传递通道的技术。其在工作初始时突触传递通道是关闭的，没有具备突触传递效能，只有当前膜输入端和后膜输出端之间多次出现符合STDP特性中的LTP特征的锋电位信号，并累积达到某一程度，才会启动接通突触传递通道的工作，在前膜输入端和后膜输出端之间建立有效的突触传递效能。它模拟的是存在于脑皮层等区域上的神经元之间的一种突触，这类突触开始形成时并没有具备突触传递效能，需要经过前后神经元的长期的多次的协同刺激后，才被激活成有效突触，而一旦激活，其传递效能便比较稳定。The "preset synapse" of the present invention itself includes a synaptic transmission channel with synaptic transmission efficiency, that is, it itself includes a synaptic simulation device. On the basis of the synaptic simulation device, adding On how to identify and judge the signal, and then use it to start or close the technology of synaptic transmission channels. At the beginning of its work, the synaptic transmission channel is closed, and it has no synaptic transmission efficiency. Only the spike potential signals that conform to the LTP characteristics in the STDP characteristics appear multiple times between the current membrane input terminal and the posterior membrane output terminal, and the accumulation reaches To a certain extent, the work of opening the synaptic transmission channel will be initiated, and effective synaptic transmission efficiency will be established between the input terminal of the anterior membrane and the output terminal of the posterior membrane. It simulates a synapse between neurons in areas such as the cerebral cortex. This type of synapse does not have synaptic transmission efficiency when it begins to form, and requires long-term and multiple synaptic stimulation of the neurons before and after. After that, it is activated into an effective synapse, and once activated, its transmission efficiency is relatively stable.
“预置性突触”一旦被激活成为有效突触，它便不会自动关闭，如果还出现LTP特征的锋电位信号，或者只要有通过它的突触传递而使突触前神经元被激活产生动作电位(实际这也是产生LTP特征)，则STDP积分电路的数值便越来越高直至达到最大值，使突触传递效应更可靠有效，而即使没有出现LTP信号，突触也能继续保持有效的传递效能。只有长时间没有出现LTP特征，而且多次出现LTD特征的抑制性信号，才会使积分电路的数值缓慢降低，最终低于门限值，门限控制电路关闭输出信号，通过通道开关电路关闭突触传递通道，使突触再次失效。这种工作状态用于模拟大脑长期记忆的稳定性，但即使是将信息作为长期记忆进行保存下来，如果这些信息长期没有使用，而且有其他抑制性信息的长期混淆(竞争)，则长期记忆也会慢慢被遗忘。Once the "preset synapse" is activated to become an effective synapse, it will not automatically close, if there is a spike signal characteristic of LTP, or as long as there is synaptic transmission through it, the presynaptic neuron is activated When an action potential is generated (actually this is also the characteristic of LTP), the value of the STDP integrator circuit will become higher and higher until it reaches the maximum value, making the synaptic transmission effect more reliable and effective, and even if there is no LTP signal, the synapse can continue to maintain Effective delivery performance. Only when the LTP feature does not appear for a long time, and the inhibitory signal of the LTD feature appears for many times, will the value of the integrating circuit slowly decrease, and finally lower than the threshold value, the threshold control circuit will turn off the output signal, and the synapse will be closed through the channel switch circuit Pass the channel, making the synapse fail again. This working state is used to simulate the stability of long-term memory in the brain, but even if information is preserved as long-term memory, if the information is not used for a long time, and there is long-term confusion (competition) with other inhibitory information, the long-term memory is also will slowly be forgotten.
本发明的“预置性突触”模拟装置，STDP时序识别电路属于现有技术，而对于STDP积分电路如何对STDP时序识别电路所输出的LTP和LTD特征信号进行运算，一般可采用MCU等微处理器，按照设定规则，对LTP特征信号和LTD特征信号进行计数运算，再将计数值跟设定值进行比较，根据比较结果来输出控制信号。本发明还公开另一种采用储电器件来实现STDP积分电路的模拟技术。其STDP积分电路包括有充电电路、放电电路和一只储电器件，STDP时序识别电路的LTP输出端和LTD输出端分别通过充电电路和放电电路连接到储电器件上；储电器件的输出端连接到门限控制电路的输入端。工作时，储电器件的电压随着STDP效应而出现调整，门限控制电路检测其电压，跟设定值进行比较，并以此开启或关闭突触传递通道的工作。同样能够实现通过多次LTP特征信号来激活启动突触传递通道，使“预置性突触”成为“有效突触”；也能再通过多次的LTD特征信号来关闭突触传递通道，使“有效突触”失效，模拟突触的消亡。这种方式可无需采用MCU，也无需依赖人工程序来实现STDP积分运算，更直观更自然的模拟人脑的工作过程。In the "preset synapse" simulation device of the present invention, the STDP timing identification circuit belongs to the prior art, and how the STDP integration circuit operates on the LTP and LTD characteristic signals output by the STDP timing identification circuit can generally use a microcomputer such as an MCU. The processor counts the LTP characteristic signal and the LTD characteristic signal according to the setting rule, compares the count value with the set value, and outputs a control signal according to the comparison result. The invention also discloses another simulation technology for realizing the STDP integrating circuit by adopting the power storage device. The STDP integration circuit includes a charging circuit, a discharging circuit and a power storage device. The LTP output terminal and the LTD output terminal of the STDP timing identification circuit are respectively connected to the power storage device through the charging circuit and the discharging circuit; the output terminal of the power storage device Connect to the input of the threshold control circuit. During operation, the voltage of the power storage device is adjusted with the STDP effect, and the threshold control circuit detects its voltage, compares it with the set value, and opens or closes the work of the synaptic transmission channel. It is also possible to activate the synaptic transmission channel through multiple LTP characteristic signals, so that the "preset synapse" becomes an "effective synapse"; it can also close the synaptic transmission channel through multiple LTD characteristic signals, so that the The "effective synapse" fails, simulating the demise of the synapse. This method does not need to use MCU, nor does it need to rely on artificial programs to realize STDP integral operation, which is more intuitive and natural to simulate the working process of the human brain.
本发明的“预置性突触”的模拟装置，尤其适合于制作成独立的突触模拟装置，与本发明公开的神经元模拟装置，构成实验性的神经模拟网络，用于演示和研究大脑的工作及功能，而且神经元模拟装置与突触模拟装置可以根据需要自由连接，无需受拓扑结构的限制，可以按任何拓扑结构来构成神经模拟网络。在这种应用时，所述“预置性突触”的模拟装置，还可带有一个电压显示装置，用于显示储电器件的输出电压。从而能够直观显示该突触的传递效能的强弱程度，更有利于科研实验。The "preset synapse" simulation device of the present invention is especially suitable for making an independent synapse simulation device, and the neuron simulation device disclosed in the present invention forms an experimental neural simulation network for demonstrating and studying the brain The work and function of the neuron simulation device and the synapse simulation device can be freely connected as required, without being restricted by the topology structure, and a neural simulation network can be formed according to any topology structure. In this application, the "preset synapse" analog device may also be provided with a voltage display device for displaying the output voltage of the power storage device. Therefore, the strength of the transmission efficiency of the synapse can be visually displayed, which is more conducive to scientific research experiments.
采用上述神经元和突触模拟装置，可以建立具有不同工作特点的模拟神经网络。Using the above neuron and synapse simulation devices, simulated neural networks with different working characteristics can be established.
附图说明 图1是神经元的结构示意图。图2是现有技术的神经元模拟装置的电路方框图。图3是现有技术的神经模拟网络的工作原理示意图。图4是神经元的轴突的结构示意图。图5是本发明的第一种神经元模拟装置的电路方框图。图6是采用单片机来实现图5的神经元模拟装置的电路原理图。图7是采用普通模拟电路来实现图5的神经元模拟装置的电路原理图。图8是本发明的第二种神经元模拟装置的电路方框图。图9是采用单片机来实现图8的神经元模拟装置的电路原理图。图10是采用普通模拟电路来实现图8的神经元模拟装置的电路原理图。图11是神经元模拟装置的调制性输入电路的电路原理图。图12是本发明的“固化突触”的电路原理图。图13是具有STDP可塑性的突触传递效能与锋电位时序关系的示意图。图14是现有技术的具有STDP可塑性的突触模拟装置的电路方框图。图15是本发明的“可塑性突触”模拟装置的电路方框图。图16是图15的“可塑性突触”模拟装置的一种实施例的电路原理图。图17是本发明的“预置性突触”模拟装置的电路方框图。图18是一种采用储电器件来实现STDP积分电路的“预置性突触”模拟装置的电路方框图。图19是图18的“预置性突触”模拟装置的电路原理图。图20是“预置性突触”模拟装置的一种实施例的电路原理图。图21是一种STDP识别电路的电路原理图。Brief Description of the Drawings Fig. 1 is a schematic diagram of the structure of a neuron. FIG. 2 is a circuit block diagram of a prior art neuron simulation device. FIG. 3 is a schematic diagram of the working principle of a neural simulation network in the prior art. Figure 4 is a schematic diagram of the structure of the axon of a neuron. Fig. 5 is a circuit block diagram of the first neuron simulation device of the present invention. FIG. 6 is a circuit schematic diagram of using a single chip microcomputer to realize the neuron simulation device of FIG. 5 . FIG. 7 is a circuit schematic diagram of using a common analog circuit to realize the neuron simulation device of FIG. 5 . Fig. 8 is a circuit block diagram of the second neuron simulation device of the present invention. FIG. 9 is a circuit schematic diagram of using a single chip microcomputer to realize the neuron simulation device of FIG. 8 . FIG. 10 is a circuit schematic diagram of using a common analog circuit to realize the neuron simulation device of FIG. 8 . FIG. 11 is a circuit schematic diagram of the modulating input circuit of the neuron simulation device. Figure 12 is a schematic circuit diagram of the "cured synapse" of the present invention. Figure 13 is a schematic diagram of the relationship between synaptic transmission efficacy and spike timing with STDP plasticity. 14 is a circuit block diagram of a prior art synapse simulation device with STDP plasticity. Fig. 15 is a circuit block diagram of the "plastic synapse" simulation device of the present invention. FIG. 16 is a schematic circuit diagram of one embodiment of the “plastic synapse” simulation device of FIG. 15 . Fig. 17 is a circuit block diagram of the "preset synapse" simulation device of the present invention. Fig. 18 is a circuit block diagram of a "preset synapse" simulation device using a power storage device to realize an STDP integrating circuit. FIG. 19 is a schematic circuit diagram of the “preset synapse” simulation device of FIG. 18 . Figure 20 is a schematic circuit diagram of one embodiment of a "preset synapse" simulation device. Figure 21 is a circuit schematic diagram of an STDP identification circuit.
具体实施方式 以下为对本发明的原理和具体实施的叙述。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The following is a description of the principles and specific implementations of the present invention.
根据目前的研究，典型的中间神经元如图1，主要由胞体1、树突2和轴突3构成。神经元一般具有多根树突，树突反复分支，形如树枝；胞体和树突都可与来自前面的其他神经元的轴突末梢形成突触，成为神经元的输入端，接收来自前面神经元的信号。中间神经元一般具有一根轴突3，轴突3的末梢又与后面的其他神经元的树突或胞体形成突触，轴突3相当于神经元的输出端，向后面的神经元传递信号。According to the current study, a typical interneuron is shown in Figure 1, which is mainly composed of
突触(这里主要是指化学突触)是神经元之间信号传递的重要环节。突触包括突触前膜、突触后膜和突触间隙，处在前一神经元的轴突末梢的是突触前膜，处在后一神经元的树突或胞体的是突触后膜。当前神经元受激活产生动作电位时，突触前膜向突触间隙释放神经递质，突触后膜吸收神经递质并引起神经元内部离子物质的变化，从而产生细胞膜的电兴奋。这些电兴奋在神经元内部进行叠加整合，包括来自多个突触的传递信号的空间整合，和来自同一突触的多个信号的时间整合，当整合的电兴奋达到或超过某一阈值时，神经元爆发动作电位。动作电位传递到轴突末梢，通过突触传递给下一神经元，完成信号整合、触发和传递过程，同时将膜的残留兴奋消除，以进行下一次信号整合。突触的信号传递效能是会变化的，即突触具有可塑性，这是学习和记忆的基础。按照目前被广泛接受的理论，突触传递效能的可塑性改变遵循STDP原则，即时序依赖的突触可塑性，具体见本发明“背景技术”部分的描述。Synapse (here mainly refers to chemical synapse) is an important link of signal transmission between neurons. Synapses include the presynaptic membrane, the postsynaptic membrane, and the synaptic cleft. The presynaptic membrane is located at the axon terminal of the former neuron, and the postsynaptic membrane is located at the dendrite or cell body of the latter neuron. membrane. When an anterior neuron is activated to generate an action potential, the presynaptic membrane releases neurotransmitters to the synaptic cleft, and the postsynaptic membrane absorbs neurotransmitters and causes changes in ionic substances within the neuron, resulting in electrical excitation of the cell membrane. These electrical excitations are integrated in a stack within neurons, including the spatial integration of transmitted signals from multiple synapses, and the temporal integration of multiple signals from the same synapse. When the integrated electrical excitation reaches or exceeds a certain threshold, Neurons burst action potentials. The action potential is transmitted to the axon terminal and transmitted to the next neuron through the synapse to complete the process of signal integration, triggering and transmission, and at the same time, the residual excitation of the membrane is eliminated for the next signal integration. The signal transmission efficiency of synapses will change, that is, synapses have plasticity, which is the basis of learning and memory. According to the currently widely accepted theory, the plastic change of synaptic transmission efficiency follows the STDP principle, that is, timing-dependent synaptic plasticity, as described in the "Background Art" section of the present invention for details.
图2是目前典型的中间神经元模拟技术的电路构成，一般由输入端(模拟树突或胞体的刺激输入)、信号处理模块(用于模拟神经元对信号进行整合和处理的部分)、和输出端(用于模拟轴突输出)；其中的信号处理模块包括有输入膜积分电路(用于模拟膜兴奋电位整合的过程)、阈值触发电路电路(用于模拟膜兴奋电位的整合达到阈值时神经元触发动作电位的动作)、脉冲产生电路(用于模拟动作电位的脉冲产生)、和膜放电电路(用于模拟动作电位触发后膜兴奋电位的去极化并形成不应期的动作)，一般的，还包括有动作电位的输出电路，用于隔离放大脉冲产生电路所产生的动作电位脉冲。Figure 2 is the circuit composition of a typical interneuron simulation technology at present, which generally consists of an input terminal (simulating the stimulation input of dendrites or cell bodies), a signal processing module (a part used to simulate the integration and processing of signals by neurons), and Output terminal (used to simulate axon output); the signal processing module includes an input membrane integration circuit (used to simulate the process of integrating membrane excitation potential), a threshold trigger circuit (used to simulate the integration of membrane excitation potential when the integration reaches the threshold value) The action of neurons triggering action potentials), the pulse generation circuit (for simulating the pulse generation of action potentials), and the membrane discharge circuit (for simulating the depolarization of the membrane excitatory potential after the action potential triggers and forming the action of the refractory period) , generally, it also includes an output circuit with action potential for isolating the action potential pulse generated by the amplifying pulse generating circuit.
图3是目前典型的采用神经元模拟电路来构成神经网络的神经元矩阵的等效图。在一个神经模拟网络中，由处于列位置的n个输入神经元模拟装置(A1至An)、和处于行位置的n个输出神经元模拟装置(C1至Cn)构成n×n的神经元矩阵单元，有些还带有另一输入通道的n个输入神经元模拟装置(B1至Bn)。神经元轴突与其他神经元的树突之间形成有模拟突触PY，模拟突触一般采用变阻技术，具有STDP效应。由于突触STDP效应有赖于突触前后膜的锋电位的精准时序的共同作用，突触前膜的锋电位也即是突触前神经元的轴突的动作电位的信号，而为了产生突触后膜的锋电位信号，现有技术一般是在神经元模拟网络中引入时钟控制端(或称时序控制端)，如图3中的CLK-A、CLK-B和CLK-C，根据信号时序的需要来产生满足STDP要求的突触后膜锋电位信号。这样做虽然能够使神经元矩阵实现STDP效应从而实现记忆功能，但存在的问题是：1、需要引入时钟控制端(或称时序控制端)，在一个神经元矩阵单元中一般需要n个时序控制端，即使采用时钟总线来减少时钟控制端，一个神经元矩阵单元也需要2至3个时钟控制端。由于神经元网络一般是数量巨大的矩阵单元组成，所以需要具有很多时钟控制端，造成了电路结构和线路分布的复杂化。2、由于突触STDP可塑性对于前后膜锋电位的时间时序的高度敏感性，稍有差错便会影响突触可塑性的效果，甚至产生相反的效果，所以，对于时钟控制端输出的锋电位的时序控制，需要与各个神经元模拟装置的工作时序密切相关，既复杂又需要高度精确，在现有技术中，这只能采用计算机系统或微处理器CPU，通过人工编写的计算机程序来实现，导致系统复杂化。3、神经网络的模拟技术，本来就是希望通过模拟网络来模拟和实现人工智能，而按照现有技术，这种人工智能的模拟网络的工作，还需要依赖于一个计算机系统通过复杂的人工程序来控制，显然，这种无法脱离计算机系统和人工程序的神经模拟网络，是无法真正模拟出自然形成的人脑工作的，更会阻碍模拟人工智能的智能水平的提高，(受到计算机系统及其人工程序的设计水平的限制)。这也是现有神经元及神经网络模拟技术所存在的问题。FIG. 3 is an equivalent diagram of a neuron matrix that typically uses neuron analog circuits to form a neural network. In a neural simulation network, an n×n neuron matrix is formed by n input neuron simulation devices (A1 to An) at column positions and n output neuron simulation devices (C1 to Cn) at row positions units, some with n input neuron analogs (B1 to Bn) of another input channel. A simulated synapse PY is formed between the neuron axon and the dendrites of other neurons. The simulated synapse generally adopts varistor technology and has STDP effect. Since the synaptic STDP effect depends on the precise timing of the spikes of the presynaptic membrane, the spike of the presynaptic membrane is also the signal of the action potential of the axon of the presynaptic neuron, and in order to generate the synapse The spike potential signal of the posterior membrane, the prior art generally introduces a clock control terminal (or timing control terminal) in the neuron simulation network, such as CLK-A, CLK-B and CLK-C in Figure 3, according to the signal timing required to generate postsynaptic membrane spikes that satisfy STDP requirements. Although this can make the neuron matrix realize the STDP effect and realize the memory function, the problems are: 1. The clock control terminal (or timing control terminal) needs to be introduced, and n timing control terminals are generally required in a neuron matrix unit. terminal, even if the clock bus is used to reduce the clock control terminal, a neuron matrix unit needs 2 to 3 clock control terminals. Since the neural network is generally composed of a large number of matrix units, it needs to have many clock control terminals, which complicates the circuit structure and circuit distribution. 2. Since the synaptic STDP plasticity is highly sensitive to the time sequence of the anterior and posterior membrane spikes, a slight error will affect the effect of synaptic plasticity, or even produce the opposite effect. Therefore, the timing of the spikes output by the clock control terminal The control needs to be closely related to the working sequence of each neuron simulation device, which is complex and requires high precision. In the prior art, this can only be achieved by using a computer system or a microprocessor CPU, through a computer program written manually, resulting in The system is complicated. 3. The simulation technology of neural network originally hopes to simulate and realize artificial intelligence by simulating the network, but according to the existing technology, the work of this artificial intelligence simulation network still needs to rely on a computer system to simulate and realize the artificial intelligence through complex artificial programs. Obviously, this kind of neural simulation network that cannot be separated from computer systems and artificial programs cannot truly simulate the work of the naturally formed human brain, and it will hinder the improvement of the intelligence level of simulated artificial intelligence (by the computer system and its artificial intelligence). the design level of the program). This is also the problem of existing neuron and neural network simulation technology.
申请人通过对神经元动作电位的进一步研究，注意到神经元在整合输入刺激并产生动作电位的过程中，还会由于输入刺激信号的变化形态的细微不同，以及神经元外部的化学物质环境受周围其他神经元动作的影响，而以不同的产生方式来形成产生不同亚型的动作电位，并带来工作结果的重大差异。Through further research on neuronal action potentials, the applicant noticed that in the process of integrating input stimulation and generating action potentials, neurons are also affected by the subtle differences in the shape of the input stimulation signals and the chemical environment outside the neuron. The action potentials of different subtypes are formed in different ways due to the influence of the actions of other surrounding neurons, and bring about significant differences in the results of the work.
图4是神经元轴突部分的结构示意图。跟图1一样，神经元主要由胞体1、树突2和轴突3构成。轴突3从胞体至轴突末梢又可分为轴突始段4(axon initial segment，简称AIS)，朗飞氏结5(node of Ranvier)，和轴突末梢，轴突始段4即AIS又分为接近胞体的AIS近段6，和离胞体较远的AIS远段7。目前的理论一般认为，虽然神经元动作电位的爆发理论上可发生于神经元任何位置，但对于大部分神经元，AIS也即轴突始段4是动作电位的触发区。这一位置的细胞膜具有高密度的电压门控Na+离子通道，造成其阀电位较其他位置低，所以更容易被触发并爆发动作电位。来自树突的由其他神经元通过突触传递过来的兴奋性信号，向胞体和轴突扩布传递，并在轴突始段即AIS进行整合，当整合的兴奋信号的电位达到或超过阀电位时，大量的Na+离子通道被打开，产生动作电位爆发。动作电位爆发后一方面向轴突末梢传递，作用于下一神经元，即形成神经元的反射动作；另一方面动作电位向胞体和树突做反向传递，作用于分布在胞体和树突上的突触后膜，并因此而产生STDP突触可塑性。动作电位爆发后，还使细胞膜去极化，消除残留的兴奋电位，等待下一次新的整合过程。Figure 4 is a schematic diagram of the structure of the axonal part of a neuron. As in Figure 1, neurons are mainly composed of
按照目前理论，神经元动作电位的爆发，便会反向传递到胞体和树突，作用于胞体和树突上的突触后膜，并使这些突触产生可塑性，包括突触增强LTP和突触抑制LTD。按照目前的关于学习和记忆的“突触可塑性学说”，突触可塑性是形成记忆的基础因素，大脑的学习记忆活动依赖突触可塑性而实现。这也是目前大多神经元及神经网络的模拟技术中关于模拟学习和记忆功能的设计理论基础。According to the current theory, the burst of neuronal action potentials will be transmitted back to the cell body and dendrites, acting on the postsynaptic membrane on the cell body and dendrites, and making these synapses produce plasticity, including synaptic enhancement LTP and synaptic synapses. Touch inhibition LTD. According to the current "synaptic plasticity theory" on learning and memory, synaptic plasticity is the basic factor for memory formation, and the brain's learning and memory activities depend on synaptic plasticity to achieve. This is also the theoretical basis for the design of simulating learning and memory functions in the simulation technology of most neurons and neural networks.
而申请人研究分析神经元在爆发动作电位时，NaV1.2亚型和NaV1.6亚型两种不同亚型的钠离子通道的不同工作机制，得到神经元一种更准确更完善的动作电位爆发模型。神经元对树突输入信号的整合和反应，在一般情况下是在轴突IAS远段爆发低阈值动作电位，并向轴突末梢做单向传递，形成对输入信息的反应性反射活动，这是信息再获取(忆起)的过程，也是大脑思维和反射活动的过程。这一过程动作电位没有向胞体和树突反向传递，不会引发跟它们连接的突触产生突触可塑性，所以也就不会影响原有已形成的记忆的稳定性。而神经元在两种情况下，通过两种不同的产生机制，(对应着大脑形成“被动性记忆”和“主动性记忆”的两种情况)，才会在胞体或IAS近段爆发高阈值的动作电位，既向轴突末梢传递形成信息反射，又同时向胞体和树突反向传递，引发跟它们连接的突触产生突触可塑性，从而形成记忆。所以，信息记忆的获得(记)跟再获取(忆)虽然是通过相同的神经元通道，但却是采用了不同的工作机制来实现，保证了信息再获取的过程(也是思维和其他反射活动的过程)不会对原有记忆形成破坏和影响，更加符合大脑的工作状况。(更详细的分析内容详见本申请的母案申请的说明书)。The applicant studied and analyzed the different working mechanisms of sodium ion channels of two different subtypes, NaV1.2 subtype and NaV1.6 subtype, when neurons burst into action potentials, and obtained a more accurate and perfect action potential for neurons. burst model. The integration and response of neurons to dendritic input signals, in general, bursts of low-threshold action potentials in the distal segment of the axon IAS, and transmits unidirectionally to the axon terminals, forming a reactive reflex activity to the input information. It is the process of information re-acquisition (recall), as well as the process of brain thinking and reflex activities. In this process, action potentials are not transmitted back to the cell body and dendrites, and will not trigger synaptic plasticity in the synapses connected to them, so it will not affect the stability of the original memory. And neurons in two cases, through two different production mechanisms (corresponding to the formation of "passive memory" and "active memory" in the brain), will the high threshold burst in the cell body or the proximal segment of the IAS The action potential is transmitted to the axon terminal to form an information reflection, and at the same time, it is transmitted to the cell body and dendrite in the opposite direction, causing the synapses connected to them to produce synaptic plasticity, thereby forming memory. Therefore, although the acquisition (remembering) and re-acquiring (recalling) of information memory are through the same neuron channel, they are realized by different working mechanisms, which ensures the process of information re-acquisition (also thinking and other reflex activities). process) will not damage and affect the original memory, which is more in line with the working conditions of the brain. (For more detailed analysis content, please refer to the description of the parent application of this application).
申请人根据上述研究和分析，针对动作电位的不同爆发机制及其形成过程，公开了能够更完善更准确的模拟神经元工作过程的两种神经元模拟装置及其方法。Based on the above research and analysis, the applicant discloses two neuron simulation devices and methods that can more completely and accurately simulate the working process of neurons, aiming at different burst mechanisms of action potentials and their formation processes.
图5是本发明的第一种神经元模拟装置的电路原理方框图。本发明的第一种神经元模拟装置，包括有树突输入端(用于模拟神经元的树突输入)、信号处理模块(用于模拟神经元对信号进行整合和处理的部分)、和轴突输出端(用于模拟神经元的轴突输出)；作为现有技术，信号处理模块包括有膜积分电路(用于模拟对膜输入兴奋电位整合的过程，一般常采用电阻和电容组成RC充电电路来构成膜积分电路)、膜放电电路(用于模拟动作电位触发后膜电位的去极化并形成不应期的动作，有时也被称为去极化电路，一般常采用开关元件导通使膜积分电路的电容放电)、阈值触发电路(用于模拟膜电位的兴奋整合达到触发阈值时神经元触发动作电位的动作，一般常使用电压比较器电路。为了区分，在本发明称其为第一阈值触发电路，其触发阈值为V1)、和动作电位脉冲产生电路(用于模拟动作电位的输出脉冲，为了区分，在本发明称其为第一动作电位脉冲产生电路)，一般还包括有动作电位的输出电路，(没有实质性模拟功能，只是用于隔离放大动作电位脉冲产生电路所产生的动作电位脉冲信号)；其具体连接关系是：树突输入端连接到膜积分电路的输入端，膜积分电路的输出端连接第一阈值触发电路的输入端，第一阈值触发电路的输出端连接第一动作电位脉冲产生电路的输入端；第一动作电位脉冲产生电路的输出端通过输出电路连接到轴突输出端；第一动作电位脉冲产生电路的输出端同时连接到膜积分放电电路。FIG. 5 is a block diagram of the circuit principle of the first neuron simulation device of the present invention. The first neuron simulation device of the present invention includes a dendritic input terminal (for simulating the dendritic input of a neuron), a signal processing module (a part for simulating a neuron to integrate and process signals), and an axis Synaptic output terminal (used to simulate the axonal output of neurons); as the prior art, the signal processing module includes a membrane integrator circuit (used to simulate the process of integrating the excitatory potential of the input to the membrane, generally using resistors and capacitors to form RC charging circuit to form a membrane integral circuit), a membrane discharge circuit (used to simulate the depolarization of the membrane potential after the action potential is triggered and the action of forming a refractory period, sometimes called a depolarization circuit, generally using a switching element to conduct To discharge the capacitor of the membrane integrating circuit), the threshold trigger circuit (for simulating the action of the neuron triggering the action potential when the excitation integration of the membrane potential reaches the trigger threshold, a voltage comparator circuit is generally used. In order to distinguish, it is called in the present invention as The first threshold trigger circuit, whose trigger threshold is V1), and the action potential pulse generating circuit (for simulating the output pulse of the action potential, in order to distinguish, it is called the first action potential pulse generating circuit in the present invention), generally also including An output circuit with action potential, (without substantial analog function, it is only used to isolate and amplify the action potential pulse signal generated by the action potential pulse generation circuit); its specific connection relationship is: the dendrite input is connected to the input of the membrane integrator circuit The output end of the membrane integration circuit is connected to the input end of the first threshold trigger circuit, and the output end of the first threshold trigger circuit is connected to the input end of the first action potential pulse generating circuit; the output end of the first action potential pulse generating circuit passes the output The circuit is connected to the output terminal of the axon; the output terminal of the first action potential pulse generating circuit is simultaneously connected to the membrane integral discharge circuit.
本发明的特征在于：所述神经元模拟装置还包括有第二阈值触发电路，第二阈值触发电路的输入端连接到膜积分电路的输出端，第二阈值触发电路的输出端连接到第二动作电位脉冲产生电路，第二动作电位脉冲产生电路的输出端连接轴突输出端，第二动作电位脉冲产生电路的输出端还同时通过一反向传输通道连接到树突输入端。第二阈值触发电路设定的触发阈值V2大于第一阈值触发电路设定的触发阈值V1。其差值视V1的设定值以及膜积分电路的积分设置而定，一般设为比V1大10％至35％较为合适。The present invention is characterized in that: the neuron simulation device further includes a second threshold trigger circuit, the input end of the second threshold trigger circuit is connected to the output end of the membrane integration circuit, and the output end of the second threshold trigger circuit is connected to the second threshold trigger circuit In the action potential pulse generating circuit, the output end of the second action potential pulse generating circuit is connected to the axon output end, and the output end of the second action potential pulse generating circuit is also connected to the dendrite input end through a reverse transmission channel. The trigger threshold V2 set by the second threshold trigger circuit is greater than the trigger threshold V1 set by the first threshold trigger circuit. The difference depends on the set value of V1 and the integral setting of the membrane integrator circuit. Generally, it is more appropriate to set it to be 10% to 35% larger than V1.
上述神经元模拟装置在工作时，在普通情况下，树突输入端输入的信号经过膜积分电路的整合积分后输出，当输出信号电压缓慢上升达到第一阈值触发电路时，第一阈值触发电路触发，使第一动作电位脉冲产生电路输出动作电位脉冲，通过输出电路输出到轴突输出端，实现对输入信号的整合和反射功能，并同时通过膜放电电路使膜积分电路的电容放电，等待下一次对输入信号的整合处理，并且拉低积分输出电压，使第二阈值触发电路不会触发。而当树突输入端输入的信号很强烈，以致膜积分电路输出信号的电压值上升非常快，在第一阈值触发电路触发的同时，(或接近于同时，使得第一阈值触发电路还来不及使膜放电电路拉低膜积分电路的输出电压)，第二阈值触发电路也跟着触发，使第二动作电位脉冲产生电路输出动作电位脉冲，既输出到轴突输出端，并同时反向传输到树突输入端，形成树突上的突触STDP可塑性所需要的锋电位信号。When the above neuron simulation device is working, under normal circumstances, the signal input at the dendrite input end is integrated and integrated by the membrane integrator circuit and then output. When the output signal voltage rises slowly and reaches the first threshold trigger circuit, the first threshold trigger circuit Trigger, make the first action potential pulse generation circuit output the action potential pulse, and output it to the axon output terminal through the output circuit to realize the integration and reflection function of the input signal, and at the same time discharge the capacitor of the membrane integration circuit through the membrane discharge circuit, waiting for The next time the input signal is integrated and processed, and the integrated output voltage is pulled down, so that the second threshold trigger circuit will not be triggered. However, when the input signal at the dendrite input terminal is very strong, so that the voltage value of the output signal of the membrane integrator circuit rises very fast, at the same time when the first threshold trigger circuit is triggered, (or close to the same time, the first threshold trigger circuit is too late to activate The membrane discharge circuit pulls down the output voltage of the membrane integrator circuit), and the second threshold trigger circuit is also triggered, so that the second action potential pulse generating circuit outputs the action potential pulse, which is not only output to the axon output, but also reversely transmitted to the tree synaptic input, forming the spike signal required for synaptic STDP plasticity on dendrites.
本发明的第二阈值触发电路用于模拟神经元爆发高触发阈值动作电位的第一种产生原因及其生物学意义，即胞体或树突输入的兴奋信号非常强烈时，其整合后的膜兴奋电位上升斜率很陡，以致直接在胞体或AIS近胞体段直接爆发高触发阈值的动作电位。神经元通过在轴突AIS远段爆发触发阈值较低的动作电位来实现信息反射，通过在胞体或AIS近胞体段爆发触发阈值较高的的动作电位来实现信息记忆，但以往的技术由于对存在这两种不同亚型动作电位的重要性缺乏认识，特别是对神经元爆发两种不同亚型的动作电位的实质原因，以及在什么情况下会爆发哪一种亚型缺乏认识，所以没有对这方面做更准确的模拟，而实际上这对于解释和模拟同一神经元如何工作于反射和记忆两种不同状态，是尤其重要的。The second threshold trigger circuit of the present invention is used to simulate the first cause of neuron burst high trigger threshold action potential and its biological significance, that is, when the excitation signal input from the cell body or dendrite is very strong, the integrated membrane excitation The rising slope of the potential is so steep that action potentials with high triggering thresholds burst directly in the cell body or in the AIS near the cell body segment. Neurons realize information reflex by firing action potentials with a lower threshold in the distal AIS segment of the axon, and realize information memory by firing action potentials with a higher threshold in the cell body or in the proximal AIS segment. There is a lack of awareness of the importance of the existence of these two distinct subtypes of action potentials, especially the underlying reasons why neurons fire two distinct subtypes of action potentials, and under what circumstances which subtype fires, so there is no A more accurate simulation of this is in fact especially important for explaining and simulating how the same neuron works in two different states, reflex and memory.
作为一种优化方案，第一阈值触发电路的输入端与膜积分电路的输出端之间，加有一信号延迟电路。使得膜积分电路的输出信号，传递到第一阈值触发电路的输入端的时间，比传递到第二阈值触发电路输入端的时间，会有一个短暂的延迟。延迟时间取值很小，具体视膜积分电路的时间参数而定，一般情况下，大约可取为积分时间常数的5％至25％之间。信号延迟电路的设置使得当树突输入端输入强烈的信号时，(即神经元出现能够爆发高阈值动作电位的第一种情况时)，第二阈值触发电路能够可靠地先于第一阈值触发电路而触发。该方案用于模拟从树突输入和整合的兴奋信号传递到轴突的AIS远段时，需要一段短暂的时间。这一短暂的时间延迟在以往的技术中，由于对其生物学的意义不了解，所以没有被人所重视和模拟。而申请人注意到，对该时间延迟的模拟，能够更准确地模拟树突输入的兴奋信号的整合传递、与动作电位爆发的位置及其不同亚型之间的密切关系，与真正的大脑神经元的工作情况更相符合，更准确的模拟出大脑神经元产生记忆的工作情形。As an optimized solution, a signal delay circuit is added between the input end of the first threshold trigger circuit and the output end of the membrane integration circuit. The time for the output signal of the membrane integrator circuit to be transmitted to the input terminal of the first threshold trigger circuit has a short delay than the time to be transmitted to the input terminal of the second threshold trigger circuit. The value of the delay time is very small, which depends on the time parameter of the membrane integration circuit. Generally, it can be taken as between 5% and 25% of the integration time constant. The signal delay circuit is set up so that when a strong signal is input to the dendritic input (i.e. the neuron has the first condition that can burst a high-threshold action potential), the second threshold trigger circuit can reliably trigger before the first threshold circuit is triggered. A brief period of time is required when this protocol is used to simulate the transmission of excitatory signals from dendritic input and integration to the distal AIS segment of the axon. This short time delay has not been valued and simulated in previous technologies due to the lack of understanding of its biological significance. The applicant noted that the simulation of this time delay can more accurately simulate the integration and transmission of excitatory signals input by dendritic input, the close relationship between the location of action potential bursts and their different subtypes, and the relationship between real brain nerves The working conditions of the neurons are more consistent, and more accurately simulate the working conditions of the neurons in the brain to generate memory.
作为另一种优化，第二动作电位脉冲产生电路的输出端还同时连接到膜放电电路。膜放电电路的工作可以由第一动作电位脉冲产生电路的输出来完成，但将两个脉冲产生电路的输出端各自对膜放电电路进行控制，会更符合神经元两种动作电位的工作过程，并使得不会出现两种动作电位脉冲重复叠加的情况。As another optimization, the output terminal of the second action potential pulse generating circuit is also connected to the membrane discharge circuit at the same time. The work of the membrane discharge circuit can be completed by the output of the first action potential pulse generation circuit, but controlling the output terminals of the two pulse generation circuits to the membrane discharge circuit will be more in line with the working process of the two action potentials of neurons. And so that there will be no repeated superposition of two action potential pulses.
进一步，所述的神经元模拟装置还带有一个用于切换记忆/反射工作状态的“注意控制端”，(用于通过外部信号来直接控制切换神经元模拟装置是以反射状态还是以记忆状态进行工作)；所述的第二阈值触发电路，带有阈值调节电路，用于调低第二阈值触发电路的电压触发阈值，(使第二阈值触发电路的触发电压V2小于第一阈值触发电路的触发电压V1)；阈值调节电路的输入控制端，连接到“注意控制端”。工作时，“注意控制端”可以连接到其他神经元的轴突输出端，由所连接的其他神经元的兴奋活动进行调制，或者，直接在高电平与低电平状态中进行切换，也即直接使神经元模拟装置在信息记忆与反射处理的两种工作状态进行切换。当“注意控制端”没有输入控制信号时，神经元被切换在“反射”工作状态，按照上面所述的工作机制进行工作；而当“注意控制端”输入出现有效控制信号时，神经元被切换在“记忆”工作状态，通过阈值调节电路调低第二阈值触发电路的电压触发阈值使其低于第一阈值触发电路的触发阈值，这时当膜积分电路的输出信号在不断整合上升时，第二阈值触发电路将先于第一阈值触发电路而触发动作，使第二动作电位脉冲产生电路输出动作电位脉冲，既输出到轴突输出端，也同时反向输出到树突输入端，形成树突上的突触STDP可塑性所需要的锋电位信号。该技术方案用于准确模拟神经元爆发高触发阈值的动作电位的第二种产生原因，所述的“注意控制端”对第二阈值触发电路的设定电压阈值的调节，是模拟大脑进行“下意识记忆”(也即高度注意力)工作时，通过注意力控制通路的神经元的激活，对相关神经元的胞体或AIS近胞体段的细胞膜Na离子通道产生了接触传递(非突触传递)的调制作用，使其能够在胞体或AIS近胞体段爆发高触发阈值的动作电位，产生动作电位反向传输现象，从而产生突触STDP可塑性，实现对信息的记忆功能。现有技术由于对爆发高阈值动作电位的这一形成原因缺乏理论认识，所以没有相关模拟技术。Further, the neuron simulation device also has an "attention control terminal" for switching the working state of memory/reflex (for directly controlling and switching whether the neuron simulation device is in the reflex state or the memory state through external signals) work); the second threshold trigger circuit, with a threshold adjustment circuit, is used to lower the voltage trigger threshold of the second threshold trigger circuit, (making the trigger voltage V2 of the second threshold trigger circuit less than the first threshold trigger circuit The trigger voltage V1); the input control terminal of the threshold adjustment circuit is connected to the "attention control terminal". When working, the "attention control terminal" can be connected to the axonal output of other neurons, modulated by the excitatory activity of other connected neurons, or directly switched between high-level and low-level states, or That is, the neuron simulation device is directly switched between the two working states of information memory and reflex processing. When there is no control signal input to the "attention control terminal", the neuron is switched to the "reflex" working state and works according to the working mechanism described above; and when an effective control signal is input to the "attention control terminal", the neuron is switched to the "reflex" working state. Switch to the "memory" working state, and adjust the voltage trigger threshold of the second threshold trigger circuit to lower the trigger threshold of the first threshold trigger circuit through the threshold adjustment circuit. At this time, when the output signal of the membrane integration circuit is continuously integrated and rising , the second threshold trigger circuit will trigger the action before the first threshold trigger circuit, so that the second action potential pulse generating circuit outputs the action potential pulse, which is not only output to the axon output end, but also reversely output to the dendrite input end, Spike signals required for the formation of synaptic STDP plasticity on dendrites. This technical solution is used to accurately simulate the second cause of action potentials with high triggering thresholds of neurons bursting. When subconscious memory (that is, high attention) works, the activation of neurons in the attention control pathway produces contact transmission (non-synaptic transmission) to the cell body of the relevant neuron or the cell membrane Na ion channel of the AIS proximal cell body segment. The modulation effect of AIS enables it to burst action potentials with a high trigger threshold in the cell body or the AIS near the cell body segment, resulting in the phenomenon of reverse transmission of action potentials, thereby generating synaptic STDP plasticity and realizing the memory function of information. Due to the lack of theoretical understanding of the formation of the burst high-threshold action potential in the prior art, there is no relevant simulation technology.
作为进一步改进，所述的“注意控制端”，还带有一个工作状态的延迟保持电路，用于使工作状态保持一定时间。该改进用于模拟注意力控制通路的神经元，对信息处理通路的神经元的Na离子通道的调制作用，具有一定时间的保持效应，更符合大脑的工作情况。As a further improvement, the "attention control terminal" also has a delay holding circuit in the working state, which is used to keep the working state for a certain period of time. The improvement is used to simulate the neurons of the attention control pathway, and has a certain time retention effect on the modulation of the Na ion channels of the neurons of the information processing pathway, which is more in line with the working conditions of the brain.
相应的，本发明的第一种神经元的模拟方法，包括：Correspondingly, the first neuron simulation method of the present invention includes:
⑴、对树突输入端输入的信号进行积分；(即对应于模拟装置的积分电路对树突输入端的输入信号进行积分)；⑵、检测积分后的电压信号，(相当于采用两个阈值触发电路来检测积分电路的输出端)；⑶、如果该电压信号小于设定值1，则神经元不产生动作，(相当于积分电路的输出电压小于第一阈值触发电路的触发电压V1也即设定值1)；如果该电压信号等于或大于设定值1但其上升斜率小于设定值2，(上升斜率k＝dv/dt，设定值2等于V2/T，其中V2为第二阈值触发电路的触发电压，T为第一阈值触发电路输入端所加的信号延迟电路的信号延迟时间，一般T为膜积分电路的积分设定时间的5％至25％。这种情况相当于积分电路的输出电压大于第一阈值触发电路的触发电压V1，但在设定时间T也即信号延迟电路的信号延迟时间之内无法达到或超过第二阈值触发电路的触发电压V2)，则触发产生一个动作电位脉冲，输出到轴突输出端，(相当于第一阈值触发电路触发产生动作电位而第二阈值触发电路没有触发)，同时将积分输出的电压信号值清零；如果该电压信号等于或大于设定值1且其上升斜率等于或大于设定值2，(相当于积分电路的输出电压大于第一阈值触发电路的触发电压V1，且在设定时间T之内达到或超过第二阈值触发电路的触发电压V2)，则触发产生一个动作电位脉冲，既输出到轴突输出端又同时反向输出到树突输入端，(相当于第二阈值触发电路触发产生动作电位，既输送到轴突输出端又同时通过反向传输通道输送到轴突输入端)，同时将积分输出的电压信号值清零。⑴. Integrate the signal input at the dendrite input end; (that is, the integrating circuit corresponding to the analog device integrates the input signal at the dendrite input end); ⑵. Detect the integrated voltage signal, (equivalent to using two thresholds to trigger (3) If the voltage signal is less than the set
进一步，本发明的神经元模拟方法还通过一个“注意控制端”的信号状态来切换记忆和反射两种不同工作状态，(用于通过外部控制信号来控制切换神经元模拟装置是以反射状态还是以记忆状态进行工作)；当“注意控制端”信号状态为“反射”状态时，神经元按前述模拟方法进行工作；当“注意控制端”信号状态为“记忆”状态时，则将上述第⑶步改为：如果该电压信号小于设定值1，则神经元不产生动作；如果该电压信号等于或大于设定值1，则触发产生动作电位脉冲，既输出到轴突输出端又同时反向输出到树突输入端，(相当于“注意控制端”通过阈值调节电路调低第二阈值触发电路的触发电压V2，使V2等于或略小于V1，这时当积分电压达到V1时，第二阈值触发电路便已经触发产生动作电位，既输送到轴突输出端又同时通过反向传输通道输送到轴突输入端)，同时将积分输出的电压信号值清零。Further, the neuron simulation method of the present invention also switches the two different working states of memory and reflection through the signal state of an "attention control terminal", (used to control whether the neuron simulation device is in the reflex state or the reflex state through an external control signal. work in the memory state); when the signal state of the “attention control terminal” is the “reflex” state, the neuron works according to the aforementioned simulation method; when the signal state of the “attention control terminal” is the “memory” state, the above-mentioned No. (3) The step is changed to: if the voltage signal is less than the set
图6是一种采用单片机来实现图5所示的神经元模拟装置的具体电路。其中R601、C601构成对树突输入端输入信号的膜积分电路，C601是膜积分电容；MCU601是单片机，其中I/O1是第一阈值触发电路的输入端，R602、C602构成其输入的延迟电路，I/O3是第一动作电位脉冲产生电路的输出端；I/O2是第二阈值触发电路的输入端，I/O4是第二动作电位脉冲产生电路的输出端；三极管T601构成膜放电电路，导通时对C601进行放电；T602、T603构成动作电位的输出电路；T604、T605接受I/O4的输出，放大后反向输出到树突输入端；C603、R603构成“注意控制端”输入信号的延迟保持电路，并输入到I/O5，当输入达到一定电平幅度(有效)时，通过里面的阈值调节电路对第二阈值触发电路的触发阈值进行调整。MCU601通过其程序，根据图5的神经元模拟装置的工作原理及本发明的神经元模拟方法，来实现其阈值触发和动作电位的产生和逻辑功能，这属于该领域技术人员无需创造性便可实现的技术。为了附图简洁，图6也没有标出单片机的其他必要的但属于常规技术的外围电路。FIG. 6 is a specific circuit for realizing the neuron simulation device shown in FIG. 5 by using a single-chip microcomputer. Among them, R601 and C601 constitute a membrane integration circuit for the input signal of the dendrite input terminal, and C601 is a membrane integration capacitor; MCU601 is a single-chip microcomputer, wherein I/O1 is the input terminal of the first threshold trigger circuit, and R602 and C602 constitute its input delay circuit. , I/O3 is the output end of the first action potential pulse generating circuit; I/O2 is the input end of the second threshold trigger circuit, I/O4 is the output end of the second action potential pulse generating circuit; the triode T601 constitutes the membrane discharge circuit , discharge C601 when it is turned on; T602 and T603 form the output circuit of the action potential; T604 and T605 accept the output of I/O4, and then reverse the output to the dendrite input after amplifying; C603 and R603 form the "attention control terminal" input The delay and hold circuit of the signal is input to I/O5. When the input reaches a certain level amplitude (valid), the trigger threshold of the second threshold trigger circuit is adjusted by the threshold adjustment circuit inside. Through its program, MCU601 realizes its threshold triggering and action potential generation and logic functions according to the working principle of the neuron simulation device in FIG. 5 and the neuron simulation method of the present invention, which belongs to those skilled in the art without creativity. Technology. For the sake of brevity of the drawings, Fig. 6 also does not indicate other necessary peripheral circuits of the single-chip microcomputer but belonging to the conventional technology.
图7是实现图5的神经元模拟装置的另一种电路原理图，该电路无需采用单片机。其中其中R701、C701构成对树突输入端输入信号的膜积分电路，C701是膜积分电容；R702、C702构成输入的延迟电路；IC701、IC702(电压比较器)构成第一和第二阈值触发电路；T703、IC703(555时基电路)和T704、IC704构成第一和第二动作电位脉冲产生电路；T705、T706构成动作电位脉冲的输出电路；T701构成膜放电电路；C703、R703构成“注意控制端”输入信号的延迟保持电路，有输入信号时通过T702导通拉低第二阈值触发电路即IC702的反相输入端基准电压的电压值，也即拉低IC2的触发阈值。FIG. 7 is another circuit schematic diagram for realizing the neuron simulation device of FIG. 5 , and the circuit does not need to use a single-chip microcomputer. Among them, R701 and C701 constitute a membrane integration circuit for the input signal of the dendrite input terminal, C701 is a membrane integration capacitor; R702 and C702 constitute an input delay circuit; IC701 and IC702 (voltage comparator) constitute the first and second threshold trigger circuits ;T703, IC703 (555 time base circuit) and T704, IC704 constitute the first and second action potential pulse generating circuit; T705, T706 constitute the output circuit of action potential pulse; T701 constitute the membrane discharge circuit; C703, R703 constitute the "attention control" The delay hold circuit of the input signal at the "terminal", when there is an input signal, the second threshold trigger circuit, that is, the voltage value of the reference voltage of the inverting input terminal of IC702, is pulled down through the conduction of T702, that is, the trigger threshold of IC2 is pulled down.
图8是本发明的第二种神经元模拟装置的电路方框图。该神经元模拟装置同样包括有树突输入端(用于模拟树突)、信号处理模块(用于模拟神经元对信号进行整合和处理的部分)、和轴突输出端(用于模拟轴突)；作为现有技术，信号处理模块包括有膜积分电路(用于模拟对膜输入兴奋电位整合的过程)、膜放电电路(用于模拟动作电位触发后膜电位的去极化并形成不应期的动作)、阈值触发电路电路(用于模拟膜电位的兴奋整合达到阈值时神经元触发动作电位的动作，为了区分，在本发明中称其为第一阈值触发电路，其触发阈值为V1)、和第一动作电位脉冲产生电路(用于模拟动作电位的输出脉冲)，一般还包括有动作电位的输出电路，用于隔离放大脉冲产生电路所产生的动作电位脉冲；其具体的连接关系是：树突输入端连接到膜积分电路的输入端，膜积分电路的输出端连接到第一阈值触发电路的输入端，第一阈值触发电路的输出端连接到第一动作电位脉冲产生电路的输入端；第一动作电位脉冲产生电路的输出端连接轴突输出端；第一动作电位脉冲产生电路的输出端同时连接到膜放电电路；本发明的技术特征在于：所述的神经元模拟装置还带有动作电位反向传输通道；第一动作电位脉冲产生电路的输出端，通过该反向传输通道连接到树突输入端；反向传输通道的通断受到一个反向传输控制电路的控制；反向传输控制电路的控制输入端，连接到一个用于切换记忆/反射工作状态的“注意控制端”。Fig. 8 is a circuit block diagram of the second neuron simulation device of the present invention. The neuron simulation device also includes a dendrite input terminal (for simulating dendrites), a signal processing module (for simulating the part of neurons that integrate and process signals), and an axon output terminal (for simulating axons) ); as the prior art, the signal processing module includes a membrane integration circuit (for simulating the process of integrating the excitatory potential input to the membrane), a membrane discharge circuit (for simulating the depolarization of the membrane potential after the action potential is triggered and forming a period action), threshold trigger circuit (used to simulate the action of neurons triggering action potential when the excitation integration of membrane potential reaches the threshold, in order to distinguish, it is called the first threshold trigger circuit in the present invention, and its trigger threshold is V1 ), and the first action potential pulse generating circuit (used for simulating the output pulse of the action potential), generally also including an output circuit with an action potential for isolating the action potential pulse generated by the amplifying pulse generating circuit; its specific connection relationship Yes: the dendrite input is connected to the input of the membrane integrating circuit, the output of the membrane integrating circuit is connected to the input of the first threshold trigger circuit, and the output of the first threshold trigger circuit is connected to the first action potential pulse generating circuit. input end; the output end of the first action potential pulse generating circuit is connected to the axon output end; the output end of the first action potential pulse generating circuit is connected to the membrane discharge circuit at the same time; the technical feature of the present invention is: the neuron simulation device It also has an action potential reverse transmission channel; the output terminal of the first action potential pulse generating circuit is connected to the dendrite input terminal through the reverse transmission channel; the on-off of the reverse transmission channel is controlled by a reverse transmission control circuit ; The control input terminal of the reverse transmission control circuit is connected to an "attention control terminal" for switching the working state of memory/reflection.
该神经元模拟装置的工作，是采用“注意控制端”直接对神经元模拟装置在信息记忆和反射处理两种工作状态之间进行切换控制，也即是当“注意控制端”输入有效，即处于“记忆”状态时，通过直接打开反向传输控制电路，使得当神经元爆发动作电位时，动作电位能够同时通过反向传输通道向树突端进行反向传输，从而使连接在树突上的突触装置能够产生突触STDP可塑性，以实现对信息的记忆功能。而当“注意控制端”处于“反射”状态时，关闭反向传输控制电路，动作电位只向轴突输出而没有反向传输，从而只产生对输入信号的整合和反射功能而没有记忆功能。The work of the neuron simulation device is to use the "attention control terminal" to directly switch the neuron simulation device between the two working states of information memory and reflex processing, that is, when the "attention control terminal" input is valid, that is When in the "memory" state, by directly opening the reverse transmission control circuit, when the neuron bursts action potential, the action potential can be reversely transmitted to the dendrite end through the reverse transmission channel at the same time, so that the neurons connected to the dendrite can be reversed. The synaptic apparatus can generate synaptic STDP plasticity to realize the memory function of information. When the "attention control terminal" is in the "reflex" state, the reverse transmission control circuit is turned off, and the action potential is only output to the axon without reverse transmission, so that only the integration of the input signal and the reflection function are generated without the memory function.
作为优化，在“注意控制端”与反向传输控制电路的控制输入端之间，还设置有一个工作状态的延迟保持电路，用于使工作状态保持一定时间。该方案用于模拟注意力控制通路的神经元，对信息处理通路神经元的Na离子通道的调制作用，具有一定时间的保持效应。As an optimization, between the "attention control terminal" and the control input terminal of the reverse transmission control circuit, a delay holding circuit of the working state is also set to keep the working state for a certain period of time. This scheme is used to simulate the neurons of the attention control pathway, and has a certain time retention effect on the modulation of Na ion channels of the neurons of the information processing pathway.
上述第二种神经元模拟装置，是通过注意控制端来直接控制神经元的动作电位反向传输通道，是模拟神经元第二种产生动作电位反向传输的情况，即大脑通过“下意识记忆”(高度注意力)来实现记忆动作。当然在这一基础上，也可以再同时模拟神经元另一种产生动作电位反向传输的情况，即树突输入的兴奋信号非常强烈时，直接导致神经元爆发高触发阈值的动作电位，并向胞体和树突反向传输。要模拟这种工作情况，可以使神经元模拟装置再包括有一个第二阈值触发电路，第二阈值触发电路的输入端连接到膜积分电路的输出端，第二阈值触发电路的输出端连接到反向传输控制电路的控制输入端。第二阈值触发电路用于模拟胞体或ISA近胞体段所爆发的高阈值动作电位，所以第二阈值触发电路设定的触发阈值V2大于第一阈值触发电路设定的触发阈值V1。一般V2比V1大10％至35％较为合适。The above-mentioned second neuron simulation device directly controls the action potential reverse transmission channel of the neuron by paying attention to the control terminal, which simulates the second situation of the neuron generating the reverse transmission of action potential, that is, the brain uses "subconscious memory". (high attention) to achieve memory actions. Of course, on this basis, it is also possible to simulate another situation in which neurons generate reverse transmission of action potentials, that is, when the excitation signal input from dendrites is very strong, it directly causes neurons to burst action potentials with a high trigger threshold, and Backward transport to the soma and dendrites. To simulate this working situation, the neuron simulation device can further include a second threshold trigger circuit, the input terminal of the second threshold trigger circuit is connected to the output terminal of the membrane integration circuit, and the output terminal of the second threshold trigger circuit is connected to Control input of the reverse transmission control circuit. The second threshold trigger circuit is used to simulate the high-threshold action potential burst in the cell body or near the cell body of the ISA, so the trigger threshold V2 set by the second threshold trigger circuit is greater than the trigger threshold V1 set by the first threshold trigger circuit. Generally, V2 is 10% to 35% larger than V1.
同样的，作为上述方案的一种优化，在这种情况下，最好在第一阈值触发电路的输入端与膜积分电路的输出端之间，设置有一个信号延迟电路。该方案用于模拟从树突输入的兴奋信号传递到轴突的AIS远段的一段短暂的时间延迟，其技术效果和意义上面已有叙述。Likewise, as an optimization of the above solution, in this case, it is better to set a signal delay circuit between the input end of the first threshold trigger circuit and the output end of the membrane integrating circuit. This scheme is used to simulate a short time delay in the transmission of excitatory signals from dendrites to the distal AIS segment of the axon, and its technical effect and significance have been described above.
作为另一种优化，在第二阈值触发电路的输出端与反向传输控制电路的控制输入端之间，还设置有一个触发延时保持电路。其工作是：当第二阈值触发电路的输出端产生输出信号时，触发延时保持电路被触发输出控制信号、并且使输出信号保持一定延时时间，从而通过输出信号使反向传输控制电路打开导通并在一定时间内保持导通状态。触发延时保持电路的触发延时时间应该略大于动作电位脉冲电路产生的动作电位的脉冲宽度，以便使动作电位脉冲的反向传输过程，更完整可靠。As another optimization, between the output end of the second threshold trigger circuit and the control input end of the reverse transmission control circuit, a trigger delay hold circuit is further arranged. Its work is: when the output terminal of the second threshold trigger circuit generates an output signal, the trigger delay holding circuit is triggered to output the control signal, and the output signal is kept for a certain delay time, so that the reverse transmission control circuit is turned on through the output signal. turn on and remain on for a certain period of time. The trigger delay time of the trigger delay holding circuit should be slightly larger than the pulse width of the action potential generated by the action potential pulse circuit, so as to make the reverse transmission process of the action potential pulse more complete and reliable.
相应地，本发明的第二种神经元模拟方法，包括：Correspondingly, the second neuron simulation method of the present invention includes:
⑴、对树突输入端输入的信号进行积分；(即对应于模拟装置的积分电路对树突输入端的输入信号进行积分)；⑵、检测积分后的输出电压信号，(相当于第一阈值触发电路检测积分电路的输出端信号)，如果该电压信号小于设定值1，则不产生动作，(相当于积分电路的输出电压小于第一阈值触发电路的触发电压V1，这时第一阈值触发电路没有触发动作)；⑶、如果积分后的电压信号大于设定值1，(相当于积分电路的输出电压大于第一阈值触发电路的触发电压V1)，则检测“注意控制端”的信号状态；(1) Integrate the signal input at the dendrite input end; (that is, the integrating circuit corresponding to the analog device integrates the input signal at the dendrite input end); (2) Detect the integrated output voltage signal, (equivalent to the first threshold triggering The circuit detects the output terminal signal of the integrating circuit), if the voltage signal is less than the set
如果“注意控制端”信号状态为“反射”状态(比如为低电平0)，则神经元以“反射”方式进行工作，神经元触发产生一个动作电位脉冲，输出到轴突输出端，(相当于第一阈值触发电路触发，第一动作电位脉冲电路产生动作电位，并传送到轴突输出端)，同时将积分后的电压信号值清零；(相当于膜放电电路动作，将膜积分电路的电容放电)；If the signal state of the "attention control terminal" is a "reflex" state (such as a low level 0), the neuron works in a "reflex" manner, and the neuron triggers to generate an action potential pulse, which is output to the axon output terminal, ( Equivalent to the triggering of the first threshold trigger circuit, the first action potential pulse circuit generates an action potential and transmits it to the axon output), and at the same time clears the integrated voltage signal value; (equivalent to the action of the membrane discharge circuit, the membrane is integrated capacitor discharge of the circuit);
如果“注意控制端”信号状态为“记忆”状态(比如高电平1)，则神经元以“记忆”方式工作，(相当于反向传输控制电路打开导通)，神经元触发产生一个动作电位脉冲，既输出到轴突输出端，又反向输出到树突输入端；(相当于第一阈值触发电路触发，第一动作电位脉冲产生电路产生动作电位，既传送到轴突输出端，又同时通过反向传输电路传送到树突输入端)，同时将积分后的电压信号值清零；(相当于膜放电电路动作，将膜积分电路电容放电)。If the signal state of the "attention control terminal" is a "memory" state (such as a high level 1), the neuron works in a "memory" mode (equivalent to the reverse transmission control circuit being turned on), and the neuron triggers an action The potential pulse is output to the axon output terminal and reversely output to the dendrite input terminal; (equivalent to the triggering of the first threshold trigger circuit, the first action potential pulse generating circuit generates an action potential, which is transmitted to the axon output terminal, At the same time, it is transmitted to the dendrite input terminal through the reverse transmission circuit), and the integrated voltage signal value is cleared at the same time; (equivalent to the action of the membrane discharge circuit, the capacitor of the membrane integration circuit is discharged).
同样的作为一种优化，所述的“注意控制端”，还带有一个工作状态的延迟保持电路，用于使工作状态保持一定时间，这时将检测“注意控制端”的信号状态改为检测延迟保持电路的输出端的状态。该改进用于模拟注意力控制通路的神经元，对信息处理通路的神经元的Na离子通道的调制作用，具有一定时间的保持效应。Similarly, as an optimization, the "attention control terminal" also has a working state delay hold circuit, which is used to keep the working state for a certain period of time. At this time, the signal state of the detection "attention control terminal" is changed to The state of the output terminal of the delay hold circuit is detected. The improvement is used to simulate the neurons of the attention control pathway, and has a certain time retention effect on the modulation of the Na ion channels of the neurons of the information processing pathway.
上述第二种神经元模拟方法，是通过“注意控制端”来直接控制切换神经元的工作方式，是模拟神经元的第二种产生动作电位反向传输的情况，即大脑通过“下意识记忆”(也即高度注意力)来实现记忆动作。在这一基础上，也可以再同时模拟神经元另一种产生动作电位反向传输的情况，即树突输入的兴奋信号非常强烈时，直接导致神经元爆发高触发阈值的动作电位，并向胞体和树突反向传输。这时其模拟方法还进一步包括：The above-mentioned second neuron simulation method is to directly control the working mode of switching neurons through the "attention control terminal", which is the second case of simulating the reverse transmission of action potentials of neurons, that is, the brain uses "subconscious memory". (that is, high attention) to achieve the memory action. On this basis, it is also possible to simulate another situation in which neurons generate reverse transmission of action potentials at the same time, that is, when the excitatory signal input from dendrites is very strong, it directly causes neurons to burst action potentials with a high triggering threshold, and send them to the neurons. Soma and dendrite backtransport. At this time, its simulation method further includes:
⑷、检测积分后的电压信号，如果该电压信号在大于设定值1的同时其电压上升斜率还大于设定值2，(电压上升斜率k＝dv/dt，设定值2等于V2/T，其中V2为第二阈值触发电路的触发阈值，T为第一阈值触发电路输入端所加的信号延迟电路的信号延迟时间。这种情况相当于积分电路的输出电压大于第一阈值触发电路的触发电压V1，且在设定时间T之内达到或超过第二阈值触发电路的触发电压V2)，则使神经元以“记忆”方式进行工作，(相当于第二阈值触发电路输出触发信号，使反向传输控制电路打开导通)，神经元触发产生一个动作电位脉冲，既输出到轴突输出端，又反向输出到树突输入端；(相当于第一动作电位脉冲电路产生动作电位，既传送到轴突输出端，又同时通过反向传输电路传送到树突输入端)，同时将积分后的电压信号值清零；(相当于膜放电电路动作，将膜积分电路的电容放电)。4. Detect the integrated voltage signal, if the voltage signal is greater than the set
图9是一种采用单片机来实现图8所示的神经元模拟装置的具体电路。其中R901、C901构成对树突输入端输入信号的膜积分电路，C901是膜积分电容；MCU901是单片机，其中I/O1是第一阈值触发电路的输入端，R902、C902构成其输入的延迟电路，I/O3是第一动作电位脉冲产生电路的输出端；I/O2是第二阈值触发电路的输入端，I/O4是触发延时保持电路的输出端；T901构成膜放电电路；T905、T906构成动作电位脉冲的输出电路；C903、R903构成“注意控制端”输入信号的延迟保持电路；T904构成反向传输控制电路，用于对来自输出电路的反向传输通道的动作电位信号进行开关控制；T902接受“注意控制端”的控制、T903接受I/O4的输出控制，并同时控制T904的通断。FIG. 9 is a specific circuit for implementing the neuron simulation device shown in FIG. 8 by using a single-chip microcomputer. Among them, R901 and C901 constitute a membrane integration circuit for the input signal of the dendrite input terminal, and C901 is a membrane integration capacitor; MCU901 is a single-chip microcomputer, wherein I/O1 is the input terminal of the first threshold trigger circuit, and R902 and C902 constitute its input delay circuit. , I/O3 is the output end of the first action potential pulse generating circuit; I/O2 is the input end of the second threshold trigger circuit, I/O4 is the output end of the trigger delay hold circuit; T901 constitutes a membrane discharge circuit; T905, T906 constitutes the output circuit of the action potential pulse; C903 and R903 constitute the delay hold circuit for the input signal of the "attention control terminal"; T904 constitutes the reverse transmission control circuit, which is used to switch the action potential signal from the reverse transmission channel of the output circuit Control; T902 accepts the control of the "attention control terminal", T903 accepts the output control of I/O4, and controls the on-off of T904 at the same time.
图10是实现图8模拟装置的另一种电路原理图，该电路无需采用单片机。其中R101、C101构成膜积分电路；R102、C102构成输入的延迟电路；IC101、IC102(电压比较器)构成第一和第二阈值触发电路；T103、IC103(555时基电路)构成第一动作电位脉冲产生电路；T104、IC104构成触发延时保持电路；T105、T106构成动作电位脉冲的输出电路；T101构成膜放电电路；T107构成反向传输控制电路；C103、R103构成“注意控制端”输入信号的延迟保持电路，有信号输入时通过T102使T107导通。T102同时也受IC104的控制，当其有输出时，同样通过T102使T107导通，打开动作电位的反向传输通道。Fig. 10 is another circuit schematic diagram for realizing the simulation device of Fig. 8, and the circuit does not need to use a single-chip microcomputer. Among them, R101 and C101 constitute the membrane integrating circuit; R102 and C102 constitute the input delay circuit; IC101 and IC102 (voltage comparator) constitute the first and second threshold trigger circuits; T103 and IC103 (555 time base circuit) constitute the first action potential Pulse generating circuit; T104, IC104 constitute trigger delay holding circuit; T105, T106 constitute the output circuit of action potential pulse; T101 constitute membrane discharge circuit; T107 constitute reverse transmission control circuit; C103, R103 constitute the input signal of "attention control terminal" The delay hold circuit, when there is a signal input, turns on T107 through T102. T102 is also controlled by IC104 at the same time. When it has output, T107 is also turned on through T102 to open the reverse transmission channel of action potential.
而作为对本发明的上述的两种神经元的模拟装置或模拟方法的进一步改进，所述神经元模拟装置都还带有调制性突触输入电路及调制性突触输入端；调制性突触输入端连接到调制性突触输入电路的输入端，调制性突触输入电路的输出端连接到膜积分电路的输出端。所述调制性突触输入电路包括两方面：增强性突触输入电路及其增强性突触输入端，抑制性突触输入电路及其抑制性突触输入端。这些调制性输入电路使得神经元模拟装置除了具有用于兴奋性信号输入用的树突输入端，还具有用于对信息处理进行调制作用的“轴突—轴突”型突触输入功能。注意本发明的调制性输入信号并非接在膜积分电路的输入端，所以它不像树突输入的兴奋性信号一样直接参与膜电位的整合并能够直接触发动作电位，而是接在膜积分电路的输出端，形成一个调制电压对膜积分输出电压进行增强或抑制，通过对膜积分输出电压的影响，来对从树突输入和整合的兴奋信号能否触发动作电位进行调制。这一功能有利于构建多通道多信息互相调制的复杂神经网络，以模拟经验或情绪(快乐、恐惧、犒赏、成瘾等)对神经元信息处理的影响。As a further improvement to the above two neuron simulation devices or simulation methods of the present invention, the neuron simulation devices also have a modulated synaptic input circuit and a modulated synaptic input terminal; the modulated synaptic input The terminal is connected to the input terminal of the modulating synaptic input circuit, and the output terminal of the modulating synaptic input circuit is connected to the output terminal of the membrane integrating circuit. The modulating synaptic input circuit includes two aspects: a reinforcing synaptic input circuit and its reinforcing synaptic input terminal, and an inhibitory synaptic input circuit and its inhibitory synaptic input terminal. These modulating input circuits enable neuron simulation devices to have "axon-axon" type synaptic input functions for modulating information processing in addition to dendritic input terminals for excitatory signal input. Note that the modulating input signal of the present invention is not connected to the input end of the membrane integrator circuit, so it does not directly participate in the integration of the membrane potential like the excitatory signal input by the dendrite and can directly trigger the action potential, but is connected to the membrane integrator circuit. The output terminal of the dendritic cell forms a modulation voltage to enhance or inhibit the integral output voltage of the membrane, and through the influence of the integral output voltage of the membrane, it can modulate whether the excitatory signal input and integrated from the dendrite can trigger the action potential. This function is beneficial to build a complex neural network with multi-channel and multi-information mutual modulation to simulate the influence of experience or emotion (happiness, fear, reward, addiction, etc.) on neuronal information processing.
图11是调制性输入电路的电路原理图。电路只画出增加的调制电路部分，即这一部分是可增加到图6、图7、图9或图10的神经元模拟装置的电路上的，其中膜积分电容CX也即各个电路的膜积分电路中的积分电容，如图6的C601。增强性调制输入端的信号经过电阻分压后输入到反向器F111(数字门电路)的输入端，当输入信号有效时，反向器F112正输出，通过电阻R111和R112分压后，通过D111向电容C111充电，使电容两端达到一定电压(一般可为第一阈值触发电路触发电压的三分之一至二分之一)，该电压一方面通过R113泄放(泄放时间也即大约等于调制的有效时间)，一方面通过R114和D112加到膜积分电容CX上，使膜积分电容具有一定的初始电压；而在膜积分电容的电压超过初始电压时，由于二极管D112的单向作用又不会对膜积分电容的电压产生影响。这样，当其树突输入端输入脉冲信号时，膜积分电容上的电压更容易达到阈值触发电路的触发电压，所以更容易触发产生动作电位，也即实现了增强性调制的目的。抑制性调制的工作类似，只是电容C112上产生的较低的电压，由于D114的反向作用并不会给膜积分电容产生初始电压，而在膜积分电容的电压较高时，反而通过D114和R118形成分流，使膜积分电容的电压不容易达到触发电压，阈值触发电路不容易触发，达到抑制性调制的目的。Figure 11 is a circuit schematic diagram of a modulating input circuit. The circuit only shows the added modulation circuit part, that is, this part can be added to the circuit of the neuron simulation device in Figure 6, Figure 7, Figure 9 or Figure 10, where the membrane integral capacitor CX is the membrane integral of each circuit. The integrating capacitor in the circuit, such as C601 in Figure 6. The signal of the enhanced modulation input end is divided by the resistor and input to the input end of the inverter F111 (digital gate circuit). When the input signal is valid, the inverter F112 is outputting positive output. Charge the capacitor C111 to make the two ends of the capacitor reach a certain voltage (generally one-third to one-half of the trigger voltage of the first threshold trigger circuit). On the one hand, this voltage is discharged through R113 (the discharge time is about is equal to the effective time of modulation), on the one hand, it is added to the film integral capacitor CX through R114 and D112, so that the film integral capacitor has a certain initial voltage; when the voltage of the film integral capacitor exceeds the initial voltage, due to the unidirectional action of the diode D112 It will not affect the voltage of the membrane integral capacitor. In this way, when a pulse signal is input to the dendrite input, the voltage on the membrane integral capacitor is more likely to reach the trigger voltage of the threshold trigger circuit, so it is easier to trigger to generate an action potential, that is, the purpose of enhanced modulation is achieved. The work of the inhibitory modulation is similar, except that the lower voltage generated on the capacitor C112, due to the reverse action of D114, does not generate an initial voltage for the membrane integration capacitor, but when the voltage of the membrane integration capacitor is higher, it passes through D114 and D114. R118 forms a shunt, so that the voltage of the membrane integral capacitor is not easy to reach the trigger voltage, and the threshold trigger circuit is not easy to trigger, so as to achieve the purpose of inhibitory modulation.
配合本发明工作的突触模拟装置，可采用现有技术中能够充分模拟化学突触的工作特征的各种模拟装置，也可采用本发明以下所公开的突触模拟技术。The synapse simulation device that cooperates with the present invention can use various simulation devices in the prior art that can fully simulate the working characteristics of chemical synapses, and can also use the synapse simulation technology disclosed in the present invention below.
申请人研究分析，在大脑神经网络中，至少存在三种不同类型的神经突触：第一种属于比较稳定的突触，其传递效能只具有短时程突触可塑性，包括突触易化(synapticfacilitation)、突触抑制(synaptic depression)、强直后增强(posttetanicpotentiation，即PTP)现象，但没有体现出长时程突触可塑性，(或者说它也能够实现突触可塑性，但在当前的工作状态下没有体现突触可塑性)，它们存在于各种信号的传入、输出和其他直接且稳定的信号传递通路中(比如在非条件反射回路)，传递效能较强而且稳定，当突触前神经元激活时，往往能够通过强有效的传递效能使突触后神经元触发产生动作电位，(有些还可以是单突触传递，即单个突触的传递信号便足以激活突触后神经元)，本发明这里称之为“稳定突触”。第二种是具有明显的长时程突触可塑性，包括长时程增强(long-term potentiation，即LTP)现象和长时程抑制(long-term depression，即LTD)现象，根据目前的研究，突触长时程可塑性具有突触前膜与突触后面的锋电位的时序依赖特性，(Spike Timing-Dependent Plasticity，即STDP)。这类突触广泛存在于海马、纹状体、杏仁核和部分脑皮层中，对于实现信息的学习和长时程记忆具有重要意义，目前针对这一类突触所公开的模拟技术最多，本发明这里将其称为“可塑性突触”。第三种突触一直没有得到认识和充分重视，所以也没有相关的模拟技术。这类突触是虽然已经生成具备突触的生理形态，但暂时还没有具备正常的突触传递效能，需要经过突触前后神经元的多次关联刺激后才能启动和形成有效的突触传递效能，(这其中应该还需要启动基因转录和蛋白质合成)，它们至少是存在于脑皮层尤其是存在于处理高级信息的新皮层上，对于实现陈述性信息的长期记忆具有重要意义。而且，申请人进一步从信息记忆的宏观表征推测，即使是已经启动和形成有效的突触传递效能，如果长时间没有得到刺激，(没有在思维中使用或没有再次记忆)，这些突触仍可能由于其他突触的竞争而损失某些突触物质(比如蛋白质)，导致突触再次失效。本发明将这第三种突触称为“预置性突触”。关于这三种突触，尤其是其中“可塑性突触”和“预置性突触”在记忆、长时程记忆和永久记忆中的不同作用和互相转化，可参考后面“三、工作记忆、长时程记忆(海马记忆)和长期(永久)记忆的不同和转化”部分的内容。The applicant's research and analysis show that there are at least three different types of synapses in the neural network of the brain: the first type is a relatively stable synapse, and its transmission efficiency only has short-term synaptic plasticity, including synaptic facilitation ( synapticfacilitation), synaptic depression, and posttetanicpotentiation (PTP), but not long-term synaptic plasticity, (or it can also achieve synaptic plasticity, but in the current working state Synaptic plasticity is not reflected under the condition), they exist in the input, output and other direct and stable signal transmission pathways of various signals (such as in the unconditioned reflex circuit), the transmission efficiency is strong and stable, when the presynaptic nerve When the neuron is activated, it can often trigger postsynaptic neurons to generate action potentials through strong and effective transmission efficiency (some can also be monosynaptic transmission, that is, the transmission signal of a single synapse is enough to activate postsynaptic neurons), The present invention is referred to herein as "stabilizing synapses". The second type has obvious long-term synaptic plasticity, including the phenomenon of long-term potentiation (LTP) and long-term depression (LTD). According to the current study, Long-term synaptic plasticity has the timing-dependent characteristics of the presynaptic membrane and the post-synaptic spike (Spike Timing-Dependent Plasticity, or STDP). This type of synapse widely exists in the hippocampus, striatum, amygdala and part of the cerebral cortex, and is of great significance for the realization of information learning and long-term memory. At present, there are the most published simulation techniques for this type of synapse. The invention refers to this as the "plastic synapse". The third type of synapse has not been recognized and fully valued, so there is no related simulation technology. Although this type of synapse has a physiological form with synapses, it does not have normal synaptic transmission efficiency for the time being. It needs to be stimulated multiple times by neurons before and after the synapse to initiate and form effective synaptic transmission efficiency. , (which should also need to initiate gene transcription and protein synthesis), they exist at least in the cerebral cortex, especially in the neocortex that processes high-level information, and are of great significance for realizing long-term memory of declarative information. Moreover, the applicant further speculates from the macroscopic representation of information memory that even if effective synaptic transmission efficiency has been initiated and formed, if it has not been stimulated for a long time (not used in thinking or not remembered again), these synapses may still be The loss of certain synaptic substances (such as proteins) due to competition from other synapses causes the synapses to fail again. The present invention refers to this third type of synapse as "preset synapse". For the different roles and mutual transformations of these three types of synapses, especially the "plastic synapses" and "preset synapses" in memory, long-term memory and permanent memory, please refer to "Three, Working Memory, Differences and transformations between long-term memory (hippocampal memory) and long-term (permanent) memory" section.
针对上述三种突触，本发明采用三种技术来实现这些突触的模拟。For the above three synapses, the present invention adopts three techniques to realize the simulation of these synapses.
本发明的“固化突触”模拟装置的电路如图12。“固化突触”模拟装置包括前膜输入端、后膜输出端，其特征在于；在前膜输入端与后膜输出端之间串接有一个电容放电电路，电容放电电路同时并接有一个电容泄放电路。以此构成最简单的具有固定突触传递效能的突触传递通道，也即没有具备突触可塑性的突触传递通道。作为一种最简单的方案，电容放电电路由一只放电电容C801构成，放电电容的前端连接前膜输入端，放电电容的后端通过一只传递电阻R801连接后膜输出端；电容泄放电路用于将放电电容的电荷进行缓慢泄放，所述的电容泄放电路包括一只泄放电阻R802、R803和二极管D801；泄放电阻R802连接在放电电容C801的前端与地(即电路的公共接地端)之间；二极管D801串接另一只电阻R803后反向接在放电电容的后端与地之间。二极管D802用于对输入进行单向隔离，使突触发生的信号变化不会对前膜输入端前面的其他电路造成影响。传递电阻R801用于设定该突触的传递效能的大小(权重)，在大脑不同的信息处理通道其突触传递效能是不同的，比如在信息的输入输出回路其突触的传递效能较大，甚至单突触单脉冲便足以使下一神经元产生动作电位爆发，而在中间神经元的突触传递效能较小，一般需要多个突触进行空间整合或单个突触进行时间整合才能引发下一神经元爆发动作电位。电阻801上反向并联一只二极管D803，D803用于给来自突触后膜输出端的动作电位脉冲提供一个反向给电容C801反向充电的特殊通路。改变电阻R802和R803可改变电容放电速度，也即改变突触对低频动作电位抑制现象的抑制程度。工作时，如果前膜输入端输入的是低频动作电位脉冲，由于电容C801的作用，每一个动作电位脉冲通过后，需要有一段时间让电容通过二极管和电阻构成的泄放电路进行放电，才能恢复。如果连续二个或几个低频脉冲，由于电容被充电而来不及放电，会对紧接的第二个脉冲呈现更大的阻抗，也即使突触传递对低频动作电位产生突触抑制的现象。如果前膜输入端输入的是高频尖脉冲，由于电容对高频脉冲的阻抗较小，所以影响较小。特别是如果高频动作电位能够引起突触后膜的神经元整合爆发具有高阈值的V1.2亚型动作电位，则由于动作电位会反向传递到突触后膜，通过二极管D803和R802使电容C801反向充电，从而使C801对下一个动作电位脉冲呈现明显增强的传递效能，也即是使突触传递对高频动作电位产生突触增强现象。The circuit of the "cured synapse" simulation device of the present invention is shown in Fig. 12 . The "cured synapse" simulation device includes an input terminal of the front membrane and an output terminal of the rear membrane. Capacitor bleeder circuit. This constitutes the simplest synaptic transmission channel with fixed synaptic transmission efficiency, that is, without synaptic plasticity. As the simplest solution, the capacitor discharge circuit is composed of a discharge capacitor C801. The front end of the discharge capacitor is connected to the input end of the front film, and the rear end of the discharge capacitor is connected to the output end of the back film through a transfer resistor R801; the capacitor discharge circuit It is used to slowly discharge the charge of the discharge capacitor. The capacitor discharge circuit includes a discharge resistor R802, R803 and a diode D801; the discharge resistor R802 is connected to the front end of the discharge capacitor C801 and the ground (ie the common circuit of the circuit). between the ground terminal); the diode D801 is connected in series with another resistor R803 and then reversely connected between the rear end of the discharge capacitor and the ground. Diode D802 is used for unidirectional isolation of the input, so that signal changes at the synapse will not affect other circuits in front of the anterior membrane input. The transmission resistance R801 is used to set the size (weight) of the transmission efficiency of the synapse. The synaptic transmission efficiency of different information processing channels in the brain is different. For example, in the input and output circuits of information, the synaptic transmission efficiency is larger. , even a single synapse single pulse is enough to generate an action potential burst in the next neuron, while the synaptic transmission efficiency in the interneuron is less, and generally requires multiple synapses for spatial integration or a single synapse for temporal integration to trigger The next neuron fires an action potential. A diode D803 is connected in reverse parallel to the resistor 801, and D803 is used to provide a special path for reverse charging the capacitor C801 for the action potential pulse from the output terminal of the postsynaptic membrane. Changing the resistances R802 and R803 can change the capacitance discharge rate, that is, the degree of inhibition of the synapse to the inhibition of low-frequency action potentials. During operation, if the input terminal of the anterior membrane is input with a low frequency action potential pulse, due to the action of the capacitor C801, after each action potential pulse passes through, it takes a period of time for the capacitor to discharge through the discharge circuit composed of diodes and resistors before it can be recovered. . If there are two or several low-frequency pulses in a row, because the capacitor is charged and cannot discharge in time, it will present a larger impedance to the next pulse, even if synaptic transmission produces synaptic inhibition on low-frequency action potentials. If the input terminal of the anterior membrane is a high-frequency spike, the impact of the capacitor is small because the impedance of the capacitor to the high-frequency pulse is small. In particular, if high frequency action potentials can cause neuronal integration of postsynaptic membrane bursts of V1.2 subtype action potentials with a high threshold, since the action potentials are transmitted in reverse to the postsynaptic membrane, the diodes D803 and R802 make the The capacitor C801 is reversely charged, so that C801 exhibits a significantly enhanced transmission efficiency to the next action potential pulse, that is, synaptic transmission produces synaptic enhancement to high-frequency action potentials.
本发明的“固化突触”模拟装置采用极其简单的电路来实现普通突触的突触传递功能，虽然对突触抑制和突触增强只是一种简单粗略的模拟，但具有电路极其简单，因而也有成本和体积极低的特点，可应用在模拟神经网络中的信号输入和输出通路，信号反馈通路等信号直接传导通路上，在模拟神经网络的规模较大时可明显节省成本。The "solidified synapse" simulation device of the present invention uses an extremely simple circuit to realize the synaptic transmission function of ordinary synapses. Although it is only a simple and rough simulation of synaptic inhibition and synaptic enhancement, the circuit is extremely simple, so It also has the characteristics of low cost and low volume, and can be applied to the signal input and output paths, signal feedback paths and other signal direct conduction paths in the analog neural network, which can significantly save costs when the scale of the analog neural network is large.
对于突触STDP可塑性，目前理论认为：突触可塑性的STDP特性，也即突触的传递效能，跟突触前后神经元的动作电位锋电位的时序相关，如图13，如果突触前神经元的锋电位Vpre产生的时间tpre早于突触后神经元的锋电位Vpost产生的时间tpost，也即△t＝(tpost－tpre)＞0，则产生突触传递长时程增强(long-term potentiation，即LTP)现象，而且锋电位的延迟即△t越小则突触传递增强LTP效应越大，(为了便于叙述，我们可把这种情况称为其锋电位信号具有LTP特征)；反之如果突触前神经元的锋电位慢于突触后神经元的锋电位，则产生突触传递长时程抑制(long-term depression，即LTD)现象，而且锋电位的延迟越小则突触传递减弱LTD效应越大，(为了便于叙述，我们可把这种情况称为其锋电位信号具有LTD特征)。锋电位信号的LTP特征和LTD特征，都属于突触传递的STDP可塑性。For synaptic STDP plasticity, the current theory holds that the STDP characteristic of synaptic plasticity, that is, the transmission efficiency of synapses, is related to the timing of action potential spikes of presynaptic neurons, as shown in Figure 13, if presynaptic neurons The time tpre of the spike Vpre is earlier than the time tpost of the spike Vpost of the postsynaptic neuron, that is, Δt=(tpost-tpre)>0, then the long-term potentiation of synaptic transmission occurs (long-term potentiation). potentiation, that is, LTP) phenomenon, and the smaller the delay of the spike, that is, the smaller the Δt, the greater the LTP effect of synaptic transmission enhancement, (for the convenience of description, we can call this situation that the spike signal has LTP characteristics); If the spike of the presynaptic neuron is slower than that of the postsynaptic neuron, the phenomenon of long-term depression (LTD) of synaptic transmission occurs, and the smaller the delay of the spike, the synaptic The greater the transmission weakens the LTD effect, (for ease of description, we can refer to this situation as its spike signal has LTD characteristics). Both the LTP and LTD characteristics of the spike signal belong to the STDP plasticity of synaptic transmission.
现有技术中具有可塑性的突触模拟装置已经公开有多种技术，包括最新采用记忆变阻材料来直接制造可塑性突触，这显然更方便。而采用电子电路来模拟可塑性突触的基本电路如图14，一般包括前膜输入端、后膜输出端、STDP时序识别电路、STDP运算电路和突触传递效能调整电路，STDP时序识别电路能够根据前膜输入端和后膜输出端所出现的锋电位信号，识别判断其锋电位信号是否具有STDP特征，且是属于其中的LTP特征还是属于LTD特征，这两种特征的信号，被输出到一个STDP运算电路进行加减累积，运算后的输出数值用于控制突触传递效能调整电路，通过传递效能调整电路对突触传递效能的数值(也即是突触输出信号的强弱)进行调整，以此实现对突触传递输出信号的可塑性改变，即实现突触可塑性。现有技术大多采用微处理器通过程序来实现上述包括STDP时序识别电路、STDP运算电路和突触传递效能调整电路的功能。而本发明公开另一种模拟方法和装置。Various technologies have been disclosed for plastic synapse simulation devices in the prior art, including the latest use of memristive materials to directly manufacture plastic synapses, which is obviously more convenient. The basic circuit that uses electronic circuits to simulate plastic synapses is shown in Figure 14, which generally includes anterior membrane input, posterior membrane output, STDP timing identification circuit, STDP arithmetic circuit and synaptic transmission efficiency adjustment circuit. STDP timing identification circuit can be based on The spike potential signals appearing at the input end of the anterior membrane and the output end of the posterior membrane are identified and judged whether the spike potential signal has the STDP feature, and whether it belongs to the LTP feature or the LTD feature. The signals of these two characteristics are output to a The STDP arithmetic circuit performs addition, subtraction and accumulation, and the calculated output value is used to control the synaptic transmission efficiency adjustment circuit. In this way, the plastic change of the synaptic transmission output signal is realized, that is, the synaptic plasticity is realized. In the prior art, microprocessors are mostly used to realize the above-mentioned functions including the STDP timing identification circuit, the STDP arithmetic circuit and the synaptic transmission efficiency adjustment circuit through programs. The present invention discloses another simulation method and device.
参考图15。本发明具有突触传递STDP可塑性功能的“可塑性突触”的模拟方法包括：Refer to Figure 15. The simulation method of the "plastic synapse" with synaptic transmission STDP plasticity function of the present invention includes:
⑴、由突触前膜输入端的输入信号来控制后膜输出端的输出信号，使输出信号与输入信号同步；⑵、检测突触前膜输入端和后膜输出端的锋电位信号；⑶、当识别到前膜输入端和后膜输出端之间出现符合STDP特性的锋电位信号，则根据信号的特征通过一个充电回路和一个放电回路对一个储电器件进行充放电：如果信号是LTP特征，则进行充电，如果信号是LDP特征，则进行放电；充电或放电的时间宽度由STDP特性决定；⑷、以储电器件的电压值，来调整突触输出信号的电压(或电流)幅度的大小，并输出到后膜输出端；⑸、储电器件在开始工作时被设置具有一定数值的初始化电压。⑴. The output signal at the output of the posterior membrane is controlled by the input signal at the input of the presynaptic membrane, so that the output signal is synchronized with the input signal; ⑵. Detect the spike potential signal at the input of the presynaptic membrane and the output of the posterior membrane; Between the input terminal of the front membrane and the output terminal of the rear membrane, a spike potential signal that conforms to the STDP characteristics appears, and then a charging circuit and a discharging circuit are used to charge and discharge a power storage device according to the characteristics of the signal: if the signal is an LTP characteristic, then Charge, if the signal is LDP characteristic, then discharge; the time width of charge or discharge is determined by STDP characteristics; (4) The voltage (or current) amplitude of the synaptic output signal is adjusted by the voltage value of the power storage device, And output to the output end of the rear film; ⑸, the power storage device is set to have an initialization voltage with a certain value when it starts to work.
作为一种优化方案，当储电器件上的电压大于或小于初始化电压时，通过一个双向泄放电路来缓慢消除这种电压差，直至储电器件上的电压等于初始化电压。(该方案模拟对突触LTP和LTD效应的缓慢消除，使本发明的突触模拟方法更加完善)。As an optimized solution, when the voltage on the power storage device is greater than or less than the initialization voltage, a bidirectional bleeder circuit is used to slowly eliminate this voltage difference until the voltage on the power storage device is equal to the initialization voltage. (This scheme simulates the slow elimination of synaptic LTP and LTD effects, making the synaptic simulation method of the present invention more complete).
如图15。本发明具有突触传递STDP可塑性功能的“可塑性突触”的模拟装置包括前膜输入端、后膜输出端、STDP时序识别电路、和传递效能调整电路。STDP时序识别电路属于现有技术，能够根据前膜输入端和后膜输出端所出现的锋电位信号，识别判断其锋电位信号是否具有STDP特征，并识别判断出是属于LTP特征还是属于LTD特征。另外，STDP时序识别电路对前膜输入端和后膜输出端所输入的信号都具有电压值检测，由于动作电位的锋电位的电压值明显大于经过突触传递后的信号电压值，所以STDP时序识别电路只对电压幅度较高的动作电位锋电位进行识别，而对于突触自身产生的突触输出信号、以及从后膜输出端所传递过来的其他突触装置的突触输出信号，由于信号电压幅度较低而不会被识别。STDP时序识别电路可以采用CPU或MCU等微处理器，对前膜输入端和后膜输出端的锋电位信号进行模数转换，再根据其时序先后和时间差，识别并输出LTP特征信号和LTD特征信号。也可以采用电压比较器和时基电路，根据锋电位信号的时序先后和时间差，通过逻辑识别并输出LTP特征信号和LTD特征信号。这属于现有技术，在公开的具有突触传递STDP可塑性的采用电子电路来实现的突触模拟技术中有相关技术。而且，这里所述的关于STDP时序识别电路的工作特点及实现技术，在本发明其他部分都一样适用。Figure 15. The simulation device of the "plastic synapse" with synaptic transmission STDP plasticity function of the present invention includes an anterior membrane input terminal, a posterior membrane output terminal, an STDP sequence recognition circuit, and a transmission efficiency adjustment circuit. The STDP timing identification circuit belongs to the prior art, and can identify and judge whether the spike signal has STDP characteristics according to the spike potential signals appearing at the input end of the anterior membrane and the output end of the posterior membrane, and identify and determine whether it belongs to the LTP characteristic or the LTD characteristic. . In addition, the STDP timing identification circuit has voltage value detection for the signals input to the anterior membrane input terminal and posterior membrane output terminal. Since the voltage value of the spike potential of the action potential is significantly greater than the signal voltage value after synaptic transmission, the STDP timing sequence The recognition circuit only recognizes the action potential spikes with higher voltage amplitudes, while for the synaptic output signals generated by the synapse itself and the synaptic output signals of other synaptic devices transmitted from the output terminal of the posterior membrane, due to the signal The voltage amplitude is low and will not be recognized. The STDP sequence recognition circuit can use microprocessors such as CPU or MCU to perform analog-to-digital conversion on the spike potential signals at the input end of the front membrane and the output end of the rear membrane, and then identify and output the LTP characteristic signal and the LTD characteristic signal according to the sequence sequence and time difference. . A voltage comparator and a time base circuit can also be used to identify and output the LTP characteristic signal and the LTD characteristic signal through logic according to the time sequence and time difference of the spike potential signal. This belongs to the prior art, and there are related technologies in the disclosed synaptic simulation technology with synaptic transmission STDP plasticity implemented by electronic circuits. Moreover, the working characteristics and implementation techniques of the STDP timing identification circuit described here are equally applicable to other parts of the present invention.
其特征在于：STDP时序识别电路带有LTP输出端和LTD输出端；(所述STDP时序识别电路根据前膜输入端和后膜输出端出现锋电位的先后时序来控制LTP输出端和LTD输出端的输出信号)；LTP输出端和LTD输出端分别通过一个充电回路和一个放电回路连接到一个用于储存电能的储电器件上。STDP时序识别电路在识别出LTP特征时LTP输出端出现LTP脉冲输出，而且LTP脉冲的脉冲宽度与前后两个锋电位信号的时间间隔呈现负相关，也即符合STDP特性，LTP脉冲通过充电回路向储电器件充电，使储电器件两端的电压上升，(代表突触传递效能的提升)；STDP时序识别电路在识别出LTD特征时LTD输出端出现LTD脉冲输出，而且LTD脉冲的脉冲宽度与前后两个锋电位信号的时间间隔呈现负相关，LTD脉冲通过放电回路使储电器件放电，使储电器件两端电压下降，(代表突触传递效能的下降)。储电器件可以采用一个泄漏电流非常小的电容器，或其他小容量的电量储存器件。It is characterized in that: the STDP timing identification circuit has an LTP output terminal and a LTD output terminal; (the STDP timing identification circuit controls the LTP output terminal and the LTD output terminal according to the sequence of the front film input terminal and the rear film output terminal when the spike occurs. output signal); the LTP output terminal and the LTD output terminal are respectively connected to a power storage device for storing electrical energy through a charging circuit and a discharging circuit. When the STDP sequence recognition circuit recognizes the LTP feature, LTP pulse output appears at the LTP output end, and the pulse width of the LTP pulse is negatively correlated with the time interval of the two front and back spike signals, which is in line with the STDP characteristic. The charging of the power storage device increases the voltage across the power storage device (representing the improvement of synaptic transmission efficiency); when the STDP timing identification circuit recognizes the LTD feature, the LTD output terminal appears LTD pulse output, and the pulse width of the LTD pulse is related to the before and after. The time interval of the two spikes is negatively correlated, and the LTD pulse discharges the electrical storage device through the discharge loop, causing the voltage across the electrical storage device to drop, (representing a decrease in synaptic transmission efficiency). The power storage device can use a capacitor with very small leakage current, or other small-capacity power storage devices.
件连接有一个初始化充电电路；(初始化充电电路用于在电路开始工作时使储电器件迅速被充电至初始化电压，具备初始电量，使突触在初始状态便具备“有效”的传递效能，其初始化电压也即在没有出现突触可塑性时储电器件的基准电压，这时突触输出为标准的突触传递效能)。作为一种具体的方案，初始化充电电路包括一个稳压电路，稳压电路的充电输出电压等于储电器件的初始化电压，稳压电路通过一个单向的快速充电回路连接到储电器件，在电路开始工作时，稳压电路通过快速充电回路向储电器件快速充电，使储电器件的电压快速达到初始化电压，即基准电压，之后快速充电回路被关闭。The device is connected with an initialization charging circuit; (the initialization charging circuit is used to quickly charge the power storage device to the initialization voltage when the circuit starts to work, and has the initial power, so that the synapse has an "effective" transmission performance in the initial state. The initialization voltage is also the reference voltage of the storage device in the absence of synaptic plasticity, and the synaptic output is the standard synaptic transmission efficiency). As a specific solution, the initialization charging circuit includes a voltage stabilizing circuit, the charging output voltage of the voltage stabilizing circuit is equal to the initialization voltage of the power storage device, and the voltage stabilizing circuit is connected to the power storage device through a unidirectional fast charging circuit. When starting to work, the voltage regulator circuit quickly charges the power storage device through the fast charging circuit, so that the voltage of the power storage device quickly reaches the initialization voltage, that is, the reference voltage, and then the fast charging circuit is closed.
储电器件的输出连接到突触传递效能调整电路，作为其输出的基准电压，突触传递效能调整电路同时接受前膜输入端的输入信号的同步控制。这样，传递效能调整电路的输出信号在幅度上受储电器件输出电压的调制，储电器件输出电压的大小决定输出信号电压幅度的大小，也即决定突触输出效能的大小，而在时间上受前膜输入端的输入信号的同步控制；传递效能调整电路的输出信号作为突触信号输出连接到后膜输出端。其输出端还可以包含有一个上述“固化突触”模拟装置的电路，使之具有突触增强和突触抑制的传递特性。The output of the power storage device is connected to the synaptic transmission efficiency adjustment circuit, which is used as a reference voltage for its output, and the synaptic transmission efficiency adjustment circuit simultaneously accepts the synchronous control of the input signal at the anterior membrane input end. In this way, the output signal of the transmission efficiency adjustment circuit is modulated by the output voltage of the power storage device in amplitude. It is synchronously controlled by the input signal at the input terminal of the anterior membrane; the output signal of the transmission efficiency adjustment circuit is connected to the output terminal of the posterior membrane as a synaptic signal output. Its output may also contain a circuit of the above-mentioned "solidified synapse" mimetic device, giving it the transmission properties of synaptic enhancement and synaptic inhibition.
本发明的“可塑性突触”的模拟方法和装置，模拟了具有突触可塑性的化学突触的传递特性，但它不像现有技术一般采用改变电路传递阻抗(变阻电路)来实现传递效能的方法，而是通过STDP时序识别电路来识别LTP和LTD特征，并通过充电电路和放电电路来对一个储电器件进行充放电，使储电器件上的电压随着充电(LTP时)和放电(LTD时)而产生高低变化，并用于调制突触效能调整电路的输出，从而使突触输出脉冲的电压值产生高低的相应调整，以此实现对STDP突触可塑性的模拟。The method and device for simulating the "plastic synapse" of the present invention simulate the transmission characteristics of a chemical synapse with synaptic plasticity, but it does not use changing the transmission impedance of the circuit (varistor circuit) to achieve transmission efficiency as in the prior art. Instead, the STDP timing identification circuit is used to identify the LTP and LTD characteristics, and a charging circuit and a discharging circuit are used to charge and discharge a power storage device, so that the voltage on the power storage device follows the charging (LTP) and discharge. (LTD) to generate high and low changes, and used to modulate the output of the synaptic efficacy adjustment circuit, so that the voltage value of the synaptic output pulse can be adjusted accordingly, so as to achieve the simulation of STDP synaptic plasticity.
作为一种优化，储电器件还连接有一个双向泄放电路；双向泄放电路用于在一定时间内缓慢消除储电器件由于充放电而造成电压升高或降低的变化，直至储电器件上的电压等于初始化电压。从而模拟对突触LTP和LTD效应的缓慢消除，使本发明的突触模拟装置更加完善，能够适应于连续多进程的模拟工作。作为一种简单巧妙的方案，双向泄放电路包括一个具有设定电压的稳压电路，(稳压电路的设定电压等于储电器件的初始化电压，也即储电器件在没有出现可塑性时的基准电压，这时突触传递为标准的传递效能)，稳压电路通过一个电阻连接到储电器件，当储电器件的电压大于稳压电路的设定电压，也即出现突触LTP效应时，储电器件通过电阻向稳压电路缓慢放电，也即缓慢消除LTP效应；当储电器件的电压小于稳压电压设定电压，也即出现突触LTD效应时，稳压电路通过电阻向储电器件缓慢充电，也即缓慢消除LTD效应。在一定时间后，也即突触可塑性的有效期后，使储电器件上的电压等于稳压电路的设定电压，也即是突触没有出现可塑性时的正常输出脉冲幅度。As an optimization, the power storage device is also connected with a bidirectional discharge circuit; the bidirectional discharge circuit is used to slowly eliminate the voltage increase or decrease caused by the charge and discharge of the power storage device within a certain period of time, until the power storage device is on the The voltage is equal to the initialization voltage. Therefore, the simulation can slowly eliminate the synaptic LTP and LTD effects, so that the synaptic simulation device of the present invention is more perfect and can be adapted to continuous multi-process simulation work. As a simple and ingenious solution, the bidirectional discharge circuit includes a voltage regulator circuit with a set voltage, (the set voltage of the voltage regulator circuit is equal to the initialization voltage of the power storage device, that is, the power storage device has no plasticity when there is no plasticity. When the voltage of the power storage device is greater than the set voltage of the voltage regulator circuit, that is, when the synaptic LTP effect occurs , the power storage device slowly discharges to the voltage regulator circuit through the resistor, that is, the LTP effect is slowly eliminated; when the voltage of the power storage device is less than the voltage set by the voltage regulator voltage, that is, when the synaptic LTD effect occurs, the voltage regulator circuit passes the resistor to the storage device. The electrical device is slowly charged, ie the LTD effect is slowly eliminated. After a certain period of time, that is, after the validity period of synaptic plasticity, the voltage on the power storage device is made equal to the set voltage of the voltage regulator circuit, that is, the normal output pulse amplitude when the synaptic plasticity does not appear.
图16是实现图15的“可塑性突触”模拟装置的一种电路。其中MCU1601用于识别STDP锋电位并输出LTP和LTD信号。来自前膜输入端和后膜输出端的信号输入到I/O1和I/O2，MCU1601根据前膜输入端和后膜输出端两个信号的时序关系，识别出是否属于LTP效应或STD效应，及其效应的强度，(根据图13所示)，并通过I/O3和I/O4输出。当出现LTP效应时I/O3输出正电平，其输出的脉冲宽度与LTP效应的强度正相关，并通过D1602和R1602向储电器件即电容C1601进行充电，使其电压上升；当出现LTD效应时I/O4输出负电平，其输出的脉冲宽度与LTD效应的强度正相关，并通过D1601和R1601向储电器件即电容C1601进行放电，使其电压下降；而没有出现LTP效应或STD效应时，则I/O3和I/O4没有有效输出，(悬空或输出相反电平)。这样，电容C1601上的电压随着前膜输入端和后膜输出端信号STDP锋电位的LTP和LTD效应而出现相应变化。FIG. 16 is a circuit implementing the "plastic synapse" simulation device of FIG. 15 . The MCU1601 is used to identify the STDP spike and output LTP and LTD signals. The signals from the front film input terminal and the back film output terminal are input to I/O1 and I/O2, and the MCU1601 identifies whether it belongs to the LTP effect or STD effect according to the timing relationship between the two signals of the front film input terminal and the back film output terminal, and The strength of its effect, (according to Figure 13), is output via I/O3 and I/O4. When the LTP effect occurs, the I/O3 outputs a positive level, and the output pulse width is positively related to the intensity of the LTP effect, and charges the power storage device, namely the capacitor C1601 through D1602 and R1602, to increase its voltage; when the LTD effect occurs When I/O4 outputs a negative level, the output pulse width is positively related to the strength of the LTD effect, and discharges the power storage device, namely the capacitor C1601 through D1601 and R1601, to make its voltage drop; and when there is no LTP effect or STD effect , then I/O3 and I/O4 have no valid output, (floating or outputting the opposite level). In this way, the voltage on capacitor C1601 changes correspondingly with the LTP and LTD effects of the STDP spikes at the anterior membrane input and posterior membrane output.
T1601、D1603、C1602等构成初始化充电电路。其中D1603构成稳压电路，稳压输出电压等于储电器件C1601的初始化电压，也即基准电压；T1601、C1602等构成单向的快速充电回路连接到C1601，在电路开始通电工作时向C1601快速充电，使其电压快速达到基准电压，之后快速充电回路被关闭，直至下一次电路重新启动。R1604、D1604、R1605等构成双向泄放电路；其中R1604、D1604构成稳压电路，稳压电压值等于基准电压，并通过R1605连接到储电器件C1601；当C1601的电压大于基准电压，则C1601通过R1605向稳压电路缓慢放电，缓慢消除LTP效应；当C1601的电压小于基准电压，稳压电路通过R1605向C1601缓慢充电，也即缓慢消除LTD效应。T1601, D1603, C1602, etc. constitute an initialization charging circuit. Among them, D1603 constitutes a voltage stabilizer circuit, and the voltage stabilizer output voltage is equal to the initialization voltage of the power storage device C1601, that is, the reference voltage; T1601, C1602, etc. form a unidirectional fast charging circuit connected to C1601, and quickly charge C1601 when the circuit starts to work. , so that its voltage quickly reaches the reference voltage, after which the fast charging loop is closed until the next circuit restart. R1604, D1604, R1605, etc. form a bidirectional discharge circuit; among them, R1604, D1604 form a voltage regulator circuit, the voltage value of which is equal to the reference voltage, and is connected to the power storage device C1601 through R1605; when the voltage of C1601 is greater than the reference voltage, C1601 passes through R1605 slowly discharges to the voltage regulator circuit to slowly eliminate the LTP effect; when the voltage of C1601 is lower than the reference voltage, the voltage regulator circuit slowly charges C1601 through R1605, that is, slowly eliminates the LTD effect.
储电器件C1601的电压，通过构成跟随器电路的运放IC1601进行隔离，再连接到模拟开关K1601上，K1601的开关受前膜输入端的信号控制，当前膜输入端出现脉冲信号也即动作电位信号时，K1601同步打开，输出同步脉冲信号，其脉冲信号的电压幅度等于C1601的电压幅度，也即带有STDP可塑性效应的脉冲输出信号。在本实施例中，K1601的输出还带有R1606、R1607、R1608、D1605、C1603构成的网络，用于进一步模拟短时程的突触抑制效应，其工作原理可参考图12电路的分析。The voltage of the power storage device C1601 is isolated by the op-amp IC1601 that constitutes the follower circuit, and then connected to the analog switch K1601. The switch of K1601 is controlled by the signal from the input terminal of the front membrane, and the current membrane input terminal appears a pulse signal, that is, the action potential signal. When K1601 is turned on synchronously, it outputs a synchronous pulse signal, and the voltage amplitude of the pulse signal is equal to the voltage amplitude of C1601, that is, the pulse output signal with STDP plasticity effect. In this embodiment, the output of K1601 also has a network composed of R1606, R1607, R1608, D1605, and C1603, which is used to further simulate the short-term synaptic inhibition effect. For its working principle, please refer to the analysis of the circuit in Figure 12.
本发明的“预置性突触”的模拟方法包括：⑴、在突触的前膜输入端和后膜输出端之间预设一突触传递通道，但工作之始关闭该突触传递通道的工作；⑵、检测突触前膜输入端和后膜输出端的锋电位信号；⑶、当前膜输入端和后膜输出端之间出现符合STDP特性的锋电位信号，则对该信号的出现情况进行运算，(包括积分或计数)；⑷、当符合STDP特性的锋电位信号出现的情况满足设定规则，则启动预设的突触传递通道的工作，使突触的前膜输入端与后膜输出端建立起具有突触传递效能的传递通道。The simulation method of the "preset synapse" of the present invention includes: (1) Presetting a synaptic transmission channel between the pre-membrane input end and the post-membrane output end of the synapse, but closing the synaptic transmission channel at the beginning of the
所述预设的突触传递通道，是一个具有突触传递特性的突触传递通道，这些突触传递特性包括突触易化、突触抑制、突触强直后增强、突触长时程可塑性特别是具有STDP特性的突触可塑性、这些传递特性中的一种或多种。或者说，本发明的预设突触传递通道，实质上已经就是一个现有技术的具有传递特性的突触模拟装置，它可以是一个前述的“固定突触”装置，也可以是一个前述的“可塑性突触”装置，或者是其他现有技术的突触模拟装置。The preset synaptic transmission channel is a synaptic transmission channel with synaptic transmission properties, and these synaptic transmission properties include synaptic facilitation, synaptic inhibition, synaptic post-tonic enhancement, and synaptic long-term plasticity. In particular synaptic plasticity with STDP properties, one or more of these transfer properties. In other words, the preset synaptic transmission channel of the present invention is essentially a synaptic simulation device with transmission characteristics in the prior art, which can be the aforementioned “fixed synapse” device, or one of the aforementioned “fixed synapses”. A "plastic synapse" device, or other prior art synapse mimetic device.
所述的设定规则是以下两种中的一种：1、只计数符合STDP特性中的LTP特征的信号的次数，如果在一段设定的时间内，出现LTP的计数达到设定值，则启动预设的突触传递通道的工作；或者是2、不设定计数时间，同时计数符合LTP特征和LTD特征的信号的次数，其中出现LTP特征的信号次数做加法，出现LTD特征的信号次数做减法；如果总计数达到设定值，则启动预设的突触传递通道的工作。The setting rule is one of the following two: 1. Only count the number of signals that conform to the LTP characteristic in the STDP characteristic. If the LTP count reaches the set value within a set period of time, then Start the work of the preset synaptic transmission channel; or 2. Do not set the counting time, and count the number of signals that meet the LTP characteristics and LTD characteristics at the same time. The number of signals with LTP characteristics is added, and the number of signals with LTD characteristics is added. Do subtraction; if the total count reaches the set value, start the work of the preset synaptic transmission channel.
进一步改进，本发明的“预置性突触”的模拟方法，还包括：Further improvement, the simulation method of "preset synapse" of the present invention also includes:
⑸、在启动预设的突触传递通道的工作后，继续检测突触前膜输入端和后膜输出端的锋电位信号；⑹、当前膜输入端和后膜输出端之间出现符合STDP特性的锋电位信号，则对该信号的出现情况进行运算；当符合STDP特性的锋电位信号出现情况满足第二设定规则，则关闭预设的突触传递通道的工作，切断突触的前膜输入端与后膜输出端的传递通道。(5) After starting the preset synaptic transmission channel, continue to detect the spike potential signal at the input terminal of the presynaptic membrane and the output terminal of the post-synaptic membrane; If the spike potential signal is present, the occurrence of the signal is calculated; when the occurrence of the spike potential signal conforming to the STDP characteristic satisfies the second setting rule, the preset synaptic transmission channel will be closed, and the synaptic premembrane input will be cut off. The transfer channel between the end and the post-membrane output.
所述的第二设定规则是以下的两种中的一种：1、只计数符合LTD特征的信号的次数，如果在一段设定的时间内，出现LTD的计数达到设定值，则关闭预设的突触传递通道的工作；2、同时计数符合LTP特征和LTD特征的信号的次数，其中出现LTP特征的信号次数做加法，出现LTD特征的信号次数做减法；如果总计数低于设定值，则关闭突触传递通道的工作。显然在后一种的这种设定规则中，关闭突触传递通道的总计数的设定值，必然要小于启动突触传递通道的总计数的设定值。The second setting rule is one of the following two: 1. Only count the number of signals that meet the LTD characteristics. If the LTD count reaches the set value within a set period of time, it will be turned off. The work of the preset synaptic transmission channel; 2. Count the number of signals that meet the LTP characteristics and LTD characteristics at the same time. The number of signals with LTP characteristics is added, and the number of signals with LTD characteristics is subtracted; if the total count is lower than the set value. If the value is set, the work of the synaptic transmission channel will be closed. Obviously, in the latter setting rule, the set value of the total count of closing synaptic transmission channels must be smaller than the set value of the total count of activated synaptic transmission channels.
如图17。本发明的“预置性突触”的模拟装置，包括有前膜输入端、后膜输出端、和具有突触传递效能的突触传递通道；其特征在于：还带有一个STDP时序识别电路，用于识别前膜输入端和后膜输入端之间具有STDP特征的锋电位信号；STDP时序识别电路的输出连接到一个STDP积分电路，STDP积分电路的输出连接到一个门限控制电路；门限控制电路的输出端连接到一个通道开关电路；通道开关电路用于控制突触传递通道的通断。Figure 17. The "preset synapse" simulation device of the present invention includes an anterior membrane input terminal, a posterior membrane output terminal, and a synaptic transmission channel with synaptic transmission efficiency; it is characterized in that it also has an STDP sequence recognition circuit , used to identify the spike potential signal with STDP characteristics between the input terminal of the front membrane and the input terminal of the rear membrane; the output of the STDP timing identification circuit is connected to a STDP integrating circuit, and the output of the STDP integrating circuit is connected to a threshold control circuit; the threshold control circuit The output end of the circuit is connected to a channel switch circuit; the channel switch circuit is used to control the on-off of the synaptic transmission channel.
其工作原理和过程为：工作时，STDP积分电路根据设定规则，累积在一定时间内STDP时序识别电路所识别输出的信号，并转化为其输出信号的输出值；门限控制电路用于检测积分电路的输出信号的输出值，当积分电路的输出值达到或高于设定门限1，则产生输出控制信号；并通过通道开关电路启动接通突触传递通道，在前膜输入端与后膜输出端之间建立具有突触传递效能的突触传递通道。Its working principle and process are: when working, the STDP integration circuit accumulates the output signal identified by the STDP sequence identification circuit within a certain period of time according to the set rules, and converts it into the output value of its output signal; the threshold control circuit is used to detect the integration. The output value of the output signal of the circuit, when the output value of the integrating circuit reaches or exceeds the
其工作过程进一步还包括：在通道开关电路启动接通突触传递通道后，门限控制电路继续检测积分电路的输出信号的输出值，当积分电路的输出值低于设定门限2，则关闭输出控制信号；并通过通道开关电路关闭突触传递通道。也即切断前膜输入端与后膜输出端之间的突触传递通道。显然，设定门限2需要小于设定门限1，作为一种较合理的设置，一般可相当于设定门限1的值的65％至85％。The working process further includes: after the channel switch circuit starts and turns on the synaptic transmission channel, the threshold control circuit continues to detect the output value of the output signal of the integrating circuit, and when the output value of the integrating circuit is lower than the
同样的，所述预设的突触传递通道，是一个具有突触传递特性的突触传递通道。Likewise, the preset synaptic transmission channel is a synaptic transmission channel with synaptic transmission characteristics.
所述积分电路的设定规则是：当出现LTP特征的信号时提高输出信号的输出值，当出现LTD特征的信号时降低输出信号的输出值。(相对于模拟方法，模拟装置对STDP的运算规则只采用其中一种更接近大脑工作特点的方式)。The setting rule of the integrating circuit is: when the signal with the LTP characteristic appears, the output value of the output signal is increased, and when the signal with the LTD characteristic appears, the output value of the output signal is decreased. (Compared to the simulation method, the simulation device only adopts one of the methods that are closer to the characteristics of the brain's working rules for STDP.)
本发明的“预置性突触”的模拟方法及装置，与现有技术的具有突触传递STDP可塑性的突触模拟技术相比较，虽然彼此都具有检测和识别突触前后膜之间符合STDP特性锋电位信号的技术，但其做出的处理是不同的。现有的STDP突触模拟技术，是一开始便具有突触传递效能，再根据检测识别的符合STDP特性的锋电位信号，来调整突触传递效能：如果是出现LTP特征信号，则提升突触传递效能，如果是出现LTD特征信号，则降低突触传递效能，以此来实现突触传递可塑性。从大脑结构来看，这一类突触更多地存在于杏仁体、纹状体、海马体等区域的神经元之间，用于实现陈述性信息的短时程和长时程记忆。Compared with the prior art synaptic simulation technology with synaptic transmission STDP plasticity, the "preset synapse" simulation method and device of the present invention both have the ability to detect and identify the presynaptic and presynaptic membranes in line with STDP. techniques to characterize spike signals, but their processing is different. The existing STDP synaptic simulation technology has synaptic transmission efficiency from the beginning, and then adjusts the synaptic transmission efficiency according to the detected and identified spike signals that meet the STDP characteristics: if there is an LTP characteristic signal, the synaptic transmission efficiency is improved. Transmission efficiency, if the characteristic signal of LTD appears, the synaptic transmission efficiency will be reduced, so as to achieve synaptic transmission plasticity. From the perspective of brain structure, this type of synapse is more present between neurons in the amygdala, striatum, hippocampus and other regions, and is used to realize short-term and long-term memory of declarative information.
而本发明的“预置性突触”，本身便包含有一具备突触传递效能的突触传递通道，也即其本身包含有一个现有技术的突触模拟装置，是在现有技术的突触模拟装置的基础上，加上一个如何识别、判断、启动或关闭突触模拟装置的技术。其在工作初始状态时突触传递通道是关闭的，所以一开始并没有具备突触传递效能，只有当前膜输入端和后膜输出端之间多次出现符合STDP特性中的LTP特征的锋电位信号，并累积达到某一程度，才会通过通道开关电路启动接通突触传递通道的工作，使“预置性突触”前膜输入端和后膜输出端之间具备有效的突触传递效能。它模拟的是存在于脑皮层等区域上的神经元之间的一种突触，这类突触开始形成时并没有具备突触传递效能，需要经过前后神经元的长期的多次的协同刺激后，才被激活成有效突触，而一旦激活，其传递效能便比较稳定。这类突触一般存在于脑皮层等区域，用于实现陈述性信息的长期记忆。The "preset synapse" of the present invention itself includes a synaptic transmission channel with synaptic transmission efficiency, that is, it itself includes a prior art synaptic simulation device, which is in the prior art synapse. Based on the touch simulation device, plus a technology of how to identify, judge, turn on or turn off the synaptic simulation device. In the initial state of operation, the synaptic transmission channel is closed, so it does not have synaptic transmission efficiency at the beginning, only the spikes between the current membrane input and the posterior membrane output that conform to the LTP characteristics in the STDP characteristics appear many times. The signal is accumulated to a certain extent, and the work of turning on the synaptic transmission channel will be started through the channel switch circuit, so that there is effective synaptic transmission between the input terminal of the "preset synapse" and the output terminal of the posterior membrane. efficacy. It simulates a synapse between neurons in areas such as the cerebral cortex. This type of synapse does not have synaptic transmission efficiency when it begins to form, and requires long-term and multiple synaptic stimulation of the neurons before and after. After that, it is activated into an effective synapse, and once activated, its transmission efficiency is relatively stable. Such synapses generally exist in areas such as the cerebral cortex and are used to achieve long-term memory of declarative information.
锋电位信号，或者只要有通过它的突触传递而使突触前神经元被激活产生动作电位(实际这也是产生LTP特征)，则STDP积分电路的数值便越来越高直至达到最大值，也即突触传递效能会越来越强直至最大值。只有长时间没有出现LTP特征，而且多次出现LTD特征的抑制性信号，才会使积分电路的数值缓慢降低，最终低于门限值，门限控制电路关闭输出信号，通过通道开关电路关闭突触传递通道，使突触再次失效。这种工作状态用于模拟大脑神经元即使是将信息作为长期记忆进行保存下来，如果这些信息长期没有使用，而且有其他抑制性信息的长期混淆(竞争)，则长期记忆也会慢慢被遗忘。The spike signal, or as long as the presynaptic neuron is activated to generate an action potential through its synaptic transmission (actually this is also the characteristic of LTP), the value of the STDP integrator circuit will become higher and higher until it reaches the maximum value. That is, the synaptic transmission efficiency will become stronger and stronger until the maximum value. Only when the LTP feature does not appear for a long time, and the inhibitory signal of the LTD feature appears for many times, will the value of the integrating circuit slowly decrease, and finally lower than the threshold value, the threshold control circuit will turn off the output signal, and the synapse will be closed through the channel switch circuit Pass the channel, making the synapse fail again. This working state is used to simulate neurons in the brain. Even if the information is stored as long-term memory, if the information is not used for a long time, and there is long-term confusion (competition) with other inhibitory information, the long-term memory will be slowly forgotten. .
本发明的“预置性突触”模拟装置，STDP时序识别电路属于现有技术，而对于STDP积分电路如何对STDP时序识别电路输出的LTP和LTD特征信号进行运算，一般可采用MCU等微处理器，按照所述的设定规则，对LTP特征信号和LTD特征信号进行计数运算，再将计数值跟设定值进行比较，根据比较结果来输出控制信号，对突触传递通道的通道控制电路的通断进行控制。也就是说，可以采用同一只单片机来同时完成时序识别电路、STDP积分电路和门限控制电路的功能，所以硬件部分非常简单，这里不画出。而对于单片机的程序，该领域的技术人员，根据本发明所公开的原理和运算规则，都能够方便地编写这些程序。In the "preset synapse" simulation device of the present invention, the STDP timing identification circuit belongs to the prior art, and as for how the STDP integration circuit operates on the LTP and LTD characteristic signals output by the STDP timing identification circuit, generally microprocessing such as MCU can be used. According to the described setting rules, the LTP characteristic signal and the LTD characteristic signal are counted, and then the count value is compared with the set value, and the control signal is output according to the comparison result to control the channel of the synaptic transmission channel. on-off control. That is to say, the same single-chip microcomputer can be used to complete the functions of the timing identification circuit, the STDP integration circuit and the threshold control circuit at the same time, so the hardware part is very simple and will not be shown here. As for the programs of the single-chip microcomputer, those skilled in the art can easily write these programs according to the principles and operation rules disclosed in the present invention.
本发明还参照前述图15的“可塑性突触”的模拟技术，公开另一种采用储电器件来实现STDP积分电路的“预置性突触”模拟装置的技术。其电路方框图如图18。STDP积分电路采用充电电路、放电电路和一只储电器件来实现，STDP时序识别电路的LTP输出端和LTD输出端分别通过充电电路和放电电路连接到储电器件上；储电器件的输出端连接到门限控制电路的输入端。工作时，STDP时序识别电路在识别出LTP特征时LTP输出端出现脉冲输出，通过充电回路向储电器件充电；STDP时序识别电路在识别出LTD特征时LTD输出端出现负脉冲输出，通过放电回路使储电器件放电；储电器件的电压随STDP效应而出现变化；门限控制电路对储电器件的电压进行检测，当储电器件输出电压达到或超过设定门限值1，门限控制电路输出控制信号，并通过通道开关电路启动接通突触传递通道。The present invention also refers to the simulation technology of “plastic synapse” in the aforementioned FIG. 15 , and discloses another technology for realizing the simulation device of “preset synapse” of STDP integrating circuit by using a power storage device. Its circuit block diagram is shown in Figure 18. The STDP integration circuit is realized by a charging circuit, a discharging circuit and a power storage device. The LTP output terminal and the LTD output terminal of the STDP timing identification circuit are connected to the power storage device through the charging circuit and the discharging circuit respectively; the output terminal of the power storage device Connect to the input of the threshold control circuit. When working, the STDP timing identification circuit has a pulse output at the LTP output when it identifies the LTP feature, and charges the power storage device through the charging circuit; when the STDP timing identification circuit identifies the LTD feature, a negative pulse output appears at the LTD output, which passes through the discharge loop. Discharge the power storage device; the voltage of the power storage device changes with the STDP effect; the threshold control circuit detects the voltage of the power storage device, when the output voltage of the power storage device reaches or exceeds the
其工作过程进一步还包括：在通道开关电路启动接通突触传递通道后，门限控制电路继续检测储电器件的输出电压，当储电器件的输出电压低于设定门限2，则关闭输出控制信号；并通过通道开关电路关闭突触传递通道。也即切断前膜输入端与后膜输出端之间的突触传递通道。显然，设定门限2小于设定门限1。作为一种较合理的设置，设定门限2可相当于设定门限1的值的65％至85％。The working process further includes: after the channel switch circuit starts and turns on the synaptic transmission channel, the threshold control circuit continues to detect the output voltage of the power storage device, and when the output voltage of the power storage device is lower than the
图19是其实施例的电路原理图。前膜输入端和后膜输出端的信号由MCU1801的I/O1和I/O2输入，经过识别的LTP信号和LTD信号分别由I/O3和I/O4输出，(分别是正输出和负输出有效，且输出脉冲宽度具有STDP效应，参考图16的工作原理)，并通过R1801和R1802对电容C1801进行充电和发电，使C1801上的电压随着STDP效应而发生变化。C1801的电压值再重新提供R1803送到I/O5，由MCU1801里面的电压比较电路根据设定规则进行电压比较，(也可先模数转换后再进行电压比较)，其比较结果从I/O6输出，去控制作为通道控制电路的模拟开关K1801的通断，从而实现对突触传递通道的通断控制。FIG. 19 is a circuit schematic diagram of an embodiment thereof. The signals of the front film input terminal and the rear film output terminal are input by I/O1 and I/O2 of MCU1801, and the identified LTP signal and LTD signal are output by I/O3 and I/O4 respectively, (respectively positive output and negative output are valid, And the output pulse width has STDP effect, refer to the working principle of Figure 16), and the capacitor C1801 is charged and generated through R1801 and R1802, so that the voltage on C1801 changes with the STDP effect. The voltage value of C1801 is supplied to R1803 again and sent to I/O5, and the voltage comparison circuit in MCU1801 performs voltage comparison according to the setting rules (you can also perform analog-to-digital conversion first and then perform voltage comparison), and the comparison result is obtained from I/O6 Output, to control the on-off of the analog switch K1801 as the channel control circuit, so as to realize the on-off control of the synaptic transmission channel.
突触传递通道具有突触传递特性，可以参考和采用现有的突触模拟技术，也可采用本发明前述的“固化突触”的模拟技术。图20是“预置性突触”模拟装置的一种实施例。其中MCU2001也即图19的MCU1801，模拟开关K2001也即图19的K1801，其突触传递通道由C2002、R2004、R2005、R2006和D2003等构成，其工作原理可参考图12的说明。The synaptic transmission channel has the characteristics of synaptic transmission, and the existing synaptic simulation technology can be referred to and used, or the simulation technology of "solidified synapse" mentioned in the present invention can be used. Figure 20 is an embodiment of a "preset synapse" simulation device. The MCU2001 is also the MCU1801 in Figure 19, and the analog switch K2001 is also the K1801 in Figure 19. Its synaptic transmission channel is composed of C2002, R2004, R2005, R2006 and D2003, etc. Its working principle can be referred to the description of Figure 12.
对于STDP时序识别电路，现有技术一般采用MCU电路，根据图13的STDP特性曲线，采用程序来完成识别和输出。本发明这里公开一种采用普通的数字门电路来实现STDP识别和输出的技术。电路如图21。来自前膜输入端和后膜输出端的动作电位峰电位信号分别经过R2101、R2102，和R2103、R2104进行分压，使其输入的峰电位必须达到足够的电压值才能有效触发非门电路F2101、F2103，避免干扰，输入峰电位一旦有效触发F2101、F2103，便会触发F2102或F2104组成的单稳电路，输出一个矩形脉冲，(脉冲宽度大约为动作电位脉宽的5—10倍)；F2105—F2108组成互锁电路，使得F2107和F2108两者只能有一输出，(F2102或F2104先触发输出矩形脉冲的一边，F2107或F2108便输出正电平，并锁住另一边为输出低电平)；当F2102和F2104同时输出矩形脉冲时，与门电路F2112输出为正，其输出的有效宽度也即是F2102和F2104各自输出的矩形脉冲的时间重叠部分，显然与前膜输入端和后膜输出端的峰电位信号的时序相关。F2112与互锁电路的输出，连接到F2109和F2110。当前膜输入端的峰电位信号早于后膜输出端，也即出现LTP特征信号时，F2109输出正电平作为LTP输出端，且其输出的脉冲宽度负相关于前后峰电位的时间差，(如图13)；当前膜输入端的峰电位信号慢于后膜输出端，也即出现LTD特征信号时，F2110输出正电平作为LTD输出端，且其输出的脉冲宽度负相关于前后峰电位的时间差，并经过F2111的反相后输出负电平作为LTD输出端。二极管D2101和D2102起单向输出的作用，也即是前述图16、图19和图20中，LTP输出端和LTD输出端所接的二极管。本电路采用常见和便宜的数字门电路，巧妙地实现对STDP峰电位的检测和输出，虽然其输出精度不是很高，可是具有极低成本的优点，而且无需依赖人工程序便可工作。As for the STDP sequence identification circuit, the prior art generally adopts the MCU circuit, and according to the STDP characteristic curve of FIG. 13 , the program is used to complete the identification and output. The present invention discloses a technology for realizing STDP identification and output by using a common digital gate circuit. The circuit is shown in Figure 21. The action potential peak potential signal from the input terminal of the anterior membrane and the output terminal of the posterior membrane is divided by R2101, R2102, and R2103, R2104 respectively, so that the input peak potential must reach a sufficient voltage value to effectively trigger the NOT gate circuits F2101, F2103 , to avoid interference, once the input peak potential effectively triggers F2101, F2103, it will trigger the monostable circuit composed of F2102 or F2104 to output a rectangular pulse, (the pulse width is about 5-10 times the pulse width of the action potential); F2105-F2108 An interlock circuit is formed, so that both F2107 and F2108 can only have one output, (F2102 or F2104 first triggers one side of the output rectangular pulse, F2107 or F2108 outputs a positive level, and locks the other side to output a low level); When F2102 and F2104 output rectangular pulses at the same time, the output of AND gate circuit F2112 is positive, and the effective width of its output is the time overlap of the rectangular pulses output by F2102 and F2104, which is obviously the same as the peak of the front film input terminal and the back film output terminal. The timing of the potential signal is related. F2112 and the output of the interlock circuit, connect to F2109 and F2110. The peak potential signal at the input terminal of the front membrane is earlier than the output terminal of the rear membrane, that is, when the LTP characteristic signal appears, the F2109 outputs a positive level as the LTP output terminal, and the output pulse width is negatively related to the time difference of the peak potential before and after, (as shown in the figure 13); the peak potential signal of the front membrane input terminal is slower than the rear membrane output terminal, that is, when the LTD characteristic signal appears, the F2110 outputs a positive level as the LTD output terminal, and the pulse width of its output is negatively related to the time difference of the peak potential before and after, And after the inversion of F2111, the negative level is output as the LTD output terminal. The diodes D2101 and D2102 play the role of unidirectional output, that is, the diodes connected to the LTP output end and the LTD output end in the aforementioned Figures 16, 19 and 20. This circuit uses a common and cheap digital gate circuit to cleverly detect and output the STDP peak potential. Although its output accuracy is not very high, it has the advantage of extremely low cost, and it can work without relying on manual programs.
本发明的母案申请还公开两种采用本发明的神经元模拟装置和突触模拟装置构建的具有不同工作特点的模拟神经网络。在本申请这里省略，需要时可详见母案申请。The parent application of the present invention also discloses two simulated neural networks with different working characteristics constructed by using the neuron simulation device and the synapse simulation device of the present invention. It is omitted here in this application, if necessary, please refer to the parent application for details.
需要说明的是，本申请文件所公开的电路图中，一般只画出和标出与工作原理有关的元件，而对于电源供给、电源稳压、抗干扰、单片机的启动复位等等外围相关电路，属于电子领域的常规技术，则为了附图简洁而没有标出。It should be noted that, in the circuit diagram disclosed in this application document, only the components related to the working principle are generally drawn and marked, while the peripheral related circuits such as power supply, power supply voltage regulation, anti-interference, start-up reset of the single-chip microcomputer, etc. Conventional technologies belonging to the electronic field are not marked for brevity of the drawings.
在本发明的各种模拟技术中，除了电路的原理设计，还有一些主要参数的设定。在大脑的实际工作中，各种工作时程的时间跨度特别大，比如：动作电位的脉冲宽度从几毫秒到几十毫秒；神经元膜电位的整合过程大约在几十毫秒到上百毫秒；调制性突触发生调制作用的时间可能几秒钟到几十分钟；海马神经元用于记忆活动时短时程可塑性和长时程可塑性的时间可从几分钟到几小时到几天；而脑皮层的神经元将一个“预置性”的突触激活发育成一个“有效性”的突触，或者新生长出一个有效突触，则需要很多天甚至几年的时间。对于神经模拟网络的工作，特别是采用神经模拟网络来实验和演示神经元活动的工作，要采用同样的时间跨度那是不现实的，所以为了方便我们只能根据工作需要，按照各种工作时程的长短关系，另行设定各个工作时程的时间值。另外，神经网络中的电位变化和信号幅度大多是几毫伏到几十毫伏的电压值，模拟电路如果采用这一数量级来工作，则既难以设置也容易受电磁干扰而工作不正常，所以我们也只能另行设定各种信号和变化的电压值。In the various simulation techniques of the present invention, in addition to the principle design of the circuit, there are also the setting of some main parameters. In the actual work of the brain, the time span of various working time courses is particularly large, for example: the pulse width of action potentials is from a few milliseconds to tens of milliseconds; the integration process of neuron membrane potentials is about tens of milliseconds to hundreds of milliseconds; The modulation time of modulating synapses may range from a few seconds to tens of minutes; the short-term plasticity and long-term plasticity of hippocampal neurons for memory activities can range from minutes to hours to days; It takes many days or even years for cortical neurons to develop a "preset" synaptic activation into an "effective" synapse, or to grow a new effective synapse. For the work of neural simulation network, especially the work of using neural simulation network to experiment and demonstrate neuron activity, it is unrealistic to use the same time span. Therefore, for convenience, we can only use various work hours according to the needs of the work. According to the relationship between the length of the process, the time value of each work schedule is separately set. In addition, the potential changes and signal amplitudes in the neural network are mostly voltage values ranging from a few millivolts to tens of millivolts. If the analog circuit uses this order of magnitude to work, it is not only difficult to set up, but also easily affected by electromagnetic interference and does not work properly, so We can only set various signals and changing voltage values separately.
作为一种示例，以下给出各个工作时程和各种信号电压的一种数值，这一示例适合于将神经元模拟装置、突触模拟装置做成实验器材，用于构造神经模拟网络，模拟和演示神经元和突触对信号的反射和记忆等活动情况，并以此研究和揭示大脑的更多的工作机制。As an example, a numerical value of each working time course and various signal voltages is given below. This example is suitable for making a neuron simulation device and a synapse simulation device into experimental equipment for constructing a neural simulation network and simulating And demonstrate the activity of neurons and synapses on signal reflection and memory, and use this to study and reveal more working mechanisms of the brain.
模拟装置工作电压：DC12伏。Analog device operating voltage: DC12 volts.
动作电位脉冲宽度：10毫秒。Action potential pulse width: 10 ms.
动作电位脉冲峰值：≥11伏。Action potential pulse peak: ≥ 11 volts.
第一阈值触发电路设定触发阈值：3伏。The first threshold trigger circuit sets the trigger threshold: 3 volts.
第二阈值触发电路设定触发阈值：3.7伏。The second threshold trigger circuit sets the trigger threshold: 3.7 volts.
第一阈值触发电路输入端的信号延迟电路的延迟时间：约20毫秒。Delay time of the signal delay circuit at the input of the first threshold trigger circuit: about 20 milliseconds.
膜积分电路的信号整合触发条件：在100毫秒内输入的兴奋信号使膜积分电路的输出电压达到第一阈值触发电路设定触发阈值。The signal integration trigger condition of the membrane integration circuit: the input excitation signal within 100 milliseconds makes the output voltage of the membrane integration circuit reach the first threshold triggering circuit to set the triggering threshold.
动作电位触发后不应期：约100毫秒。Refractory period after action potential firing: about 100 ms.
调制性信号(包括增强性和抑制性)有效期：约10秒。Modulation signal (both enhancing and suppressing) validity period: about 10 seconds.
突触后膜输出信号标准幅度：8伏，(无突触可塑性时)。The standard amplitude of the output signal from the postsynaptic membrane: 8 volts, (when there is no synaptic plasticity).
突触后膜输出信号最大幅度：10伏，(突触可塑性LTP最大时)。The maximum amplitude of the output signal from the postsynaptic membrane: 10 volts, (when the synaptic plasticity LTP is maximal).
突触后膜输出信号最小幅度：6伏，(突触可塑性LDP最大时)。Postsynaptic membrane output signal minimum amplitude: 6 volts, (when synaptic plasticity LDP is maximal).
“可塑性突触”的长时程突触可塑性有效期：约5分钟。Long-term synaptic plasticity validity period for "plastic synapses": about 5 minutes.
“预置性突触”的门限控制电路的设定门限值1：8伏。The set threshold value of the threshold control circuit of the "preset synapse" is 1:8 volts.
“预置性突触”的门限控制电路的设定门限值2：5伏。The set threshold value of the threshold control circuit of the "preset synapse" is 2:5 volts.
“预置性”突触激活为“有效性”突触的一种条件：在10分钟内出现10次满足STDP规则的LTP效应的前后神经元锋电位信号。"Preset" synaptic activation is a condition for "effective" synapses: 10 pre- and post-neuronal spikes that satisfy the LTP effect of the STDP rule within 10 minutes.
按照以上数值，再根据电学的理论和公式，便可设定和计算各个RC电路和分压电路的阻容元件的具体数值。当然上述数值可以根据演示实验的实际需要进行调整。According to the above values, and then according to electrical theories and formulas, the specific values of the resistance-capacitance elements of each RC circuit and voltage divider circuit can be set and calculated. Of course, the above values can be adjusted according to the actual needs of the demonstration experiment.
在母案申请中，申请人还对神经元爆发不同钠离子通道的动作电位的过程，对记忆的形成机制，对短时程记忆和长时程记忆的形成及转换等进行详细分析，限于篇幅在本申请省略。In the parent application, the applicant also conducts a detailed analysis of the process of neurons bursting action potentials of different sodium ion channels, the formation mechanism of memory, the formation and conversion of short-term memory and long-term memory, etc., due to space limitations. omitted in this application.
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| CN111275178A (en) | 2020-06-12 |
| CN104899640A (en) | 2015-09-09 |
| CN111291873A (en) | 2020-06-16 |
| CN107045649A (en) | 2017-08-15 |
| CN104899640B (en) | 2019-09-10 |
| CN107045649B (en) | 2020-06-02 |
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