[go: up one dir, main page]

CN111341663A - Method of forming a radio frequency device - Google Patents

Method of forming a radio frequency device Download PDF

Info

Publication number
CN111341663A
CN111341663A CN202010171428.8A CN202010171428A CN111341663A CN 111341663 A CN111341663 A CN 111341663A CN 202010171428 A CN202010171428 A CN 202010171428A CN 111341663 A CN111341663 A CN 111341663A
Authority
CN
China
Prior art keywords
forming
layer
opening
radio frequency
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010171428.8A
Other languages
Chinese (zh)
Inventor
刘张李
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Original Assignee
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huahong Grace Semiconductor Manufacturing Corp filed Critical Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority to CN202010171428.8A priority Critical patent/CN111341663A/en
Publication of CN111341663A publication Critical patent/CN111341663A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01Manufacture or treatment
    • H10D62/021Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • H10D62/151Source or drain regions of field-effect devices of IGFETs 

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)

Abstract

The invention provides a method for forming a radio frequency device, which comprises the steps of forming a first opening and a second opening in a semiconductor substrate; forming oxide layers in the first opening and the second opening respectively, wherein the surfaces of the oxide layers are lower than the surface of the semiconductor substrate; and forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode. That is, by forming the oxide layer between the semiconductor substrate and the polysilicon layer, the semiconductor substrate and the polysilicon layer are isolated by the oxide layer to form a barrier between the substrate and the polysilicon layer through the oxide layer, thereby reducing the parasitic capacitance between the polysilicon layer and the semiconductor substrate, that is, reducing the parasitic capacitance of the source and the drain. Furthermore, the parasitic capacitance of the radio frequency device is reduced, so that the performance of the radio frequency device is improved.

Description

射频器件的形成方法Method of forming a radio frequency device

技术领域technical field

本发明涉及半导体技术领域,特别涉及一种射频器件的形成方法。The present invention relates to the technical field of semiconductors, in particular to a method for forming a radio frequency device.

背景技术Background technique

射频开关器件是一种用于通讯领域信号开关的器件,具有结构简单,使用范围广,成本低,耗电低,易于安装,可靠性极高等优点,可广泛用于载波电话切换,有线电视信号切换,有线电视信号开关等领域。在其工作时,部分区域处于导通状态,部分区域处于关断状态。射频器件是一种有很好的市场的器件。特别是随着通信技术的广泛应用,它作为一种新型功率器件将得到越来越多的重视。射频器件中存在寄生电容,通常情况下,在射频器件中需要低寄生电容,以满足射频器件的性能要求。然而,在现有的射频器件的工艺中,形成的射频器件中存在较大的寄生电容,而大型的寄生电容会严重的影响器件的性能,并且射频器件作为功率开关型处理器件,如果存在大型的寄生电容,会降低射频器件的性能,从而影响处理的能力。RF switch device is a device used for signal switching in the field of communication. It has the advantages of simple structure, wide application range, low cost, low power consumption, easy installation, high reliability, etc. It can be widely used in carrier telephone switching, cable TV signal switch, cable TV signal switch and other fields. During its operation, some regions are in an on state, and some regions are in an off state. Radio frequency device is a kind of device that has a very good market. Especially with the wide application of communication technology, it will get more and more attention as a new type of power device. There are parasitic capacitances in radio frequency devices. Generally, low parasitic capacitances are required in radio frequency devices to meet the performance requirements of radio frequency devices. However, in the existing process of radio frequency device, there is a large parasitic capacitance in the formed radio frequency device, and the large parasitic capacitance will seriously affect the performance of the device, and the radio frequency device, as a power switching type processing device, if there is a large parasitic capacitance The parasitic capacitance will degrade the performance of the RF device, thereby affecting the processing capability.

发明内容SUMMARY OF THE INVENTION

本发明的目的在于提供一种射频器件的形成方法,以解决现有技术中射频器件存在较大的寄生电容的问题。The purpose of the present invention is to provide a method for forming a radio frequency device, so as to solve the problem of large parasitic capacitance in the radio frequency device in the prior art.

为解决上述技术问题,本发明提供一种射频器件形成方法,包括:In order to solve the above technical problems, the present invention provides a method for forming a radio frequency device, comprising:

提供半导体衬底;provide semiconductor substrates;

在所述半导体衬底中形成第一开口和第二开口;forming a first opening and a second opening in the semiconductor substrate;

分别在所述第一开口和所述第二开口中形成氧化层,所述氧化层的表面低于所述半导体衬底的表面;forming an oxide layer in the first opening and the second opening respectively, and the surface of the oxide layer is lower than the surface of the semiconductor substrate;

在所述氧化层上形成多晶硅层,以形成源极和漏极;以及,forming a polysilicon layer on the oxide layer to form source and drain electrodes; and,

形成栅极结构,所述栅极结构位于所述源极和所述漏极之间的所述半导体衬底上。A gate structure is formed on the semiconductor substrate between the source and the drain.

可选的,在所述的射频器件的形成方法中,分别在所述第一开口和所述第二开口中形成氧化层的方法包括:Optionally, in the method for forming a radio frequency device, the method for forming an oxide layer in the first opening and the second opening respectively includes:

分别在所述第一开口和所述第二开口中形成第一氧化材料层;forming a first oxide material layer in the first opening and the second opening, respectively;

对所述第一氧化材料层进行研磨以形成第二氧化材料层;grinding the first oxide material layer to form a second oxide material layer;

去除部分厚度的所述第二氧化材料层,以形成所述氧化层。A partial thickness of the second oxide material layer is removed to form the oxide layer.

可选的,在所述的射频器件的形成方法中,通过干法刻蚀回刻的方法去除部分厚度的所述第二氧化材料层,以形成所述氧化层。Optionally, in the method for forming a radio frequency device, a part of the thickness of the second oxide material layer is removed by a dry etch-back method to form the oxide layer.

可选的,在所述的射频器件的形成方法中,所述氧化层为氧化硅层。Optionally, in the method for forming a radio frequency device, the oxide layer is a silicon oxide layer.

可选的,在所述的射频器件的形成方法中,所述氧化层的厚度为1000埃- 2000埃。Optionally, in the method for forming a radio frequency device, the thickness of the oxide layer is 1000 angstroms-2000 angstroms.

可选的,在所述的射频器件的形成方法中,所述半导体衬底表面形成有介质层,所述第一开口和所述第二开口均延伸贯穿所述介质层。Optionally, in the method for forming a radio frequency device, a dielectric layer is formed on the surface of the semiconductor substrate, and both the first opening and the second opening extend through the dielectric layer.

可选的,在所述的射频器件的形成方法中,所述介质层包括氧化硅层和位于所述氧化硅层上的氮化硅层。Optionally, in the method for forming a radio frequency device, the dielectric layer includes a silicon oxide layer and a silicon nitride layer on the silicon oxide layer.

可选的,在所述的射频器件的形成方法中,在所述氧化层上形成多晶硅层后,所述射频器件的形成方法还包括:去除所述介质层,以暴露出所述半导体衬底。Optionally, in the method for forming a radio frequency device, after forming a polysilicon layer on the oxide layer, the method for forming a radio frequency device further includes: removing the dielectric layer to expose the semiconductor substrate .

可选的,在所述的射频器件的形成方法中,在所述氧化层上形成多晶硅层,以形成源极和漏极的步骤中,形成的所述多晶硅层的表面高于所述半导体衬底的表面。Optionally, in the method for forming a radio frequency device, in the step of forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode, the surface of the formed polysilicon layer is higher than the semiconductor liner. bottom surface.

可选的,在所述的射频器件的形成方法中,所述多晶硅层的厚度为100埃- 500埃。Optionally, in the method for forming a radio frequency device, the polysilicon layer has a thickness of 100 angstroms to 500 angstroms.

在本发明提供的射频器件的形成方法中,通过在半导体衬底中形成第一开口和第二开口;分别在所述第一开口和所述第二开口中形成氧化层,所述氧化层的表面低于所述半导体衬底的表面;在所述氧化层上形成多晶硅层,以形成源极和漏极。即通过在所述半导体衬底与所述多晶硅层之间形成所述氧化层,通过所述氧化层将所述半导体衬底和所述多晶硅层隔离,以在所述衬底与所述多晶硅层之间形成阻挡,从而降低所述多晶硅层与所述半导体衬底之间的寄生电容,由此降低所述源极和所述漏极的寄生电容。进一步的,由于所述源极和所述漏极是通过氧化层和多晶硅层形成,由此可以控制所述多晶硅层的厚度,从而减少所述多晶硅层的厚度,进而减小所述多晶硅层在水平方向上的截面大小。降低所述源极和所述漏极的寄生电容,更进一步的,形成低寄生电容,提高射频器件的性能。In the method for forming a radio frequency device provided by the present invention, a first opening and a second opening are formed in a semiconductor substrate; an oxide layer is formed in the first opening and the second opening respectively, and the oxide layer is The surface is lower than the surface of the semiconductor substrate; a polysilicon layer is formed on the oxide layer to form source and drain electrodes. That is, by forming the oxide layer between the semiconductor substrate and the polysilicon layer, the semiconductor substrate and the polysilicon layer are isolated by the oxide layer, so that the substrate and the polysilicon layer are separated from each other. A barrier is formed therebetween, thereby reducing the parasitic capacitance between the polysilicon layer and the semiconductor substrate, thereby reducing the parasitic capacitance of the source electrode and the drain electrode. Further, since the source electrode and the drain electrode are formed by an oxide layer and a polysilicon layer, the thickness of the polysilicon layer can be controlled, thereby reducing the thickness of the polysilicon layer, thereby reducing the thickness of the polysilicon layer. The size of the section in the horizontal direction. The parasitic capacitance of the source electrode and the drain electrode is reduced, and further, low parasitic capacitance is formed, and the performance of the radio frequency device is improved.

附图说明Description of drawings

图1是本发明具体实施例提供的射频器件的形成方法的流程示意图;1 is a schematic flowchart of a method for forming a radio frequency device provided by a specific embodiment of the present invention;

图2-图7是本发明具体实施提供的射频器件的形成方法中形成的结构的示意图;2-7 are schematic diagrams of structures formed in a method for forming a radio frequency device provided by a specific implementation of the present invention;

其中,附图标记说明如下:Among them, the reference numerals are described as follows:

100-半导体衬底;110-介质层;111-氧化硅层;112-氮化硅层;113-第二氧化材料层;120-氧化层;130-多晶硅层;140-栅极结构;150-侧墙层。100-semiconductor substrate; 110-dielectric layer; 111-silicon oxide layer; 112-silicon nitride layer; 113-second oxide material layer; 120-oxide layer; 130-polysilicon layer; 140-gate structure; 150- side wall layer.

具体实施方式Detailed ways

以下结合附图和具体实施例对本发明提出的射频器件的形成方法作进一步详细说明。根据下面说明,本发明的优点和特征将更清楚。需说明的是,附图均采用非常简化的形式且均使用非精准的比例,仅用以方便、明晰地辅助说明本发明实施例的目的。The method for forming a radio frequency device proposed by the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that, the accompanying drawings are all in a very simplified form and in inaccurate scales, and are only used to facilitate and clearly assist the purpose of explaining the embodiments of the present invention.

本申请的核心思想在于,提供一种射频器件的形成方法,通过在半导体衬底中形成第一开口和第二开口;分别在所述第一开口和所述第二开口中形成氧化层,所述氧化层的表面低于所述半导体衬底的表面;在所述氧化层上形成多晶硅层,以形成源极和漏极。即通过在所述半导体衬底与所述多晶硅层之间形成所述氧化层,通过所述氧化层将所述半导体衬底和所述多晶硅层隔离,以通过所述氧化层在所述衬底与所述多晶硅层之间形成阻挡,由此降低所述多晶硅层与所述半导体衬底之间的寄生电容,从而降低所述源极和所述漏极的寄生电容。进一步的,通过控制所述多晶硅层的厚度减小所述多晶硅层在水平方向的截面大小,以降低所述源极和所述漏极的寄生电容,从而解决现有技术中射频器件存在较大的寄生电容的问题。The core idea of the present application is to provide a method for forming a radio frequency device, by forming a first opening and a second opening in a semiconductor substrate; forming an oxide layer in the first opening and the second opening respectively, so that the The surface of the oxide layer is lower than the surface of the semiconductor substrate; a polysilicon layer is formed on the oxide layer to form a source electrode and a drain electrode. That is, by forming the oxide layer between the semiconductor substrate and the polysilicon layer, the semiconductor substrate and the polysilicon layer are isolated by the oxide layer, so that the substrate can be separated from the substrate by the oxide layer. A barrier is formed between the polysilicon layer and the polysilicon layer, thereby reducing the parasitic capacitance between the polysilicon layer and the semiconductor substrate, thereby reducing the parasitic capacitance of the source electrode and the drain electrode. Further, the cross-sectional size of the polysilicon layer in the horizontal direction is reduced by controlling the thickness of the polysilicon layer, so as to reduce the parasitic capacitance of the source electrode and the drain electrode, thereby solving the problem that the radio frequency device in the prior art has a large size. the parasitic capacitance problem.

接下去,本申请将结合具体实施例做进一步描述。Next, the present application will be further described with reference to specific embodiments.

请参考图1,其为本发明具体实施例提供射频器件的形成方法的流程示意图。如图1所示,所述射频器件的形成方法包括:Please refer to FIG. 1 , which is a schematic flowchart of a method for forming a radio frequency device according to an embodiment of the present invention. As shown in FIG. 1, the formation method of the radio frequency device includes:

步骤S1:提供半导体衬底;Step S1: providing a semiconductor substrate;

步骤S2:在所述半导体衬底中形成第一开口和第二开口;Step S2: forming a first opening and a second opening in the semiconductor substrate;

步骤S3:分别在所述第一开口和所述第二开口中形成氧化层,所述氧化层的表面低于所述半导体衬底的表面;Step S3: respectively forming an oxide layer in the first opening and the second opening, and the surface of the oxide layer is lower than the surface of the semiconductor substrate;

步骤S4:在所述氧化层上形成多晶硅层,以形成源极和漏极;Step S4: forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode;

步骤S5:形成栅极结构,所述栅极结构位于所述源极和所述漏极之间的所述半导体衬底上。Step S5: forming a gate structure on the semiconductor substrate between the source electrode and the drain electrode.

具体的,请参考图2至图7,其为本发明具体实施例提供的射频器件的形成方法中形成的结构示意图。如图2所示,在步骤S1中,提供半导体衬底100,所述半导体衬底100的材质可以包括但不限于:Si(硅)、SiC(碳硅)、SiGe(锗硅)、 SiGeC(碳锗硅)、Ge合金、GeAs(砷锗)、InAs(砷化铟)和InP(磷化铟)其中的一种或者多种组合。所述半导体衬底100上形成有介质层110。所述介质层110包括氧化硅层111和位于所述氧化硅层111上的氮化硅层112。所述介质层110可以在后续工艺中保护所述半导体衬底100。Specifically, please refer to FIG. 2 to FIG. 7 , which are schematic structural diagrams formed in a method for forming a radio frequency device provided by a specific embodiment of the present invention. As shown in FIG. 2 , in step S1, a semiconductor substrate 100 is provided, and the material of the semiconductor substrate 100 may include but not limited to: Si (silicon), SiC (silicon carbon), SiGe (silicon germanium), SiGeC ( Carbon germanium silicon), Ge alloy, GeAs (arsenic germanium), InAs (indium arsenide) and InP (indium phosphide) one or more combinations thereof. A dielectric layer 110 is formed on the semiconductor substrate 100 . The dielectric layer 110 includes a silicon oxide layer 111 and a silicon nitride layer 112 on the silicon oxide layer 111 . The dielectric layer 110 can protect the semiconductor substrate 100 in subsequent processes.

如图3所示,在步骤S2中,在所述半导体衬底100中形成第一开口和第二开口;并且所述第一开口和所述第二开口均延伸贯穿所述介质层110。优选的,所述开口的深度可以是1000埃-5000埃,以便于后续工艺中材料的填充以及在后续工艺在所述开口中形成一定厚度的材料层。可以通过干法刻蚀的方法在所述半导体衬底100中形成所述第一开口和所述第二开口。所述干法刻蚀工艺采用的刻蚀气体可以为氯气、溴化氢、三氯化硼和氩气其中的一种或多种组合,但不限于此,也可以使用其他的气体对所述氧化层120进行所述干法刻蚀。As shown in FIG. 3 , in step S2 , a first opening and a second opening are formed in the semiconductor substrate 100 ; and both the first opening and the second opening extend through the dielectric layer 110 . Preferably, the depth of the opening may be 1000 angstroms to 5000 angstroms, so as to facilitate the filling of materials in the subsequent process and the formation of a material layer of a certain thickness in the opening in the subsequent process. The first opening and the second opening may be formed in the semiconductor substrate 100 by dry etching. The etching gas used in the dry etching process can be one or more combinations of chlorine, hydrogen bromide, boron trichloride and argon, but is not limited to this, and other gases can also be used to The oxide layer 120 is subjected to the dry etching.

如图5所示,在步骤S3中,分别在所述第一开口和所述第二开口中形成氧化层120,所述氧化层120的表面低于所述半导体衬底100的表面;具体的,分别在所述第一开口和所述第二开口中形成氧化层120的方法包括:分别在所述第一开口和所述第二开口中形成第一氧化材料层;如图4所示,对所述第一氧化材料层进行研磨以形成第二氧化材料层113;可以通过化学机械研磨的方法对所述第一氧化材料层进行研磨,以形成所述第二氧化材料层113,从而保证后续形成的各层的平整度。然后,如图5所示,去除部分厚度的所述第二氧化材料层113,以形成所述氧化层120。优选的,可以通过干法刻蚀回刻的方法去除部分厚度的所述第二氧化材料层,以形成所述氧化层120。较佳的,所述氧化层120 为氧化硅层111,且所述氧化层120的厚度为1000埃-2000埃。以通过所述氧化层120隔离所述半导体衬底100。As shown in FIG. 5, in step S3, an oxide layer 120 is formed in the first opening and the second opening respectively, and the surface of the oxide layer 120 is lower than the surface of the semiconductor substrate 100; specifically , the method for forming the oxide layer 120 in the first opening and the second opening respectively includes: forming a first oxide material layer in the first opening and the second opening respectively; as shown in FIG. 4 , The first oxide material layer is ground to form the second oxide material layer 113; the first oxide material layer can be ground by chemical mechanical polishing to form the second oxide material layer 113, so as to ensure The flatness of the subsequently formed layers. Then, as shown in FIG. 5 , a partial thickness of the second oxide material layer 113 is removed to form the oxide layer 120 . Preferably, a part of the thickness of the second oxide material layer may be removed by a dry etch-back method to form the oxide layer 120 . Preferably, the oxide layer 120 is a silicon oxide layer 111, and the thickness of the oxide layer 120 is 1000 angstroms-2000 angstroms. The semiconductor substrate 100 is isolated by the oxide layer 120 .

如图6所示,在步骤S4中,在所述氧化层120上形成多晶硅层130,以形成源极和漏极;形成所述多晶硅层的方法包括,在所述氧化层120上沉积多晶硅材料层,并对所述多晶硅材料层进行平坦化处理。具体的可以采用化学机械研磨的方法对所述多晶硅材料层进行平坦化处理,以形成具有平整的表面的所述多晶硅层130,从而保证所述多晶硅层130表面的平整度。并且所述多晶硅层 130的表面高于所述半导体衬底100的表面。As shown in FIG. 6 , in step S4 , a polysilicon layer 130 is formed on the oxide layer 120 to form a source electrode and a drain electrode; the method for forming the polysilicon layer includes depositing a polysilicon material on the oxide layer 120 layer, and planarizing the polysilicon material layer. Specifically, chemical mechanical polishing may be used to planarize the polysilicon material layer to form the polysilicon layer 130 having a flat surface, thereby ensuring the flatness of the surface of the polysilicon layer 130 . And the surface of the polysilicon layer 130 is higher than the surface of the semiconductor substrate 100 .

优选的,所述多晶硅层130的厚度为100埃-500埃。由于所述源极和所述漏极是通过所述氧化层120和所述多晶硅层130形成,因此通过控制所述多晶硅层130的厚度,将所述多晶硅层130的厚度设置为100埃-500埃。从而减小所述多晶硅层130在水平方向上的截面大小,进而减小所述源极与所述漏极的寄生电容。进一步的,形成较小的寄生电容,提高器件的性能。并且,所述氧化层120的厚度大于所述多晶硅层130的厚度。由此,通过所述氧化层120隔离所述半导体衬底100与所述多晶硅层130,即通过所述氧化层120在所述衬底与所述多晶硅层130之间形成阻挡,以减小所述半导体衬底100与所述多晶硅层 130之间的寄生电容,进而减小所述源极和所述漏极的寄生电容。更进一步的,减小射频器件中的寄生电容,提高所述射频器件的性能。Preferably, the thickness of the polysilicon layer 130 is 100 angstroms to 500 angstroms. Since the source electrode and the drain electrode are formed by the oxide layer 120 and the polysilicon layer 130 , the thickness of the polysilicon layer 130 is set to 100 angstroms to 500 angstroms by controlling the thickness of the polysilicon layer 130 Egypt. Therefore, the cross-sectional size of the polysilicon layer 130 in the horizontal direction is reduced, thereby reducing the parasitic capacitance of the source electrode and the drain electrode. Further, a smaller parasitic capacitance is formed to improve the performance of the device. Moreover, the thickness of the oxide layer 120 is greater than the thickness of the polysilicon layer 130 . Therefore, the semiconductor substrate 100 and the polysilicon layer 130 are isolated by the oxide layer 120, that is, a barrier is formed between the substrate and the polysilicon layer 130 by the oxide layer 120, so as to reduce the amount of The parasitic capacitance between the semiconductor substrate 100 and the polysilicon layer 130 is reduced, thereby reducing the parasitic capacitance of the source electrode and the drain electrode. Further, the parasitic capacitance in the radio frequency device is reduced, and the performance of the radio frequency device is improved.

在本申请的实施例中,在所述氧化层上形成多晶硅层后,所述射频器件的形成方法还包括:去除所述介质层110,以暴露出所述半导体衬底100。In the embodiment of the present application, after the polysilicon layer is formed on the oxide layer, the method for forming the radio frequency device further includes: removing the dielectric layer 110 to expose the semiconductor substrate 100 .

如图7所示,在步骤S5中,形成栅极结构140,所述栅极结构140位于所述源极和所述漏极之间的所述半导体衬底100上。所述栅极结构140可以包括栅介质层和位于所述栅介质层上的栅极。在形成所述栅极结构140后,所述射频器件的形成方法还包括,在所述栅极结构140两侧形成侧墙层150,以通过所述侧墙层150保护所述栅极结构140。较佳的,所述侧墙层150的材质可以为氧化硅和氮化硅其中的一种或者多种组合。As shown in FIG. 7 , in step S5 , a gate structure 140 is formed, and the gate structure 140 is located on the semiconductor substrate 100 between the source electrode and the drain electrode. The gate structure 140 may include a gate dielectric layer and a gate electrode on the gate dielectric layer. After the gate structure 140 is formed, the method for forming the radio frequency device further includes: forming spacer layers 150 on both sides of the gate structure 140 to protect the gate structure 140 through the spacer layers 150 . Preferably, the material of the spacer layer 150 may be one or more combinations of silicon oxide and silicon nitride.

综上所述,在本发明提供的射频器件的形成方法中,通过在半导体衬底中形成第一开口和第二开口;分别在所述第一开口和所述第二开口中形成氧化层,所述氧化层的表面低于所述半导体衬底的表面;在所述氧化层上形成多晶硅层,以形成源极和漏极。即通过在所述半导体衬底与所述多晶硅层之间形成所述氧化层,通过所述氧化层将所述半导体衬底和所述多晶硅层隔离,以通过所述氧化层在所述衬底与所述多晶硅层之间形成阻挡,从而降低所述多晶硅层与所述半导体衬底之间的寄生电容,即降低所述源极和所述漏极的寄生电容。进一步的,由于所述源极和所述漏极是通过氧化层和多晶硅层形成的,由此可以控制所述多晶硅层的厚度,从而可以减少所述多晶硅层的厚度,以减小所述多晶硅层在水平方向上的截面大小。从而降低所述源极和所述漏极的寄生电容,进而形成低寄生电容,提高射频器件的性能。To sum up, in the method for forming a radio frequency device provided by the present invention, by forming a first opening and a second opening in a semiconductor substrate; and forming an oxide layer in the first opening and the second opening respectively, The surface of the oxide layer is lower than the surface of the semiconductor substrate; a polysilicon layer is formed on the oxide layer to form a source electrode and a drain electrode. That is, by forming the oxide layer between the semiconductor substrate and the polysilicon layer, the semiconductor substrate and the polysilicon layer are isolated by the oxide layer, so that the substrate can be separated from the substrate by the oxide layer. A barrier is formed between the polysilicon layer and the polysilicon layer, thereby reducing the parasitic capacitance between the polysilicon layer and the semiconductor substrate, that is, reducing the parasitic capacitance of the source electrode and the drain electrode. Further, since the source electrode and the drain electrode are formed by an oxide layer and a polysilicon layer, the thickness of the polysilicon layer can be controlled, so that the thickness of the polysilicon layer can be reduced to reduce the polysilicon layer. The cross-sectional size of the layer in the horizontal direction. Therefore, the parasitic capacitance of the source electrode and the drain electrode is reduced, thereby forming a low parasitic capacitance and improving the performance of the radio frequency device.

上述描述仅是对本发明较佳实施例的描述,并非对本发明范围的任何限定,本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰,均属于权利要求书的保护范围。The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes and modifications made by those of ordinary skill in the field of the present invention based on the above disclosure all belong to the protection scope of the claims.

Claims (10)

1. A method of forming a radio frequency device, comprising:
providing a semiconductor substrate;
forming a first opening and a second opening in the semiconductor substrate;
forming oxide layers in the first opening and the second opening respectively, wherein the surfaces of the oxide layers are lower than the surface of the semiconductor substrate;
forming a polysilicon layer on the oxide layer to form a source electrode and a drain electrode; and the number of the first and second groups,
and forming a gate structure, wherein the gate structure is positioned on the semiconductor substrate between the source electrode and the drain electrode.
2. The method of forming a radio frequency device according to claim 1, wherein the method of forming an oxide layer in each of the first opening and the second opening includes:
forming a first oxide material layer in the first opening and the second opening, respectively;
grinding the first oxide material layer to form a second oxide material layer;
and removing part of the thickness of the second oxide material layer to form the oxide layer.
3. The method for forming a radio frequency device according to claim 2, wherein the second oxide material layer is removed by a dry etching back method to form the oxide layer.
4. The method of claim 3, wherein the oxide layer is a silicon oxide layer.
5. The method of claim 1, wherein the oxide layer has a thickness of 1000 a to 5000 a.
6. The method of claim 1, wherein a dielectric layer is formed on the surface of the semiconductor substrate, and the first opening and the second opening both extend through the dielectric layer.
7. The method of claim 6, wherein the dielectric layer comprises a silicon oxide layer and a silicon nitride layer on the silicon oxide layer.
8. The method of forming a radio frequency device of claim 6, wherein after forming a polysilicon layer on the oxide layer, the method of forming a radio frequency device further comprises: and removing the dielectric layer to expose the semiconductor substrate.
9. The method of forming a radio frequency device according to claim 1, wherein in the step of forming a polysilicon layer on the oxide layer to form the source and the drain, a surface of the polysilicon layer is formed to be higher than a surface of the semiconductor substrate.
10. The method of forming a radio frequency device according to claim 1, wherein the polysilicon layer has a thickness of 100 a to 500 a.
CN202010171428.8A 2020-03-12 2020-03-12 Method of forming a radio frequency device Pending CN111341663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010171428.8A CN111341663A (en) 2020-03-12 2020-03-12 Method of forming a radio frequency device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010171428.8A CN111341663A (en) 2020-03-12 2020-03-12 Method of forming a radio frequency device

Publications (1)

Publication Number Publication Date
CN111341663A true CN111341663A (en) 2020-06-26

Family

ID=71182396

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010171428.8A Pending CN111341663A (en) 2020-03-12 2020-03-12 Method of forming a radio frequency device

Country Status (1)

Country Link
CN (1) CN111341663A (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5908313A (en) * 1996-12-31 1999-06-01 Intel Corporation Method of forming a transistor
US20020190344A1 (en) * 2001-06-15 2002-12-19 Michejda John A. Semiconductor device having a ghost source/drain region and a method of manufacture therefor
US20030008438A1 (en) * 2000-11-15 2003-01-09 Abbott Todd R. Method of forming a field effect transistor
CN1437769A (en) * 1999-12-30 2003-08-20 英特尔公司 Field effect transistor structure with partially isolated source/drain junctions and methods of making same
CN1689149A (en) * 2002-10-07 2005-10-26 因芬尼昂技术股份公司 Field effect transistor with local source/drain insulation and associated method of production
US20050274951A1 (en) * 2004-06-14 2005-12-15 Howard Gregory E MOSFET having channel in bulk semiconductor and source/drain on insulator, and method of fabrication
CN102769016A (en) * 2012-08-14 2012-11-07 北京大学 A kind of anti-radiation CMOS device and preparation method thereof
CN103681355A (en) * 2013-12-18 2014-03-26 北京大学 Method for preparing quasi-SOI source-drain field effect transistor device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5908313A (en) * 1996-12-31 1999-06-01 Intel Corporation Method of forming a transistor
CN1437769A (en) * 1999-12-30 2003-08-20 英特尔公司 Field effect transistor structure with partially isolated source/drain junctions and methods of making same
US20030008438A1 (en) * 2000-11-15 2003-01-09 Abbott Todd R. Method of forming a field effect transistor
US20020190344A1 (en) * 2001-06-15 2002-12-19 Michejda John A. Semiconductor device having a ghost source/drain region and a method of manufacture therefor
CN1689149A (en) * 2002-10-07 2005-10-26 因芬尼昂技术股份公司 Field effect transistor with local source/drain insulation and associated method of production
US20050274951A1 (en) * 2004-06-14 2005-12-15 Howard Gregory E MOSFET having channel in bulk semiconductor and source/drain on insulator, and method of fabrication
CN102769016A (en) * 2012-08-14 2012-11-07 北京大学 A kind of anti-radiation CMOS device and preparation method thereof
CN103681355A (en) * 2013-12-18 2014-03-26 北京大学 Method for preparing quasi-SOI source-drain field effect transistor device

Similar Documents

Publication Publication Date Title
US11765882B2 (en) Method for fabricating semiconductor device
TWI663688B (en) Deep trench isolation structures
US20170077258A1 (en) Preventing leakage inside air-gap spacer during contact formation
CN115295494B (en) Manufacturing method of semiconductor structure
CN112582397B (en) Semiconductor device and method for manufacturing the same
CN110071046A (en) The preparation method and semiconductor structure of semiconductor structure
CN115020212B (en) Method for manufacturing semiconductor device
US20220285403A1 (en) Semiconductor wafer with devices having different top layer thicknesses
US11756885B2 (en) Method for fabricating semiconductor device with metal spacers
WO2016124110A1 (en) Semiconductor device and manufacturing method therefor, and electronic device
CN111384160B (en) Manufacturing method of field effect transistor, field effect transistor and gate structure
CN111341663A (en) Method of forming a radio frequency device
CN114446788A (en) Method of forming a semiconductor structure
CN104347507B (en) The forming method of semiconductor devices
CN103426745B (en) The formation method of semiconductor structure
CN106601679B (en) A kind of semiconductor device and its manufacturing method, electronic device
CN118352382A (en) Semiconductor device, manufacturing method thereof, integrated circuit and electronic equipment
KR101973269B1 (en) Oxide Semiconductor Thin Film Transistor and Fabricating Method Thereof
US11257711B1 (en) Fabricating method of transistors without dishing occurred during CMP process
US11605648B2 (en) Semiconductor structure and manufacturing method thereof
US8729645B2 (en) Substrate backside peeling control
CN116487261A (en) Transistor and manufacturing method thereof, memory, electronic device
CN117524877A (en) SGT device, manufacturing method thereof and electronic device
CN117393431A (en) Semiconductor device and preparation method thereof
CN103871890B (en) Mos transistor and forming method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20200626

RJ01 Rejection of invention patent application after publication