CN111332152A - Activation and dormancy circuit and method applied to BMS (battery management system) of electric bicycle - Google Patents
Activation and dormancy circuit and method applied to BMS (battery management system) of electric bicycle Download PDFInfo
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- CN111332152A CN111332152A CN202010158059.9A CN202010158059A CN111332152A CN 111332152 A CN111332152 A CN 111332152A CN 202010158059 A CN202010158059 A CN 202010158059A CN 111332152 A CN111332152 A CN 111332152A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- B60L58/00—Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles
- B60L58/10—Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B62—LAND VEHICLES FOR TRAVELLING OTHERWISE THAN ON RAILS
- B62M—RIDER PROPULSION OF WHEELED VEHICLES OR SLEDGES; POWERED PROPULSION OF SLEDGES OR SINGLE-TRACK CYCLES; TRANSMISSIONS SPECIALLY ADAPTED FOR SUCH VEHICLES
- B62M6/00—Rider propulsion of wheeled vehicles with additional source of power, e.g. combustion engine or electric motor
- B62M6/40—Rider propelled cycles with auxiliary electric motor
- B62M6/45—Control or actuating devices therefor
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- B60L2200/00—Type of vehicles
- B60L2200/46—Vehicles with auxiliary ad-on propulsions, e.g. add-on electric motor kits for bicycles
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
- Y02T10/00—Road transport of goods or passengers
- Y02T10/60—Other road transportation technologies with climate change mitigation effect
- Y02T10/70—Energy storage systems for electromobility, e.g. batteries
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- Electric Propulsion And Braking For Vehicles (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The present application relates to an active sleep circuit and method applied to an electric bicycle BMS, the active sleep circuit applied to the electric bicycle BMS including: the control switch comprises a first switch end, a second switch end and a control end; the control end is used for controlling the connection or disconnection of the first switch end and the second switch end; and the input end of the OR logic gate is connected with a key signal end of the key system, and the output end of the OR logic gate is connected with the control end of the control switch. The activation sleep circuit and the activation sleep method applied to the electric bicycle BMS output the activation signal to the OR logic gate through the key signal terminal by the key system, so that the OR logic gate controls the first switch terminal and the second switch terminal to be switched to the connection state through the control terminal to connect the battery management system and the battery to activate the battery management system, the battery management system is activated in a hardware mode, the hardware interaction of the battery management system is increased, and the reliability of the battery management system is improved.
Description
Technical Field
The invention relates to the field of electric bicycles, in particular to an activation and dormancy circuit and a method applied to an electric bicycle BMS.
Background
The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.
The new energy industry in China is rapidly developed, in electric two-wheel and three-wheel projects, BMS (Battery management System) dormancy is a self-maintenance low-power-consumption mode, and because BMS takes electricity from a BATTERY and realizes voltage conversion by reducing DC-DC (direct current-direct current), low power consumption is difficult to realize, so that the low power consumption becomes a pain point in the industry and also becomes a difficult point in the industry. The working modes of the traditional electric two-three-wheeled vehicle are as follows:
(1) and (3) standing and storing state: the BMS enters a low power consumption mode (controls the charging and discharging MOS to be closed and in a discharging state), P + and P-have output and stand by, and the MCU enters the low power consumption mode to wait for timed awakening or communication awakening;
(2) and (3) discharging state: the BMS is awakened at regular time or in communication, and enters a normal working mode to acquire and protect the battery state;
(3) the charging state is as follows: the BMS awakens regularly or detects the access of a charger, enters a normal working mode and acquires and protects the battery state;
however, this mode of operation has the following disadvantages:
(1) the P + and P-of the battery have output all the time, and potential safety hazards exist;
(2) the BMS has multiple working modes, the design complexity of the BMS is increased, and the reliability of the system is reduced;
(3) under the state of not discharging or the state of stewing, BMS switches over the work in low-power consumption mode and mode back and forth, has BMS power consumptive equally, does not use for a long time and causes the wasting of resources.
(4) The BMS has no dormant zero power consumption mode, if the BMS stores the power for a long time, the BMS consumes the power of the battery completely due to low power consumption, and the battery is fed;
(5) the battery system and the host have no hardware interaction signals.
Disclosure of Invention
In view of the above, there is a need to provide an activation sleep circuit and method applied to an electric bicycle BMS, aiming to activate a battery management system in a hardware manner to improve the reliability of the battery management system.
An active sleep circuit applied to an electric bicycle BMS, comprising:
the control switch comprises a first switch end, a second switch end and a control end, wherein the first switch end is connected with a battery of the electric bicycle, and the second switch end is connected with a battery management system of the electric bicycle; the control end is used for controlling the connection or disconnection of the first switch end and the second switch end;
the input end of the OR logic gate is connected with a key signal end of the key system, and the output end of the OR logic gate is connected with the control end of the control switch; when the key signal end outputs an activation signal, the OR logic gate controls the first switch end and the second switch end to be switched to a connection state through the control end so as to connect the battery management system and the battery and activate the battery management system.
Preferably, the input end of the or logic gate is further connected to a top signal end of the battery management system, and after the battery management system is connected to the battery, a top signal is output through the top signal end to maintain the first switch end and the second switch end in a connection state.
Preferably, when the key signal terminal of the key system outputs a revocation signal, the battery management system disconnects the battery and enters a sleep state.
Preferably, the input end of the or logic gate is further connected to a charging activation signal end, when charging is performed, the charging activation signal end outputs an activation signal, and the or logic gate controls the first switch end and the second switch end to switch to a connection state through the control end, so that the battery management system is connected with the battery to activate the battery management system.
Preferably, the key system comprises a key switch, one end of the key switch is connected to the battery, and the other end of the key switch is connected to the key signal end.
Preferably, when the battery management system detects that the key activation signal terminal and the charging activation signal terminal output the revocation signal, after the battery management system has a preset delay time, the battery management system controls the self-top signal terminal to output the revocation signal, so that the or logic gate controls the first switch terminal and the second switch terminal to switch to the off state to disconnect the battery management system and the battery.
Preferably, when the key signal terminal, the charging activation signal terminal and the top signal terminal output the activation signal, high levels are respectively output to the input terminal of the or logic gate;
and when the key signal end, the charging activation signal end and the top signal end output the canceling signal, respectively outputting a low level to the input end of the OR logic gate.
An active sleep method applied to an electric bicycle BMS, comprising the steps of:
when the OR logic gate receives an activation signal output by the key signal end, the OR logic gate controls the first switch end and the second switch end of the control switch to be switched to a connection state through the control end of the control switch;
the battery management system is connected with the battery through the first switch end and the second switch end of the control switch to activate the battery management system.
Preferably, when the battery management system is connected to the battery and activated, the battery management system outputs an off-top signal to the or logic gate to maintain the first switch terminal and the second switch terminal in a connected state.
Preferably, when the input terminal of the or logic gate receives an activation signal output by a charging activation signal terminal during charging, the or logic gate controls the first switch terminal and the second switch terminal to switch to a connection state through the control terminal, so that the battery management system is connected with the battery to activate the battery management system, and,
when the OR logic gate receives the cancel signal output by the key activation signal end and the cancel signal output by the charging activation signal end, the battery management system outputs the cancel signal through the self-top signal end after preset delay time, so that the OR logic gate controls the first switch end and the second switch end to be switched to an off state to disconnect the battery management system and the battery.
Compared with the prior art, the activation sleep circuit and the activation sleep method applied to the electric bicycle BMS output the activation signal to the or logic gate through the key signal terminal by the key system, so that the or logic gate controls the first switch terminal and the second switch terminal to be switched to the connection state through the control terminal to connect the battery management system and the battery to activate the battery management system, the battery management system is activated in a hardware manner, the hardware interaction of the battery management system is increased, and the reliability of the battery management system is improved.
Further, when the battery management system detects that the key activation signal terminal and the charging activation signal terminal output the revocation signal, the battery management system controls the self-top signal terminal to output the revocation signal, so that the or logic gate controls the first switch terminal and the second switch terminal to be switched to the off state to disconnect the battery management system and the battery.
In addition, the activation sleep circuit and method applied to the electric bicycle BMS activates the battery management system through the key system or the charging activation signal terminal, so that the battery management system has only a sleep mode and an operation mode, thus simplifying the design of the battery management system and improving the reliability of the battery management system.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic configuration diagram of an active sleep circuit applied to an electric bicycle BMS.
Fig. 2 is a flowchart of an active sleep method applied to an electric bicycle BMS.
Description of the main elements
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
So that the manner in which the above recited objects, features and advantages of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. In addition, the embodiments and features of the embodiments of the present application may be combined with each other without conflict. In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention, and the described embodiments are merely a subset of the embodiments of the present invention, rather than a complete embodiment. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
In various embodiments of the present invention, for convenience in description and not in limitation, the term "coupled" as used in the specification and claims of the present application is not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships are changed accordingly.
In the present embodiment, the active sleep circuit and method applied to the electric bicycle BMS are exemplified in that the active signal is at a high level, but those skilled in the art will appreciate that the active signal may also be active at a low level and that the relevant circuit connections are correspondingly modified to be active at a low level according to the above-described embodiments.
Fig. 1 is a schematic configuration diagram of an active sleep circuit applied to an electric bicycle BMS, which includes a control switch 10 and an or logic gate 20, as shown in fig. 1. The control switch 10 is used to control connection or disconnection between the battery 40 and the battery management system 30(BMS), or the logic gate 20 is used to control connection or disconnection of the control switch 10 according to a signal of an input terminal, and the battery management system 30 gets power from the battery 40 to activate the battery management system 30 when the control switch 10 is closed.
The control switch 10 comprises a first switch terminal 11, a second switch terminal 12 and a control terminal 13. The first switch terminal 11 is connected to a battery 40 of the electric bicycle, and the second switch terminal 12 is connected to a battery management system 30 of the electric bicycle. When the first switch terminal 11 is connected to the second switch terminal 12, the battery management system 30 is connected to the battery 40 of the electric bicycle through the control switch 10, so that the battery management system 30 is powered to detect the circuit, temperature, etc. of the battery 40, thereby improving the utilization rate of the battery 40 and preventing the battery 40 from being overcharged and overdischarged. The control terminal 13 is used for controlling the first switch terminal 11 and the second switch terminal 12 to be connected (i.e. closed) or disconnected. Specifically, when the control terminal 13 is at a high level, the first switch terminal 11 and the second switch terminal 12 are switched to a conducting state; when the control terminal 13 is at a low level (or loses power), the first switch terminal 11 and the second switch terminal 12 are switched to an off state. A variety of electronic devices having a control terminal 13 for connecting or disconnecting a switch terminal can be used by those skilled in the art, and preferably, the control switch 10 can be a MOS Transistor, i.e., a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), the first switch terminal 11 is a D-pole (drain), the second switch terminal 12 is an S-pole (source), and the control terminal 13 is a G-pole (gate).
The or logic gate 20 may be a logic circuit, or may be a control unit (e.g., a CPU or a single chip microcomputer) that is implemented or operated by a software program. The or logic gate 20 is used for performing an or operation according to the input signal and outputting a corresponding result. Specifically, if a high level exists in the input end, the output end outputs the high level; and if the input ends are all low levels, the output end outputs the low levels. In the present embodiment, the input terminal of the or logic gate 20 is connected to the charging activation signal terminal, the key signal terminal of the key switch 61 of the key system 60, and the self-lifting signal terminal of the battery management system 30, and the output terminal is connected to the control terminal 13 of the control switch 10.
The charging activation signal end is connected with a charging circuit 50 of the electric bicycle, and outputs a high level or high level pulse signal and an activation signal when the electric bicycle is charged; when the charging is finished, the charging activation signal end outputs a low level which is a cancel signal. In this embodiment, the key system 60 includes a key switch 61, and when a user inserts a key into a lock of the electric bicycle and turns the key, the key switch 61 can be turned on or off. In the present embodiment, one end of the key switch 61 is connected to the battery 40, and the other end is connected to the key signal terminal. Thus, when the key switch 61 is in the closed state, the key signal terminal is connected to the battery 40 through the key switch 61 to output a high level, and at this time, an activation signal is output. When the key switch 61 is in the off state, the key signal terminal is in a floating state, and a low level (power-off state) is output, and at this time, a cancel signal is output. The signal terminal from the top is connected to the battery management system 30, and the battery management system 30 controls the level of the output from the signal terminal from the top. In this embodiment, when the battery management system 30 and the battery 40 are connected to each other, the battery management system 30 controls the lever to output a high level (i.e., an active signal) from the top signal terminal, and the first switch terminal 11 and the second switch terminal 12 are maintained in a connected state by outputting the top signal from the top signal terminal. When the battery management system 30 is disconnected from the battery 40, the battery management system 30 controls the output of a low level (power off) from the top signal terminal to be a cancel signal after a delay time elapses. During the delay time, the battery management system 30 can store the relevant data in time. Accordingly, a high level is outputted at either one of the charge enable signal terminal and the self-top signal terminal, or the output terminal of the or logic gate 20 outputs a high level, so that the control switch 10 controls the first switch and the second switch terminal 12 to be switched to the connection state.
Fig. 2 is a flowchart of an active sleep method applied to an electric bicycle BMS. The active sleep method applied to the electric bicycle BMS is applied to the above-described active sleep circuit applied to the electric bicycle BMS. As shown in fig. 2, the active sleep method includes steps S201 to S205.
Step S201: the activation signal is output to an input of the or logic gate 20. In this step, the output of the activation signal may be in the following two ways: when the key system 60 is triggered such that the key switch 61 is closed, the battery 40 outputs an activation signal (high level) to the input terminal of the or logic gate 20 through the key switch 61 and the key signal terminal. In the charging, the charging circuit 50 outputs an activation signal (high level) to the input terminal of the or logic gate 20 through the charging activation signal terminal.
Step S202: the or logic gate 20 outputs a high level to the control terminal 13 of the control switch 10 through the output terminal so that the first switch terminal 11 and the second switch terminal 12 of the control switch 10 are switched to the connection state.
Step S203: the battery 40 is connected to the battery management system 30 by controlling the first switch terminal 11 and the second switch terminal 12 of the switch 10, so that the battery management system 30 gets power from the battery 40 to activate the battery management system 30. Then, the battery management system 30 outputs a top signal to the or logic gate 20 to maintain the first switch terminal 11 and the second switch terminal 12 in a connected state. At this time, even if the activation signal terminal outputs the deactivation signal (low level or power loss) or the key signal terminal outputs the deactivation signal (low level), since the high level is still output from the top signal terminal, the output terminal of the or logic gate 20 still outputs the high level, so that the first switch terminal 11 and the second switch terminal 12 can be continuously controlled to maintain the connection state, so that the battery management system 30 can continue to operate by continuously receiving power from the battery 40.
Step S204: when the charging circuit 50 and the key system 60 respectively output the revocation signal to the or logic gate 20, the battery management system 30 outputs the revocation signal through the self-top signal terminal after a preset delay time, at this time, three input signals of the or logic gate 20 are all at a low level, so that the output terminal of the or logic gate 20 outputs a low level, and the or logic gate 20 controls the first switch terminal 11 and the second switch terminal 12 to be switched to the off state to disconnect the battery management system 30 and the battery 40. At this time, the battery management system 30 and the battery 40 are in an open circuit state, and the battery management system 30 does not consume the electric quantity of the battery 40 any more, so that the battery 40 can be prevented from being continuously consumed and causing serious damage.
Step S205: after disconnection between the battery management system 30 and the battery 40, the battery management system 30 enters a sleep state. After the BMS completely sleeps, the power of the battery 40 is not consumed, preventing the voltage of the battery 40 from being fed.
The sleep activation circuit and method applied to the electric bicycle BMS outputs an activation signal to the or logic gate 20 through the key signal terminal by the key system 60, so that the or logic gate 20 controls the first switch terminal 11 and the second switch terminal 12 to be switched to the connection state through the control terminal 13 to connect the battery management system 30 with the battery 40 to activate the battery management system 30, and the battery management system 30 is activated in a hardware manner, thereby increasing hardware interaction of the battery management system 30 and improving reliability of the battery management system 30.
Further, the above-described active sleep circuit and method applied to the electric bicycle BMS controls the or logic gate 20 to control the first and second switch terminals 11 and 12 to be switched off to disconnect the battery management system 30 and the battery 40 when the battery management system 30 detects that the key activation signal terminal and the charge activation signal terminal output the revocation signal, so that the battery management system 30 is disconnected from the battery 40 in the sleep mode, thereby preventing the battery 40 from being fed during storage of the battery 40 due to additional power consumption, and improving the safety performance of the battery management system 30 and the battery 40.
Also, the above-described activated sleep circuit and method applied to the electric bicycle BMS activates the battery management system 30 through the key system 60 or the charge activation signal terminal so that the battery management system 30 has only the sleep mode and the operation mode, so that the design of the battery management system 30 is simplified while the reliability of the battery management system 30 is also improved.
In the several embodiments provided in the present invention, it should be understood that the disclosed system and method may be implemented in other ways. It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned. Furthermore, it is obvious that the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. The terms first, second, etc. are used to denote names, but not any particular order.
Although the present invention has been described in detail with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the invention.
Claims (10)
1. An active sleep circuit applied to an electric bicycle BMS, comprising:
the control switch comprises a first switch end, a second switch end and a control end, wherein the first switch end is connected with a battery of the electric bicycle, and the second switch end is connected with a battery management system of the electric bicycle; the control end is used for controlling the connection or disconnection of the first switch end and the second switch end;
the input end of the OR logic gate is connected with a key signal end of the key system, and the output end of the OR logic gate is connected with the control end of the control switch; when the key signal end outputs an activation signal, the OR logic gate controls the first switch end and the second switch end to be switched to a connection state through the control end so as to connect the battery management system and the battery and activate the battery management system.
2. The active sleep circuit as set forth in claim 1, wherein the input terminal of the or logic gate is further connected to a top signal terminal of the battery management system, and the battery management system outputs a top signal through the top signal terminal to maintain the first and second switch terminals in a connected state after being connected to the battery.
3. The active sleep circuit applied to an electric bicycle BMS according to claim 2, wherein the battery management system disconnects the battery and enters a sleep state when a key signal terminal of the key system outputs a withdrawal signal.
4. The active sleep circuit as set forth in claim 3, wherein the input terminal of the or logic gate is further connected to a charge active signal terminal outputting an active signal when charging, and the or logic gate controls the first and second switch terminals to be switched to a connection state through the control terminal so that the battery management system is connected to the battery to activate the battery management system.
5. The active sleep circuit applied to an electric bicycle BMS according to claim 4, wherein the key system comprises a key switch having one end connected to the battery and the other end connected to the key signal terminal.
6. The active sleep circuit as claimed in claim 5, wherein the battery management system controls the self-top signal terminal to output a withdrawal signal after a preset delay time when the battery management system detects that the key active signal terminal and the charge active signal terminal output withdrawal signals, so that the or logic controls the first and second switch terminals to switch to an off state to disconnect the battery management system and the battery.
7. The active sleep circuit applied to the electric bicycle BMS according to claim 6, wherein the key signal terminal, the charge active signal terminal, and the output of the active signal from the top signal terminal output a high level to the input terminal of the or logic gate, respectively;
and when the key signal end, the charging activation signal end and the top signal end output the canceling signal, respectively outputting a low level to the input end of the OR logic gate.
8. An active sleep method applied to an electric bicycle BMS, comprising the steps of:
when the OR logic gate receives an activation signal output by the key signal end, the OR logic gate controls the first switch end and the second switch end of the control switch to be switched to a connection state through the control end of the control switch;
the battery management system is connected with the battery through the first switch end and the second switch end of the control switch to activate the battery management system.
9. The active sleep method applied to the electric bicycle BMS, according to claim 8, wherein the battery management system outputs an on top signal to the OR logic gate to maintain the first and second switch terminals in a connected state when the battery management system is connected to the battery to be activated.
10. The active sleep method applied to the electric bicycle BMS according to claim 9,
when charging, when the input end of the or logic gate receives an activation signal output by a charging activation signal end, the or logic gate controls the first switch end and the second switch end to be switched to a connection state through the control end, so that the battery management system is connected with the battery to activate the battery management system, and,
when the OR logic gate receives the cancel signal output by the key activation signal end and the cancel signal output by the charging activation signal end, the battery management system outputs the cancel signal through the self-top signal end after preset delay time, so that the OR logic gate controls the first switch end and the second switch end to be switched to an off state to disconnect the battery management system and the battery.
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| CN115243833A (en) * | 2021-02-04 | 2022-10-25 | 南京泉峰科技有限公司 | electric screwdriver |
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| CN111313374A (en) * | 2020-03-09 | 2020-06-19 | 深圳市麦澜创新科技有限公司 | Battery system under-voltage protection circuit and method applied to electric bicycle BMS |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115243833A (en) * | 2021-02-04 | 2022-10-25 | 南京泉峰科技有限公司 | electric screwdriver |
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Application publication date: 20200626 |