Control method and control circuit of multiphase switching circuit and multiphase switching circuit
Technical Field
The invention relates to the technical field of power electronics, in particular to a control method and a control circuit of a multiphase switching circuit and the multiphase switching circuit.
Background
The parallel connection of the multiphase switch circuits can conveniently improve the power supply current level so as to meet the requirement of large current, such as a processor. Meanwhile, each phase of switching circuit is conducted in a staggered mode by controlling the driving signals, so that the inductance of the single-phase switching circuit can be reduced, input and output current ripples can be reduced, and input and output capacitances can be effectively reduced. The reduction of the inductance reduces the inductance size and the capacitance quantity, improves the power density, and simultaneously can improve the dynamic response speed of the voltage regulator. The dynamic response speed to load jumps is important for the processor power supply, as this will directly affect the performance of the processor. The processor has strict requirements on the maximum and minimum voltages at which it operates, and if the voltage exceeds the maximum voltage value allowed by the processor due to too slow a response speed of the voltage regulator at the time of current unloading, this directly affects the reliability of the processor. Conversely, if the voltage is below the minimum voltage allowed by the processor during loading, the blue screen of the computer will be halted. In summary, how to meet the requirement of dynamic load due to the rapid change of load and provide steady voltage is always an important indicator for measuring the performance of the controller. For loading conditions in load changes, if the response speed of the controller is too slow, energy cannot be timely transmitted from the input side to the output side, and then the needed energy can only be provided by the output capacitor, so that a large drop of the output voltage is caused. On the contrary, if the upper tube cannot be turned off in time under the unloading condition, more extra energy is transmitted to the output capacitor by pinching off the transmission path of the energy at the input side, so that the output voltage has large protrusions. In this case, in order to stabilize the output voltage, a large number of output capacitors need to be placed, thereby increasing the cost and volume of the system. Therefore, a controller with fast dynamic response capability can not only reduce output capacitance and save space for the system, but also improve the power density of the system and reduce the cost.
Disclosure of Invention
Accordingly, the present invention is directed to a control method and a control circuit for a multiphase switching circuit, and the multiphase switching circuit, which are used for solving the problem of insufficient dynamic response speed of the multiphase switching circuit in the prior art.
The technical scheme of the invention is that a control method of a multiphase switching circuit is provided, the multiphase switching circuit comprises an N-phase switching circuit, the N-phase switching circuit comprises N inductors, and the inductance value of each inductor is L;
Setting an mth upper limit instruction voltage, an mth lower limit instruction voltage and an mth reconstruction current;
When the peak value of the m-th reconstruction current reaches the m-th upper limit command voltage, a main switching tube of an m-th phase switching circuit is turned off;
The m lower limit instruction voltage is equal to the sum of the compensation voltage and the m valley slope, and controls the valley of the inductance current of the m phase switching circuit;
The slope of the mth reconstruction current is the difference between the input voltage and the output voltage of the multiphase switch circuit divided by the inductance value L;
Wherein N is a natural number greater than or equal to 2, and m is any natural number from 1 to N.
Optionally, before the main switch tube of the mth phase switch circuit is conducted, the mth peak slope is reset to a first initial value, and when the main switch tube of the mth phase switch circuit is conducted, the mth peak slope starts to rise;
The m clock signal of the m-th phase switching circuit controls the switching period of the m-th phase switching circuit.
Optionally, when the main switch tube of the m-phase switch circuit is conducted, the m-th capacitor is charged, the voltage on the m-th capacitor represents the m-th reconstruction current, and the difference between the m-th controllable current and the input and output voltage of the multiphase switch circuit is proportional to the inductance value L.
The control circuit of the multiphase switching circuit comprises an N-phase switching circuit, wherein the N-phase switching circuit comprises N inductors, and the inductance value of each inductor is L;
The control circuit sets an mth upper limit instruction voltage, an mth lower limit instruction voltage and an mth reconstruction current;
When the peak value of the m-th reconstruction current reaches the m-th upper limit command voltage, a main switching tube of an m-th phase switching circuit is turned off;
The m lower limit instruction voltage is equal to the sum of the compensation voltage and the m valley slope, and controls the valley of the inductance current of the m phase switching circuit;
The slope of the mth reconstruction current is the difference between the input voltage and the output voltage of the multiphase switch circuit divided by the inductance value L;
Wherein N is a natural number greater than or equal to 2, and m is any natural number from 1 to N.
Optionally, before the main switch tube of the mth phase switch circuit is conducted, the mth peak slope is reset to a first initial value, and when the main switch tube of the mth phase switch circuit is conducted, the mth peak slope starts to rise;
The m clock signal of the m-th phase switching circuit controls the switching period of the m-th phase switching circuit.
Alternatively, the control circuit includes N-phase switching signal generating circuits each receiving a compensation voltage and generating a corresponding switching signal;
The m-th switching signal generation circuit comprises a reconstruction current generation circuit, wherein the reconstruction current generation circuit comprises an m-th controllable current and an m-th capacitor, the m-th controllable current charges the m-th capacitor when a main switching tube of the m-th phase switching circuit is conducted, the voltage on the m-th capacitor represents the m-th reconstruction current, and the difference between the m-th controllable current and the input and output voltage of the multi-phase switching circuit is proportional to an inductance value L.
The mth switching signal generating circuit further comprises an RS trigger, an mth upper comparator, an mth lower comparator, an mth upper limit command voltage generating circuit and an mth lower limit command voltage generating circuit, wherein the mth upper limit command voltage generating circuit receives the compensation voltage and subtracts the compensation voltage from an mth peak slope to obtain an mth upper limit command voltage;
the mth lower limit instruction voltage generation circuit receives the compensation voltage, and adds the compensation voltage to an mth valley slope to obtain an mth lower limit instruction voltage, wherein the mth lower comparator compares an inductance current sampling value with the mth lower limit instruction voltage, and when a main switch tube of the mth phase switch circuit is turned off, the inductance current sampling value is smaller than or equal to the mth lower limit instruction voltage, and the output of the mth lower comparator is turned over;
The RS trigger receives the output voltages of the m-th upper comparator and the m-th lower comparator and outputs an m-th phase switching signal, when the output voltage of the m-th upper comparator is overturned, the m-th phase switching signal is changed from effective to ineffective, and when the output voltage of the m-th lower comparator is overturned, the m-th phase switching signal is changed from ineffective to effective.
Optionally, the mth upper limit command voltage generating circuit comprises an mth peak value slope generating circuit and a subtracter, wherein the mth peak value slope generating circuit receives the mth phase switching signal to generate an mth peak value slope, the subtracter receives the compensation voltage and the mth peak value slope, and the mth upper limit command voltage is obtained by subtracting the mth peak value slope from the compensation voltage.
Optionally, the mth lower limit command voltage generating circuit comprises an mth valley slope generating circuit and an adder, wherein the mth valley slope generating circuit receives the mth phase switching signal and the mth phase clock signal to generate an mth valley slope, and the adder receives the compensation voltage and the mth valley slope and adds the compensation voltage to the mth valley slope to obtain the mth lower limit command voltage.
A further technical solution of the present invention is to provide a multiphase switching circuit.
Compared with the prior art, the circuit structure and the method have the advantages of quick dynamic response capability, capacity reduction and space saving for the system, system power density improvement and cost reduction.
Drawings
FIG. 1 is a schematic diagram of a multi-phase switching circuit;
FIG. 2 is a schematic diagram of a two-phase switching circuit and a coupled inductor;
Fig. 3 is waveforms of a first clock signal CLK1, a second clock signal CLK2, a first upper limit command voltage, a first reconstruction current, an inductance current of the first phase switching circuit, a first lower limit command voltage, a second upper limit command voltage, a second reconstruction current, an inductance current of the second phase switching circuit, a second lower limit command voltage, a first phase switching signal PWM1, and a second phase switching signal PWM2 when the two phase switching circuits of the present invention are inductively coupled;
Fig. 4 is waveforms of a first clock signal CLK1, a second clock signal CLK2, a first upper limit command voltage, a first reconstruction current, an inductance current of the first phase switching circuit, a first lower limit command voltage, a second upper limit command voltage, a second reconstruction current, an inductance current of the second phase switching circuit, a second lower limit command voltage, a first phase switching signal PWM1, and a second phase switching signal PWM2 when the inductances are separated;
FIG. 5 is a schematic diagram of one embodiment of a control circuit 200 of the present invention;
FIG. 6 is a schematic diagram of an embodiment of an mth switching signal generating circuit according to the present invention;
FIG. 7 is a schematic diagram of a reconstruction current generation circuit 260 according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of an embodiment of an mth upper limit command voltage generating circuit 210 according to the present invention;
fig. 9 is a schematic diagram of an mth lower limit command voltage generating circuit 230 according to an embodiment of the invention.
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments only. The invention is intended to cover any alternatives, modifications, equivalents, and variations that fall within the spirit and scope of the invention.
In the following description of preferred embodiments of the invention, specific details are set forth in order to provide a thorough understanding of the invention, and the invention will be fully understood to those skilled in the art without such details.
The invention is more particularly described by way of example in the following paragraphs with reference to the drawings. It should be noted that the drawings are in a simplified form and are not to scale precisely, but rather are merely intended to facilitate and clearly illustrate the embodiments of the present invention.
The invention provides a control circuit of a multiphase switching circuit, which comprises an N-phase switching circuit, wherein the N-phase switching circuit comprises N inductors, the inductance value of each inductor is L, and the N-phase switching circuit is shown in FIG. 1. The upper tube of each phase switching circuit is a main switching tube, the lower tube is a synchronous rectifying tube, and the lower tube can also use a freewheeling diode. Each phase has an inductance connected to the output. Each phase of inductance in fig. 1 is discrete. The inductances may also be coupled, such as a first phase inductance and a second phase inductance, a third phase inductance and a fourth phase inductance, and so on. The control current receives the feedback voltage, outputs N switching signals to N driving circuits respectively to drive the main switching tube and the synchronous rectifying tube of each phase switching circuit, and if the control current is a freewheeling diode, only the main switching tube needs to be driven.
The control circuit sets an mth upper limit command voltage, an mth lower limit command voltage and an mth reconstruction current, wherein the mth upper limit command voltage is equal to the difference between the compensation voltage and an mth peak value slope and controls the peak value of the mth reconstruction current, when the peak value of the mth reconstruction current reaches the mth upper limit command voltage, the main switching tube of the mth phase switching circuit is turned off, the mth lower limit command voltage is equal to the sum of the compensation voltage and an mth valley value slope and controls the valley value of the inductance current of the mth phase switching circuit, the slope of the mth reconstruction current is the difference between the input voltage and the output voltage of the multiphase switching circuit divided by the inductance value L, N is a natural number which is greater than or equal to 2, and m is any one natural number among 1-N. That is, the turn-off timing of the main switching transistor of the mth phase switching circuit is determined by the mth reconstruction current and the mth upper limit command voltage, and the turn-on timing of the main switching transistor is determined by the mth lower limit command voltage and the inductor current of the mth phase switching circuit.
Before the main switch tube of the m-th phase switch circuit is conducted, the m-th peak slope is reset to a first initial value, when the main switch tube of the m-th phase switch circuit is conducted, the m-th peak slope starts to rise, before the m-th phase clock signal is effective, the m-th valley slope is reset to a second initial value, when the m-th phase clock signal of the m-th phase switch circuit is effective, the m-th valley slope starts to rise, and the m-th clock signal of the m-th phase switch circuit controls the switching period of the m-th phase switch circuit. For convenience, the first initial value is typically set to zero. The second initial value is set to be less than zero. The invention can synchronize the multiphase switch circuit and the clock and has fast dynamic response. In one embodiment, a high level may be effectively associated with a low level and a low level may be disabled, and in another embodiment, a low level may be effectively associated with a high level.
It should be noted that the slope of the mth peak slope and/or the mth valley slope may be linear or nonlinear. Non-linearities include various forms of piecewise linearity, parabolic, exponential, and the like.
Please refer to fig. 2, which is a schematic diagram of a two-phase switching circuit and a coupled inductor, and a freewheeling diode is used. Fig. 3 and fig. 4 are waveforms of a first clock signal CLK1, a second clock signal CLK2, a first upper limit command voltage, a first reconstruction current, an inductance current of the first phase switching circuit, a first lower limit command voltage, a second upper limit command voltage, a second reconstruction current, an inductance current of the second phase switching circuit, a second lower limit command voltage, a first phase switching signal PWM1, and a second phase switching signal PWM2, respectively, when the inductance is coupled and separated. The first clock signal CLK1 and the second clock signal CLK2 are 180 degrees out of phase. Because of the coupling coefficient of the coupling inductor, in fig. 3, when the first phase main switching tube is turned on, the inductor current of the first phase switching circuit is greater than the inductor current of the second phase switching circuit, and the first reconstruction current is greater than the inductor current of the first phase switching circuit. In fig. 4, since each phase inductance is discrete, the first reconstruction current is equal to the inductance current of the first phase switching circuit when the first phase main switching tube is on, i.e., the mth reconstruction current is equal to the inductance current of the mth phase switching circuit when the main switching tube of the mth phase switching circuit is on.
Referring to fig. 5, the control circuit includes N-phase switching signal generating circuits, each of which receives a compensation voltage and generates a corresponding switching signal, and an operational amplifier, which receives a feedback voltage and performs operational amplification with a reference voltage to obtain the compensation voltage.
Referring to fig. 6, the mth switching signal generating circuit includes a reconstruction current generating circuit 260, where the reconstruction current generating circuit includes an mth controllable current and an mth capacitor, the mth controllable current charges the mth capacitor when the main switch tube of the mth phase switching circuit is turned on, a voltage on the mth capacitor represents the mth reconstruction current, and a difference between the mth controllable current and an input/output voltage of the multiphase switching circuit is proportional to an inductance value L.
Referring to fig. 7, an embodiment of a current reconstruction circuit is shown. The current reconstruction circuit comprises an mth controllable current I261, an mth capacitor C261, a switch K262 and a switch K263. When the mth switching signal PWM m is active, the switch K262 is turned on and the switches K263 and K264 are turned off. The mth controllable current I261 charges the mth capacitor C261, the voltage ISNS_SH on the mth capacitor represents the mth reconstruction current, and when the mth switching signal PWM m represents invalidity, the switch K262 is turned off, and the switch K263 and the switch K264 are turned on. The mth controllable current I261 stops charging the mth capacitor C261, and the voltage isns_sh on the mth capacitor is equal to the inductor sampling current ISNS. Thus, the voltage isns_sh across the mth capacitor is compared with the mth upper limit command voltage when the mth switching signal PWM m is asserted and with the mth lower limit command voltage when the mth switching signal PWM m is de-asserted. In one embodiment, the high level may be effectively associated with the low level and the low level may be not effectively associated with the low level, or in another embodiment, the low level may be effectively associated with the high level and the high level may be not effectively associated with the low level. When the switch signal is effective, the main switch tube is turned on, and when the switch signal is ineffective, the main switch tube is turned off.
Referring to fig. 6, the mth switching signal generating circuit further includes an RS flip-flop 250, an mth upper comparator 220, an mth lower comparator 240, an mth upper limit command voltage generating circuit 210, and an mth lower limit command voltage generating circuit 230, where the mth upper limit command voltage generating circuit 210 receives the compensation voltage and subtracts the compensation voltage from the mth peak slope to obtain an mth upper limit command voltage;
The mth lower limit command voltage generating circuit receives 230 the compensation voltage and adds the compensation voltage to the mth valley slope to obtain the mth lower limit command voltage, the mth lower comparator compares the inductance current sampling value with the mth lower limit command voltage, when the main switch tube of the mth phase switch circuit is turned off, the inductance current sampling value is less than or equal to the mth lower limit command voltage, and the output of the mth lower comparator is turned over;
The RS flip-flop 250 receives the output voltages of the mth up comparator 220 and the mth down comparator 230, and outputs an mth phase switching signal PWM m, which changes from active to inactive when the output voltage of the mth up comparator 220 is inverted, and changes from inactive to active when the output voltage of the mth down comparator 240 is inverted.
Referring to fig. 8, an embodiment of the mth upper limit command voltage generating circuit is shown. The mth upper limit command voltage generating circuit 210 includes an mth peak ramp generating circuit 212 and a subtracter 211, wherein the mth peak ramp generating circuit 212 receives the mth phase switching signal PWM m to generate an mth peak ramp, and the subtracter 211 receives the compensation voltage and the mth peak ramp and subtracts the mth peak ramp from the compensation voltage to obtain the mth upper limit command voltage.
Referring to fig. 9, an embodiment of the mth lower limit command voltage generating circuit 230 is shown. The mth lower limit command voltage generating circuit includes an mth valley slope generating circuit 232 and an adder 231, wherein the mth valley slope generating circuit 232 receives the mth phase switching signal and the mth phase clock signal CLK m to generate an mth valley slope, and the adder 231 receives the compensation voltage and the mth valley slope and adds the compensation voltage to the mth valley slope to obtain the mth lower limit command voltage.
The invention further provides a control method of the multiphase switching circuit, the multiphase switching circuit comprises an N-phase switching circuit, the N-phase switching circuit comprises N inductors, inductance values of the N-phase switching circuit are L, an mth upper limit command voltage, an mth lower limit command voltage and an mth reconstruction current are set, the mth upper limit command voltage is equal to the difference between a compensation voltage and an mth peak slope and controls the peak value of the mth reconstruction current, when the peak value of the mth reconstruction current reaches the mth upper limit command voltage, a main switching tube of the mth phase switching circuit is turned off, the mth lower limit command voltage is equal to the sum of the compensation voltage and an mth valley slope and controls the valley value of the inductance current of the mth phase switching circuit, the slope of the mth reconstruction current is the difference between the input voltage and the output voltage of the multiphase switching circuit and the inductance value L, wherein N is a natural number greater than or equal to 2, and m is any natural number from 1 to N.
In one embodiment, before the main switch tube of the mth phase switch circuit is conducted, the mth peak slope is reset to a first initial value, when the main switch tube of the mth phase switch circuit is conducted, the mth peak slope starts to rise, before the mth phase clock signal is effective, the mth valley slope is reset to a second initial value, when the mth phase clock signal of the mth phase switch circuit is effective, the mth valley slope starts to rise, and the mth clock signal of the mth phase switch circuit controls the switching period of the mth phase switch circuit.
In one embodiment, when the main switch tube of the m-th phase switch circuit is conducted, the m-th capacitor is charged, the voltage on the m-th capacitor represents the m-th reconstruction current, and the difference between the m-th controllable current and the input and output voltages of the multiphase switch circuit is proportional to the inductance value L.
A further technical solution of the present invention is to provide a multiphase switching circuit.
Although the embodiments have been described and illustrated separately above, and with respect to a partially common technique, it will be apparent to those skilled in the art that alternate and integration may be made between embodiments, with reference to one embodiment not explicitly described, and reference may be made to another embodiment described.
The above-described embodiments do not limit the scope of the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the above embodiments should be included in the scope of the present invention.