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CN111323632A - AC/DC zero-flux fluxgate current sensor and program control configuration and calibration method thereof - Google Patents

AC/DC zero-flux fluxgate current sensor and program control configuration and calibration method thereof Download PDF

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CN111323632A
CN111323632A CN201910638118.XA CN201910638118A CN111323632A CN 111323632 A CN111323632 A CN 111323632A CN 201910638118 A CN201910638118 A CN 201910638118A CN 111323632 A CN111323632 A CN 111323632A
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resistor
chip
amplifier chip
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pin
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CN111323632B (en
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李敏
靳绍平
杨爱超
胡琛
吴宇
王毅
王浔
李东江
唐新宇
黄建钟
胡进才
魏翀
刘琛
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Shenzhen City Star Dragon Technology Co ltd
State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Jiangxi Electric Power Co Ltd
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Shenzhen City Star Dragon Technology Co ltd
State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Jiangxi Electric Power Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R15/00Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
    • G01R15/14Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
    • G01R15/20Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices
    • G01R15/207Constructional details independent of the type of device used
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/30Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R15/00Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
    • G01R15/14Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
    • G01R15/18Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using inductive devices, e.g. transformers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/2506Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values ; Details concerning sampling, digitizing or waveform capturing
    • G01R19/2509Details concerning sampling, digitizing or waveform capturing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/005Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/02Testing or calibrating of apparatus covered by the other groups of this subclass of auxiliary devices, e.g. of instrument transformers according to prescribed transformation ratio, phase angle, or wattage rating

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Abstract

The invention discloses an alternating current-direct current zero-flux fluxgate current sensor, which comprises a fluxgate current sensor body and a configuration and calibration circuit for configuring and calibrating the fluxgate current sensor body, wherein the fluxgate current sensor body comprises a first iron core, a second iron core, an excitation winding, a feedback winding and a measurement winding; the configuration and calibration circuit comprises a processor, a crystal oscillator, an RS232 interface circuit, an excitation source amplification driving circuit, a programmable compensation signal tracker, a programmable filter, a phase-sensitive demodulation circuit, a PI control circuit and a power amplifier; the invention discloses a program control configuration and calibration method of an AC/DC zero-flux fluxgate current sensor. The invention can automatically match the offset current caused by the inconsistency of the parameters of the two iron cores, greatly reduce the requirement on the process consistency of the two fluxgate iron cores, realize the optimal performance of the fluxgate sensor, and has strong practicability and high popularization and use values.

Description

交直流零磁通磁通门电流传感器及其程控配置及校准方法AC and DC zero-flux fluxgate current sensor and its program-controlled configuration and calibration method

技术领域technical field

本发明属于智能传感器技术领域,具体涉及一种交直流零磁通磁通门电流传感器及其程控配置及校准方法。The invention belongs to the technical field of intelligent sensors, and in particular relates to an AC and DC zero-flux gate current sensor and a program-controlled configuration and calibration method thereof.

背景技术Background technique

磁通门电流传感器因其响应时间快、温度特性好,灵敏度高,可同时测量直流和交流电流,且测量范围宽,在高性能的电流测量领域有着重要的地位。但是磁通门电流传感器由于对铁芯的材料及制造工艺一致性要求很高,对磁通门的两个铁芯和绕组要求参数完全一致,造成造价成本高,工艺复杂,调试困难,并且有源电子元器件的失调电压和失调电流等也会造成磁通门二次电流有失调电流输出。Fluxgate current sensors play an important role in the field of high-performance current measurement because of their fast response time, good temperature characteristics, and high sensitivity. However, the fluxgate current sensor has high requirements on the consistency of the iron core material and manufacturing process, and the two iron cores and windings of the fluxgate require the same parameters, resulting in high cost, complicated process, difficult debugging, and some problems. The offset voltage and offset current of the source electronic components will also cause the secondary current of the fluxgate to have an offset current output.

磁通门传感器激励信号对磁通门的整个系统都有很大的影响,一般从信号频率稳定度、信号幅值稳定度、相位稳定度、波形稳定度这几个方面来考虑激励信号的选择。特别是激励信号频率的高低很大程度影响着传感器的工作性能,频率太高,则会增大噪声;频率太低则会降低传感器的灵敏度,现有的基于磁通门原理的电流传感器的激励频率都是固定在几百到数几千赫兹之间,同时二次谐波的滤波器的带通频率也无法更改。The excitation signal of the fluxgate sensor has a great influence on the entire system of the fluxgate. Generally, the selection of the excitation signal is considered from the aspects of signal frequency stability, signal amplitude stability, phase stability and waveform stability. . In particular, the frequency of the excitation signal greatly affects the working performance of the sensor. If the frequency is too high, the noise will increase; if the frequency is too low, the sensitivity of the sensor will be reduced. The frequency is fixed between a few hundred and several kilohertz, and the bandpass frequency of the second harmonic filter cannot be changed.

目前国外典型为莱姆电子(LEM)的IT系列交直流磁通门电流传感器、国内有深圳航智精密IIT系列交直流磁通门电流传感器,这些公司生产和研发基于磁通门原理的交直流传感器可实现ppm级别的线性度,但是由于对磁通门的铁芯和绕组等参数要求高,铁芯工艺复杂,成本高,零位失调无法采用数字程控技术手段校准等缺陷,目前60A到2000A的磁通门电流传感器的售价在几千元到几万元之间大大限制了其应用范围,还存在以下缺陷:At present, the typical foreign IT series AC and DC fluxgate current sensors are from Lem Electronics (LEM), and there are Shenzhen Hangzhi Precision IIT series AC and DC fluxgate current sensors in China. These companies produce and develop AC and DC fluxgate current sensors based on the principle of fluxgate. The sensor can achieve ppm-level linearity, but due to the high requirements for the parameters such as the iron core and winding of the fluxgate, the complex process of the iron core, the high cost, and the inability to calibrate the zero offset by means of digital program control technology, etc., the current 60A to 2000A The price of the fluxgate current sensor is between several thousand yuan and tens of thousands of yuan, which greatly limits its application range, and there are also the following defects:

(1)对铁芯材料和工艺要求高,造价昂贵;(1) The iron core material and process requirements are high, and the cost is expensive;

(2)针对不同的应用场合,无法通过配置电流互感器的参数达到最佳的应用效果;(2) For different applications, the best application effect cannot be achieved by configuring the parameters of the current transformer;

(3)无法对固有的零位失调电流进行出厂校准。(3) Factory calibration is not available for inherent zero offset current.

发明内容SUMMARY OF THE INVENTION

本发明所要解决的技术问题在于针对上述现有技术中的不足,提供一种交直流零磁通磁通门电流传感器,其设计新颖合理,能够大大减低对两个磁通门铁芯工艺一致性的要求,能够实现磁通门传感器的最佳性能,实用性强,推广使用价值高。The technical problem to be solved by the present invention is to provide an AC and DC zero-flux fluxgate current sensor, which is novel and reasonable in design, and can greatly reduce the process consistency of the two fluxgate iron cores. It can achieve the best performance of the fluxgate sensor, has strong practicability, and has high promotion and use value.

为解决上述技术问题,本发明采用的技术方案是:一种交直流零磁通磁通门电流传感器,包括用于对磁通门电流传感器本体进行配置及校准的配置及校准电路,所述配置及校准电路包括处理器以及均与处理器相接且用于为磁通门电流传感器本体的激励绕组提供激励电压的激励源放大驱动电路、用于补偿磁通门电流传感器本体中第二铁芯与第一铁芯的材料及制造工艺不一致造成的激磁磁场不一致的可编程补偿信号跟踪器、以及用于输出补偿电流给磁通门电流传感器本体中反馈绕组的补偿电流输出电路,所述磁通门电流传感器本体中激励绕组与激励源放大驱动电路的输出端连接,所述磁通门电流传感器本体中激励绕组与可编程补偿信号跟踪器的输出端连接,所述补偿电流输出电路的输入端与测量绕组连接,所述反馈绕组与所述补偿电流输出电路的输出端连接。In order to solve the above technical problems, the technical solution adopted in the present invention is: an AC and DC zero-flux fluxgate current sensor, comprising a configuration and calibration circuit for configuring and calibrating the fluxgate current sensor body, the configuration And the calibration circuit includes a processor and an excitation source amplifying drive circuit that is connected to the processor and used to provide excitation voltage for the excitation winding of the fluxgate current sensor body, and is used to compensate the second iron core in the fluxgate current sensor body. A programmable compensation signal tracker that is inconsistent with the excitation magnetic field caused by the material and manufacturing process of the first iron core, and a compensation current output circuit for outputting compensation current to the feedback winding in the fluxgate current sensor body, the magnetic flux The excitation winding in the gate current sensor body is connected with the output end of the excitation source amplifier drive circuit, the excitation winding in the fluxgate current sensor body is connected with the output end of the programmable compensation signal tracker, and the input end of the compensation current output circuit It is connected with the measurement winding, and the feedback winding is connected with the output end of the compensation current output circuit.

上述的交直流零磁通磁通门电流传感器,所述处理器为DSP数字信号处理器,所述DSP数字信号处理器的时钟输入接口接有晶振,所述激励源放大驱动电路和可编程补偿信号跟踪器均与DSP数字信号处理器的定时器Timer1连接,所述DSP数字信号处理器的定时器Timer1上还接有倍频电路,所述DSP数字信号处理器的串口RS232上接有RS232接口电路,所述可编程补偿信号跟踪器与DSP数字信号处理器的第一SPI接口SPI1连接,所述补偿电流输出电路包括与DSP数字信号处理器的第二SPI接口SPI2连接的可编程滤波器(5),以及依次接在可编程滤波器(5)输出端的相敏解调电路(6)、PI控制电路(7)和功率放大器(8),所述相敏解调电路(6)与倍频电路(4)的输出端连接。For the above-mentioned AC-DC zero-flux fluxgate current sensor, the processor is a DSP digital signal processor, the clock input interface of the DSP digital signal processor is connected with a crystal oscillator, the excitation source amplifies the drive circuit and the programmable compensation The signal trackers are all connected with the timer Timer1 of the DSP digital signal processor, the timer Timer1 of the DSP digital signal processor is also connected with a frequency multiplier circuit, and the serial port RS232 of the DSP digital signal processor is connected with an RS232 interface circuit, the programmable compensation signal tracker is connected with the first SPI interface SPI1 of the DSP digital signal processor, and the compensation current output circuit includes a programmable filter ( 5), and the phase-sensitive demodulation circuit (6), the PI control circuit (7) and the power amplifier (8) connected to the output end of the programmable filter (5) in turn, the phase-sensitive demodulation circuit (6) and the multiplier The output terminal of the frequency circuit (4) is connected.

上述的交直流零磁通磁通门电流传感器,所述倍频电路包括74HC74芯片,所述74HC74芯片的CP引脚与DSP数字信号处理器的定时器Timerl连接,所述74HC74芯片的D引脚与

Figure BDA0002130241220000031
引脚连接,所述74HC74芯片的Q引脚为倍频电路的输出端。In the above-mentioned AC/DC zero-flux gate current sensor, the frequency multiplier circuit includes a 74HC74 chip, the CP pin of the 74HC74 chip is connected with the timer Timerl of the DSP digital signal processor, and the D pin of the 74HC74 chip is connected. and
Figure BDA0002130241220000031
Pin connection, the Q pin of the 74HC74 chip is the output end of the frequency multiplier circuit.

上述的交直流零磁通磁通门电流传感器,所述可编程滤波器包括有源滤波器芯片UAF42,型号均为AD5545的DA转换芯片U1和DA转换芯片U2,型号均为AD8620的运放芯片U3和运放芯片U4,以及电阻R1、电阻R2、电阻R3、电阻R4、电阻R5、电阻R6和电阻R7,所述DA转换芯片U1的SPI接口和DA转换芯片U2的SPI接口均与DSP数字信号处理器的第二SPI接口SPI2连接,所述DA转换芯片U1的VREF接口与有源滤波器芯片UAF42的第13引脚连接,且通过电阻R3与有源滤波器芯片UAF42的第5引脚连接,所述DA转换芯片U2的VREF接口与有源滤波器芯片UAF42的第7引脚连接,且通过电阻R6与有源滤波器芯片UAF42的第12引脚连接;所述运放芯片U3的反相信号输入端与DA转换芯片U1的输出端连接,所述运放芯片U3的同相信号输入端接地,所述运放芯片U3的输出端与DA转换芯片U1的RTB引脚连接,且通过电阻R1与有源滤波器芯片UAF42的第8引脚连接;所述运放芯片U4的反相信号输入端与DA转换芯片U2的输出端连接,所述运放芯片U4的同相信号输入端接地,所述运放芯片U4的输出端与DA转换芯片U2的RTB引脚连接,且通过电阻R2与有源滤波器芯片UAF42的第14引脚连接;所述电阻R4接在有源滤波器芯片UAF42的第1引脚与第5引脚之间,所述电阻R5接在有源滤波器芯片UAF42的第5引脚与第6引脚之间,所述有源滤波器芯片UAF42的第12引脚通过电阻R7与测量绕组的正极输出端M+连接,所述测量绕组的负极输出端M-接地,所述有源滤波器芯片UAF42的第6引脚为可编程滤波器的输出端。For the above-mentioned AC/DC zero-flux fluxgate current sensor, the programmable filter includes an active filter chip UAF42, a DA conversion chip U1 and a DA conversion chip U2 whose model is AD5545, and an operational amplifier chip whose model is AD8620 U3 and op amp chip U4, as well as resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6 and resistor R7, the SPI interface of the DA conversion chip U1 and the SPI interface of the DA conversion chip U2 are all the same as the DSP digital The second SPI interface SPI2 of the signal processor is connected, the VREF interface of the DA conversion chip U1 is connected to the 13th pin of the active filter chip UAF42, and is connected to the 5th pin of the active filter chip UAF42 through the resistor R3 Connect, the VREF interface of described DA conversion chip U2 is connected with the 7th pin of active filter chip UAF42, and is connected with the 12th pin of active filter chip UAF42 through resistance R6; The inverting signal input terminal is connected with the output terminal of the DA conversion chip U1, the in-phase signal input terminal of the operational amplifier chip U3 is grounded, and the output terminal of the operational amplifier chip U3 is connected with the RTB pin of the DA conversion chip U1, and It is connected with the 8th pin of the active filter chip UAF42 through the resistor R1; the inverting signal input end of the operational amplifier chip U4 is connected with the output end of the DA conversion chip U2, and the in-phase signal input end of the operational amplifier chip U4 is input The terminal is grounded, and the output terminal of the operational amplifier chip U4 is connected to the RTB pin of the DA conversion chip U2, and is connected to the 14th pin of the active filter chip UAF42 through the resistor R2; the resistor R4 is connected to the active filter chip UAF42. Between the 1st pin and the 5th pin of the filter chip UAF42, the resistor R5 is connected between the 5th pin and the 6th pin of the active filter chip UAF42. The twelfth pin is connected to the positive output terminal M+ of the measuring winding through the resistor R7, the negative output terminal M- of the measuring winding is grounded, and the sixth pin of the active filter chip UAF42 is the output terminal of the programmable filter .

上述的交直流零磁通磁通门电流传感器,所述相敏解调电路包括由型号为AD8620的运放芯片U5构成的电压跟踪仪和型号为AD8620的运放芯片U6构成的反向器,由二选一多路转换器芯片CD4051构成的二选一多路转换器,以及电阻R11、电阻R12、电阻R13和电容C1;所述运放芯片U5的反相输入端和电阻R11的一端连接且为相敏解调电路的输入端,所述运放芯片U5的同相输入端与输出端连接;所述运放芯片U6的反相输入端与电阻R11的另一端连接,且通过电阻R2与运放芯片U6的输出端连接,所述运放芯片U6的同相输入端接地;所述二选一多路转换器芯片CD4051的第一路信号输入端引脚CH1与运放芯片U5的输出端连接,所述二选一多路转换器芯片CD4051的第二路信号输入端引脚CH0与运放芯片U6的输出端连接,所述二选一多路转换器芯片CD4051的地址选通引脚B和地址选通引脚C均接地,所述二选一多路转换器芯片CD4051的地址选通引脚A与倍频电路的输出端连接,所述电阻R13的一端与二选一多路转换器芯片CD4051的信号输出端引脚连接,所述电阻R13的另一端为相敏解调电路的输出端且通过电容C1接地。In the above-mentioned AC/DC zero-flux fluxgate current sensor, the phase-sensitive demodulation circuit includes a voltage tracker composed of an operational amplifier chip U5 of the model AD8620 and an inverter composed of the operational amplifier chip U6 of the model AD8620, A two-to-one multiplexer composed of a two-to-one multiplexer chip CD4051, as well as a resistor R11, a resistor R12, a resistor R13 and a capacitor C1; the inverting input terminal of the operational amplifier chip U5 is connected to one end of the resistor R11 And it is the input end of the phase-sensitive demodulation circuit, the non-inverting input end of the operational amplifier chip U5 is connected to the output end; the inverting input end of the operational amplifier chip U6 is connected to the other end of the resistor R11, and is connected with the resistor R2 through the resistor R2. The output terminal of the operational amplifier chip U6 is connected, and the non-inverting input terminal of the operational amplifier chip U6 is grounded; the first signal input terminal pin CH1 of the two-to-one multiplexer chip CD4051 is connected to the output terminal of the operational amplifier chip U5 connected, the second signal input pin CH0 of the two-to-one multiplexer chip CD4051 is connected to the output end of the operational amplifier chip U6, and the address strobe pin of the two-to-one multiplexer chip CD4051 Both B and address strobe pin C are grounded, the address strobe pin A of the two-to-one multiplexer chip CD4051 is connected to the output end of the frequency multiplier circuit, and one end of the resistor R13 is connected to the two-to-one multiplexer The signal output pin of the converter chip CD4051 is connected to the pin, and the other end of the resistor R13 is the output end of the phase-sensitive demodulation circuit and is grounded through the capacitor C1.

上述的交直流零磁通磁通门电流传感器,所述PI控制电路包括运放芯片OP07D、电阻R15、电阻R16、电阻R17和电容C2,所述电阻R15的一端为PI控制电路的输入端,所述运放芯片OP07D的反相输入端与电阻R15的另一端连接,所述运放芯片OP07D的同相输入端接地,所述运放芯片OP07D的输出端与反相输入端之间接有电阻R16,以及并联的电阻R17和电容C2,所述运放芯片OP07D的输出端为PI控制电路的输出端。In the above-mentioned AC/DC zero-flux fluxgate current sensor, the PI control circuit includes an operational amplifier chip OP07D, a resistor R15, a resistor R16, a resistor R17 and a capacitor C2, and one end of the resistor R15 is the input end of the PI control circuit, The inverting input terminal of the operational amplifier chip OP07D is connected to the other end of the resistor R15, the non-inverting input terminal of the operational amplifier chip OP07D is grounded, and a resistor R16 is connected between the output terminal and the inverting input terminal of the operational amplifier chip OP07D. , and the parallel resistor R17 and capacitor C2, the output end of the operational amplifier chip OP07D is the output end of the PI control circuit.

上述的交直流零磁通磁通门电流传感器,所述功率放大器包括功率放大器芯片OPA548、电阻R21、电阻R22、电阻R23、电阻R24和电阻R25,所述电阻R21的一端为功率放大器的输入端,所述功率放大器芯片OPA548的反相输入端与电阻R21的另一端连接,所述功率放大器芯片OPA548的同相输入端通过电阻R23接地,所述功率放大器芯片OPA548的反相输入端与输出端之间接有电阻R22,所述功率放大器芯片OPA548的同相输入端与输出端之间接有电阻R24,所述功率放大器芯片OPA548的输出端与电阻R25的一端连接,所述电阻R25的另一端为功率放大器的输出端。In the above-mentioned AC and DC zero-flux gate current sensor, the power amplifier includes a power amplifier chip OPA548, a resistor R21, a resistor R22, a resistor R23, a resistor R24 and a resistor R25, and one end of the resistor R21 is the input end of the power amplifier , the inverting input terminal of the power amplifier chip OPA548 is connected to the other end of the resistor R21, the non-inverting input terminal of the power amplifier chip OPA548 is grounded through the resistor R23, and the inverting input terminal of the power amplifier chip OPA548 is connected to the output terminal. There is a resistor R22 indirectly, a resistor R24 is connected between the non-inverting input end and the output end of the power amplifier chip OPA548, the output end of the power amplifier chip OPA548 is connected to one end of the resistor R25, and the other end of the resistor R25 is the power amplifier 's output.

上述的交直流零磁通磁通门电流传感器,所述可编程补偿信号跟踪器包括型号为AD5545的DA转换芯片U7,型号均为AD8620的运放芯片U8和运放芯片U9,以及电阻R31、电阻R32和电阻R33,所述DA转换芯片U7的VREF引脚与DSP数字信号处理器的定时器Timerl连接,所述DA转换芯片U7的SPI引脚与DSP数字信号处理器的第一SPI接口SPI1连接,所述运放芯片U8的反相输入端与DA转换芯片U7的输出端引脚连接,所述运放芯片U8的同相输入端接地,所述运放芯片U8的输出端与DA转换芯片U7的RFB引脚连接,且通过电阻R31与运放芯片U9的反相输入端连接,所述运放芯片U9的反相输入端通过电阻R32与DA转换芯片U7的VREF引脚连接,所述运放芯片U9的反相输入端与输出端之间接有电阻R33,所述运放芯片U9的同相输入端接地且为可编程补偿信号跟踪器的补偿电流负极输出端Vs-,所述运放芯片U9的输出端为可编程补偿信号跟踪器的补偿电流正极输出端Vs+。For the above-mentioned AC/DC zero-flux fluxgate current sensor, the programmable compensation signal tracker includes a DA conversion chip U7 whose model is AD5545, an operational amplifier chip U8 and an operational amplifier chip U9 whose model is AD8620, and resistors R31, Resistor R32 and resistor R33, the VREF pin of the DA conversion chip U7 is connected with the timer Timer1 of the DSP digital signal processor, and the SPI pin of the DA conversion chip U7 is connected with the first SPI interface SPI1 of the DSP digital signal processor connected, the inverting input terminal of the operational amplifier chip U8 is connected with the output terminal pin of the DA conversion chip U7, the non-inverting input terminal of the operational amplifier chip U8 is grounded, and the output terminal of the operational amplifier chip U8 is connected to the DA conversion chip. The RFB pin of U7 is connected to the inverting input terminal of the operational amplifier chip U9 through the resistor R31, and the inverting input terminal of the operational amplifier chip U9 is connected to the VREF pin of the DA conversion chip U7 through the resistor R32. A resistor R33 is connected between the inverting input terminal and the output terminal of the operational amplifier chip U9. The non-inverting input terminal of the operational amplifier chip U9 is grounded and is the negative output terminal Vs- of the compensation current of the programmable compensation signal tracker. The output end of the chip U9 is the compensation current positive output end Vs+ of the programmable compensation signal tracker.

上述的交直流零磁通磁通门电流传感器,所述激励源放大驱动电路包括型号均为OPA548的功率放大器芯片U10和功率放大器芯片U11,以及电阻R41和电阻R42;所述功率放大器芯片U10的反相输入端与电阻R41的一端连接且为激励源放大驱动电路的输入端,且与DSP数字信号处理器的定时器Timerl连接,所述功率放大器芯片U10的同相输入端与输出端连接,所述功率放大器芯片U11的反相输入端与电阻R41的另一端连接,所述功率放大器芯片U11的同相输入端接地,所述功率放大器芯片U11的反相输入端与输出端之间接有电阻R42,所述功率放大器芯片U10的输出端为激励源放大驱动电路的电压正极输出端,所述功率放大器芯片U11的输出端为激励源放大驱动电路的电压负极输出端。In the above-mentioned AC/DC zero-flux fluxgate current sensor, the excitation source amplifying drive circuit includes a power amplifier chip U10 and a power amplifier chip U11 whose models are OPA548, and a resistor R41 and a resistor R42; The inverting input terminal is connected to one end of the resistor R41 and is the input terminal of the excitation source amplifying drive circuit, and is connected to the timer Timer1 of the DSP digital signal processor. The non-inverting input terminal of the power amplifier chip U10 is connected to the output terminal, so the The inverting input terminal of the power amplifier chip U11 is connected to the other end of the resistor R41, the non-inverting input terminal of the power amplifier chip U11 is grounded, and a resistor R42 is connected between the inverting input terminal and the output terminal of the power amplifier chip U11, The output terminal of the power amplifier chip U10 is the voltage positive output terminal of the excitation source amplifying drive circuit, and the output terminal of the power amplifier chip U11 is the voltage negative output terminal of the excitation source amplifier driving circuit.

本发明还提供了一种方法步骤简单,实现方便,通过可编程定时器实现了对激磁电流频率的动态或静态更改,通过DA转换器结合可编程滤波器实现对滤波器的中心频率的动态或静态的修改,从而实现了对磁通门不同的应用及铁芯动态或静态改变其激磁频率,能够实现磁通门传感器的最佳性能,实用性强,推广使用价值高的交直流零磁通磁通门电流传感器的程控配置及校准方法,该方法包括以下步骤:The invention also provides a method with simple steps and convenient implementation, which realizes the dynamic or static change of the excitation current frequency through the programmable timer, and realizes the dynamic or static change of the center frequency of the filter through the DA converter combined with the programmable filter. The static modification can realize different applications of the fluxgate and change its excitation frequency dynamically or statically for the iron core, which can achieve the best performance of the fluxgate sensor, has strong practicability, and promotes the use of high-value AC and DC zero flux. A program-controlled configuration and calibration method for a fluxgate current sensor, the method comprising the following steps:

步骤一、激励源放大驱动电路在处理器的控制下输出电压方波信号,在第一铁芯和第二铁芯上通过激励绕组反方向串联连接;Step 1, the excitation source amplifying drive circuit outputs a voltage square wave signal under the control of the processor, and the first iron core and the second iron core are connected in series in opposite directions through the excitation winding;

步骤二、当第一铁芯和第二铁芯的激磁磁场不一致时,在处理器的控制下通过可编程补偿信号跟踪器输出补偿激励信号给磁通门电流传感器本体的激励绕组;Step 2, when the excitation magnetic fields of the first iron core and the second iron core are inconsistent, output the compensation excitation signal to the excitation winding of the fluxgate current sensor body through the programmable compensation signal tracker under the control of the processor;

步骤三、当一次电流Ip不为零时,测量绕组的的信号输出含有二次谐波;Step 3: When the primary current I p is not zero, the signal output of the measurement winding contains the second harmonic;

步骤四、通过所述补偿电流输出电路提取二次谐波分量,把二次谐波分量调整为直流输出,并输出一个补偿电流Is给磁通门电流传感器本体中激励绕组。Step 4: Extract the second harmonic component through the compensation current output circuit, adjust the second harmonic component to DC output, and output a compensation current I s to the excitation winding in the fluxgate current sensor body.

本发明与现有技术相比具有以下优点:Compared with the prior art, the present invention has the following advantages:

1、本发明的交直流零磁通磁通门电流传感器,配置及校准电路中设计了可编程补偿信号跟踪器,利用电流型输出型的DA转换芯片参考电压可以是连续的电压输入的特性,把参考电压直接接入信号方波T1入,通过DAC转换实现对T1电压的同步按比例缩小,由于T1信号输出为单极性的信号,为了实现铁芯的补偿方向可正向和反向,通过单极性变换双极性的电路,实现双向补偿,实现了对第一铁芯和第二铁芯激磁磁场不一致的静态补偿,实现对铁芯及设计的不一致的补偿理论上可以补偿到接近于0,失调电流相对于LEM的IT200-S系列80ppm,可提高到25ppm,降低了对第一铁芯和第二铁芯的材料的要求,把对铁芯的工艺一致性要求变成了一个储存在DSP内的校准参数,能够大大减低铁芯的制造工艺和成本。1. In the AC-DC zero-flux gate current sensor of the present invention, a programmable compensation signal tracker is designed in the configuration and calibration circuit, and the reference voltage of the DA conversion chip of the current type output type can be a continuous voltage input characteristic, The reference voltage is directly connected to the signal square wave T1 input, and the synchronization of the T1 voltage is scaled down through DAC conversion. Since the T1 signal output is a unipolar signal, in order to realize the compensation direction of the iron core, the forward and reverse directions can be used. Through the circuit of unipolar conversion bipolar, two-way compensation is realized, static compensation for the inconsistency of the excitation magnetic field of the first iron core and the second iron core is realized, and the compensation for the inconsistency of the iron core and the design can theoretically be compensated to close to At 0, the offset current can be increased to 25ppm compared to 80ppm of LEM's IT200-S series, which reduces the material requirements for the first iron core and the second iron core, and changes the process consistency requirements for the iron core into a The calibration parameters stored in the DSP can greatly reduce the manufacturing process and cost of the iron core.

2、本发明的交直流零磁通磁通门电流传感器,配置及校准电路中设计了可编程的激励源放大驱动电路、可编程滤波器和相位解调电路,实现了对激磁电源的可编程调整,能够根据不同的应用和材料可静态或动态配置不同的激磁频率,比如测量极低频(<1Hz)或直流信号,可以配置频率低一些的激磁电流,降低噪音,假如测量频率要求高或铁芯材料可适应高频信号,可以配置更高的频率的激磁电流,提高测量带宽和灵敏度。2. In the AC-DC zero-flux fluxgate current sensor of the present invention, a programmable excitation source amplifying drive circuit, a programmable filter and a phase demodulation circuit are designed in the configuration and calibration circuit to realize the programmable excitation power supply. Adjustment, can configure different excitation frequencies statically or dynamically according to different applications and materials, such as measuring very low frequency (<1Hz) or DC signals, can configure lower frequency excitation current, reduce noise, if the measurement frequency requires high or iron The core material can adapt to high-frequency signals, and can be configured with higher frequency excitation current to improve measurement bandwidth and sensitivity.

3、本发明能够实现交直流零磁通磁通门电流传感器在出厂之前通过RS232通信口和校准软件,进行零位校准,也可以实现在测量中或出厂前通过RS232通信口和校准软件对交直流零磁通磁通门电流传感器的激磁频率、带通滤波器频率,项目检波进行动态或静态修改,最佳匹配铁芯参数和实际应用,本发明能够实现1000A级别的交直流电流传感器的设计。3. The present invention can realize the zero-position calibration of the AC and DC zero-flux gate current sensors through the RS232 communication port and calibration software before leaving the factory, and can also realize the calibration of the AC-DC zero-flux gate current sensor through the RS232 communication port and the calibration software during measurement or before leaving the factory. The excitation frequency and band-pass filter frequency of the DC zero-flux fluxgate current sensor are dynamically or statically modified by project detection, and the parameters of the iron core are optimally matched with practical applications. The invention can realize the design of 1000A-level AC and DC current sensors. .

4、对于固定安装式的交直流零磁通磁通门电流传感器,能够在安装固定位置后,进行零位补偿校准,能够消除地磁场对直流失调的影响。4. For the fixed-mounted AC-DC zero-flux gate current sensor, the zero-position compensation calibration can be performed after the fixed position is installed, which can eliminate the influence of the geomagnetic field on the DC offset.

5、本发明能够实现交直流零磁通磁通门电流传感器,能够通过配置电流互感器的激磁频率达到和铁芯最佳匹配和应用效果。5. The present invention can realize the AC-DC zero-flux gate current sensor, and can achieve the best matching and application effect with the iron core by configuring the excitation frequency of the current transformer.

6、本发明能够实现交直流零磁通磁通门电流传感器的程控配置及校准方法,方法步骤简单,实现方便,通过可编程定时器实现了对激磁电流频率的动态或静态更改,通过DA转换器结合可编程滤波器实现对滤波器的中心频率的动态或静态的修改,从而实现了对磁通门不同的应用及铁芯动态或静态改变其激磁频率,能够实现磁通门传感器的最佳性能,实用性强,推广使用价值高。6. The present invention can realize the program-controlled configuration and calibration method of the AC-DC zero-flux fluxgate current sensor, the method steps are simple, and the realization is convenient, and the dynamic or static change of the excitation current frequency can be realized through the programmable timer, and the DA conversion can be performed. Combined with programmable filters, the filter can be dynamically or statically modified to realize the center frequency of the filter, thus realizing different applications of the fluxgate and changing its excitation frequency dynamically or statically for the iron core, which can achieve the best fluxgate sensor. High performance, strong practicability, and high promotion and use value.

下面通过附图和实施例,对本发明的技术方案做进一步的详细描述。The technical solutions of the present invention will be further described in detail below through the accompanying drawings and embodiments.

附图说明Description of drawings

图1为本发明交直流零磁通磁通门电流传感器的电路原理框图;Fig. 1 is the circuit principle block diagram of the AC and DC zero-flux fluxgate current sensor of the present invention;

图2为本发明倍频电路的电路原理图;Fig. 2 is the circuit schematic diagram of the frequency multiplication circuit of the present invention;

图3为本发明可编程滤波器的电路原理图;Fig. 3 is the circuit schematic diagram of the programmable filter of the present invention;

图4为本发明相敏解调电路的电路原理图;Fig. 4 is the circuit schematic diagram of the phase-sensitive demodulation circuit of the present invention;

图5为本发明PI控制电路的电路原理图;Fig. 5 is the circuit schematic diagram of the PI control circuit of the present invention;

图6为本发明功率放大器的电路原理图;Fig. 6 is the circuit schematic diagram of the power amplifier of the present invention;

图7为本发明可编程补偿信号跟踪器的电路原理图;Fig. 7 is the circuit schematic diagram of the programmable compensation signal tracker of the present invention;

图8为本发明激励源放大驱动电路的电路原理图;8 is a circuit schematic diagram of an excitation source amplifying drive circuit of the present invention;

图9为本发明交直流零磁通磁通门电流传感器的程控配置及校准方法的方法流程框图。FIG. 9 is a block diagram of the method of the program-controlled configuration and calibration method of the AC/DC zero-flux fluxgate current sensor according to the present invention.

附图标记说明:Description of reference numbers:

1-处理器; 2-晶振; 3-RS232接口电路;1-processor; 2-crystal oscillator; 3-RS232 interface circuit;

4-倍频电路; 5-可编程滤波器; 6-相敏解调电路;4-frequency multiplier circuit; 5-programmable filter; 6-phase-sensitive demodulation circuit;

7-PI控制电路; 8-功率放大器; 9-第一铁芯;7-PI control circuit; 8-power amplifier; 9-first iron core;

10-第二铁芯; 11-可编程补偿信号跟踪器;10-Second iron core; 11-Programmable compensation signal tracker;

12-激励源放大驱动电路。12- Excitation source amplifier drive circuit.

具体实施方式Detailed ways

如图1所示,本发明的交直流零磁通磁通门电流传感器,包括用于对磁通门电流传感器本体进行配置及校准的配置及校准电路,所述磁通门电流传感器本体包括第一铁芯9和第二铁芯10,缠绕在第一铁芯9和第二铁芯10上的激励绕组,缠绕在第一铁芯9和第二铁芯10上的反馈绕组,以及缠绕在第一铁芯9和第二铁芯10上的测量绕组;所述配置及校准电路包括处理器1以及均与处理器1相接且用于为磁通门电流传感器本体的激励绕组提供激励电压的激励源放大驱动电路12、用于补偿磁通门电流传感器本体中第二铁芯10与第一铁芯9的材料及制造工艺不一致造成的激磁磁场不一致的可编程补偿信号跟踪器11、以及用于输出补偿电流给磁通门电流传感器本体中反馈绕组的补偿电流输出电路,所述磁通门电流传感器本体中激励绕组与激励源放大驱动电路12的输出端连接,所述磁通门电流传感器本体中激励绕组与可编程补偿信号跟踪器11的输出端连接,所述补偿电流输出电路的输入端与测量绕组连接,所述反馈绕组与所述补偿电流输出电路的输出端连接。As shown in FIG. 1 , the AC-DC zero-flux fluxgate current sensor of the present invention includes a configuration and calibration circuit for configuring and calibrating the fluxgate current sensor body, and the fluxgate current sensor body includes a first an iron core 9 and a second iron core 10, an excitation winding wound around the first iron core 9 and the second iron core 10, a feedback winding wound around the first iron core 9 and the second iron core 10, and a feedback winding wound around the first iron core 9 and the second iron core 10 Measurement windings on the first iron core 9 and the second iron core 10; the configuration and calibration circuit includes a processor 1 and an excitation voltage for the excitation winding of the fluxgate current sensor body, both connected to the processor 1 The excitation source amplification drive circuit 12, the programmable compensation signal tracker 11 for compensating for the inconsistent excitation magnetic field caused by the material and manufacturing process of the second iron core 10 and the first iron core 9 in the fluxgate current sensor body are inconsistent, and A compensation current output circuit for outputting compensation current to the feedback winding in the body of the fluxgate current sensor, the excitation winding in the body of the fluxgate current sensor is connected to the output end of the excitation source amplifying drive circuit 12, the fluxgate current The excitation winding in the sensor body is connected to the output end of the programmable compensation signal tracker 11 , the input end of the compensation current output circuit is connected to the measurement winding, and the feedback winding is connected to the output end of the compensation current output circuit.

具体实施时,所述第一铁芯9和第二铁芯10均采用坡莫合金制成。During specific implementation, the first iron core 9 and the second iron core 10 are both made of permalloy.

本实施例中,所述处理器1为具有时钟输入接口、定时器Timer1、串口RS232、第一SPI接口SPI1和第二SPI接口SPI2的DSP数字信号处理器,所述DSP数字信号处理器的时钟输入接口接有晶振2,所述激励源放大驱动电路12和可编程补偿信号跟踪器11均与DSP数字信号处理器的定时器Timer1连接,所述DSP数字信号处理器的串口RS232上接有RS232接口电路3,所述可编程补偿信号跟踪器11与DSP数字信号处理器的第一SPI接口SPI1连接,所述补偿电流输出电路包括与DSP数字信号处理器的第二SPI接口SPI2连接的可编程滤波器5,以及依次接在可编程滤波器5输出端的相敏解调电路6、PI控制电路7和功率放大器8,所述相敏解调电路6与倍频电路4的输出端连接。In this embodiment, the processor 1 is a DSP digital signal processor having a clock input interface, a timer Timer1, a serial port RS232, a first SPI interface SPI1 and a second SPI interface SPI2, and the clock of the DSP digital signal processor The input interface is connected with a crystal oscillator 2, the excitation source amplifying drive circuit 12 and the programmable compensation signal tracker 11 are both connected with the timer Timer1 of the DSP digital signal processor, and the serial port RS232 of the DSP digital signal processor is connected with RS232 Interface circuit 3, the programmable compensation signal tracker 11 is connected with the first SPI interface SPI1 of the DSP digital signal processor, and the compensation current output circuit includes a programmable compensation current output circuit connected with the second SPI interface SPI2 of the DSP digital signal processor The filter 5, and the phase-sensitive demodulation circuit 6, the PI control circuit 7 and the power amplifier 8 sequentially connected to the output end of the programmable filter 5, the phase-sensitive demodulation circuit 6 is connected to the output end of the frequency multiplier circuit 4.

具体实施时,所述DSP数字信号处理器为ADI公司生产的型号为BF533的DSP数字信号处理器。该DSP数字信号处理器定时器Timerl的输出频率为T1=10MHz*D/232,其中,D为1~(232-1)中的任一整数,也就是定时T1可以输出0.00023Hz~10MHz范围中的的频率值。During specific implementation, the DSP digital signal processor is a DSP digital signal processor with a model of BF533 produced by Analog Devices. The output frequency of the DSP digital signal processor timer Timerl is T1=10MHz*D/2 32 , where D is any integer from 1 to (2 32 -1), that is, the timing T1 can output 0.00023Hz~10MHz frequency value in the range.

具体实施时,所述晶振2为0.1ppm、10MHz的有源晶振。所述RS232接口电路3为由MAX232接口转换芯片构成的RS232接口。During specific implementation, the crystal oscillator 2 is an active crystal oscillator with 0.1 ppm and 10 MHz. The RS232 interface circuit 3 is an RS232 interface composed of a MAX232 interface conversion chip.

本实施例中,如图2所示,所述倍频电路4包括74HC74芯片,所述74HC74芯片的CP引脚与DSP数字信号处理器的定时器Timerl连接,所述74HC74芯片的D引脚与

Figure BDA0002130241220000091
引脚连接,所述74HC74芯片的Q引脚为倍频电路4的输出端。即所述倍频电路4由D型上升沿触发器实现。In this embodiment, as shown in FIG. 2 , the frequency multiplier circuit 4 includes a 74HC74 chip, the CP pin of the 74HC74 chip is connected to the timer Timer1 of the DSP digital signal processor, and the D pin of the 74HC74 chip is connected to
Figure BDA0002130241220000091
Pin connection, the Q pin of the 74HC74 chip is the output end of the frequency multiplier circuit 4. That is, the frequency multiplier circuit 4 is realized by a D-type rising edge flip-flop.

本实施例中,如图3所示,所述可编程滤波器5包括有源滤波器芯片UAF42,型号均为AD5545的DA转换芯片U1和DA转换芯片U2,型号均为AD8620的运放芯片U3和运放芯片U4,以及电阻R1、电阻R2、电阻R3、电阻R4、电阻R5、电阻R6和电阻R7,所述DA转换芯片U1的SPI接口和DA转换芯片U2的SPI接口均与DSP数字信号处理器的第二SPI接口SPI2连接,所述DA转换芯片U1的VREF接口与有源滤波器芯片UAF42的第13引脚连接,且通过电阻R3与有源滤波器芯片UAF42的第5引脚连接,所述DA转换芯片U2的VREF接口与有源滤波器芯片UAF42的第7引脚连接,且通过电阻R6与有源滤波器芯片UAF42的第12引脚连接;所述运放芯片U3的反相信号输入端与DA转换芯片U1的输出端连接,所述运放芯片U3的同相信号输入端接地,所述运放芯片U3的输出端与DA转换芯片U1的RTB引脚连接,且通过电阻R1与有源滤波器芯片UAF42的第8引脚连接;所述运放芯片U4的反相信号输入端与DA转换芯片U2的输出端连接,所述运放芯片U4的同相信号输入端接地,所述运放芯片U4的输出端与DA转换芯片U2的RTB引脚连接,且通过电阻R2与有源滤波器芯片UAF42的第14引脚连接;所述电阻R4接在有源滤波器芯片UAF42的第1引脚与第5引脚之间,所述电阻R5接在有源滤波器芯片UAF42的第5引脚与第6引脚之间,所述有源滤波器芯片UAF42的第12引脚通过电阻R7与测量绕组的正极输出端M+连接,所述测量绕组的负极输出端M-接地,所述有源滤波器芯片UAF42的第6引脚为可编程滤波器5的输出端。In this embodiment, as shown in FIG. 3 , the programmable filter 5 includes an active filter chip UAF42, a DA conversion chip U1 and a DA conversion chip U2 whose model is AD5545, and an operational amplifier chip U3 whose model is AD8620 and operational amplifier chip U4, as well as resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6 and resistor R7, the SPI interface of the DA conversion chip U1 and the SPI interface of the DA conversion chip U2 are all connected with the DSP digital signal The second SPI interface SPI2 of the processor is connected, the VREF interface of the DA conversion chip U1 is connected with the 13th pin of the active filter chip UAF42, and is connected with the 5th pin of the active filter chip UAF42 through the resistor R3 , the VREF interface of the DA conversion chip U2 is connected with the 7th pin of the active filter chip UAF42, and is connected with the 12th pin of the active filter chip UAF42 through the resistor R6; The phase signal input terminal is connected with the output terminal of the DA conversion chip U1, the in-phase signal input terminal of the operational amplifier chip U3 is grounded, and the output terminal of the operational amplifier chip U3 is connected with the RTB pin of the DA conversion chip U1, and is passed through The resistor R1 is connected with the 8th pin of the active filter chip UAF42; the inverting signal input end of the operational amplifier chip U4 is connected with the output end of the DA conversion chip U2, and the in-phase signal input end of the operational amplifier chip U4 is connected Grounding, the output end of the operational amplifier chip U4 is connected to the RTB pin of the DA conversion chip U2, and is connected to the 14th pin of the active filter chip UAF42 through the resistor R2; the resistor R4 is connected to the active filter Between the 1st pin and the 5th pin of the chip UAF42, the resistor R5 is connected between the 5th pin and the 6th pin of the active filter chip UAF42, and the first pin of the active filter chip UAF42 is connected. The 12th pin is connected to the positive output terminal M+ of the measurement winding through the resistor R7, the negative output terminal M- of the measurement winding is grounded, and the 6th pin of the active filter chip UAF42 is the output terminal of the programmable filter 5 .

有源滤波器芯片UAF42是TI公司研制的通用型有源滤波器模块,为通用的二阶滤波器构件,它能同时有高通、低通、带通输出,本实施例中,只用到了UAF42的带通回路,为了达到可配置带通频率的作用,本发明增加了由型号均为AD5545的DA转换芯片U1和DA转换芯片U2,以及型号均为AD8620的运放芯片U3和运放芯片U4构建的两个DA回路,用于根据不同的激磁频率配置为不同的中心频率滤波器。所述可编程滤波器5的工作过程为:型号均为AD5545的DA转换芯片U1和DA转换芯片U2通过SPI接口接收来自DSP数字信号处理器的第二SPI接口SPI2发出的命令,输出相应的电压值,从而改变有源滤波器芯片UAF42的带通中心频率。型号均为AD5545的DA转换芯片U1和DA转换芯片U2为16Bit的DAC芯片,设其设定值为D’,带通的中心频率为(D’/216)/(2*pi*10-9*R1)=(D’/216)/(2*3.1415926*10-9*2*103)=79577k*(D’/216),D的取值为0~65536;具体实施时,所以带通的中心频率为0~79.5kHz。The active filter chip UAF42 is a general-purpose active filter module developed by TI. It is a general-purpose second-order filter component. It can have high-pass, low-pass, and band-pass outputs at the same time. In this embodiment, only UAF42 is used. In order to achieve the function of configurable band-pass frequency, the present invention adds a DA conversion chip U1 and a DA conversion chip U2, both of which are AD5545, and an operational amplifier chip U3 and an operational amplifier chip U4, both of which are AD8620. Two DA loops are constructed to configure different center frequency filters according to different excitation frequencies. The working process of the programmable filter 5 is as follows: the DA conversion chip U1 and the DA conversion chip U2 whose models are both AD5545 receive the command sent by the second SPI interface SPI2 of the DSP digital signal processor through the SPI interface, and output the corresponding voltage. value, thereby changing the bandpass center frequency of the active filter chip UAF42. The DA conversion chip U1 and the DA conversion chip U2 of the model AD5545 are 16Bit DAC chips, set the set value to D', and the center frequency of the band pass is (D'/2 16 )/(2*pi*10 - 9 *R1)=(D'/2 16 )/(2*3.1415926*10 -9 *2*10 3 )=79577k*(D'/2 16 ), the value of D is 0~65536; , so the center frequency of the bandpass is 0-79.5kHz.

本实施例中,如图4所示,所述相敏解调电路6包括由型号为AD8620的运放芯片U5构成的电压跟踪仪和型号为AD8620的运放芯片U6构成的反向器,由二选一多路转换器芯片CD4051构成的二选一多路转换器,以及电阻R11、电阻R12、电阻R13和电容C1;所述运放芯片U5的反相输入端和电阻R11的一端连接且为相敏解调电路6的输入端,所述运放芯片U5的同相输入端与输出端连接;所述运放芯片U6的反相输入端与电阻R11的另一端连接,且通过电阻R2与运放芯片U6的输出端连接,所述运放芯片U6的同相输入端接地;所述二选一多路转换器芯片CD4051的第一路信号输入端引脚CH1与运放芯片U5的输出端连接,所述二选一多路转换器芯片CD4051的第二路信号输入端引脚CH0与运放芯片U6的输出端连接,所述二选一多路转换器芯片CD4051的地址选通引脚B和地址选通引脚C均接地,所述二选一多路转换器芯片CD4051的地址选通引脚A与倍频电路4的输出端连接,所述电阻R13的一端与二选一多路转换器芯片CD4051的信号输出端引脚连接,所述电阻R13的另一端为相敏解调电路6的输出端且通过电容C1接地。In this embodiment, as shown in FIG. 4 , the phase-sensitive demodulation circuit 6 includes a voltage tracker composed of an operational amplifier chip U5 of the model AD8620 and an inverter composed of an operational amplifier chip U6 of the model AD8620. A two-to-one multiplexer composed of a two-to-one multiplexer chip CD4051, and a resistor R11, a resistor R12, a resistor R13 and a capacitor C1; the inverting input terminal of the operational amplifier chip U5 is connected to one end of the resistor R11 and It is the input end of the phase-sensitive demodulation circuit 6, and the non-inverting input end of the operational amplifier chip U5 is connected to the output end; the inverting input end of the operational amplifier chip U6 is connected to the other end of the resistor R11, and is connected to the resistance R11 through the resistance R2. The output terminal of the operational amplifier chip U6 is connected, and the non-inverting input terminal of the operational amplifier chip U6 is grounded; the first signal input terminal pin CH1 of the two-to-one multiplexer chip CD4051 is connected to the output terminal of the operational amplifier chip U5 connected, the second signal input pin CH0 of the two-to-one multiplexer chip CD4051 is connected to the output end of the operational amplifier chip U6, and the address strobe pin of the two-to-one multiplexer chip CD4051 Both B and the address strobe pin C are grounded, the address strobe pin A of the two-to-one multiplexer chip CD4051 is connected to the output end of the frequency multiplier circuit 4, and one end of the resistor R13 is connected to the two-to-one-multiple The signal output pin of the circuit converter chip CD4051 is connected to the pin, and the other end of the resistor R13 is the output end of the phase-sensitive demodulation circuit 6 and is grounded through the capacitor C1.

所述相敏解调电路6工作时,倍频电路4输出的方波信号T2直接作为二选一多路转换器芯片CD4051的地址选通引脚A的输入,定义由运放芯片U5构成的电压跟踪仪输出的信号为+Vbpass,由运放芯片U6构成的反向器输出的信号为-Vbpass,由于方波信号T2和Vbpass的相位完全同步,假设Vbpass上半波为正值,这样当方波信号T2为上半波时,Vpm=+Vbpass为正值,当方波信号T2为下半波时,Vpm=-Vbpass,在下半周波Vbpass的值为负,通过运放芯片U6构成的反向器输出-Vbpass为正,假设Vbpass上半波为负值,这样当T2为上半波时,相敏解调电路6的输出端输出的信号Vpm=+Vbpass为负值,当T2为下半波时,相敏解调电路6的输出端输出的信号Vpm=-Vbpass,在下半周波Vbpass的值为正,通过运放芯片U6构成的反向器输出-Vbpass为负值,这样通过二选一多路转换器芯片CD4051的同步切换,实现了全波解调,电阻R3和电容C1对全波整理后的直流信号做低通滤波。When the phase-sensitive demodulation circuit 6 is working, the square wave signal T2 output by the frequency multiplier circuit 4 is directly used as the input of the address strobe pin A of the two-to-one multiplexer chip CD4051, which defines the signal composed of the operational amplifier chip U5. The signal output by the voltage tracker is +V bpass , and the signal output by the inverter composed of the op amp chip U6 is -V bpass . Since the phases of the square wave signal T2 and V bpass are completely synchronized, it is assumed that the upper half wave of V bpass is positive value, so when the square wave signal T2 is the upper half wave, V pm =+V bpass is a positive value, when the square wave signal T2 is the lower half wave, V pm =-V bpass , the value of V bpass in the lower half cycle is negative, The output of the inverter formed by the operational amplifier chip U6 -V bpass is positive, assuming that the upper half wave of V bpass is a negative value, so when T2 is the upper half wave, the output of the phase sensitive demodulation circuit 6 The output signal V pm =+V bpass is a negative value, when T2 is the lower half-wave, the output signal V pm =-V bpass of the output terminal of the phase-sensitive demodulation circuit 6, the value of V bpass in the second half-cycle is positive, through the operational amplifier chip U6 The output of the formed inverter -V bpass is a negative value, so through the synchronous switching of the multiplexer chip CD4051, the full-wave demodulation is realized. The resistor R3 and the capacitor C1 reduce the DC signal after the full-wave arrangement. pass filtering.

本实施例中,如图5所示,所述PI控制电路7包括运放芯片OP07D、电阻R15、电阻R16、电阻R17和电容C2,所述电阻R15的一端为PI控制电路7的输入端,所述运放芯片OP07D的反相输入端与电阻R15的另一端连接,所述运放芯片OP07D的同相输入端接地,所述运放芯片OP07D的输出端与反相输入端之间接有电阻R16,以及并联的电阻R17和电容C2,所述运放芯片OP07D的输出端为PI控制电路7的输出端。In this embodiment, as shown in FIG. 5 , the PI control circuit 7 includes an operational amplifier chip OP07D, a resistor R15, a resistor R16, a resistor R17 and a capacitor C2, and one end of the resistor R15 is the input end of the PI control circuit 7, The inverting input terminal of the operational amplifier chip OP07D is connected to the other end of the resistor R15, the non-inverting input terminal of the operational amplifier chip OP07D is grounded, and a resistor R16 is connected between the output terminal and the inverting input terminal of the operational amplifier chip OP07D. , and the parallel resistor R17 and capacitor C2 , the output end of the operational amplifier chip OP07D is the output end of the PI control circuit 7 .

所述PI控制电路7用来比例调节和积分调节作用,比例环节能够按比例反应系统的偏差,系统一旦出现了偏差,比例环节立即产生调节用以减少偏差;比例系数大,可以加快调节,减少偏差;积分环节使系统消除稳态误差,提高无差度;有误差,积分环节就进行,直至无差,积分调节停止,积分环节输出一常值;积分作用的强弱取决于积分常数,积分常数越小,积分作用就越强;反之积分作用弱。The PI control circuit 7 is used for proportional adjustment and integral adjustment. The proportional link can respond to the deviation of the system proportionally. Once the system has deviation, the proportional link will immediately adjust to reduce the deviation; if the proportional coefficient is large, it can speed up the adjustment and reduce the Deviation; the integral link makes the system eliminate the steady-state error and improve the degree of indifference; if there is an error, the integral link is carried out until there is no difference, the integral adjustment stops, and the integral link outputs a constant value; the strength of the integral action depends on the integral constant, the integral The smaller the constant is, the stronger the integral action is; otherwise the integral action is weaker.

本实施例中,如图6所示,所述功率放大器8包括功率放大器芯片OPA548、电阻R21、电阻R22、电阻R23、电阻R24和电阻R25,所述电阻R21的一端为功率放大器8的输入端,所述功率放大器芯片OPA548的反相输入端与电阻R21的另一端连接,所述功率放大器芯片OPA548的同相输入端通过电阻R23接地,所述功率放大器芯片OPA548的反相输入端与输出端之间接有电阻R22,所述功率放大器芯片OPA548的同相输入端与输出端之间接有电阻R24,所述功率放大器芯片OPA548的输出端与电阻R25的一端连接,所述电阻R25的另一端为功率放大器8的输出端。In this embodiment, as shown in FIG. 6 , the power amplifier 8 includes a power amplifier chip OPA548 , a resistor R21 , a resistor R22 , a resistor R23 , a resistor R24 and a resistor R25 , and one end of the resistor R21 is the input end of the power amplifier 8 , the inverting input terminal of the power amplifier chip OPA548 is connected to the other end of the resistor R21, the non-inverting input terminal of the power amplifier chip OPA548 is grounded through the resistor R23, and the inverting input terminal of the power amplifier chip OPA548 is connected to the output terminal. There is a resistor R22 indirectly, a resistor R24 is connected between the non-inverting input end and the output end of the power amplifier chip OPA548, the output end of the power amplifier chip OPA548 is connected to one end of the resistor R25, and the other end of the resistor R25 is the power amplifier 8 outputs.

所述电阻R25为反馈电阻,所述功率放大器8能够完成电压到电流的比例放大作用;所述功率放大器8的输出电流Ipow=R22*Vpi/(R21*R25)=1k*Vpi/(10K*0.1)=Vpi/1。The resistor R25 is a feedback resistor, and the power amplifier 8 can complete the proportional amplification of voltage to current; the output current of the power amplifier 8 I pow =R22*V pi /(R21*R25)=1k*V pi / (10K*0.1)= Vpi /1.

本实施例中,如图7所示,所述可编程补偿信号跟踪器11包括型号为AD5545的DA转换芯片U7,型号均为AD8620的运放芯片U8和运放芯片U9,以及电阻R31、电阻R32和电阻R33,所述DA转换芯片U7的VREF引脚与DSP数字信号处理器的定时器Timer1连接,所述DA转换芯片U7的SPI引脚与DSP数字信号处理器的第一SPI接口SPI1连接,所述运放芯片U8的反相输入端与DA转换芯片U7的输出端引脚连接,所述运放芯片U8的同相输入端接地,所述运放芯片U8的输出端与DA转换芯片U7的RFB引脚连接,且通过电阻R31与运放芯片U9的反相输入端连接,所述运放芯片U9的反相输入端通过电阻R32与DA转换芯片U7的VREF引脚连接,所述运放芯片U9的反相输入端与输出端之间接有电阻R33,所述运放芯片U9的同相输入端接地且为可编程补偿信号跟踪器11的补偿电流负极输出端Vs-,所述运放芯片U9的输出端为可编程补偿信号跟踪器11的补偿电流正极输出端Vs+。In this embodiment, as shown in FIG. 7 , the programmable compensation signal tracker 11 includes a DA conversion chip U7 whose model is AD5545, an operational amplifier chip U8 and an operational amplifier chip U9 whose model is AD8620, and a resistor R31, a resistor R32 and resistor R33, the VREF pin of the DA conversion chip U7 is connected with the timer Timer1 of the DSP digital signal processor, the SPI pin of the DA conversion chip U7 is connected with the first SPI interface SPI1 of the DSP digital signal processor , the inverting input terminal of the operational amplifier chip U8 is connected with the output terminal pin of the DA conversion chip U7, the non-inverting input terminal of the operational amplifier chip U8 is grounded, and the output terminal of the operational amplifier chip U8 is connected to the DA conversion chip U7 The RFB pin is connected, and is connected with the inverting input terminal of the operational amplifier chip U9 through the resistance R31, and the inverting input terminal of the operational amplifier chip U9 is connected with the VREF pin of the DA conversion chip U7 through the resistance R32. A resistor R33 is connected between the inverting input terminal and the output terminal of the amplifier chip U9. The non-inverting input terminal of the operational amplifier chip U9 is grounded and is the compensation current negative output terminal Vs- of the programmable compensation signal tracker 11. The operational amplifier The output end of the chip U9 is the compensation current positive output end Vs+ of the programmable compensation signal tracker 11 .

所述可编程补偿信号跟踪器11为一个单极转双极的输出电路,通过SPI接口接收来自DSP数字信号处理器的的设定数值D,Vs=D/32768-1*T1;D为16Bit的无符号数值其值为O~65535,所以Vs的范围为-T1~T1,完成了对T1的数字可编程输出,并把单极性转换为双极性。The programmable compensation signal tracker 11 is a unipolar to bipolar output circuit, and receives the set value D from the DSP digital signal processor through the SPI interface, Vs=D/32768-1*T1; D is 16Bit The value of the unsigned value is 0 to 65535, so the range of Vs is -T1 to T1, which completes the digital programmable output of T1, and converts unipolar to bipolar.

本实施例中,如图8所示,所述激励源放大驱动电路12包括型号均为OPA548的功率放大器芯片U10和功率放大器芯片U11,以及电阻R41和电阻R42;所述功率放大器芯片U10的反相输入端与电阻R41的一端连接且为激励源放大驱动电路12的输入端,且与DSP数字信号处理器的定时器Timerl连接,所述功率放大器芯片U10的同相输入端与输出端连接,所述功率放大器芯片U11的反相输入端与电阻R41的另一端连接,所述功率放大器芯片U11的同相输入端接地,所述功率放大器芯片U11的反相输入端与输出端之间接有电阻R42,所述功率放大器芯片U10的输出端为激励源放大驱动电路12的电压正极输出端,所述功率放大器芯片U11的输出端为激励源放大驱动电路12的电压负极输出端。In this embodiment, as shown in FIG. 8 , the excitation source amplifying and driving circuit 12 includes a power amplifier chip U10 and a power amplifier chip U11 whose models are OPA548, and a resistor R41 and a resistor R42; the reverse of the power amplifier chip U10 The phase input terminal is connected to one end of the resistor R41 and is the input terminal of the excitation source amplifying drive circuit 12, and is connected to the timer Timer1 of the DSP digital signal processor. The non-phase input terminal of the power amplifier chip U10 is connected to the output terminal, so The inverting input terminal of the power amplifier chip U11 is connected to the other end of the resistor R41, the non-inverting input terminal of the power amplifier chip U11 is grounded, and a resistor R42 is connected between the inverting input terminal and the output terminal of the power amplifier chip U11, The output terminal of the power amplifier chip U10 is the voltage positive output terminal of the excitation source amplifier driving circuit 12 , and the output terminal of the power amplifier chip U11 is the voltage negative output terminal of the excitation source amplifier driving circuit 12 .

所述功率放大器芯片U10构成了同相放大器,所述功率放大器芯片U11构成了反相放大器,使得所述激励源放大驱动电路12为双端驱动输出。The power amplifier chip U10 constitutes a non-inverting amplifier, and the power amplifier chip U11 constitutes an inverting amplifier, so that the excitation source amplifying driving circuit 12 is a double-terminal driving output.

本发明的交直流零磁通磁通门电流传感器的程控配置及校准方法,包括以下步骤:The program-controlled configuration and calibration method of the AC-DC zero-flux fluxgate current sensor of the present invention comprises the following steps:

步骤一、激励源放大驱动电路12在处理器1的控制下输出电压方波信号,在第一铁芯9和第二铁芯10上通过激励绕组反方向串联连接;Step 1, the excitation source amplifying drive circuit 12 outputs a voltage square wave signal under the control of the processor 1, and the first iron core 9 and the second iron core 10 are connected in series in the opposite direction through the excitation winding;

步骤二、当第一铁芯和第二铁芯的激磁磁场不一致时,在处理器的控制下通过可编程补偿信号跟踪器输出补偿激励信号给磁通门电流传感器本体的激励绕组,保证一次电流Ip为0时,测量绕组没有偶次谐波分量,也就是偶次谐波分量Is=0;Step 2. When the excitation magnetic fields of the first iron core and the second iron core are inconsistent, the programmable compensation signal tracker is controlled by the processor to output the compensation excitation signal to the excitation winding of the fluxgate current sensor body to ensure the primary current. When I p is 0, the measurement winding has no even harmonic components, that is, even harmonic components Is = 0;

步骤三、当一次电流Ip不为零时,测量绕组的的信号输出含有二次谐波和其他的偶次谐波;Step 3. When the primary current I p is not zero, the signal output of the measurement winding contains the second harmonic and other even harmonics;

步骤四、通过所述补偿电流输出电路提取二次谐波分量,把二次谐波分量调整为直流输出,并输出一个补偿电流Is给磁通门电流传感器本体中激励绕组。Step 4: Extract the second harmonic component through the compensation current output circuit, adjust the second harmonic component to DC output, and output a compensation current I s to the excitation winding in the fluxgate current sensor body.

具体实施时,通过可编程滤波器5,提取二次谐波分量;通过相敏解调电路6,把二次谐波分量调整为直流输出;通过PI控制电路7和功率放大器8输出一个补偿电流IsDuring specific implementation, the second harmonic component is extracted through the programmable filter 5; the second harmonic component is adjusted to a DC output through the phase-sensitive demodulation circuit 6; a compensation current is output through the PI control circuit 7 and the power amplifier 8 Is ;

在PI控制电路7的控制下输出补偿电流Is给磁通门电流传感器本体中激励绕组,最终达到动态平衡,用公式表示为Ip*N1=Is*N2,其中N1为激励绕组匝数,N2为反馈绕组匝数。Under the control of the PI control circuit 7, the compensation current I s is output to the excitation winding in the fluxgate current sensor body, and the dynamic balance is finally achieved, which is expressed as I p *N 1 =I s *N 2 , where N 1 is the excitation The number of winding turns, N 2 is the number of turns of the feedback winding.

综上所述,本发明能够自动匹配对两个铁芯参数不一致所造成的失调电流,能够大大减低对两个磁通门铁芯工艺一致性的要求,能够实现磁通门传感器的最佳性能,能够消除地磁场对直流失调的影响,能够提高测量带宽和灵敏度,实用性强,推广使用价值高。To sum up, the present invention can automatically match the offset current caused by the inconsistent parameters of the two iron cores, can greatly reduce the requirements for the process consistency of the two fluxgate iron cores, and can realize the best performance of the fluxgate sensor. , can eliminate the influence of the earth's magnetic field on the DC offset, can improve the measurement bandwidth and sensitivity, has strong practicability, and has high promotion and use value.

本领域内的技术人员应明白,本申请的实施例可提供为方法、系统、或计算机程序产品。因此,本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且,本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。As will be appreciated by those skilled in the art, the embodiments of the present application may be provided as a method, a system, or a computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

本申请是参照根据本申请实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It will be understood that each flow and/or block in the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to the processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing device to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing device produce Means for implementing the functions specified in a flow or flow of a flowchart and/or a block or blocks of a block diagram.

这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory result in an article of manufacture comprising instruction means, the instructions The apparatus implements the functions specified in the flow or flow of the flowcharts and/or the block or blocks of the block diagrams.

这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上,使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。These computer program instructions can also be loaded on a computer or other programmable data processing device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process such that The instructions provide steps for implementing the functions specified in the flow or blocks of the flowcharts and/or the block or blocks of the block diagrams.

最后应当说明的是:以上实施例仅用以说明本发明的技术方案而非对其限制,尽管参照上述实施例对本发明进行了详细的说明,所属领域的普通技术人员应当理解:依然可以对本发明的具体实施方式进行修改或者等同替换,而未脱离本发明精神和范围的任何修改或者等同替换,其均应涵盖在本发明的权利要求保护范围之内。Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit them. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: the present invention can still be Modifications or equivalent replacements are made to the specific embodiments of the present invention, and any modifications or equivalent replacements that do not depart from the spirit and scope of the present invention shall be included within the protection scope of the claims of the present invention.

Claims (10)

1. The utility model provides an alternating current-direct current zero flux fluxgate current sensor which characterized in that: the device comprises a configuration and calibration circuit for configuring and calibrating a fluxgate current sensor body, wherein the configuration and calibration circuit comprises a processor (1), an excitation source amplification driving circuit (12) which is connected with the processor (1) and used for providing excitation voltage for an excitation winding of the fluxgate current sensor body, a programmable compensation signal tracker (11) for compensating the inconsistency of excitation magnetic fields caused by the inconsistency of materials and manufacturing processes of a second iron core (10) and a first iron core (9) in the fluxgate current sensor body, and a compensation current output circuit for outputting compensation current to a feedback winding in the fluxgate current sensor body, the excitation winding in the fluxgate current sensor body is connected with the output end of the excitation source amplification driving circuit (12), the excitation winding in the fluxgate current sensor body is connected with the output end of the programmable compensation signal tracker (11), the input end of the compensation current output circuit is connected with the measuring winding, and the feedback winding is connected with the output end of the compensation current output circuit.
2. The ac/dc zero flux fluxgate current sensor according to claim 1, wherein: the processor (1) is a DSP digital signal processor, a clock input interface of the DSP digital signal processor is connected with a crystal oscillator (2), the excitation source amplification driving circuit (12) and the programmable compensation signal tracker (11) are both connected with a timer Timrl of the DSP digital signal processor, the timer Timrl of the DSP digital signal processor is also connected with a frequency doubling circuit (4), a serial port RS232 of the DSP digital signal processor is connected with an RS232 interface circuit (3), the programmable compensation signal tracker (11) is connected with a first SPI interface SPI1 of the DSP digital signal processor, the compensation current output circuit comprises a programmable filter (5) connected with a second SPI interface SPI2 of the DSP digital signal processor, and a phase sensitive demodulation circuit (6), a PI control circuit (7) and a power amplifier (8) which are sequentially connected with the output end of the programmable filter (5), and the phase-sensitive demodulation circuit (6) is connected with the output end of the frequency doubling circuit (4).
3. The ac/dc zero flux fluxgate current sensor according to claim 2, wherein: the frequency multiplier circuit (4) comprises a 74HC74 chip, a CP pin of the 74HC74 chip is connected with a timer Timel of a DSP digital signal processor, and a D pin of the 74HC74 chip is connected with a timer Timel
Figure FDA0002130241210000011
And the pin is connected, and the Q pin of the 74HC74 chip is the output end of the frequency doubling circuit (4).
4. The ac/dc zero flux fluxgate current sensor according to claim 2, wherein: the programmable filter (5) comprises an active filter chip UAF42, a DA conversion chip U1 and a DA conversion chip U2, the types of which are AD5545, an operational amplifier chip U3 and an operational amplifier chip U4, the types of which are AD8620, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6 and a resistor R7, wherein the SPI interface of the DA conversion chip U1 and the SPI interface of the DA conversion chip U2 are connected with a second SPI interface SPI2 of a DSP digital signal processor, the VREF interface of the DA conversion chip U1 is connected with a 13 th pin of the active filter chip UAF42 and is connected with a5 th pin of the active filter chip UAF42 through the resistor R3, the VREF interface of the DA conversion chip U2 is connected with a 7 th pin of the active filter chip UAF42 and is connected with a 12 th pin of the active filter chip UAF42 through the resistor R6; the inverting signal input end of the operational amplifier chip U3 is connected with the output end of a DA conversion chip U1, the non-inverting signal input end of the operational amplifier chip U3 is grounded, the output end of the operational amplifier chip U3 is connected with an RTB pin of the DA conversion chip U1, and is connected with the 8 th pin of an active filter chip UAF42 through a resistor R1; the inverting signal input end of the operational amplifier chip U4 is connected with the output end of a DA conversion chip U2, the non-inverting signal input end of the operational amplifier chip U4 is grounded, the output end of the operational amplifier chip U4 is connected with an RTB pin of the DA conversion chip U2 and is connected with a 14 th pin of an active filter chip UAF42 through a resistor R2; the resistance R4 connects between the 1 st pin and the 5 th pin of active filter chip UAF42, resistance R5 connects between the 5 th pin and the 6 th pin of active filter chip UAF42, the 12 th pin of active filter chip UAF42 is connected with the positive output end M + of measuring winding through resistance R7, the negative output end M-ground of measuring winding, the 6 th pin of active filter chip UAF42 is the output of programmable filter (5).
5. The ac/dc zero flux fluxgate current sensor according to claim 2, wherein: the phase-sensitive demodulation circuit (6) comprises a voltage tracker formed by an operational amplifier chip U5 with the model number of AD8620, an inverter formed by an operational amplifier chip U6 with the model number of AD8620, an alternative multiplexer formed by an alternative multiplexer chip CD4051, a resistor R11, a resistor R12, a resistor R13 and a capacitor C1; the inverting input end of the operational amplifier chip U5 is connected with one end of a resistor R11 and is the input end of a phase-sensitive demodulation circuit (6), and the non-inverting input end of the operational amplifier chip U5 is connected with the output end; the inverting input end of the operational amplifier chip U6 is connected with the other end of the resistor R11, and is connected with the output end of the operational amplifier chip U6 through a resistor R2, and the non-inverting input end of the operational amplifier chip U6 is grounded; a first signal input end pin CH1 of the one-of-two multiplexer chip CD4051 is connected with an output end of the operational amplifier chip U5, a second signal input end pin CH0 of the one-of-two multiplexer chip CD4051 is connected with an output end of the operational amplifier chip U6, an address gating pin B and an address gating pin C of the one-of-two multiplexer chip CD4051 are both grounded, an address gating pin A of the one-of-two multiplexer chip CD4051 is connected with an output end of the frequency doubling circuit (4), one end of a resistor R13 is connected with a signal output end pin of the one-of-two multiplexer chip CD4051, and the other end of the resistor R13 is an output end of the phase-sensitive demodulation circuit (6) and is grounded through a capacitor C1.
6. The ac/dc zero flux fluxgate current sensor according to claim 2, wherein: the PI control circuit (7) comprises an operational amplifier chip OP07D, a resistor R15, a resistor R16, a resistor R17 and a capacitor C2, one end of the resistor R15 is the input end of the PI control circuit (7), the inverting input end of the operational amplifier chip OP07D is connected with the other end of the resistor R15, the non-inverting input end of the operational amplifier chip OP07D is grounded, the resistor R16, the resistor R17 and the capacitor C2 are connected in parallel between the output end of the operational amplifier chip OP07D and the inverting input end, and the output end of the operational amplifier chip OP07D is the output end of the PI control circuit (7).
7. The ac/dc zero flux fluxgate current sensor according to claim 2, wherein: the power amplifier (8) comprises a power amplifier chip OPA548, a resistor R21, a resistor R22, a resistor R23, a resistor R24 and a resistor R25, one end of the resistor R21 is an input end of the power amplifier (8), an inverting input end of the power amplifier chip OPA548 is connected with the other end of the resistor R21, a non-inverting input end of the power amplifier chip OPA548 is grounded through the resistor R23, a resistor R22 is connected between the inverting input end and an output end of the power amplifier chip OPA548, a resistor R24 is connected between the non-inverting input end and the output end of the power amplifier chip OPA548, the output end of the power amplifier chip OPA548 is connected with one end of the resistor R25, and the other end of the resistor R25 is an output end of the power amplifier (8).
8. The ac/dc zero flux fluxgate current sensor according to claim 3, wherein: the programmable compensation signal tracker (11) comprises a DA conversion chip U7 with the model number AD5545, an operational amplifier chip U8 and an operational amplifier chip U9 with the model number AD8620, a resistor R31, a resistor R32 and a resistor R33, wherein a VREF pin of the DA conversion chip U7 is connected with a timer Timrl of a DSP digital signal processor, an SPI pin of the DA conversion chip U7 is connected with a first SPI interface SPI1 of the DSP digital signal processor, an inverting input end of the operational amplifier chip U8 is connected with an output end pin of the DA conversion chip U7, a non-inverting input end of the operational amplifier chip U8 is grounded, an output end of the operational amplifier chip U8 is connected with an RFB pin of the DA conversion chip U7 and is connected with an inverting input end of the operational amplifier chip U9 through a resistor R31, an inverting input end of the operational amplifier chip U9 is connected with a VREF pin of the DA conversion chip U7 through a resistor R32, and an inverting input end of the operational amplifier chip U36 33 is connected between the inverting input end of the operational amplifier chip U9 and the resistor, the non-inverting input end of the operational amplifier chip U9 is grounded and is a compensation current negative output end Vs + of the programmable compensation signal tracker (11), and the output end of the operational amplifier chip U9 is a compensation current positive output end Vs + of the programmable compensation signal tracker (11).
9. The ac/dc zero flux fluxgate current sensor according to claim 3, wherein: the excitation source amplification driving circuit (12) comprises a power amplifier chip U10 and a power amplifier chip U11 which are both OPA548, a resistor R41 and a resistor R42; the power amplifier circuit comprises a power amplifier chip U10, a resistor R41, a resistor R42, an excitation source amplification driving circuit (12), a timer Timrl of a DSP digital signal processor, a power amplifier chip U10, a resistor R11, a power amplifier chip U10, a resistor R11 and a power amplifier chip U11, wherein the reverse phase input end of the power amplifier chip U10 is connected with one end of the resistor R41 and is the input end of the excitation source amplification driving circuit (12), the non-phase input end of the power amplifier chip U11 is connected with the other end of the resistor R41, the non-phase input end of the power amplifier chip U11 is grounded, the resistor R42 is connected between the reverse phase input end and the output end of the power amplifier chip U11, the output.
10. A method of programming, configuring and calibrating a ac/dc fluxgate current sensor according to any of claims 1 to 9, the method comprising the steps of:
step one, an excitation source amplification driving circuit (12) outputs voltage square wave signals under the control of a processor (1), and the voltage square wave signals are connected in series on a first iron core (9) and a second iron core (10) in the opposite direction through excitation windings;
when the excitation magnetic fields of the first iron core and the second iron core are inconsistent, outputting a compensation excitation signal to an excitation winding of the fluxgate current sensor body through a programmable compensation signal tracker under the control of the processor (1);
step three, when the primary current IpWhen the signal is not zero, the signal output of the measuring winding contains second harmonic;
step four, extracting the second harmonic component through the compensation current output circuit, adjusting the second harmonic component into direct current output, and outputting a compensation current IsThe fluxgate current sensor body is energized with windings.
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CN111929492A (en) * 2020-08-17 2020-11-13 哈尔滨工业大学 All-digital fluxgate type closed-loop current sensor and its current signal acquisition method
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CN115389807A (en) * 2022-10-27 2022-11-25 国网江西省电力有限公司电力科学研究院 A Transformer Neutral Point DC Current Sensor Based on Fluxgate
CN115389807B (en) * 2022-10-27 2023-03-24 国网江西省电力有限公司电力科学研究院 A Transformer Neutral Point DC Current Sensor Based on Fluxgate

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