CN111290219B - Method and apparatus for measuring wafer overlay accuracy, and computer-readable storage medium - Google Patents
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Abstract
The application discloses a method and equipment for measuring wafer alignment precision and a computer readable storage medium. The method for measuring the wafer alignment precision comprises the following steps: determining a first test point and a second test point for measuring the alignment precision of the wafer, wherein the first test point and the second test point are symmetrical relative to the center of the wafer; respectively acquiring a pattern coincidence signal corresponding to a first test point and a second test point and corresponding alignment precision, wherein the alignment precision comprises a first alignment value and a second alignment value, and the first alignment value of the first test point is opposite to the first alignment value of the second test point; and determining the corresponding relation between the simple second pattern signal and the simple second alignment value, and obtaining the second alignment value of the first test point according to the second pattern signal of the first test point and the corresponding relation. The method for measuring the wafer alignment precision can distinguish the second alignment value caused by a certain factor in the total alignment precision, and provides more parameter information for the process.
Description
Technical Field
The present application relates to the field of semiconductor technologies, and in particular, to a method and an apparatus for measuring wafer overlay accuracy, and a computer-readable storage medium.
Background
Overlay accuracy (OVL) refers to the alignment accuracy of the pattern of the current layer and the pattern of the previous layer in the lithography manufacturing process. Because the integrated circuit chip is manufactured by laminating a plurality of layers of structures, the alignment precision among the layers of structures directly influences the effectiveness and the yield of the integrated circuit chip. In the preparation process of the integrated circuit chip, the process parameters for preparing the integrated circuit chip can be adjusted according to the data of the alignment precision so as to improve the effectiveness and the yield of the integrated circuit chip.
However, the overlay errors of each layer structure are caused by various different factors, and the traditional method for measuring the wafer overlay accuracy can only obtain the final overlay accuracy caused by the integration of various different factors, and cannot distinguish the overlay errors caused by the correspondence of various different factors, so that the measured overlay accuracy cannot meet the increasingly strict process requirements.
Disclosure of Invention
The method for measuring the wafer alignment precision can distinguish a second alignment value caused by a certain factor in the total alignment precision, provide more parameter information for the process, further improve the subsequent process steps and improve the yield of the wafer.
In a first aspect, the present application provides a method for measuring wafer overlay accuracy. The wafer comprises a front layer pattern layer and a current pattern layer stacked on the front layer pattern layer, wherein the current pattern layer and the front layer pattern layer are respectively provided with a plurality of channel holes in one-to-one correspondence. The method for measuring the wafer alignment precision comprises the following steps:
determining a first test point and a second test point for measuring the alignment precision of the wafer, wherein the first test point and the second test point are symmetrical relative to the center of the wafer;
respectively acquiring pattern coincidence signals corresponding to the first test point and the second test point; each pattern coincidence signal comprises a first pattern signal and a second pattern signal, the first pattern signal is different from the second pattern signal, and the first pattern signal of the first test point is opposite to the first pattern signal of the second test point;
obtaining the alignment precision of the first test point according to the pattern coincidence signal of the first test point, and obtaining the alignment precision of the second test point according to the pattern coincidence signal of the second test point; each alignment precision comprises a first alignment value and a second alignment value, the first alignment value corresponds to the first pattern signal one by one, the second alignment value corresponds to the second pattern signal one by one, and the first alignment value of the first test point is opposite to the first alignment value of the second test point;
comparing the pattern coincidence signal of the first test point with the pattern coincidence signal of the second test point, and offsetting the first pattern signal of the first test point and the first pattern signal of the second test point to obtain a pure second pattern signal;
comparing the alignment precision of the first test point with the alignment precision of the second test point, and offsetting the first alignment value of the first test point and the first alignment value of the second test point to obtain a pure second alignment value;
determining a corresponding relationship between the pure second pattern signal and the pure second overlay value; and obtaining a second alignment value of the first test point according to the second pattern signal of the first test point and the corresponding relation between the simple second pattern signal and the simple second alignment value.
In one embodiment, the first pattern signal is a pattern signal generated by a first factor of the current pattern layer relative to the previous pattern layer, the second pattern signal is a pattern signal generated by a second factor of the current pattern layer relative to the previous pattern layer, the first factor is an etching process for forming each trench hole penetrating through the current pattern layer, and the second factor is a mask process for forming each trench hole pattern in the current pattern layer.
In one embodiment, the number of the first test points and the second test points is N, where N is an integer greater than or equal to 3, and the method for measuring the wafer alignment precision includes:
determining the corresponding relation between the N pairs of pure second graph signals and the pure second overlay values;
and determining the corresponding relation between the standard second pattern signal and the standard second overlay value according to the variation trend of the corresponding relation between the N pairs of simple second pattern signals and the simple second overlay values.
In one embodiment, after determining the correspondence between the standard second pattern signal and the standard second overlay value, the method for measuring the wafer overlay accuracy further includes:
acquiring a graph superposition signal of a point to be measured, and distinguishing a first graph signal of the point to be measured from a second graph signal of the point to be measured;
and determining a second alignment value of the point to be measured according to the corresponding relation between the standard second graphic signal and the standard second alignment value.
In one embodiment, after determining the correspondence between the standard second pattern signal and the standard second overlay value, the method for measuring the wafer overlay accuracy further includes:
determining a corresponding relation between the standard first graphic signal and the standard first overlay value; wherein the standard first pattern signal is a pattern signal generated by the current pattern layer relative to the previous pattern layer only by the first factor, and the standard first overlay value is an alignment deviation value generated by the current pattern layer relative to the previous pattern layer only by the first factor.
In one embodiment, after determining the correspondence between the standard first pattern signal and the standard first overlay value, the method for measuring the wafer overlay accuracy further includes:
acquiring a graph superposition signal of a point to be measured, and distinguishing a first graph signal of the point to be measured from a second graph signal of the point to be measured;
and determining the first alignment value of the point to be measured according to the corresponding relation between the standard first graphic signal and the standard first alignment value.
In one embodiment, after determining the correspondence between the standard second pattern signal and the standard second overlay value, the method for measuring the wafer overlay accuracy further includes:
determining the corresponding relation between the N pairs of simple first graph signals and the simple first overlay values according to the corresponding relation between the standard second graph signals and the standard second overlay values;
and determining the corresponding relation between the standard first pattern signal and the standard first overlay value according to the variation trend of the corresponding relation between the N pairs of the simple first pattern signals and the simple first overlay value.
In one embodiment, after determining the correspondence between the pure second pattern signal and the pure second overlay value, the method for measuring the wafer overlay accuracy further includes:
determining an Mth pair of test points, wherein M is an integer larger than 2, and the pair of test points comprises two test points which are symmetrical relative to the center of the wafer;
determining a corresponding relation between the M pair of simple second pattern signals and a simple second overlay value;
and determining the corresponding relation between the standard second pattern signal and the standard second overlay value according to the variation trend of the corresponding relation between the M pairs of the simple second pattern signal and the simple second overlay value.
In one embodiment, the first overlay value is an overlay error of the current pattern layer relative to the previous pattern layer along a vertical direction, and the second overlay value is an overlay error of the current pattern layer relative to the previous pattern layer along a horizontal direction.
In one embodiment, before the determining the first test point and the second test point for measuring the wafer overlay accuracy, the method for measuring the wafer overlay accuracy further includes:
and determining the position of the center of the wafer.
In a second aspect, the present application further provides an apparatus for measuring wafer overlay accuracy. The apparatus includes a memory storing a computer readable program and a processor, the computer readable program when read by the processor performing the method as described above.
In a second aspect, the present application also provides a computer-readable storage medium. The computer-readable storage medium comprises a computer program which, when run, is capable of performing the method as described above.
In the embodiment of the application, the first overlay accuracy corresponding to the first pattern signal is symmetrical relative to the center of the wafer, the corresponding relation between the simple second pattern signal and the simple second overlay value is obtained by respectively comparing the two test points symmetrical relative to the center of the wafer, and the second overlay value of the test point can be determined according to the corresponding relation, so that the second overlay value caused by a certain factor in the total overlay accuracy is distinguished, more parameter information is provided for the process, the subsequent process steps are further improved, and the yield of the wafer is improved.
Drawings
In order to more clearly illustrate the technical solution of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic flowchart of a method for measuring wafer overlay accuracy according to an embodiment of the present disclosure in a first embodiment;
FIG. 2 is a schematic diagram of an overlay accuracy component provided by an embodiment of the present application;
fig. 3 is a schematic flowchart of a method for measuring wafer overlay accuracy according to a second embodiment of the present disclosure;
fig. 4 is a schematic flowchart of a method for measuring wafer overlay accuracy according to a third embodiment of the present disclosure;
fig. 5 is a schematic flowchart of a method for measuring wafer overlay accuracy according to a fourth embodiment of the present disclosure;
fig. 6 is a schematic flowchart of a method for measuring wafer overlay accuracy according to a fifth embodiment of the present disclosure.
Detailed Description
Technical solutions in embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, and not all embodiments. In the case where there is no conflict, the embodiments of the present application and the features of the embodiments may be combined with each other. All other embodiments obtained by a person of ordinary skill in the art without any inventive work based on the embodiments in the present application are within the scope of protection of the present application.
The semiconductor memory adopts the technology of stacking multiple layers of memory cells, and the unit cost of the memory cells is reduced while the extremely high data storage density is realized. Since a process of stacking a plurality of layers is required, a photolithography and alignment process of the plurality of layers is involved. Among them, measuring the alignment of two-layer structure patterns is especially important for the whole process.
The existing method for measuring the wafer overlay accuracy determines the overlay accuracy (OVL) of the wafer according to the collected asymmetric pattern signals. The asymmetric pattern signal is a pattern signal obtained by scanning a wafer by test equipment. But instead. However, the asymmetric pattern signal is a superposition of a vertical pattern signal and a horizontal pattern signal, so that the obtained overlay accuracy is a comprehensive value of an overlay value in the vertical direction and an overlay value in the horizontal direction, it can be understood that the overlay accuracy obtained in the prior art is an overlay error of a two-layer structure handover position, but the overlay error of the two-layer handover position includes deviations caused by various factors, for example: the deviation along the vertical direction is generated due to the etching process of forming the channel hole penetrating through each layer of structure; the horizontal deviation is generated due to the mask process of forming several trench hole patterns on each layer structure.
Therefore, aiming at the final alignment error caused by the integration of various different factors, the alignment accuracy obtained in the prior art cannot distinguish the alignment error caused by the correspondence of various different factors (such as a photomask process or an etching process), so that the measured alignment accuracy cannot meet the increasingly strict process requirements. The method for measuring the wafer alignment precision can distinguish the alignment precision values corresponding to different pattern signals in asymmetric pattern signals, so that higher process requirements are met.
Referring to fig. 1 and fig. 2 together, fig. 1 is a schematic flow chart illustrating a method for measuring wafer alignment accuracy according to an embodiment of the present disclosure in a first embodiment; fig. 2 is a schematic diagram of an alignment precision component provided in an embodiment of the present application. The wafer comprises a front layer pattern layer and a current pattern layer laminated on the front layer pattern layer. The current pattern layer and the front pattern layer are provided with a plurality of channel holes in one-to-one correspondence. It will be appreciated that the current pattern layer is located above the previous pattern layer. The current pattern layer and the front pattern layer of the wafer are both of a structure with a plurality of channel holes formed after photoetching.
The method for measuring the wafer alignment precision comprises the following steps:
s110: determining a first test point and a second test point for measuring the alignment precision of the wafer, wherein the first test point and the second test point are symmetrical relative to the center of the wafer; before determining the first test point and the second test point, the method for measuring the wafer alignment precision further comprises the following steps: the position of the center of the wafer is determined.
The wafer is circular, so that the center of the wafer is the position of the center of the circle. In one embodiment, the testing equipment can determine the position of the center of the wafer according to the position of the wafer when the wafer is placed in the measuring equipment. It can be understood that the test device can automatically determine the second test point which is symmetrical to the center of the first test point according to the first test point determined by the tester.
S120: respectively acquiring pattern coincidence signals corresponding to the first test point and the second test point; each pattern coincidence signal comprises a first pattern signal and a second pattern signal. The first pattern signal is different from the second pattern signal, and the first pattern signal of the first test point is opposite to the first pattern signal of the second test point.
The first graphic signal is generated by a first factor when the current pattern layer is relative to the previous pattern layer, and the second graphic signal is generated by a second factor when the current pattern layer is relative to the previous pattern layer. The first factor is an etching process that forms via holes in the current pattern layer, and the second factor is different from the first factor. It will be appreciated that the first graphics signal differs from the second graphics signal due to the first factor differing from the second factor.
The pattern coincidence signal is an asymmetric signal formed by directly collecting two layers of patterns by a test device through a Scanning Electron Microscope (SEM). In the etching process of forming each channel hole penetrating through the current pattern layer, the caused first pattern signals are symmetrically distributed relative to the center of the wafer, so that the first pattern signals of the two first test points which are symmetrical relative to the center of the wafer are opposite to the first pattern signals of the second test points, and the pattern coincidence signals of the first test points and the second test points obtained by the test equipment are asymmetric signals due to the fact that the first pattern signals of the two first test points which are symmetrical relative to the center of the wafer and the second pattern signals of the second test points are not symmetrically distributed relative to the wafer.
S130: and obtaining the alignment precision of the first test point according to the pattern coincidence signal of the first test point, and obtaining the alignment precision of the second test point according to the pattern coincidence signal of the second test point. Wherein, each alignment precision comprises a first alignment value and a second alignment value. The first alignment value is in one-to-one correspondence with the first pattern signal, the second alignment value is in one-to-one correspondence with the second pattern signal, and the first alignment value of the first test point is opposite to the first alignment value of the second test point.
It can be understood that, since the first overlay value corresponds to the first pattern signal one to one, and the first pattern signal is caused by the first factor, the first overlay value is an alignment deviation value generated by the first factor from the current pattern layer to the previous pattern layer. Accordingly, the second overlay value is an alignment deviation value of the current pattern layer relative to the previous pattern layer generated by the second factor.
As shown in fig. 2, the first overlay value and the second overlay value together constitute an overlay accuracy. The first alignment value is the deviation of the current pattern layer relative to the previous pattern layer along a first direction, and the second alignment value is the deviation of the current pattern layer relative to the previous pattern layer along a second direction. The first direction is perpendicular to the second direction. As shown in fig. 2, the current pattern layer is an upper layer structure, the previous pattern layer is a lower layer structure, the first registration value is an inclination value of the upper layer structure relative to the lower layer structure along the vertical direction, and the second registration value is an offset value of the upper layer structure relative to the lower layer structure along the horizontal direction.
Further, the first factor is an etching process for forming each trench hole penetrating through the current pattern layer, and the second factor is a mask process for forming each trench hole pattern in the current pattern layer. The etching process causes an overlay error of the current pattern layer relative to the previous pattern layer along the vertical direction. The masking process causes overlay errors in the horizontal direction of the current pattern layer relative to the previous pattern layer. It will be appreciated that the first overlay value is the vertical deviation of the current pattern layer from the previous pattern layer and the second overlay value is the horizontal deviation of the current pattern layer from the previous pattern layer. That is, the first overlay value is an overlay error caused by the etching process, and the second overlay value is an overlay error caused by the mask process.
As can be appreciated, the overlay accuracy is the overlay accuracy of the two pattern layers collected by the test equipment. Because the wafer is a centrosymmetric pattern and the alignment error generated in the etching process of the wafer is centrosymmetric, the first alignment values of the two centrosymmetric first test points are opposite to the first alignment values of the second test points. That is, the first overlay value of the first test point is opposite to the first overlay value of the second test point.
S140: and comparing the pattern coincidence signal of the first test point with the pattern coincidence signal of the second test point, and offsetting the first pattern signal of the first test point and the first pattern signal of the second test point to obtain a pure second pattern signal.
It can be understood that, the first pattern signals of the two centrosymmetric test points are opposite due to the centrosymmetric distribution of the first pattern signals caused in the etching process of the wafer, and when the pattern coincidence signal of the first test point is compared with the pattern coincidence signal of the second test point, the first pattern signal of the first test point can be offset from the first pattern signal of the second test point, so as to obtain a pure second pattern signal caused only by the second factor.
S150: and comparing the alignment precision of the first test point with the alignment precision of the second test point, and offsetting the first alignment value of the first test point and the first alignment value of the second test point to obtain a pure second alignment value.
It can be understood that, since the first pattern signals of the two centrosymmetric points are opposite, the first overlay values obtained by the corresponding first pattern signals of the two centrosymmetric test points are opposite, and when the overlay accuracy of the first test point and the overlay accuracy of the second test point are processed, the first overlay value of the first test point and the first overlay value of the second test point can be offset, so as to obtain a simple second overlay value caused only by the second factor.
S160: determining a corresponding relation between a pure second pattern signal and a pure second overlay value; and obtaining a second alignment value of the first test point according to the corresponding relation between the second pattern signal and the simple second pattern signal of the first test point and the simple second alignment value.
It can be understood that the simple second pattern signal is an asymmetric pattern signal generated by the current pattern layer relative to the previous pattern layer only due to the second factor, and the simple second overlay value is an alignment deviation value generated by the current pattern layer relative to the previous pattern layer only due to the second factor, that is, the simple second overlay value corresponds to the simple second pattern signal one to one. For example, when the simple second pattern signal has an intensity of 10 and the simple second overlay value is 20, it can be seen that the simple second overlay value corresponding to the second pattern signal with unit intensity is 2. In the prior art, although the pattern overlay signal can be divided into the first pattern signal and the second pattern signal, the overlay error corresponding to the first pattern signal and the overlay error corresponding to the second pattern signal cannot be determined. In the embodiment of the application, by measuring the pattern coincidence signals and the alignment precision of the two centrosymmetric points, the corresponding relation between the simple second pattern signal and the simple second alignment value can be obtained, so that the alignment precision is distinguished from the causes caused by different factors, more parameter information is further provided for the process, the subsequent process steps are further improved, and the yield of the wafer is improved.
In the embodiment of the application, by utilizing the characteristic that the overlay error caused by the first factor is symmetrical relative to the center of the wafer, the corresponding relation between the second pattern signal and the second overlay value caused only by the second factor is obtained by respectively comparing the pattern overlay signals and the overlay accuracy of the two test points which are symmetrical relative to the center of the wafer, so that the corresponding relation caused by various factors is distinguished, more parameter information is provided for the process, the subsequent process steps are further improved, and the yield of the wafer is improved.
Further, referring to fig. 3, fig. 3 is a flowchart illustrating a second embodiment of a method for measuring wafer alignment accuracy according to an embodiment of the present disclosure. The following mainly illustrates differences between the present embodiment and the first embodiment, and most technical contents of the present embodiment that are the same as those of the first embodiment will not be described in detail herein.
The method for measuring the wafer alignment precision comprises the following steps:
s210, determining a first test point and a second test point for measuring the alignment precision of the wafer, wherein the first test point and the second test point are symmetrical relative to the center of the wafer.
The number of the first test points and the number of the second test points are both N, and N is an integer greater than or equal to 3. The 1 first test point and the 1 second test point form 1 pair of test points. The N first test points and the N second test points form N pairs of test points.
It can be understood that, after the position of the center of the wafer is determined, the test equipment can determine, according to the N first test points, N second test points that are symmetric with the N first test points one by one.
S220, acquiring the pattern coincidence signals corresponding to the N first test points and the N second test points respectively.
The specific steps included in S220 can be referred to as S120. It can be understood that the pattern coincidence signals of the N first test points include N first pattern signals and N second pattern signals. The pattern coincidence signals of the N second test points also comprise N first pattern signals and N second pattern signals.
In the second embodiment provided by the present application, the test equipment simultaneously tests the image superposition signals of N pairs of test points (N first test points and N second test points), thereby greatly saving the test time.
And S230, respectively obtaining the alignment precision corresponding to the N first test points and the N second test points.
The specific steps included in S230 can be referred to as S130. It can be understood that the overlay accuracy of the N first test points includes N first overlay values and N second overlay values. The alignment precision of the N second test points also comprises N first alignment values and N second alignment values.
The N pairs of measuring points are all located on the same wafer, and the first alignment errors generated in the etching process of the wafer are centrosymmetric, so that the first alignment values of any two centrosymmetric measuring points are opposite. That is, the first alignment values of the N first test points are opposite to the first alignment values of the N second test points in a one-to-one correspondence.
In the second embodiment provided by the application, the test equipment simultaneously tests the alignment precision of the N pairs of test points (the N first test points and the N second test points), so that the test time is greatly saved.
S240, determining the corresponding relation between the N pairs of simple second pattern signals and the simple second overlay values.
The specific steps included in S240 are referred to as S140. It can be understood that a first test point and a second test point symmetrical to the center of the first test point can be regarded as a pair of test points, and the first pattern signals of each pair of test points are opposite, so that the first pattern signals of each pair of test points can be offset when the pattern coincidence signals of each pair of test points are compared to obtain a pure second pattern signal, and correspondingly, the first alignment value of each pair of test points can be offset when the alignment precision of each pair of test points is compared to obtain a pure second alignment value, so that each pair of test points can obtain a corresponding relation between the pure second pattern signal and the pure second alignment value. In the embodiment of the application, the number of the first test points and the number of the second test points are both N, that is, N pairs of test points are included, so that the corresponding relationship between N pairs of simple second pattern signals and simple second engraving values can be obtained.
It is understood that in the first embodiment provided in the present application, the testing apparatus obtains the corresponding relationship between a pair of simple second pattern signals and a pair of simple second registration values in a single program setup. In the second embodiment provided by the application, the test equipment can acquire the corresponding relation between the N pairs of simple second pattern signals and the simple second registration values in one-time program setting, so that the test time is greatly reduced, and the test efficiency is improved.
And S250, determining the corresponding relation between the standard second pattern signal and the standard second overlay value according to the variation trend of the corresponding relation between the N pairs of the simple second pattern signal and the simple second overlay value.
It will be appreciated that the standard second pattern signal corresponds to the standard second overlay value by the end use second pattern signal corresponding to the second overlay value. The one-to-one correspondence between the N pure second pattern signals and the N pure second overlay values is an intermediate correspondence between the second pattern signals and the second overlay values. That is, the corresponding relationship between the pure second pattern signal and the pure second overlay value by N provides data support for obtaining the corresponding relationship between the final standard second pattern signal and the standard second overlay value.
S260, acquiring a graph superposition signal of the point to be measured, and distinguishing a first graph signal of the point to be measured from a second graph signal of the point to be measured.
Wherein the first pattern signal is a signal due to a first factor, the second pattern signal is a signal due to a second factor, and the first pattern signal is different from the second pattern signal based on the first factor being different from the second factor, so that the test apparatus can distinguish the first pattern signal from the second pattern signal of the pattern coincidence signal. It will be appreciated that the first and second pattern signals in the pattern coincidence signal can be distinguished according to the prior art.
And S270, determining a second overlay value of the point to be measured according to the corresponding relation between the standard second graphic signal and the standard second overlay value.
Since the pattern overlay signal of the point to be measured has been divided into the first pattern signal and the second pattern signal in S260, the overlay error corresponding to the second pattern signal can be obtained according to the corresponding relationship between the standard second pattern signal and the standard second overlay value. After the second overlay value of the point to be measured is obtained, the first overlay value of the point to be measured can be obtained according to the overlay precision of the point to be measured, so that the first overlay value and the second overlay value of the point to be measured are obtained respectively. The point to be measured can be any measuring point on the wafer. It is understood that the point to be measured can also be any one of the N first measurement points or the N second measurement points.
When the point to be measured is one of the N first measurement points or the N second measurement points, the image coincidence signal of the measurement point is already obtained in S220, so that it is not necessary to scan again to obtain the image coincidence signal in S260, and only the image coincidence signal of the measurement point already obtained in S220 needs to be called, and then the image coincidence signal of the measurement point is divided into the first image signal of the point to be measured and the second image signal of the point to be measured. Since the overlay accuracy of the measurement point is already obtained in S220, the first overlay value of the point to be measured can be determined after the second overlay value of the point to be measured is determined.
In the second embodiment provided by the application, the variation trend of the corresponding relationship between the N pairs of simple second pattern signals and the simple second overlay values is statistically compared by testing the N pairs of test points, so as to obtain the corresponding relationship between the standard second pattern signals and the standard second overlay values, avoid errors generated by a pair of measurement points, improve the accuracy of the corresponding relationship between the second pattern signals and the second overlay values, and improve the reliability of the method for measuring the wafer overlay accuracy. In addition, in the embodiment of the application, after the second overlay value of the point to be tested is obtained, the first overlay value of the point to be tested can be directly obtained according to the overlay accuracy of the point to be tested, and the corresponding relation between the first graph signal and the first overlay value does not need to be obtained, so that the test time is saved, and the test efficiency is improved.
Further, referring to fig. 4, fig. 4 is a schematic flowchart illustrating a third embodiment of a method for measuring wafer overlay accuracy according to the present invention. The following mainly describes differences between the present embodiment and the previous embodiments, and most technical contents of the present embodiment that are the same as those of the previous embodiments are not described in detail below.
The method for measuring the wafer alignment precision comprises the following steps:
s310: and determining a first test point and a second test point, wherein the first test point and the second test point are symmetrical relative to the center of the wafer.
The specific steps included in S310 are referred to as S210. The number of the first test points and the number of the second test points are both N, and N is an integer greater than or equal to 3.
S320: and respectively acquiring the pattern coincidence signals corresponding to the N first test points and the N second test points.
The specific steps included in S320 are referred to as S220.
S330: and respectively obtaining the alignment precision corresponding to the N first test points and the N second test points.
The specific steps included in S330 are referred to as S230.
S340: and determining the corresponding relation between the N pairs of pure second graph signals and the pure second overlay values.
The specific steps included in S340 are referred to as S240.
S350, determining the corresponding relation between the standard second graphic signal and the standard second overlay value.
The specific steps included in S350 are referred to as S250. And determining the corresponding relation between the standard second pattern signal and the standard second overlay value according to the variation trend of the corresponding relation between the N pairs of the simple second pattern signal and the simple second overlay value.
S360, determining the corresponding relation between the standard first graphic signal and the standard first overlay value; the standard first pattern signal is a pattern signal generated by the current pattern layer relative to the previous pattern layer only by the first factor, and the standard first overlay value is an alignment deviation value generated by the current pattern layer relative to the previous pattern layer only by the first factor.
The corresponding relation between the standard first pattern signal and the standard first overlay value can be determined according to the corresponding relation between the existing standard pattern coincidence signal and the standard overlay accuracy and the corresponding relation between the acquired standard second pattern signal and the standard first overlay value.
In the embodiment of the application, the corresponding relation between the standard first pattern signal and the first overlay value is directly determined through the obtained corresponding relation between the standard second pattern signal and the second overlay value, so that a program for obtaining the corresponding relation between the standard first pattern signal and the first overlay value is simplified, and the test time is saved.
And S370, acquiring a graph superposition signal of the point to be measured, and distinguishing a first graph signal of the point to be measured from a second graph signal of the point to be measured.
The specific steps included in S370 refer to S260.
It is understood that, in other embodiments, the first pattern signal for distinguishing the point to be measured from the second pattern signal for distinguishing the point to be measured can also obtain the second overlay value according to the correspondence between the standard second pattern signal and the second overlay value before obtaining the correspondence between the standard first pattern signal and the first overlay value and after obtaining the correspondence between the standard second pattern signal and the second overlay value.
And S380, determining a first overlay value of the point to be measured according to the corresponding relation between the standard first graph signal and the standard first overlay value.
Wherein, also include in this step: and determining a second overlay value of the point to be measured according to the corresponding relation between the standard second graphic signal and the standard second overlay value. It can be understood that, in the embodiment of the present application, the first overlay value and the second overlay value of the point to be tested are obtained from the corresponding relationship between the standard first pattern signal and the standard first overlay value and the corresponding relationship between the standard second pattern signal and the standard second overlay value, respectively, so that the accuracy of the first overlay value and the second overlay value of the point to be tested can be improved, and the reliability of the test can be improved.
Further, referring to fig. 5, fig. 5 is a schematic flowchart illustrating a fourth embodiment of a method for measuring wafer overlay accuracy according to the present invention. The following mainly describes differences between the present embodiment and the previous embodiments, and most technical contents of the present embodiment that are the same as those of the previous embodiments are not described in detail below.
The method for measuring the wafer alignment precision comprises the following steps:
s410: and determining a first test point and a second test point, wherein the first test point and the second test point are symmetrical relative to the center of the wafer.
The specific steps included in S410 are referred to as S210. The number of the first test points and the number of the second test points are both N, and N is an integer greater than or equal to 3.
S420: and respectively acquiring the pattern coincidence signals corresponding to the N first test points and the N second test points.
The specific steps included in S420 are referred to as S220.
S430: and respectively obtaining the alignment precision corresponding to the N first test points and the N second test points.
The specific steps included in S430 are as described in S230.
S440: and determining the corresponding relation between the N pairs of pure second graph signals and the pure second overlay values.
The specific steps included in S440 are referred to as S240.
S450, determining the corresponding relation between the standard second graphic signal and the standard second overlay value.
The specific steps included in S350 are referred to as S250.
S460: and determining the corresponding relation between the N pairs of simple first pattern signals and the simple first overlay values according to the corresponding relation between the standard second pattern signals and the standard second overlay values.
Wherein determining the correspondence of the N pairs of the simple first pattern signals and the simple first overlay values comprises: dividing the pattern coincidence signals of the N first test points into N first pattern signals and N second pattern signals, and then obtaining second overlay values of the N first test points based on the corresponding relation between the standard second pattern signals obtained through testing and the standard second overlay values; and then obtaining first alignment values of the N first test points according to the alignment precision of the N first test points, so as to determine the corresponding relation between the N pairs of simple first pattern signals and the simple first alignment values according to the one-to-one correspondence between the N first alignment values of the first test points and the N first patterns.
S470: and determining the corresponding relation between the standard first pattern signal and the standard first overlay value according to the variation trend of the corresponding relation between the N pairs of the simple first pattern signal and the simple first overlay value.
It will be appreciated that the correspondence between the standard first pattern signal and the standard first overlay value is the correspondence between the first pattern signal and the first overlay value that are ultimately used. The one-to-one correspondence between the N pure first pattern signals and the N pure first overlay values is an intermediate correspondence between the first pattern signals and the first overlay values. That is, the N pairs of the simple first pattern signal and the simple first overlay value both provide data support for obtaining the final correspondence between the standard first pattern signal and the standard first overlay value.
In the embodiment of the present application, the correspondence between the standard first pattern signal and the standard first overlay value is obtained by modeling the variation trend of the correspondence between the simple first pattern signal and the simple first overlay value by N, so that the accuracy of the correspondence between the standard first pattern signal and the standard first overlay value is improved.
And S480, determining a first overlay value of the point to be measured according to the corresponding relation between the standard first graph signal and the standard first overlay value.
It can be understood that, before determining the first overlay value of the point to be measured, the method for measuring the wafer overlay accuracy further includes obtaining a graph overlay signal of the point to be measured, and dividing the graph overlay signal of the point to be measured into a first graph signal and a second graph signal. The test equipment can determine the first overlay value of the point to be tested according to the corresponding relation between the standard first pattern signal and the standard first overlay value and the obtained first pattern signal.
In the embodiment of the application, according to the variation trend of the corresponding relationship between the pure first pattern signal and the pure first overlay value, modeling is performed to obtain the corresponding relationship between the standard first pattern signal and the standard first overlay value, so that the accuracy of the corresponding relationship between the standard first pattern signal and the standard first overlay value is improved, the accuracy of obtaining the first overlay value to be measured is improved, and the reliability of the method for measuring the wafer overlay accuracy is improved.
Further, referring to fig. 6, fig. 6 is a schematic flowchart illustrating a fifth embodiment of a method for measuring wafer overlay accuracy according to the present invention. The following mainly describes differences between the present embodiment and the previous embodiments, and most technical contents of the present embodiment that are the same as those of the previous embodiments are not described in detail below.
The method for measuring the wafer alignment precision further comprises the following steps:
s510: and determining a first test point and a second test point, wherein the first test point and the second test point are symmetrical relative to the center of the wafer.
The specific steps included in S510 refer to S110.
S520: and respectively acquiring the pattern coincidence signals corresponding to the first test point and the second test point.
The specific steps included in S520 are as described in S120.
S530: and respectively obtaining the alignment precision corresponding to the first test point and the second test point.
The specific steps included in S530 are referred to as S130.
S540: and determining the corresponding relation between the pure second pattern signal and the pure second overlay value.
The specific steps included in S540 are referred to as S140.
And S550, determining an Mth pair of test points, wherein M is an integer larger than 2, and the pair of test points comprises two test points which are symmetrical relative to the center of the wafer.
It will be appreciated that a first test point and a second test point are a pair of test points. And after acquiring the corresponding relation between one simple second pattern signal and one simple second overlay value, continuously acquiring the corresponding relation between the next simple second pattern signal and the simple second overlay value.
Before the M-th pair of test points is determined, the method for measuring the wafer alignment precision further comprises the step of determining the M-n-th pair of test points and the corresponding relation between the pure second pattern signals corresponding to the M-n-th pair of test points and the pure second alignment values. Wherein n is an integer greater than or equal to 1.
S560, determining the corresponding relation between the Mth pair of simple second pattern signals and the simple second overlay value.
The specific steps included in S560 are referred to as S140.
It can be understood that the method for measuring the wafer overlay accuracy already obtains the corresponding relationship between the M-1 pair of the simple second pattern signal and the simple second overlay value before determining the corresponding relationship between the M pair of the simple second pattern signal and the simple second overlay value. That is, after determining the corresponding relationship between the M-th pair of simple second pattern signals and the simple second overlay value, the method for measuring the wafer overlay accuracy obtains the corresponding relationship between the M-th pair of simple second pattern signals and the simple second overlay value.
S570, determining the corresponding relation between the standard second pattern signal and the standard second overlay value according to the variation trend of the corresponding relation between the M pairs of the simple second pattern signal and the simple second overlay value.
The specific steps included in S570 are referred to as S250.
It will be appreciated that the standard second pattern signal corresponds to the standard second overlay value by the end use second pattern signal corresponding to the second overlay value. The one-to-one correspondence between the M pure second pattern signals and the M pure second overlay values is an intermediate correspondence between the second pattern signals and the second overlay values. That is, the M pairs of the simple second pattern signal and the simple second overlay value both provide data support for obtaining the final corresponding relationship between the standard second pattern signal and the standard second overlay value. The correspondence of M pairs of pure second pattern signals and pure second overlay values is measured separately and not acquired simultaneously.
In the embodiment of the application, M pairs of test points are respectively determined, and the corresponding relationship between M pairs of simple second pattern signals and the second overlay value is respectively obtained, so that the situation that the test equipment confuses the corresponding relationship between the obtained pattern coincidence signals of the M measurement points and the overlay accuracy of the M measurement points is avoided, the accuracy of the corresponding relationship between the standard second pattern signal and the standard second overlay value is improved, and the reliability of the method for measuring the wafer overlay accuracy is improved.
It can be understood that, after determining the corresponding relationship between the standard second graphic signal and the standard second overlay value, obtaining the first overlay value of the point to be measured and the second overlay value of the point to be measured can refer to the foregoing embodiments, and details are not described herein again.
The application also provides equipment for measuring the alignment precision of the wafer. The equipment for measuring the wafer alignment precision comprises a memory and a processor. The memory stores a computer readable program. The method of measuring the wafer overlay accuracy as described above is performed when the computer readable program is read by a processor.
The present application also provides a computer-readable storage medium. The computer readable storage medium includes a computer program. The method of measuring the wafer overlay accuracy as described above can be performed when the computer program is run.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium and can be executed by hardware related to the instructions of the computer program. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the methods and their core ideas of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (12)
1. A method for measuring wafer overlay accuracy, wherein the wafer comprises a front layer pattern layer and a current pattern layer stacked on the front layer pattern layer, and the current pattern layer and the front layer pattern layer are respectively provided with a plurality of channel holes in one-to-one correspondence, the method comprises the following steps:
determining a first test point and a second test point for measuring the alignment precision of the wafer, wherein the first test point and the second test point are symmetrical relative to the center of the wafer;
respectively acquiring pattern coincidence signals corresponding to the first test point and the second test point; each pattern coincidence signal comprises a first pattern signal and a second pattern signal, the first pattern signal is different from the second pattern signal, and the first pattern signal of the first test point is opposite to the first pattern signal of the second test point;
obtaining the alignment precision of the first test point according to the pattern coincidence signal of the first test point, and obtaining the alignment precision of the second test point according to the pattern coincidence signal of the second test point; each alignment precision comprises a first alignment value and a second alignment value, the first alignment value corresponds to the first pattern signal one by one, the second alignment value corresponds to the second pattern signal one by one, and the first alignment value of the first test point is opposite to the first alignment value of the second test point;
comparing the pattern coincidence signal of the first test point with the pattern coincidence signal of the second test point, and offsetting the first pattern signal of the first test point and the first pattern signal of the second test point to obtain a pure second pattern signal;
comparing the alignment precision of the first test point with the alignment precision of the second test point, and offsetting the first alignment value of the first test point and the first alignment value of the second test point to obtain a pure second alignment value;
determining a corresponding relationship between the pure second pattern signal and the pure second overlay value; according to the second pattern signal of the first test point and the corresponding relation between the simple second pattern signal and the simple second alignment value, the second alignment value of the first test point can be obtained;
the first graphic signal is a graphic signal generated by a first factor of the current pattern layer relative to the previous pattern layer, and the second graphic signal is a graphic signal generated by a second factor of the current pattern layer relative to the previous pattern layer, wherein the second factor is different from the first factor.
2. The method as claimed in claim 1, wherein the first factor is an etching process for forming each trench hole penetrating the current pattern layer, and the second factor is a mask process for forming each trench hole pattern in the current pattern layer.
3. The method for measuring wafer alignment precision of claim 1, wherein the number of the first test points and the second test points is N, N is an integer greater than or equal to 3, and the method for measuring wafer alignment precision comprises:
determining the corresponding relation between the N pairs of pure second graph signals and the pure second overlay values;
and determining the corresponding relation between the standard second pattern signal and the standard second overlay value according to the variation trend of the corresponding relation between the N pairs of simple second pattern signals and the simple second overlay values.
4. The method of claim 3, wherein after determining the correspondence between the standard second pattern signal and the standard second overlay value, the method further comprises:
acquiring a graph superposition signal of a point to be measured, and distinguishing a first graph signal of the point to be measured from a second graph signal of the point to be measured;
and determining a second alignment value of the point to be measured according to the corresponding relation between the standard second graphic signal and the standard second alignment value.
5. The method of claim 3, wherein after determining the standard second pattern signal to standard second overlay value correspondence, the method further comprises:
determining a corresponding relation between the standard first graphic signal and the standard first overlay value; the standard first pattern signal is a pattern signal generated by the current pattern layer relative to the previous pattern layer only by a first factor, and the standard first overlay value is an alignment deviation value generated by the current pattern layer relative to the previous pattern layer only by the first factor.
6. The method of claim 5, wherein after determining the correspondence between the standard first pattern signal and the standard first overlay value, the method further comprises:
acquiring a graph superposition signal of a point to be measured, and distinguishing a first graph signal of the point to be measured from a second graph signal of the point to be measured;
and determining the first alignment value of the point to be measured according to the corresponding relation between the standard first graphic signal and the standard first alignment value.
7. The method of claim 3, wherein after determining the correspondence between the standard second pattern signal and the standard second overlay value, the method further comprises:
determining the corresponding relation between the N pairs of simple first graph signals and the simple first overlay values according to the corresponding relation between the standard second graph signals and the standard second overlay values;
and determining the corresponding relation between the standard first pattern signal and the standard first overlay value according to the variation trend of the corresponding relation between the N pairs of the simple first pattern signals and the simple first overlay value.
8. The method as claimed in claim 1, wherein after determining the correspondence between the simple second pattern signal and the simple second overlay value, the method further comprises:
determining an Mth pair of test points, wherein M is an integer larger than 2, and the pair of test points comprises two test points which are symmetrical relative to the center of the wafer;
determining the corresponding relation between the simple second pattern signal of the Mth pair of test points and the simple second overlay value;
and determining the corresponding relation between the standard second pattern signal and the standard second overlay value according to the variation trend of the corresponding relation between the M pairs of the simple second pattern signal and the simple second overlay value.
9. The method for measuring wafer alignment accuracy as claimed in any of claims 1-8, wherein the first alignment value is an alignment error of the current pattern layer with respect to the previous pattern layer along a vertical direction, and the second alignment value is an alignment error of the current pattern layer with respect to the previous pattern layer along a horizontal direction.
10. The method for measuring wafer alignment accuracy of any one of claims 1-8, wherein before determining the first test point and the second test point for measuring the wafer alignment accuracy, the method for measuring wafer alignment accuracy further comprises:
and determining the position of the center of the wafer.
11. An apparatus for measuring wafer overlay accuracy, the apparatus comprising a memory and a processor, the memory storing a computer readable program, the computer readable program when read by the processor performing the method of any of claims 1-10.
12. A computer-readable storage medium, characterized in that the computer-readable storage medium comprises a computer program which, when run, is capable of performing the method according to any one of claims 1-10.
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