CN111262534B - Self-adaptive bias circuit for power amplifier chip - Google Patents
Self-adaptive bias circuit for power amplifier chip Download PDFInfo
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- CN111262534B CN111262534B CN202010193953.XA CN202010193953A CN111262534B CN 111262534 B CN111262534 B CN 111262534B CN 202010193953 A CN202010193953 A CN 202010193953A CN 111262534 B CN111262534 B CN 111262534B
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- 230000003044 adaptive effect Effects 0.000 claims abstract description 14
- 230000003068 static effect Effects 0.000 claims abstract description 12
- 239000003990 capacitor Substances 0.000 claims description 34
- 230000010354 integration Effects 0.000 abstract description 4
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 5
- 238000004891 communication Methods 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000010295 mobile communication Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
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Abstract
The invention discloses an adaptive bias circuit for a power amplifier chip, which comprises a bias circuit, a feedback circuit and an amplifying circuit, wherein the bias circuit provides dynamic bias voltage and provides bias voltage with a first static bias voltage Vg1 for a transistor M2 in the amplifying circuit; as the power of the input radio frequency signal increases, the larger the dynamic bias voltage provided for the transistor M2 is, the self-adaptive linear compensation of the transistor M2 is realized; the feedback circuit is used for adjusting the radio frequency performance of the amplifier; the radio frequency signal is transmitted to the bias circuit through the feedback circuit, and the bias circuit converts the radio frequency signal into a direct current signal, namely a dynamic bias voltage generated by the bias circuit. The invention has simple structure, small size, self-adaptive bias function, no need of artificial change of bias voltage of the amplifier, and improves the linearity of the power amplifier, efficiency and single-chip integration level and practicability.
Description
Technical Field
The invention relates to the technical fields of microelectronics, semiconductors and communications, in particular to an adaptive bias circuit for a power amplifier chip.
Background
The radio frequency power amplifier is an important component of the mobile communication system, and is used as a final amplifying unit of the transmitting channel, and the radio frequency power amplifier is used for amplifying low-power radio frequency signals and transmitting the low-power radio frequency signals through the antenna. Design criteria for a radio frequency power amplifier typically include output power, efficiency, gain, bandwidth, linearity, and the like. The nonlinearity of the rf power amplifier tends to generate unwanted frequency components, which severely affects the performance of the mobile communication system.
The conventional power amplifier may employ a Complementary Metal Oxide Semiconductor (CMOS), a gallium arsenide heterojunction bipolar transistor (GaAs HBT), a gallium arsenide pseudomorphic high electron mobility transistor (GAAS PHEMT), etc. as the power amplifying element. The radio frequency power amplifier realized by adopting the CMOS device has the defects of low linearity and low withstand voltage although the compatibility is good and the cost is low; the radio frequency power amplifier realized by adopting the GaAs HBT device has the self-heating effect although the power capacity is large; the radio frequency power amplifier realized by GAAS PHEMT devices generally uses load traction to find the maximum output power point to perform output end matching. However, since the power amplifier is often operated in a non-maximum output power state, in order to increase the average efficiency of the power amplifier, the power amplifier is required to have high efficiency in a wide operating range. Design considerations, therefore, generally trade off between efficiency and linearity, resulting in less than optimal amplifier linearity.
With the advent of the 5G age, higher demands are being placed on performance indicators of communication systems. The linearity of a power amplifier, which is an important component in a communication system, is very important in the system. The microwave power transistor made of gallium arsenide (GaAs) material has the advantages of high efficiency, low noise power, strong radiation resistance and the like, wherein the gallium arsenide pseudomorphic high electron mobility transistor (GAAS PHEMT) is more suitable for high-frequency high-power application. Therefore, the research on the method capable of improving the linearity of the GAAS PHEMT process power amplifier chip has great application value and practical significance.
Disclosure of Invention
It is an object of the present invention to address at least the above problems and/or disadvantages and to provide at least the advantages described below.
The self-adaptive bias circuit for the power amplifier chip has the characteristics of simple structure, small size, single-chip integration level improvement, balance of the power amplifier in two aspects of efficiency and linearity, practicability of the power amplifier chip improvement and the like.
To achieve these objects and other advantages and in accordance with the purpose of the invention, an adaptive bias circuit for a power amplifier chip is provided, including a bias circuit, a feedback circuit, and an amplifying circuit.
The bias circuit provides a dynamic bias voltage and a first static bias voltage Vg1 to provide a bias voltage for a transistor M2 in the amplifying circuit; as the power of the input radio frequency signal increases, the larger the dynamic bias voltage provided to the transistor M2, the adaptive linear compensation of the transistor M2 is realized.
The feedback circuit is used for adjusting the radio frequency performance of the amplifier.
The radio frequency signal is transmitted to the bias circuit through the feedback circuit, and the bias circuit converts the radio frequency signal into a direct current signal, namely a dynamic bias voltage generated by the bias circuit.
Further, the bias circuit comprises two resistors R1 and R2, a transistor M1 and a capacitor C1, wherein the resistor R1 and the capacitor C1 are connected in parallel, the first end is grounded, the second end is connected with the grid electrode of the transistor M1, and the source electrode and the drain electrode of the transistor M1 are in short circuit and are connected with the first end of the resistor R2;
Further, the feedback circuit comprises two resistors R3 and R4 and a capacitor C2, wherein the first ends of the resistors R3 and R4 are connected with the second end of the resistor R2, the second end of the resistor R3 is connected with the first end of the capacitor C4 and the gate of the transistor M2, and the second end of the resistor R4 is connected with the first end of the capacitor C2;
Further, the amplifying circuit comprises two transistors M2 and M3, wherein the source electrode of the transistor M2 is grounded, the gate electrode is connected with the first end of the capacitor C4, the drain electrode is connected with the source electrode of the transistor M3, the gate electrode of the transistor M3 is connected with the first end of the capacitor C3, the drain electrode is connected with the second end of the capacitor C2, the first end of the capacitor C5 and the first end of the choke inductor L1, and the second end of the capacitor C3 is grounded;
Further, the first static bias voltage Vg1 is connected to the second end of the resistor R2, the first end of the resistor R3, and the first end of the resistor R4;
further, the power supply terminal is connected with the second terminal of the choke inductance L1;
further, it preferably includes a second static bias voltage Vg2, which is coupled to the first terminal of the capacitor C3, the gate of the transistor M3.
The invention has the beneficial effects that: the self-adaptive bias circuit has the advantages of simple structure, small size, self-adaptive bias function, no need of artificially changing the bias voltage of the amplifier, efficiency improvement and single-chip integration level and practicability improvement.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of an adaptive bias circuit for a power amplifier chip according to the present invention.
Fig. 2 is a graph comparing the simulation results of the output P1dB of the conventional bias circuit with the frequency variation.
Detailed Description
The present invention is described in further detail below with reference to the drawings to enable those skilled in the art to practice the invention by referring to the description.
It will be understood that terms, such as "having," "including," and "comprising," as used herein, do not preclude the presence or addition of one or more other elements or groups thereof.
In one embodiment, as shown in fig. 1, an adaptive bias circuit 1 for a power amplifier chip includes a bias circuit 1, a feedback circuit 2, and an amplifying circuit 3.
The bias circuit 1 generates a dynamic bias voltage and supplies a bias voltage to the transistor M2 in the amplifying circuit 3 together with a first static bias voltage Vg 1.
The feedback circuit 2 optimizes the dynamic bias voltage and the first static bias voltage Vg1 generated by the bias circuit 1 to meet the use requirement.
Specifically, the bias circuit 1 includes two resistors R1 and R2, a transistor M1, and a capacitor C1, where the resistor R1 and the capacitor C1 are connected in parallel, a first end is grounded, a second end is connected to a gate of the transistor M1, and a source and a drain of the transistor M1 are shorted and connected to the first end of the resistor R2.
Specifically, the feedback circuit 2 includes two resistors R3 and R4 and a capacitor C2, wherein first ends of the resistors R3 and R4 are connected to a second end of the resistor R2, a second end of the resistor R3 is connected to a first end of the capacitor C4 and a gate of the transistor M2, and a second end of the resistor R4 is connected to a first end of the capacitor C2.
Specifically, the amplifying circuit 3 includes two transistors M2 and M3, the source of the transistor M2 is grounded, the gate is connected to the first end of the capacitor C4, the drain is connected to the source of the transistor M3, the gate of the transistor M3 is connected to the first end of the capacitor C3, the drain is connected to the second end of the capacitor C2, the first end of the capacitor C5, and the first end of the choke inductor L1, and the second end of the capacitor C3 is grounded.
Specifically, the first static bias voltage Vg1 is connected to the second end of the resistor R2, the first end of the resistor R3, and the first end of the resistor R4.
Specifically, the choke inductor further comprises a power supply end, and the power supply end is connected with the second end of the choke inductor L1.
Specifically, the second static bias voltage Vg2 is further included, and the second bias voltage is connected to the first terminal of the capacitor C3 and the gate of the transistor M3.
In this embodiment, an adaptive bias circuit 1 for a power amplifier chip according to the present invention will be further described:
The invention provides a dynamic bias voltage for the grid electrode of a common source transistor M2 through an adaptive bias circuit 1. The gate bias voltage of the common-source transistor is mainly composed of superposition of two parts: firstly, static bias voltage Vg1; and secondly, a dynamic bias voltage generated by the self-adaptive bias. The source and drain of the transistor M1 in the self-adaptive bias circuit 1 are in short circuit and are used as diodes, a part of radio frequency signal energy is converted into a direct current signal due to the rectification characteristic of the diodes, a voltage signal is superimposed on the grid electrode of the transistor M2 through the feedback circuit 2, and as the power of the input radio frequency signal is increased, the voltage swing of the output radio frequency signal is also increased, and the feedback voltage swing through the feedback circuit 2 is also increased. If the power of the input radio frequency signal is larger, the feedback voltage of the feedback circuit 2 is larger, the dynamic voltage generated by the adaptive bias circuit 1 is also larger, and the superimposed voltage provided to the grid electrode of the common source transistor M2 is also larger, the adaptive linear compensation of the transistor M2 is realized, and the output power of the 1dB compression point of the power amplifier is improved.
In this design, a portion of the rf signal leaks, which will be shorted to ground from the capacitor C1. The linearization adaptive bias circuit 1 follows the input power variation while improving the efficiency at low output power and linearity at high output power. Compared with the traditional power amplifier, the self-adaptive bias circuit 1 has the advantages of simple structure, small size, self-adaptive bias function, no need of artificial change of the bias voltage of the amplifier, efficiency improvement and single-chip integration level and practicability improvement.
As shown in fig. 2, the output P1dB of the conventional power amplifier is compared with the simulation result of the output P1dB of the power amplifier of the configuration linearization bias circuit 1 according to the present invention, and the simulation result shows that the linearity of the power amplifier of the configuration linearization bias circuit 1 according to the present invention is significantly improved.
Although embodiments of the invention have been disclosed above, they are not limited to the use listed in the specification and embodiments. It can be applied to various fields suitable for the present invention. As will be appreciated by those skilled in the art, the adaptive bias circuit described in the examples may be modified to be a diode replacement, as may vary in specific embodiments and application areas, in accordance with examples of the present invention; in the self-adaptive bias circuit, the source electrode and the drain electrode of the transistor M1 are short-circuited, and the mode of connecting a plurality of transistors in series or connecting a plurality of transistors in parallel can be changed; any application of the present invention is considered as extended as long as the adaptive bias circuit composed of diodes is used for the gate of the common source transistor M2 described in the embodiment. Therefore, the invention is not to be limited to the specific details and illustrations shown and described herein, without departing from the general concepts defined in the claims and their equivalents.
Claims (1)
1. An adaptive bias circuit for a power amplifier chip comprises a bias circuit, a feedback circuit and an amplifying circuit, and is characterized in that the bias circuit provides a dynamic bias voltage and provides a bias voltage with a first static bias voltage Vg1 for a transistor M2 in the amplifying circuit; as the power of the input radio frequency signal increases, the larger the dynamic bias voltage provided for the transistor M2 is, the self-adaptive linear compensation of the transistor M2 is realized;
the feedback circuit is used for adjusting the radio frequency performance of the amplifier;
The radio frequency signal is transmitted to the bias circuit through the feedback circuit, and the bias circuit converts the radio frequency signal into a direct current signal, namely a dynamic bias voltage generated by the bias circuit;
The bias circuit comprises two resistors R1 and R2, a transistor M1 and a capacitor C1, wherein the resistor R1 and the capacitor C1 are connected in parallel, a first end is grounded, a second end is connected with a grid electrode of the transistor M1, and a source electrode and a drain electrode of the transistor M1 are short-circuited and connected with a first end of the resistor R2;
the feedback circuit comprises two resistors R3 and R4 and a capacitor C2, wherein the first ends of the resistors R3 and R4 are connected with the second end of the resistor R2, the second end of the resistor R3 is connected with the first end of the capacitor C4 and the grid electrode of the transistor M2, and the second end of the resistor R4 is connected with the first end of the capacitor C2;
The amplifying circuit comprises two transistors M2 and M3, wherein the source electrode of the transistor M2 is grounded, the grid electrode is connected with the first end of a capacitor C4, the drain electrode is connected with the source electrode of the transistor M3, the grid electrode of the transistor M3 is connected with the first end of the capacitor C3, the drain electrode is connected with the second end of the capacitor C2, the first end of a capacitor C5 and the first end of a choke inductor L1, and the second end of the capacitor C3 is grounded;
the first static bias voltage Vg1 is connected with the second end of the resistor R2, the first end of the resistor R3 and the first end of the resistor R4;
the power supply end is connected with the second end of the choke inductor L1;
And the second static bias voltage Vg2 is also included, and the second bias voltage is connected with the first end of the capacitor C3 and the gate of the transistor M3.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010193953.XA CN111262534B (en) | 2020-03-19 | 2020-03-19 | Self-adaptive bias circuit for power amplifier chip |
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| CN202010193953.XA CN111262534B (en) | 2020-03-19 | 2020-03-19 | Self-adaptive bias circuit for power amplifier chip |
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| CN111262534B true CN111262534B (en) | 2024-09-27 |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111313844A (en) * | 2020-03-19 | 2020-06-19 | 西安博瑞集信电子科技有限公司 | Self-adaptive bias circuit applied to low-noise amplifier chip |
| CN112953411A (en) * | 2021-03-10 | 2021-06-11 | 西安博瑞集信电子科技有限公司 | Ultra-wideband power amplifier |
| CN115580233B (en) * | 2022-12-08 | 2023-06-16 | 西安博瑞集信电子科技有限公司 | Dynamic bias method and system for low-noise amplifier and dynamic bias circuit |
| CN119010807A (en) * | 2024-10-23 | 2024-11-22 | 浙江广芯微电子有限公司 | Adaptive voltage regulation method for MOSFET |
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| CN103023440A (en) * | 2012-12-20 | 2013-04-03 | 中国科学院微电子研究所 | Circuit for improving linearity of power amplifier |
| CN211791445U (en) * | 2020-03-19 | 2020-10-27 | 西安博瑞集信电子科技有限公司 | Self-adaptive bias circuit for power amplifier chip |
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| US6300837B1 (en) * | 2000-03-28 | 2001-10-09 | Philips Electronics North America Corporation | Dynamic bias boosting circuit for a power amplifier |
| US7893771B2 (en) * | 2007-01-05 | 2011-02-22 | City University Of Hong Kong | Wideband linearization and adaptive power management for microwave power amplifiers |
| CN101719776B (en) * | 2009-12-09 | 2012-09-19 | 中国科学院半导体研究所 | A radio frequency transceiver |
| TWI501543B (en) * | 2012-12-19 | 2015-09-21 | Advanced Semiconductor Eng | Electronic system, radio frequency power amplifier and method for self-adjusting bias point |
| CN103166581A (en) * | 2013-01-25 | 2013-06-19 | 嘉兴联星微电子有限公司 | Radio frequency low noise amplifier with high linearity |
| US20140266448A1 (en) * | 2013-03-14 | 2014-09-18 | Qualcomm Incorporated | Adapative power amplifier |
| CN105811899B (en) * | 2016-04-18 | 2019-03-19 | 宜确半导体（苏州）有限公司 | A kind of power amplifier output-stage module and RF front-end module |
| CN106571780B (en) * | 2016-11-17 | 2019-11-15 | 锐迪科微电子（上海）有限公司 | A kind of adaptive-biased radio-frequency power amplifier |
| CN109167574A (en) * | 2018-09-11 | 2019-01-08 | 西安交通大学 | Stack power amplifier and its dynamic bias network |
| CN109560777B (en) * | 2019-01-30 | 2024-06-14 | 周守佳 | Active bias Casode radio frequency amplifier |
| CN110086441A (en) * | 2019-04-29 | 2019-08-02 | 中国科学院微电子研究所 | Power amplifier |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103023440A (en) * | 2012-12-20 | 2013-04-03 | 中国科学院微电子研究所 | Circuit for improving linearity of power amplifier |
| CN211791445U (en) * | 2020-03-19 | 2020-10-27 | 西安博瑞集信电子科技有限公司 | Self-adaptive bias circuit for power amplifier chip |
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