CN111211855A - Mixed clock synchronization method for distributed processing system - Google Patents
Mixed clock synchronization method for distributed processing system Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
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Abstract
The invention relates to a mixed clock synchronization method of a distributed processing system, which is mainly technically characterized by comprising the following steps: the method comprises the steps of master node time synchronization and slave node time synchronization. The method for time synchronization of the master node comprises the following steps: the main node realizes the synchronization with the GPS time by utilizing the 1PPS synchronization function of the atomic clock CSA.45s and is used as the time reference of the whole system. The method for synchronizing the time of the slave node comprises the following steps: the function of generating the synchronization pulse and the self-receiving function of the CAN controller SJA1000 in the master node are utilized, and the synchronization pulse is used as a hardware interrupt signal by all CAN nodes. The invention can realize accurate time synchronization for the distributed system through the time synchronization of the master node and the slave node.
Description
Technical Field
The invention belongs to the field of distributed processing systems, and particularly relates to a hybrid clock synchronization method of a distributed processing system.
Background
With the continuous deepening of distributed applications, distributed processing systems which complete specific functions are developed in many fields according to needs. How to construct a clock system to provide effective time service for different distributed network systems becomes an important issue. And ensuring the correctness and consistency of the information system time is the basis for constructing a clock system. Clock synchronization mainly solves the following two problems:
1. all nodes in the system have the same time, namely the nodes in the system communicate with each other by a certain strategy, and finally the consistency of the whole system on the time is achieved;
2. the system time is accurate. According to the time deviation and cost consideration allowed by the application field, different references are selected as time sources, and therefore the requirement of time precision is met.
According to the implementation mechanism of clock synchronization, the specific clock synchronization implementation methods are divided into hardware clock synchronization, software clock synchronization and hybrid clock synchronization.
The hardware clock is synchronized. The hardware clock synchronization refers to synchronization between local clocks by using a certain hardware facility, such as a GPS receiver, a UTC receiver, a dedicated clock signal line, and the like, and an operation target is often a hardware clock of a computer. The hardware synchronization can obtain high synchronization precision, but a special hardware synchronization device needs to be introduced, so that the clock synchronization is relatively high in cost and inconvenient to operate. The hardware synchronization method is suitable for small-scale systems, and is unrealistic to completely adopt the hardware synchronization method in a large-scale distributed system.
The software clocks are synchronized. Software clock synchronization is the synchronization between the local clocks of the nodes using a clock synchronization algorithm. The software clock synchronization workload is large, and synchronization deviation between nodes is easy to accumulate. The operation object of software synchronization is usually the logic clock of each node, and generally the hardware clock of the node does not need to be operated, so the software synchronization is more flexible, and the cost is lower than that of hardware synchronization.
The hybrid clocks are synchronized. Hybrid clock synchronization combines the advantages of hardware clock synchronization and software clock synchronization. The synchronization accuracy of the hybrid synchronization scheme is generally lower than that of a hardware clock, but higher than that of a software clock, and the implementation cost is acceptable.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a hybrid clock synchronization method of a distributed processing system.
The technical problem to be solved by the invention is realized by adopting the following technical scheme:
a distributed processing system mixed clock synchronization method comprises main node time synchronization and slave node time synchronization;
the method for time synchronization of the master node comprises the following steps: the main node realizes time synchronization with the GPS by utilizing the 1PPS synchronization function of an atomic clock CSA.45s and is used as a time reference of the whole system;
the method for synchronizing the time of the slave node comprises the following steps: the function of generating the synchronization pulse and the self-receiving function of the CAN controller SJA1000 in the master node are utilized, and the synchronization pulse is used as a hardware interrupt signal by all CAN nodes.
Moreover, the specific steps of the slave node time synchronization are as follows: the master node CAN controller SJA1000 sends a self-receiving data frame, and the master node records the local time t at the rising edge time of the synchronous pulseMThe slave node clears the local counter; master node CAN controller SJA1000 transmission including time tMEach slave node resets the counter value in the local processor to t at the time of the rising edge of the synchronization pulseSWherein t isS=tMAnd + delta t and delta t are local counter values of each child node at the arrival moment of the second synchronization pulse.
The invention has the advantages and positive effects that:
1. the method for synchronizing the mixed clocks of the distributed processing system realizes the mixed clock synchronization of the distributed processing system through the time synchronization of the master node and the time synchronization of the slave nodes, and the key synchronization steps are realized based on hardware functions, thereby reducing the uncertainty of the software execution time to the maximum extent.
Drawings
FIG. 1 is a schematic diagram of a distributed system of the present invention;
fig. 2 is a slave node time synchronization timing diagram of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
A hybrid clock synchronization method for a distributed processing system includes master node time synchronization and slave node time synchronization, and is illustrated in fig. 1 as a schematic diagram of the distributed system. The structure includes: atomic clock, master node, CAN bus controller SJA1000, slave node 1, slave node 2 … … slave node n. The master node is connected with an atomic clock, and the CAN bus controller SJA1000 is connected with the master node, a slave node 1 and a slave node 2 … …, namely a slave node n.
The method for time synchronization of the master node comprises the following steps: the main node realizes the time synchronization with the GPS by utilizing the 1PPS synchronization function of the atomic clock CSA.45s and is used as the time reference of the whole system.
The method for synchronizing the time of the slave node comprises the following steps: the function of generating the synchronization pulse and the self-receiving function of the CAN controller SJA1000 in the master node are utilized, and the synchronization pulse is used as a hardware interrupt signal by all CAN nodes.
Fig. 2 is a time synchronization timing diagram of a slave node, which includes the following steps: the master node CAN controller SJA1000 sends a self-receiving data frame, and the master node records the local time t at the rising edge time of the synchronous pulseMThe slave node clears the local counter; master node CAN controller SJA1000 transmission including time tMEach slave node resets the counter value in the local processor to t at the time of the rising edge of the synchronization pulseSWherein t isS=tMAnd + delta t and delta t are local counter values of each child node at the arrival moment of the second synchronization pulse. Because the main node keeps synchronous with the GPS time, each node of the whole system also realizes the synchronization with the GPS time.
It should be emphasized that the embodiments described herein are illustrative rather than restrictive, and thus the present invention is not limited to the embodiments described in the detailed description, but other embodiments derived from the technical solutions of the present invention by those skilled in the art are also within the scope of the present invention.
Claims (2)
1. A method for synchronizing a hybrid clock of a distributed processing system, comprising: the method comprises the steps of dividing into master node time synchronization and slave node time synchronization;
the method for time synchronization of the master node comprises the following steps: the main node realizes time synchronization with the GPS by utilizing the 1PPS synchronization function of an atomic clock CSA.45s and is used as a time reference of the whole system;
the method for synchronizing the time of the slave node comprises the following steps: the function of generating the synchronization pulse and the self-receiving function of the CAN controller SJA1000 in the master node are utilized, and the synchronization pulse is used as a hardware interrupt signal by all CAN nodes.
2. The method of claim 1, wherein the method comprises: the specific steps of the slave node time synchronization are as follows: the master node CAN controller SJA1000 sends a self-receiving data frame, and the master node records the local time t at the rising edge time of the synchronous pulseMThe slave node clears the local counter; master node CAN controller SJA1000 transmission including time tMEach slave node resets the counter value in the local processor to t at the time of the rising edge of the synchronization pulseSWherein t isS=tMAnd + delta t and delta t are local counter values of each child node at the arrival moment of the second synchronization pulse.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN114115444A (en) * | 2021-11-30 | 2022-03-01 | 上海有个机器人有限公司 | Robot Alignment Timeline Method and Related Products |
WO2022134638A1 (en) * | 2020-12-22 | 2022-06-30 | 北京金山云网络技术有限公司 | Logic clock synchronization method and apparatus, and central time service cluster |
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CN104320237A (en) * | 2014-10-10 | 2015-01-28 | 宁波三星电气股份有限公司 | Second pulse coding timing method |
WO2016045340A1 (en) * | 2014-09-23 | 2016-03-31 | 深圳市中兴微电子技术有限公司 | Clock synchronization method, optical network unit and storage medium |
CN105680975A (en) * | 2016-03-07 | 2016-06-15 | 浙江大学 | Time synchronization method of master-slave structure multi-node network |
CN107896134A (en) * | 2017-11-15 | 2018-04-10 | 中国电子科技集团公司第三十二研究所 | High-precision modularized time synchronization equipment |
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CN101013335A (en) * | 2007-02-15 | 2007-08-08 | 杭州华为三康技术有限公司 | Method and apparatus for synchronizing clock of distributed processing system |
CN103048643A (en) * | 2011-10-14 | 2013-04-17 | 中国科学院电子学研究所 | Radar absolute time holding method of satellite-borne SAR (synthetic aperture radar) |
WO2016045340A1 (en) * | 2014-09-23 | 2016-03-31 | 深圳市中兴微电子技术有限公司 | Clock synchronization method, optical network unit and storage medium |
CN104320237A (en) * | 2014-10-10 | 2015-01-28 | 宁波三星电气股份有限公司 | Second pulse coding timing method |
CN105680975A (en) * | 2016-03-07 | 2016-06-15 | 浙江大学 | Time synchronization method of master-slave structure multi-node network |
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WO2022134638A1 (en) * | 2020-12-22 | 2022-06-30 | 北京金山云网络技术有限公司 | Logic clock synchronization method and apparatus, and central time service cluster |
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