CN111208478B - Bipolar point accumulator for accumulating navigation radar echo and echo accumulating method - Google Patents
Bipolar point accumulator for accumulating navigation radar echo and echo accumulating method Download PDFInfo
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- CN111208478B CN111208478B CN202010025406.0A CN202010025406A CN111208478B CN 111208478 B CN111208478 B CN 111208478B CN 202010025406 A CN202010025406 A CN 202010025406A CN 111208478 B CN111208478 B CN 111208478B
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- G01—MEASURING; TESTING
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- G01S7/292—Extracting wanted echo-signals
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Abstract
The invention relates to a bipolar point accumulator for accumulating echo of a navigation radar and an echo accumulation method, wherein the bipolar point accumulator comprises: the filter coefficient decoder is used for decoding K1 and K2 according to the current accumulated points; a first multiplier for multiplying K1 by an output distance line of a previous cycle; a second multiplier for multiplying K2 by an output distance line of a previous cycle; an adder for summing the input distance line of the current period, the outputs of the first and second multipliers; a lower clipping unit for clipping the output lower limit of the adder to zero; the first delay unit is used for delaying the output distance of the current radar transmitting period by one period and outputting the delayed output distance to the first multiplier; and the second delay unit is used for delaying the output of the first delay unit by one period and outputting the delayed output to the second multiplier. The lower amplitude limiting link is arranged in the feedback loop, so that the tail oscillation characteristic of unit impulse response is removed, and the influence of the azimuth side lobe of a large signal on a small signal is reduced.
Description
Technical Field
The invention relates to a radar, in particular to a bipolar point accumulator for accumulating navigation radar echoes, and further relates to a navigation radar echo accumulating method.
Background
The navigation radar can receive tens to tens of echo pulses when the antenna sweeps a point target, and is located on almost the same range gate (the range gate represents the arrival time of the echo signal). In order to improve the detection signal-to-noise ratio, echo accumulation is typically done before detection. Since the navigation radar is a non-coherent radar, the echo accumulation is the amplitude accumulation. The software processing or hardware logic processing can realize amplitude accumulation, but the time consumption of the software processing is larger, and the processing algorithm required by the accumulation is single, so that the adjustment parameters are few, and an FPGA (Field Programmable Gate Array ) logic hardware processing method is often adopted, and the accumulated signals enter a DSP (Digital Signal Processing ) system.
The echo accumulation algorithm generally has a weighted sliding window method and a bipolar point accumulator method. The weighted sliding window method belongs to a non-recursive filter type, N delay lines and N multipliers are needed for N point accumulation, the hardware cost is high, and the storage capacity needed by the delay lines can not be realized even when N is high. Therefore, a bipolar accumulator is commonly used in radar engineering.
One major problem with the exemplary bipolar dot accumulator is: the large pulse signal generates a side lobe in the echo sequence number direction (azimuth direction), which is small relative to its own main lobe, but may affect detection of a small target main lobe.
Disclosure of Invention
Based on this, it is necessary to provide a bipolar point integrator for navigator radar echo integration and an echo integration method capable of eliminating the influence of the azimuth side lobe of a large signal on a small signal.
A bipolar dot accumulator for navigator radar echo accumulation, the lower clipping link of the bipolar dot accumulator being provided in a feedback loop.
In one embodiment, the method comprises the steps of:
the filter coefficient decoder is used for decoding the corresponding first filter coefficient and second filter coefficient according to the current accumulation point number;
a first multiplier for multiplying the first filter coefficient by an output distance line of a previous radar transmission period;
a second multiplier for multiplying the second filter coefficient by an output distance line of a previous radar transmission period;
an adder for summing an input distance line of a current radar transmission period, an output of the first multiplier, and an output of the second multiplier;
a lower clipping unit, configured to lower clipping the output of the adder to zero, where the output of the lower clipping unit is used as an output distance line of the current radar transmission period;
the first delay unit is used for delaying the output distance of the current radar transmission period by one radar transmission period and outputting the delayed output distance to the first multiplier;
and the second delay unit is used for delaying the output of the first delay unit by one radar transmitting period and outputting the delayed output to the second multiplier.
In one embodiment, the first filter coefficient and the second filter coefficient are K1 and K2 calculated according to standard calculation formulas of bipolar point filter coefficients, respectively; the lower amplitude limiting unit is used for judging whether the output of the adder is smaller than 0, if yes, the output of the lower amplitude limiting unit is 0, otherwise, the input of the lower amplitude limiting unit is used as the output of the lower amplitude limiting unit; the bipolar dot accumulator is realized by an FPGA.
In one embodiment, the first filter coefficient and the second filter coefficient are K1 and K2 calculated according to standard calculation formulas of bipolar point filter coefficients, respectively; the lower amplitude limiting unit is used for dividing the output of the adder by two to obtain a halving value, and adding the halving value to the absolute value of the halving value to be used as the output of the lower amplitude limiting unit; the bipolar accumulator is realized by a vector operation function of a digital signal processor.
In one embodiment, the first delay unit and the second delay unit are implemented by a random access memory and/or a shift register.
In one embodiment, the input distance line of the current radar transmission period is an input distance line X (m) formed by sampling an echo signal of an electromagnetic wave pulse according to a range gate after the navigation radar transmits the electromagnetic wave pulse, and the output distance line of the current radar transmission period is Y (m), and m is a range gate number.
In one embodiment, the equation of state for any range gate m is as follows:
Ytemp n ＝X n +K1*Y n-1 +K2*Y n-2
wherein n is a distance line sequence number, X is a current input distance line, ytemp is the output of the adder, and Y is an output distance line of the current radar transmission period.
A navigation radar echo accumulation method, comprising:
decoding a corresponding first filter coefficient and a corresponding second filter coefficient according to the current accumulation points;
multiplying the first filter coefficient by the output distance line Y of the previous radar transmission period n-1 Obtaining a first product;
multiplying the second filter coefficient by the output distance line Y of the previous radar transmission period n-2 Obtaining a second product;
summing an input distance line of a current radar transmitting period, the first product and the second product to obtain Yemp;
performing lower limit processing on the Yemp, wherein the lower limit is zero, and the lower limit is used as an output distance line Y of the current radar transmitting period after the lower limit processing n ；
Wherein Y is n-1 By combining Y n Delay one radar emission period to obtain, Y n-2 By combining Y n-1 Delay one radar transmission period to obtain.
In one embodiment, the step of decoding the corresponding first filter coefficient and the second filter coefficient according to the current accumulated point number includes calculating K1 and K2 according to a standard calculation formula of the bipolar filter coefficient; the step of performing the down-clipping processing on the Ytemp includes determining whether the output of Ytemp is less than 0, if yes, Y n 0, otherwise, use Ytemp as Y n The method comprises the steps of carrying out a first treatment on the surface of the The navigation radar echo accumulation method is realized through an FPGA.
In one embodiment, the step of decoding the corresponding first filter coefficient and the second filter coefficient according to the current accumulated point number includes: calculating K1 and K2 according to a standard calculation formula of the bipolar point filter coefficient;
the step of performing the lower clipping process on Ytemp includes: dividing Ytemp by two to obtain halving value, and adding the halving value to the absolute value of the halving value as Y n The method comprises the steps of carrying out a first treatment on the surface of the The navigation radar echo accumulation method is realized through a digital signal processor, and the step of performing lower amplitude limiting processing on the Ytemp is operated through a vector operation function of the digital signal processor.
According to the bipolar point accumulator and the echo accumulating method for accumulating the echo of the navigation radar, the lower limiting link is arranged in the feedback loop, so that the tail oscillation characteristic of unit impulse response is removed, and the influence of the azimuth side lobe of a large signal on a small signal is reduced.
Drawings
FIG. 1 is a block diagram of an exemplary bipolar dot accumulator;
FIG. 2 is a normalized unit impulse response graph of the bipolar accumulator shown in FIG. 1;
FIG. 3 is a graph of the input signal to the bipolar accumulator shown in FIG. 1;
FIG. 4 is a graph of the output signal of the bipolar accumulator shown in FIG. 1;
FIG. 5 is a block diagram of a bipolar dot accumulator for use in a navigation radar in an embodiment of the present application;
FIG. 6 is a block diagram of a bipolar dot accumulator for use in a navigation radar in another embodiment of the present application;
FIG. 7 is a normalized unit impulse response graph of a bipolar dot accumulator according to an embodiment of the present application;
FIG. 8 is a graph of input signals for a bipolar dot accumulator according to one embodiment of the present application;
FIG. 9 is a graph of the output signal of a bipolar dot accumulator according to one embodiment of the present application;
FIG. 10 is a flow chart of a method of navigator radar echo accumulation in one embodiment.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and the like are used herein for illustrative purposes only. When an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
The terms "comprises," "comprising," and/or "including," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
Fig. 1 is a block diagram of an exemplary bipolar dot accumulator. After the radar transmits a pulse, the echo signal is sampled according to a range gate to form an input distance line X (m) of the current echo, wherein m is a range gate sequence number. Since one line has M range gates, the M-stage delay line realizes the delay of one radar pulse transmission period Tr, that is, the delay of one range line. Y (m) is the output line of the accumulator in the current radar transmission period, yout (m) is the final output line, Y1 (m) is the last output distance line (i.e. the output distance line of the previous radar transmission period), and Y2 (m) is the last output distance line (i.e. the output distance line of the previous radar transmission period). K1 and K2 are filter coefficients decoded by the filter coefficient decoder according to the current accumulation point number N, and K2 is a negative number.
Assuming n as the distance line number, the state equation of any distance gate m is as follows:
Y n ＝X n +K1*Y n-1 +K2*Y n-2
the transfer function corresponding to the state equation is:
the output link operation is as follows:
the processing mechanism of the bipolar accumulator shown in fig. 1 has a major problem: the large pulse signal generates a side lobe in the echo sequence number direction (azimuth direction), which is small relative to its own main lobe, but may affect detection of a small target main lobe. The reason for this phenomenon is that the unit impact response has tail oscillation characteristics. Fig. 2 to 4 show the case where a large signal (strong target) is input and a small signal (weak target) is also input (right of echo sequence number), specifically, assuming that the number of accumulation points n=25, fig. 2 to 4 are normalized unit impulse response, input signal, output signal graphs, respectively. As can be seen from fig. 4, the small signal output is distorted due to the influence of the large signal side lobes.
The present application proposes a bipolar dot accumulator for navigator radar echo accumulation. Since the embodiment shown in fig. 5 is identical to the state equation of the other embodiment shown in fig. 6. The embodiment will be described with the example shown in fig. 5.
In the embodiment shown in fig. 5, the bipolar accumulator includes a filter coefficient decoder 10, a first multiplier 22, a second multiplier 24, an adder 30, a lower clipping unit 40, a first delay unit 52, and a second delay unit 54.
The filter coefficient decoder 10 is configured to decode the corresponding first filter coefficient and the corresponding second filter coefficient according to the current accumulation point number. The first filter coefficient and the second filter coefficient are K1 and K2 calculated according to a standard calculation formula of the bipolar point filter coefficient, wherein K2 is a negative number. The range of the number of accumulated points required by the navigation radar in different modes is 8-31, 24 groups of K1 and K2 can be obtained according to a standard calculation formula of the bipolar point filter coefficient, and the groups of K1 (8) -K1 (31) and K2 (8) -K2 (31) are marked. When the accumulated point number n=8, the filter coefficient decoder 10 outputs K1 (8), K2 (8); when the accumulated point number n=9, the filter coefficient decoder 10 outputs K1 (9), K2 (9); and so on. In one embodiment, filter coefficient decoder 10 may be implemented in software or FPGA logic.
In the embodiment shown in fig. 5, one input terminal of the first multiplier 22 is connected to one output terminal of the filter coefficient decoder 10, and the other input terminal is connected to an output terminal of the first delay unit 52, for multiplying the first filter coefficient K1 by the output distance line (i.e., the last output distance line) Y1 (m) of the previous radar transmission period. One input terminal of the second multiplier 24 is connected to one output terminal of the filter coefficient decoder 10, and the other input terminal is connected to an output terminal of the second delay unit 54, for multiplying the second filter coefficient K2 by the output distance line (i.e., the last output distance line) Y2 (m) of the previous radar transmission period.
In the embodiment shown in fig. 5, adder 30 is used to sum the input distance line X (m) of the current radar transmission cycle, the output of the first multiplier and the output of the second multiplier.
In the embodiment shown in fig. 5, the lower clipping unit 40 is configured to clip the output Ytemp (m) of the adder to zero, that is, when Ytemp (m) is less than zero, the output Y (m) of the lower clipping unit 40 is zero, and when Ytemp (m) is greater than or equal to zero, the output Y (m) =ytemp (m) of the lower clipping unit 40. The output Y (m) of the lower clipping unit 40 is taken as the output distance line of the current radar transmission period. An input terminal of the first delay unit 52 is connected to an output terminal of the lower clipping unit 40, and is configured to delay an output distance line (i.e., Y (m)) of a current radar transmission period by one radar transmission period Tr and output the delayed output distance line to an input terminal of the first multiplier 22.
The input terminal of the second delay unit 54 is connected to the output terminal of the first delay unit 52, and is configured to delay the output of the first delay unit 52 (i.e., Y1 (m)) by one radar emission period Tr and output the delayed output to the input terminal of the second multiplier 24.
The lower limiting link of the bipolar accumulator is arranged in the feedback loop, namely the output of the lower limiting unit 40 after lower limiting is fed back to the multiplier after time delay, so that the tail oscillation characteristic of unit impulse response is removed, namely the influence of the azimuth side lobe of a large signal on a small signal is reduced.
The normalized unit impulse response, input signal, output signal of the bipolar accumulator in the embodiment of fig. 5 are shown in fig. 7-9 under the same input conditions as in fig. 1-4. It can be seen that the bipolar dot accumulator reduces the effect of the azimuth side lobes of large signals on small signals.
The first delay unit 52 and the second delay unit 54 are implemented by Random Access Memory (RAM) and/or a shift register.
The bipolar accumulator in the embodiment shown in fig. 5 operates as follows: after the radar emits an electromagnetic wave pulse, the echo is sampled to form a current input distance line X (m), and m is a distance gate sequence number. And summing X (m) with the last output distance line Y1 (m) weighted by K1 and the last output distance line Y2 (m) weighted by K2 to obtain Ytemp (m), and performing lower limiting treatment on the Ytemp (m) to obtain the current output distance line Y (m). Y (m) is output and is shifted into a delay line as a last distance line in the next transmission pulse processing, and the current Y1 (m) is shifted into a last distance line in the next transmission pulse processing. Since one line has M range gates, the M-stage delay line realizes the delay of one radar pulse transmission period Tr, that is, the delay of one range line.
Assuming n as the distance line number, the state equation of any distance gate m is as follows:
Ytemp n ＝X n +K1*Y n-1 +K2*Y n-2
wherein n is a distance line sequence number, X is a current input distance line, yemp is the output of the adder, and Y is an output distance line of a current radar transmission period.
In one embodiment, the lower clipping unit 40 is configured to divide the output of the adder 30 by two to obtain a halved value, and add the halved value to the absolute value of the halved value as the output of the lower clipping unit 40. The algorithm is suitable for implementation by a Digital Signal Processor (DSP) which has the support of high efficiency vector operation functions of a DSP function library. Fig. 6 is a block diagram of a bipolar accumulator in another embodiment, in which halving is performed before the input to the adder 30, that is, the output of the filter coefficient decoder 10 is halved by K1 and K2, and the input to the adder 30 is X (m)/2 (the input distance line of the halved current radar transmission period).
The application also provides a navigation radar echo accumulation method. FIG. 10 is a flow chart of a method of navigator radar echo accumulation in one embodiment, including the steps of:
s110, decoding the corresponding first filter coefficient and second filter coefficient according to the current accumulation point number.
In one embodiment, a filter coefficient decoder may be used to calculate K1 and K2 as the first filter coefficient and the second filter coefficient according to a standard calculation formula of the bipolar point filter coefficient, where K2 is a negative number.
S120, multiplying the first filter coefficient by Y n-1 A first product is obtained.
Distance line number, Y, is denoted by n n-1 Representing the output distance line of the previous radar transmission cycle.
S130, multiplying the second filter coefficient by Y n-2 A second product is obtained.
Y n-2 Representing the frontThe output distance of a radar transmission period is off-line.
And S140, summing the input distance line, the first product and the second product of the current radar transmission period to obtain the Yemp.
The expression can be expressed as follows:
ytemp n ＝X n +K1*Y n-1 +K2*Y n-2
where X is the current input distance line.
S150, performing down limiting processing on the Yemp, and then taking the lower limiting processing as an output distance line Y of the current radar transmission period n 。
The lower limit clipping is zero, i.e. Y when Yemp is less than zero n Zero, Y when Yemp is greater than or equal to zero n ＝Ytemp。
In step S120, Y n-1 By combining Y n Delaying one radar emission period to obtain; in step S130, Y n-2 By combining Y n-1 Delay one radar transmission period to obtain.
In one embodiment, step S150 includes determining whether the output of Ytemp is less than 0, if so, Y n 0, otherwise, use Ytemp as Y n . The navigation radar echo accumulation method can be realized through an FPGA.
In one embodiment, step S150 includes dividing Ytemp by two to obtain a halved value, and adding the halved value to the absolute value of the halved value as Y n . The navigation radar echo accumulation method can be realized by a digital signal processor, and the step S150 uses vector operation functions in a DSP function library to operate.
In one embodiment, step S140 is preceded by the further step of:
the navigation radar emits a pulse of electromagnetic waves.
And sampling echo signals of the electromagnetic wave pulse according to a range gate to form an input range line X (m) of the current radar transmission period.
In step S150, the output distance line of the current radar transmission period is Y n (m)。
Wherein m is a distance gate number.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (9)
1. A bipolar spot integrator for navigator radar echo accumulation, characterized in that it comprises:
the filter coefficient decoder is used for decoding the corresponding first filter coefficient and second filter coefficient according to the current accumulation point number;
a first multiplier for multiplying the first filter coefficient by an output distance line of a previous radar transmission period;
a second multiplier for multiplying the second filter coefficient by an output distance line of a previous radar transmission period;
an adder for summing an input distance line of a current radar transmission period, an output of the first multiplier, and an output of the second multiplier;
a lower clipping unit, configured to lower clipping the output of the adder to zero, where the output of the lower clipping unit is used as an output distance line of the current radar transmission period;
the first delay unit is used for delaying the output distance of the current radar transmission period by one radar transmission period and outputting the delayed output distance to the first multiplier;
the second delay unit is used for delaying the output of the first delay unit by one radar transmitting period and outputting the delayed output to the second multiplier;
wherein the lower limiting link of the bipolar pole accumulator is arranged in the feedback loop.
2. The bipolar spot integrator for navigator radar echo accumulation according to claim 1, wherein the first and second filter coefficients are K1 and K2 calculated according to standard calculation formulas of the bipolar spot filter coefficients, respectively; the lower amplitude limiting unit is used for judging whether the output of the adder is smaller than 0, if yes, the output of the lower amplitude limiting unit is 0, otherwise, the input of the lower amplitude limiting unit is used as the output of the lower amplitude limiting unit; the bipolar dot accumulator is realized by an FPGA.
3. The bipolar spot integrator for navigator radar echo accumulation according to claim 1, wherein the first and second filter coefficients are K1 and K2 calculated according to standard calculation formulas of the bipolar spot filter coefficients, respectively; the lower amplitude limiting unit is used for dividing the output of the adder by two to obtain a halving value, and adding the halving value to the absolute value of the halving value to be used as the output of the lower amplitude limiting unit; the bipolar accumulator is realized by a vector operation function of a digital signal processor.
4. A bipolar spot accumulator for navigator radar echo accumulation according to any one of claims 1 to 3, characterized in that the first and second delay units are realized by means of random access memories and/or shift registers.
5. A bipolar spot integrator for accumulation of echoes of a navigator radar according to claim 2 or 3, wherein the input distance line of the current radar transmission period is an input distance line X (m) formed by sampling echo signals of an electromagnetic wave pulse according to a range gate after the navigator radar transmits the electromagnetic wave pulse, and the output distance line of the current radar transmission period is Y (m), and m is a range gate number.
6. The bipolar spot integrator for navigator radar echo accumulation according to claim 5, wherein the equation of state of any one range gate m is as follows:
Ytemp n ＝X n +K1*Y n-1 +K2*Y n-2
wherein n is a distance line sequence number, X is a current input distance line, ytemp is the output of the adder, and Y is an output distance line of the current radar transmission period.
7. A navigator radar echo accumulation method based on the bipolar spot accumulator for navigator radar echo accumulation according to any one of claims 1 to 6, comprising:
decoding a corresponding first filter coefficient and a corresponding second filter coefficient according to the current accumulation points;
multiplying the first filter coefficient by the output distance line Y of the previous radar transmission period n-1 Obtaining a first product;
multiplying the second filter coefficient by the output distance line Y of the previous radar transmission period n-2 Obtaining a second product;
summing an input distance line of a current radar transmitting period, the first product and the second product to obtain Yemp;
performing lower limit processing on the Yemp, wherein the lower limit is zero, and the lower limit is used as an output distance line Y of the current radar transmitting period after the lower limit processing n ；
Wherein Y is n-1 By combining Y n Delay one radar emission period to obtain, Y n-2 By combining Y n-1 Delay one radar transmission period to obtain.
8. The method of claim 7, wherein the translating the corresponding first based on the current accumulated pointsThe step of filtering coefficients and the second filtering coefficients comprises the steps of calculating K1 and K2 according to a standard calculation formula of the bipolar filtering coefficients; the step of performing the down-clipping processing on the Ytemp includes determining whether the output of Ytemp is less than 0, if yes, Y n 0, otherwise, use Ytemp as Y n The method comprises the steps of carrying out a first treatment on the surface of the The navigation radar echo accumulation method is realized through an FPGA.
9. The method of claim 7, wherein the step of decoding the corresponding first filter coefficient and second filter coefficient based on the current accumulated points comprises: calculating K1 and K2 according to a standard calculation formula of the bipolar point filter coefficient;
the step of performing the lower clipping process on Ytemp includes: dividing Ytemp by two to obtain halving value, and adding the halving value to the absolute value of the halving value as Y n The method comprises the steps of carrying out a first treatment on the surface of the The navigation radar echo accumulation method is realized through a digital signal processor, and the step of performing lower amplitude limiting processing on the Ytemp is operated through a vector operation function of the digital signal processor.
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| CN105589061A (en) * | 2015-12-11 | 2016-05-18 | 无锡市雷华科技有限公司 | Signal processing algorithm for shore-based radar |
| CN108344979A (en) * | 2018-01-26 | 2018-07-31 | 西安电子工程研究所 | A kind of receiver for CW radar based on multiphase filtering |
| CN108845296B (en) * | 2018-06-15 | 2022-07-22 | 中国电子科技集团公司第十四研究所 | Broadband radar radio frequency digital receiver based on microwave photons and signal acquisition and processing method |
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