CN111162146A - Method for producing a heterojunction solar cell and heterojunction solar cell - Google Patents
Method for producing a heterojunction solar cell and heterojunction solar cell Download PDFInfo
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- CN111162146A CN111162146A CN202010060252.9A CN202010060252A CN111162146A CN 111162146 A CN111162146 A CN 111162146A CN 202010060252 A CN202010060252 A CN 202010060252A CN 111162146 A CN111162146 A CN 111162146A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 73
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 239000010409 thin film Substances 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 44
- 239000010408 film Substances 0.000 claims description 24
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 19
- 238000002834 transmittance Methods 0.000 claims description 11
- 230000008021 deposition Effects 0.000 claims description 10
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 4
- 229910003437 indium oxide Inorganic materials 0.000 claims description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims description 2
- 229910001887 tin oxide Inorganic materials 0.000 claims description 2
- 239000011787 zinc oxide Substances 0.000 claims description 2
- 238000006243 chemical reaction Methods 0.000 abstract description 7
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
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- 229910052709 silver Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
- H10F71/10—Manufacture or treatment of devices covered by this subclass the devices comprising amorphous semiconductor material
- H10F71/103—Manufacture or treatment of devices covered by this subclass the devices comprising amorphous semiconductor material including only Group IV materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F10/00—Individual photovoltaic cells, e.g. solar cells
- H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
- H10F10/17—Photovoltaic cells having only PIN junction potential barriers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/30—Coatings
- H10F77/306—Coatings for devices having potential barriers
- H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/93—Interconnections
- H10F77/933—Interconnections for devices having potential barriers
- H10F77/935—Interconnections for devices having potential barriers for photovoltaic devices or modules
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention relates to a method for producing a heterojunction solar cell and a heterojunction solar cell. The step of manufacturing the heterojunction solar cell integral piece in the manufacturing method of the invention further comprises the following steps: arranging a central layer; sequentially processing a plurality of top side light transmissive electrically conductive layers from the central layer at a top side of the central layer at incrementally increasing processing temperatures; and sequentially processing a plurality of bottom side light-transmitting conductive layers from the central layer to the bottom side of the central layer at a plurality of processing temperatures which are increased progressively. According to the invention, the plurality of light-transmitting conducting layers are processed at the increasing temperature, so that the PN junction is not damaged, and the passivation effect of the amorphous silicon film layer on the substrate layer is not influenced, thereby obtaining the low carrier recombination rate and the better P-N junction performance, improving the open-circuit voltage and the filling factor of the cell, and further improving the conversion efficiency of the heterojunction cell.
Description
Technical Field
The invention relates to the field of energy sources, in particular to a method for manufacturing a heterojunction solar cell and the heterojunction solar cell.
Background
With the increasing consumption of conventional fossil energy such as global coal, oil, natural gas and the like, the ecological environment is continuously deteriorated, and particularly, the sustainable development of the human society is seriously threatened due to the increasingly severe global climate change caused by the emission of greenhouse gases. Various countries in the world make respective energy development strategies to deal with the limitation of conventional fossil energy resources and the environmental problems caused by development and utilization. Solar energy has become one of the most important renewable energy sources by virtue of the characteristics of reliability, safety, universality, long service life, environmental protection and resource sufficiency, and is expected to become a main pillar of global power supply in the future.
In a new energy revolution process, the photovoltaic industry in China has grown into a strategic emerging industry with international competitive advantages. However, the development of the photovoltaic industry still faces many problems and challenges, and the conversion efficiency and reliability are the biggest technical obstacles restricting the development of the photovoltaic industry, while the cost control and the scale-up are economically restricted.
At present, the heterojunction solar cell has a series of advantages of high conversion efficiency, short manufacturing process flow, thin silicon wafer, low temperature coefficient, no light attenuation, double-sided power generation, high double-sided efficiency and the like, and is praised as the next generation ultra-high efficiency solar cell technology with the best industrialization potential. Compared with the traditional P-type single crystal/polycrystal solar cell, the heterojunction solar cell with the N-type single crystal substrate can obtain higher conversion efficiency and only needs few process steps. At the same time, heterojunction solar cells have unique PID (potential induced degradation) and LID (light induced degradation) free effects, which ensure a more reliable and longer service life of the photovoltaic module.
However, there are some problems with existing heterojunction solar cells. The passivation layer and the carrier transport layer used in the conventional heterojunction solar cell are amorphous silicon thin films, have very poor conductivity, and in order to lead out emitted electricity, a transparent conductive thin film needs to be plated on the amorphous silicon thin film. Meanwhile, in order to increase the light transmission and reduce the reflection and absorption, the film has high light transmission and anti-reflection characteristics.
The current technology adopts Direct Current (DC) magnetron sputtering technology to manufacture a transparent conductive film, and the principle is that under the action of an electric field and a magnetic field, a target material is bombarded by accelerated high-energy particles (Ar +), atoms on the surface of the target material are separated from original crystal lattices and escape after energy exchange, and sputtered particles are deposited on the surface of the substrate and react with oxygen atoms to generate an oxide film, namely the transparent conductive film. The technology of adopting indium tin oxide as the material of the light-transmitting conductive film is mature, the resistivity of the indium tin oxide is low, but the manufacturing process temperature requires 200 ℃, and the performance of the PN junction is further damaged by the amorphous silicon thin film layer due to the damage of the amorphous silicon thin film layer in the manufacturing process due to the overhigh manufacturing process temperature, so that the passivation effect of the amorphous silicon thin film on the substrate layer is influenced, and the battery performance is influenced.
There is thus a need to provide a method of manufacturing a heterojunction solar cell and a heterojunction solar cell that at least partially solves the above mentioned problems.
Disclosure of Invention
The invention aims to provide a method for manufacturing a heterojunction solar cell and the heterojunction solar cell, wherein a plurality of light-transmitting conducting layers are processed at an increasing processing temperature, so that a lower temperature can be used when the light-transmitting conducting layers attached to an amorphous silicon film layer are processed, and a higher temperature can be used when the remaining light-transmitting conducting layers are processed, and the process can not damage a PN junction and can not influence the passivation effect of the amorphous silicon film layer on a substrate layer, so that the low carrier recombination rate and the better P-N junction performance are obtained, the open-circuit voltage and the filling factor of a cell are improved, and the conversion efficiency of the heterojunction cell is further improved.
Meanwhile, the higher temperature can be used when the rest transparent conducting layer is processed, and a part of the transparent conducting layer is processed at the higher temperature, so that other overall performances of the transparent conducting layer can be ensured.
According to an aspect of the present invention, a method for manufacturing a heterojunction solar cell is provided, the method comprising a step of manufacturing a heterojunction solar cell monolith and a step of breaking the heterojunction solar cell monolith, wherein the step of manufacturing the heterojunction solar cell monolith further comprises the steps of:
arranging a central layer;
sequentially processing a plurality of top side light transmissive electrically conductive layers from the central layer at a top side of the central layer at incrementally increasing processing temperatures;
and sequentially processing a plurality of bottom side light-transmitting conductive layers from the central layer to the bottom side of the central layer at a plurality of processing temperatures which are increased progressively.
In one embodiment, deposition rate conditions used in processing each of said top side light transmissive conductive layers are different from each other; the deposition rate conditions used in processing each of the bottom side light-transmitting conductive layers are different from each other.
In one embodiment, the deposition rate conditions used in processing each of said top side light transmissive conductive layers are the same; the deposition speed conditions used when processing each of the bottom side light-transmitting conductive layers are the same.
In one embodiment, the first top side light-transmitting and electrically-conductive layer and the first bottom side light-transmitting and electrically-conductive layer from the center layer are processed using a processing temperature of less than 200 ℃.
In one embodiment, the processing temperature used to process the light-transmissive electrically-conductive layers other than the first top-side light-transmissive electrically-conductive layer and the first bottom-side light-transmissive electrically-conductive layer is greater than or equal to 200 ℃.
In one embodiment, the step of processing the top side light-transmissive electrically-conductive layer and the step of processing the bottom side light-transmissive electrically-conductive layer can be performed simultaneously or sequentially.
In one embodiment, the step of processing the top side light transmissive to point layer and the step of processing the bottom side light transmissive conductive layer are accomplished in the same processing chamber, which can be controlled to provide an incremental processing temperature.
In one embodiment, the step of processing the top side light transmissive conductive layer comprises: sequentially placing the central sheet in different process chambers capable of providing incrementally increasing process temperatures to create a top side light-transmissive electrically-conductive layer in each process chamber;
the step of processing the bottom side light-transmitting conductive layer comprises the following steps: the central sheet is sequentially placed in different process chambers capable of providing incrementally increasing process temperatures to create a respective one of the bottom side light transmissive conductive layers in each process chamber.
In one embodiment, the step of providing a center layer comprises:
arranging an N-type monocrystalline silicon substrate layer;
setting intrinsic amorphous silicon layers on the top side and the bottom side of the monocrystalline silicon substrate layer respectively;
arranging an N-type amorphous silicon thin film layer on the top side of the intrinsic amorphous silicon layer positioned on the top side of the monocrystalline silicon substrate layer;
and arranging a P-type amorphous silicon thin film layer on the bottom side of the intrinsic amorphous silicon layer positioned on the bottom side of the monocrystalline silicon substrate layer.
In one embodiment, the top and bottom light-transmissive electrically-conductive layers are fabricated using tin-doped indium oxide, aluminum-doped zinc oxide, or fluorine-doped tin oxide.
According to another aspect of the invention, there is provided a heterojunction solar cell fabricated by the method according to any one of the above aspects.
In one embodiment, the solar cell sheet includes:
an N-type monocrystalline silicon substrate layer;
a top side intrinsic amorphous silicon layer disposed on a top side of the N-type single crystal silicon substrate layer;
the bottom side intrinsic amorphous silicon layer is arranged on the bottom side of the N-type monocrystalline silicon substrate layer;
the N-type amorphous silicon thin film layer is arranged on the top side of the top side intrinsic amorphous silicon thin film layer;
the P-type amorphous silicon thin film layer is arranged on the bottom side of the bottom side intrinsic amorphous silicon thin film layer;
the top side light-transmitting conductive layers are positioned on the top side of the N-type amorphous silicon thin film layer and are arranged in the order of the sizes of crystal grains from small to large from the N-type amorphous silicon thin film layer;
the bottom side light-transmitting conducting layers are positioned on the bottom side of the P-type amorphous silicon thin film layer and are arranged in the order from small to large in size from the P-type amorphous silicon thin film layer;
an electrode disposed on a top surface of the top side light-transmissive conductive layer and on a bottom surface of the bottom side light-transmissive conductive layer.
In one embodiment, the top and bottom light-transmissive electrically-conductive layers are both two layers.
In one embodiment, the top side light-transmitting conductive layer close to the N-type amorphous silicon thin film layer is an integral film structure processed at a processing temperature of 200 ℃ or lower, and the top side light-transmitting conductive layer far away from the N-type amorphous silicon thin film layer is an integral film structure processed at a processing temperature of 200 ℃ or higher;
the bottom side light-transmitting conductive layer close to the P-type amorphous silicon thin film layer is of an integral film structure processed at a processing temperature below 200 ℃, and the bottom side light-transmitting conductive layer far away from the P-type amorphous silicon thin film layer is of an integral film structure processed at a processing temperature above 200 ℃.
In one embodiment, the light-transmissive conductive layers are arranged on the central layer in order of increasing light transmission in a direction from the central layer to the electrode.
According to the invention, the plurality of light-transmitting conducting layers are processed at the increasing processing temperature, so that a lower temperature can be used when the light-transmitting conducting layer tightly attached to the amorphous silicon film layer is processed, and a higher temperature can be used when the rest light-transmitting conducting layer is processed, the PN junction can not be damaged by the process, the passivation effect of the amorphous silicon film layer on the substrate layer can not be influenced, and therefore, the low carrier recombination rate and the better P-N junction performance are obtained, the open-circuit voltage and the filling factor of the battery are improved, and the conversion efficiency of the heterojunction battery piece is further improved.
Meanwhile, the higher temperature can be used when the rest transparent conducting layer is processed, and a part of the transparent conducting layer is processed at the higher temperature, so that other overall performances of the transparent conducting layer can be ensured.
Drawings
For a better understanding of the above and other objects, features, advantages and functions of the present invention, reference should be made to the preferred embodiments illustrated in the accompanying drawings. Like reference numerals in the drawings refer to like parts. It will be appreciated by persons skilled in the art that the drawings are intended to illustrate preferred embodiments of the invention without any limiting effect on the scope of the invention, and that the various components in the drawings are not drawn to scale.
Fig. 1 is a schematic structural view of a heterojunction solar cell according to a preferred embodiment of the invention.
Detailed Description
Reference will now be made in detail to the embodiments of the present invention, examples of which are illustrated in the accompanying drawings. What has been described herein is merely a preferred embodiment in accordance with the present invention and other ways of practicing the invention will occur to those skilled in the art and are within the scope of the invention.
The present invention provides a method of manufacturing a heterojunction solar cell and a heterojunction solar cell, and a preferred embodiment according to the present invention, which includes the heterojunction solar cell shown in fig. 1 and a method of manufacturing the same, will be provided below.
As shown in fig. 1, the heterojunction solar cell sheet comprises a substrate sheet having a top surface printed with a positive electrode and a bottom surface printed with a back electrode, the positive and back electrodes preferably being made of silver. The substrate sheet further comprises a plurality of battery sheet layers which are arranged in a stacked mode in the direction perpendicular to the substrate sheet, the plurality of battery sheet layers comprise a center layer and a plurality of light-transmitting conducting layers, the center layer is located at the center of all the battery sheet layers, and the light-transmitting conducting layers are arranged in a stacked mode in the direction perpendicular to the center layer on the top side and the bottom side of the center layer.
In particular, the central layer in turn comprises a plurality of layers. For example, the central layer may include a substrate layer made of N-type single crystal silicon and amorphous silicon thin film layers on the top and bottom sides of the substrate layer, which in turn may include an intrinsic amorphous silicon thin film layer directly contacting the substrate layer and an N-type or P-type amorphous silicon thin film layer. In this embodiment, the top side of the intrinsic amorphous silicon thin film layer located on the top side of the substrate layer is an N-type amorphous silicon thin film layer, and the bottom side of the intrinsic amorphous silicon thin film layer located on the bottom side of the substrate layer is a P-type amorphous silicon thin film layer.
The method for manufacturing the heterojunction solar cell comprises a step of manufacturing a heterojunction solar cell integral sheet and a step of splitting the heterojunction solar cell integral sheet, wherein the step of manufacturing the heterojunction solar cell integral sheet comprises the following steps:
setting a center layer, wherein the step of setting the center layer further comprises setting an N-type monocrystalline silicon substrate layer, setting intrinsic amorphous silicon layers on the top side and the bottom side of the monocrystalline silicon substrate layer respectively, setting an N-type amorphous silicon thin film layer on the top side of the intrinsic amorphous silicon layer on the top side of the monocrystalline silicon substrate layer, and setting a P-type amorphous silicon thin film layer on the bottom side of the intrinsic amorphous silicon layer on the bottom side of the monocrystalline silicon substrate layer;
sequentially processing a plurality of top side light-transmitting conductive layers from the central layer at a plurality of gradually increased processing temperatures on the top side of the central layer, wherein the top side light-transmitting conductive layers processed at a lower processing temperature are smaller in grain size, and the top side light-transmitting conductive layers processed at a higher processing temperature are larger in grain size, so that the top side light-transmitting conductive layers are arranged on the top side of the N-type amorphous silicon thin film layer in the order of the grain size from small to large;
and sequentially processing a plurality of bottom side light-transmitting conductive layers from the central layer to the bottom side of the central layer at a plurality of gradually increased processing temperatures, wherein the bottom side light-transmitting conductive layers are arranged at the bottom side of the P-type amorphous silicon thin film layer in the order from small to large according to the sizes of crystal grains because the crystal grains of the light-transmitting conductive layers processed at the lower processing temperature are smaller and the crystal grains of the light-transmitting conductive layers processed at the higher processing temperature are larger.
It should be noted that, the two steps of "processing a plurality of top side light-transmitting conductive layers" and "processing a bottom side light-transmitting conductive layer" provided by the present invention are not in a sequential relationship, and the two steps may be performed simultaneously, or the step of "processing a plurality of top side light-transmitting conductive layers" may be performed first, or the step of "processing a bottom side light-transmitting conductive layer" may be performed first.
That is, each top side light transmissive electrically conductive layer on the top side of the center layer is sequentially made at an incrementally greater plurality of processing temperatures, and the light transmissive electrically conductive layer on the bottom side of the center layer is sequentially made at an incrementally greater plurality of processing temperatures.
Preferably, the temperature used to process the first top side and bottom side light-transmitting conductive layers from the center layer (i.e., the two first light-transmitting conductive layers shown in fig. 1) is less than 200 ℃, and the fabrication temperature to process the second through nth light-transmitting conductive layers may be greater than or equal to 200 ℃. By means of the arrangement, the N-type amorphous silicon thin film layer and the P-type amorphous silicon thin film layer can be guaranteed not to be damaged in the process of processing the first light-transmitting conducting layer, and the PN junction can not be damaged, so that the performance of the heterojunction solar cell can be optimized.
Preferably, other conditions in the process may be the same or different when processing each light-transmitting conductive film. For example, the deposition rate conditions used in processing the first to nth light-transmitting conductive films are constant, or different deposition rate conditions may be used in processing the first to nth light-transmitting conductive films.
The steps of processing each top side light-transmitting conductive layer and the steps of processing each bottom side light-transmitting conductive layer can be performed simultaneously or sequentially.
For example, if performed simultaneously, a first light-transmissive electrically-conductive layer on the top side of the center layer and a second light-transmissive electrically-conductive layer on the bottom side of the center layer can be processed simultaneously at a same processing temperature, and then a second light-transmissive electrically-conductive layer on the top side of the center layer and a second light-transmissive electrically-conductive layer on the bottom side of the center layer can be processed simultaneously at a slightly higher temperature, and so on.
If the processing is carried out successively, a first light-transmitting conducting layer positioned on the top side of the central layer is processed at a certain lower temperature, then a second light-transmitting conducting layer positioned on the top side of the central layer is processed at a slightly higher temperature until an Nth light-transmitting conducting layer positioned on the top side of the central layer is processed, then the light-transmitting conducting layers positioned on the bottom side of the central layer are processed at a lower temperature, and then the bottom two light-transmitting conducting layers to the Nth light-transmitting conducting layer positioned on the bottom side of the central layer are sequentially processed at an increasing temperature.
On the other hand, the method can adopt only one processing chamber to finish the processing of all the light-transmitting conducting layers, or adopt a plurality of processing chambers to finish the processing of all the light-transmitting conducting layers in sequence.
Specifically, if only one process chamber is used, the process chamber can provide an increasing process temperature, and the process chambers are controlled to sequentially provide the increasing process temperature after the central layer is placed in the process chamber, so as to gradually generate the first to nth light-transmitting conductive layers.
If a plurality of processing chambers are adopted, each processing chamber can provide different processing temperatures, the plurality of processing chambers can be arranged from low to high in the processing temperature which can be provided by the processing chambers, the solar cell in the process is sequentially placed in each processing chamber, and a light-transmitting conductive layer is generated in each processing chamber.
Preferably, in order to make the light-transmitting conductive region of the substrate sheet have gradually changed light transmittance, a plurality of materials may be selected and matched with different production processes (including the processing temperature described above) to respectively manufacture a plurality of light-transmitting conductive layers, so that each light-transmitting conductive layer has different light transmittance from each other. The respective light-transmitting conductive layers are arranged in the order of the strength of light transmission on the top side and the bottom side of the central layer such that the light transmission of the respective light-transmitting conductive layers increases in the direction from the central layer to the electrode (for example, in the direction upward and downward from the central layer as shown in fig. 1).
Taking the respective light-transmitting conductive layers on the top side of the central layer as an example, the light-transmitting conductive layer directly contacting the central layer is referred to as a first light-transmitting conductive layer, the light-transmitting conductive layer directly on the top side of the first light-transmitting conductive layer is referred to as a second light-transmitting conductive layer, and so on, and the light-transmitting conductive layer on the topmost part is, for example, the nth light-transmitting conductive layer. The positive electrode of the heterojunction solar cell is applied on the top surface of the Nth light-transmitting conductive layer. The light transmittances of the respective light-transmitting conductive layers increase in the direction from the central layer to the positive electrode, i.e., from the first light-transmitting conductive layer to the nth light-transmitting conductive layer. That is, the light transmittance of the first light-transmitting conductive layer is the worst, the light transmittance of the second light-transmitting conductive layer is stronger than that of the first light-transmitting conductive layer, the light transmittance of the third light-transmitting conductive layer is stronger than that of … …, the light transmittance of the nth light-transmitting conductive layer is stronger than that of the N-1 light-transmitting conductive layer, and the light transmittance of the nth light-transmitting conductive layer is the strongest.
The light-transmitting conductive layer on the bottom side of the central layer is similar. The first light-transmitting conductive layer and the second light-transmitting conductive layer … … are also arranged in this order in the direction from the central layer to the back electrode (for example, in the direction from the central layer downward in fig. 1), and the light transmittances from the first light-transmitting conductive layer to the nth light-transmitting conductive layer increase in this order.
Of course, since the light transmission and conductivity of the conductive material are sometimes inversely related, there is a possibility that the conductivity of each light-transmitting conductive layer tends to decrease in the direction from the central layer to the electrode. That is, the light-transmissive conductive layers at the topmost and bottommost portions of the substrate sheet may be slightly less conductive.
More preferably, on the basis of the above, each of the light-transmitting conductive layers may be further arranged such that the refractive index of each of the light-transmitting conductive layers gradually decreases in the direction from the center layer to the electrode. That is, the refractive index and the light transmittance of each light-transmitting conductive layer are inversely related in the direction from the central layer to the electrode. For example, in fig. 1, for each light-transmitting conductive layer on the top side of the N-type amorphous silicon thin film layer, the refractive index of the first light-transmitting conductive layer is the highest, the refractive index of the second light-transmitting conductive layer is the next highest, and the refractive index of the nth light-transmitting conductive layer is the lowest. Such setting can be when light shines solar wafer, and light gathers together gradually, avoids light outwards to give off to get into solar wafer's absorbed layer better, promote solar wafer's availability factor.
In the method, the plurality of light-transmitting conducting layers are processed at the gradually increased processing temperature, so that a lower temperature can be used when the light-transmitting conducting layers tightly attached to the amorphous silicon film layer are processed, and a higher temperature can be used when the remaining light-transmitting conducting layers are processed, so that the process cannot damage PN junctions and cannot influence the passivation effect of the amorphous silicon film layer on the substrate layer; on the other hand, the whole performance of the light-transmitting conductive layer can be ensured because a part of the light-transmitting conductive layer is processed at a higher temperature.
According to the method, the plurality of light-transmitting conductive layers are processed at the incremental processing temperature, so that a lower temperature can be used when the light-transmitting conductive layer tightly attached to the amorphous silicon film layer is processed, and a higher temperature can be used when the remaining light-transmitting conductive layers are processed, and on one hand, the PN junction can not be damaged by the process, the passivation effect of the amorphous silicon film layer on the substrate layer can not be influenced, so that the low carrier recombination rate and the better P-N junction performance can be obtained, the open-circuit voltage and the filling factor of the battery can be improved, and the conversion efficiency of the heterojunction battery piece can be improved; on the other hand, the light-transmitting conductive layer can be partially processed at a higher temperature, so that the overall performance of the light-transmitting conductive layer can be ensured.
The foregoing description of various embodiments of the invention is provided for the purpose of illustration to one of ordinary skill in the relevant art. It is not intended that the invention be limited to a single disclosed embodiment. As mentioned above, many alternatives and modifications of the present invention will be apparent to those skilled in the art of the above teachings. Thus, while some alternative embodiments are specifically described, other embodiments will be apparent to, or relatively easily developed by, those of ordinary skill in the art. The present invention is intended to embrace all such alternatives, modifications and variances of the present invention described herein, as well as other embodiments that fall within the spirit and scope of the present invention as described above.
Claims (15)
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