CN111147183B - Interleaving mapping method and de-interleaving de-mapping method of LDPC code words - Google Patents
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Abstract
An interleaving mapping method and a de-interleaving de-mapping method of LDPC code words comprise the steps of carrying out first bit interleaving on a check part in the LDPC code words to obtain check bit streams; splicing an information bit part in the LDPC code word and a check bit stream into the LDPC code word after first bit interleaving; dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to the corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving; writing the LDPC code words subjected to the second bit interleaving into a storage space according to a column sequence and reading the LDPC code words from the storage space according to a row sequence to obtain the LDPC code words subjected to the third bit interleaving; and performing constellation mapping on the LDPC code words subjected to the third time bit interleaving according to a constellation diagram to obtain a symbol stream. The interleaving mapping and de-interleaving de-mapping methods are selected according to different LDPC code tables, so that the system performance is better improved.
Description
Technical Field
The invention relates to the technical field of digital televisions, in particular to an interleaving mapping method and a de-interleaving de-mapping method for LDPC code words.
Background
In the existing broadcast communication standard, LDPC coding, bit interleaving and constellation mapping are the most common coding modulation methods. In different transmission systems, LDPC coding, bit interleaving and constellation mapping all need to be designed separately and debugged jointly to achieve the best channel performance. Therefore, how to form targeted bit interleaving for a specific LDPC codeword and constellation mapping is a technical problem in the art.
Disclosure of Invention
The problem to be solved by the invention is that in the prior art, targeted bit interleaving cannot be formed aiming at a specific LDPC code word and a constellation mapping mode.
In order to solve the above problem, an embodiment of the present invention provides an interleaving and mapping method for LDPC codewords, including the following steps: carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream; splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving; dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving; writing the LDPC code words after the second bit interleaving into a storage space according to a column sequence and reading the LDPC code words from the storage space according to a row sequence to obtain the LDPC code words after the third bit interleaving; performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding constellation diagram to obtain a symbol stream; wherein the bit swap pattern and the constellation map both correspond to LDPC code tables of different code rates.
The embodiment of the invention also provides a de-interleaving and de-mapping method of the LDPC code word, which comprises the following steps: carrying out soft demapping processing on the symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; the symbol stream soft value data is obtained by the receiving end after the symbol stream obtained by the interleaving and mapping method of the LDPC code word is received by the receiving end and is subjected to fast Fourier transform; writing the bit soft value data into a storage space according to a row sequence and reading the bit soft value data from the storage space according to a column sequence to obtain bit soft value data subjected to first bit de-interleaving; dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving; performing third bit deinterleaving on bit soft value data corresponding to a check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data; splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream; and performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.
Compared with the prior art, the technical scheme of the invention has the following advantages:
and selecting corresponding interleaving mapping and de-interleaving de-mapping methods aiming at different LDPC code tables so as to better improve the system performance.
Drawings
FIG. 1 is a flowchart illustrating an embodiment of an interleaving and mapping method for LDPC code words according to the present invention;
FIG. 2 is a flowchart illustrating a specific embodiment of a method for de-interleaving and de-mapping LDPC code words according to the present invention;
FIG. 3 is a schematic diagram of a first bit interleaving of a check portion in an LDPC codeword to obtain a check bit stream in the LDPC codeword interleaving and mapping method of the present invention;
fig. 4 is a schematic diagram of transforming the arrangement order of the bit sub-blocks according to the bit exchange pattern in the LDPC codeword interleaving and mapping method of the present invention.
Detailed Description
The inventor finds that in the prior art, targeted bit interleaving cannot be formed according to a specific LDPC code word and a constellation mapping mode.
In view of the above problems, the inventors have studied and provided an interleaving mapping method and a de-interleaving de-mapping method for LDPC codewords, and select corresponding interleaving mapping and de-interleaving de-mapping methods for different LDPC code tables to better improve system performance.
In order to make the aforementioned objects, features and advantages of the present invention more comprehensible, embodiments accompanying figures are described in detail below.
In the embodiment of the present invention, the transmitter end is: firstly, inputting a bit stream after source coding into an LDPC coder to code an LDPC code word with a specific code rate code length, then inputting the bit stream into a bit interleaver to perform interleaving processing according to a certain specific bit interleaving pattern method, then performing 16NUC constellation mapping and constellation mapping on data after bit interleaving processing, then performing modulation and emission to experience a channel. The receiver end is: and demodulating the data after passing through the channel, and inputting the demodulated data into a demapping module to perform QPSK demapping. And then inputting the bit soft value information output by the demapping module into a deinterleaving module for deinterleaving, then outputting the bit soft value information to an LDPC decoder, decoding the bit soft value information based on a specific LDPC code word, and finally decoding and outputting a bit stream.
Fig. 1 is a flowchart illustrating an embodiment of an LDPC codeword interleaving and mapping method according to the present invention. Referring to fig. 1, the interleaving mapping method of ldpc codewords includes the steps of:
step S11: carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream;
step S12: splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving;
step S13: dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving;
step S14: writing the LDPC code words after the second bit interleaving into a storage space according to a column sequence and reading the LDPC code words from the storage space according to a row sequence to obtain LDPC code words after the third bit interleaving;
step S15: performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding constellation diagram to obtain a symbol stream; wherein the bit swap pattern and the constellation map both correspond to LDPC code tables of different code rates.
In this embodiment, the step S11 specifically includes the following steps: and writing the check part in the LDPC code word into a storage space according to the column sequence and reading out the check part from the storage space according to the row sequence to obtain a check bit stream.
Specifically, the check portion that generates the LDPC codeword is bit interleaved: the check portion of the LDPC codeword has M bits, and is written into one memory space in columns, Q bits per column, and Q columns, that is, M = Q × Q, and then read out in row order. The specific implementation process is shown in fig. 3.
In step S13, the LDPC codeword after the first bit interleaving is divided into a plurality of consecutive bit sub-blocks according to a predetermined length, where the predetermined length is 360. Further, the arrangement order of the bit sub-blocks is transformed according to the corresponding bit exchange pattern to form the LDPC code word after the second time of bit interleaving. The detailed process is shown in FIG. 4, (m) 0 ,m 1 ,...,m N/360-1 ) Is a bit-swapping pattern for a 360-length bit sub-block.
Specifically, the code length of the LDPC codeword in the LDPC code table is 64800. Different bit exchange patterns are provided for LDPC code words of different code rates.
In this embodiment, for a code rate of 9/15 code table, N ldpc ＝64800q×q＝360×360, Q＝72。
The code table is as follows:
the corresponding bit-swapping pattern is:
72 56 93 45 153 107 157 174 24 75 113 11 31 67 70 34 131 160 145 94 39 99 115 32 90 126 50 127 13 129 55 1 159 138 41 98 146 135 74 91 53 17 3 18 66 175 119 20 27 97 83 61 16 7 103 104 89 73 84 130 57 164 179 88 29 60 161 140 167 49 158 71 122 110 36 35 69 111 21 108 133 123 168 92 26 10 148 155 38 44 65 77 117 86 106 101 141 15 150 124 47 59 96 143 176 8 125 4 64 46 162 25 43 95 112 156 37 6 79 166 22 81 178 139 58 173 121 171 154 0 105 151 14 9 12 30 134 137 136 62 76 87 142 114 102 23 42 78 120 19 68 128 169 165 147 172 80 2 152 40 109 149 163 85 144 100 132 118 82 63 5 51 177 33 170 48 116 28 54 52
it should be noted that, in this embodiment, each numerical value in the bit swap pattern refers to a position of the bit sub-block before bit swap. For example, the first value 7 in the bit swap pattern means that the 8 th bit sub-block which was not bit swapped is now bit swapped into the first bit sub-block.
The corresponding constellation table is:
in step S14, for example, for an LDPC codeword having a code length of 64800 bits (an LDPC codeword after second bit interleaving), the LDPC codeword is written into a storage space in a column order and read out from the storage space in a row order, where 10800 bits per column have six columns.
Then, bit stream data (b) obtained by interleaving the bits is subjected to bit interleaving 0 ,b 1 ,...,b N-1 ) According to a 64NUC constellation diagram, decimal numbers corresponding to every four binary bit sequences are mapped to a certain constellation point to obtain a symbol stream (each complex symbol corresponds to one constellation point). For example, four bits '001100' correspond to decimal number 12, and then correspond to the constellation point of 1.4632+0.2912i in the table, and the constellation point is displayed on the real number axis and the imaginary number axis as real number axis 1.42 and imaginary number axis 0.3408. And then OFDM operation is carried out on the symbol stream in a modulation module, and a carrier is added for transmission.
In this embodiment, the LDPC codeword is obtained by performing a specific LDPC encoding on the source-encoded bit stream, where the specific LDPC encoding can be implemented by using the prior art.
Specifically, the specific LDPC codeword is one of four, which is a subblock size of L × L (L is usually 360), and the code table is as follows:
TABLE 1 code rate 9/15N ldpc ＝64800q×q＝360×360,Q＝72
The coding method comprises the following steps:
splitting a source coded bit stream into information blocks, wherein each information block consists of K information bits and is represented by S = (S) 0 ,s 1 ,...,s K-1 ). According to the specific LDPC encoding in FIG. 1, it is based on S = (S) 0 ,s 1 ,...,s K-1 ) Generating M check bits P = (P) 0 ,p 1 ,...,p M-1 ). I.e. to obtain a code word Λ = (λ) of N bits 0 ,λ 1 ,...,λ N-1 ) Where N = K + M. Λ may in turn be represented as, Λ =(s) 0 ,s 1 ,...,s K-1 ,p 0 ,p 1 ,...,p M-1 )。
The encoding steps are as follows:
1) Initializing lambda i ＝s i ，i＝0,1,...,K-1。p j ＝0，j＝0,1,...,M-1
2) For information bit lambda 0 Accumulating the check bits using the first row number in the code table as the address, taking the code table with code rate 9/15 and code length 64800 as an example in table 1:
3) For the next L-1 information bits, (typically L = 360), λ m M =1, 2.... 1, L-1, each information bit is accumulated with a check bit addressed as y as follows:
y＝{x+(mmod360)×Q}modM
wherein x isAnd λ 0 For the relevant check bit addresses, taking table 1 as an example, x is the number in the first row of the code table:
and wherein
M is the number of check bits and also the number of check matrix rows, and L is the size of the sub-block in the check matrix, typically 360.
Taking the code words of table 1 as an example,
4) For the L-th information bit λ L And accumulating the check bits according to the second row digital address in the code table. Same for the L-th information bit lambda L And accumulating the check bits according to the formula in the step 3) continuously for the next L-1 information bits, wherein x of the formulas in the three steps is the number of the second row in the code table.
5) Similarly, for the 2L, 3L, 4L \8230, iL \8230, information bits, the parity bits are accumulated according to the addresses of the lines 3, 4, 5, \8230, (i + 1) L \8230, respectively, in the code table, and the parity bits are accumulated according to the formula in step 3) for the L-1 information bits after the information bits, respectively, note that at this time, x of the formula in the three steps corresponds to the line in the code table corresponding to the current iL-th information bit, for example, the address of x corresponding to the L-1 bit after the iL-th information bit is the (i + 1) th line in the code table when the formula in step 3) is applied.
6) After the step 5), the following operations are carried out:
The embodiment of the invention also provides a de-interleaving and de-mapping method of the LDPC code words. Fig. 2 is a flowchart illustrating a specific embodiment of a method for de-interleaving and de-mapping LDPC codewords according to the present invention. Referring to fig. 2, the deinterleaving demapping method of the ldpc codeword includes the steps of:
step S21: carrying out soft demapping processing on the symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; the symbol stream soft value data is obtained by the receiving end after the symbol stream obtained by the interleaving and mapping method of the LDPC code words is subjected to fast Fourier transform;
step S22: writing the bit soft value data into a storage space according to a row sequence and reading the bit soft value data from the storage space according to a column sequence to obtain bit soft value data subjected to first bit de-interleaving;
step S23: dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving;
step S24: performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data;
step S25: splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream;
step S26: and performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.
In this embodiment, the step S24 specifically includes: and writing the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving into a storage space in a row sequence and reading out the bit soft value data from the storage space in a column sequence to obtain the bit soft value data subjected to the third bit deinterleaving.
Although the present invention has been described with reference to the preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make possible variations and modifications of the present invention using the method and the technical contents disclosed above without departing from the spirit and scope of the present invention, and therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention are all within the scope of the present invention.
Claims (3)
1. An interleaving mapping method for LDPC code words is characterized by comprising the following steps:
carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream;
splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving;
dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving;
writing the LDPC code words after the second bit interleaving into a storage space according to a column sequence and reading the LDPC code words from the storage space according to a row sequence to obtain LDPC code words after the third bit interleaving;
performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding constellation diagram to obtain a symbol stream; wherein the bit swap pattern and the constellation map both correspond to LDPC code tables of different code rates;
performing first bit interleaving on a check part in the LDPC codeword to obtain a check bit stream includes:
writing check parts in the LDPC code words into a storage space in a column sequence and reading out the check parts from the storage space in a row sequence to obtain check bit streams;
the predetermined length is 360 bits;
the code length of the LDPC code words in the LDPC code table is 64800 bits, and the code rate is 9/15; the code table is as follows:
the corresponding bit-swapping pattern is:
72 56 93 45 153 107 157 174 24 75 113 11 31 67 70 34 131 160 145 94 39 99 115 32 90 126 50 127 13 129 55 1 159 138 41 98 146 135 74 91 53 17 3 18 66 175 119 20 27 97 83 61 16 7 103 104 89 73 84 130 57 164 179 88 29 60 161 140 167 49 158 71 122 110 36 35 69 111 21 108 133 123 168 92 26 10 148 155 38 44 65 77 117 86 106 101 141 15 150 124 47 59 96 143 176 8 125 4 64 46 162 25 43 95 112 156 37 6 79 166 22 81 178 139 58 173 121 171 1 54 0 105 151 14 9 12 30 134 137 136 62 76 87 142 114 102 23 42 78 120 19 68 128 169 165 147 172 80 2 152 40 109 149 163 85 144 100 132 118 82 63 5 51 177 33 170 48 116 28 54 52
the corresponding constellation diagram is:
2. a method for de-interleaving and de-mapping LDPC code words is characterized by comprising the following steps:
carrying out soft demapping processing on the symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; wherein the symbol stream soft value data is obtained by fast Fourier transform of a symbol stream obtained by a receiving end by receiving the LDPC code word interleaving mapping method according to claim 1;
writing the bit soft value data into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain bit soft value data subjected to bit de-interleaving for the first time;
dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving;
performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data;
splicing the part of the bit soft value data subjected to the second bit deinterleaving, which is not subjected to the third bit deinterleaving, and the bit soft value data subjected to the third bit deinterleaving into a bit soft value data stream;
and performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.
3. The method for de-interleaving and de-mapping the LDPC codeword according to claim 2, wherein the third bit de-interleaving the bit soft value data corresponding to the check part in the LDPC codeword in the bit soft value data after the second bit de-interleaving to obtain the third bit de-interleaved bit soft value data comprises:
and writing the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain the bit soft value data subjected to the third bit deinterleaving.
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| CN107147474A (en) * | 2014-08-13 | 2017-09-08 | 上海数字电视国家工程研究中心有限公司 | The intertexture mapping method and deinterleaving de-mapping method of LDPC code word |
| CN105450333A (en) * | 2014-08-19 | 2016-03-30 | 上海数字电视国家工程研究中心有限公司 | Interleaving mapping method and de-interleaving de-mapping method for LDPC code words |
| CN107276718A (en) * | 2014-08-29 | 2017-10-20 | 上海数字电视国家工程研究中心有限公司 | The intertexture mapping method and deinterleaving de-mapping method of LDPC code word |
| CN107302418A (en) * | 2014-08-29 | 2017-10-27 | 上海数字电视国家工程研究中心有限公司 | The intertexture mapping method and deinterleaving de-mapping method of LDPC code word |
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