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CN111060848B - Semiconducting buffer layer electrical test circuit, evaluation method and processing terminal - Google Patents

Semiconducting buffer layer electrical test circuit, evaluation method and processing terminal Download PDF

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Publication number
CN111060848B
CN111060848B CN201911406771.XA CN201911406771A CN111060848B CN 111060848 B CN111060848 B CN 111060848B CN 201911406771 A CN201911406771 A CN 201911406771A CN 111060848 B CN111060848 B CN 111060848B
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buffer layer
voltage
test
tested
cable
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CN111060848A (en
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徐晓峰
夏俊峰
施楠楠
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Shanghai Electric Cable Research Institute
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Shanghai Electric Cable Research Institute
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Abstract

The invention provides a semi-conductive buffer layer electric test circuit, an evaluation method and a processing terminal, wherein the semi-conductive buffer layer electric test circuit comprises a high-voltage ring, a high-voltage circuit and a high-voltage circuit, wherein the high-voltage circuit is clung to an insulating shielding layer of a cable section to be tested and is in short circuit with a conductor of the cable section to be tested; the cable testing device comprises a cable section to be tested, a shielding ring, a semi-conductive buffer layer, a direct current source assembly and a metal sleeve, wherein the semi-conductive buffer layer is clung to the cable section to be tested, the high voltage pole of the direct current source assembly is connected with the high voltage ring, the low voltage pole of the direct current source assembly is connected with the shielding ring and the metal sleeve of the cable, and the semi-conductive buffer layer is arranged on two sides of the insulating shielding layer. The method can effectively solve the limitations and the defects of the existing strip test and the whole high-voltage electrical test method of the cable, comprehensively reflect factors such as the buffer strip, the wrapping structure, the aluminum sleeve gap and the like, effectively evaluate the material characteristics, the structural characteristics and the electrical contact characteristics of the buffer layer, and provide method support for the test and evaluation of the buffer layer of the high-voltage cable finished product, thereby promoting the improvement of the reliability during the service life of the high-voltage cable system.

Description

Semi-conductive buffer layer electrical test circuit, evaluation method and processing terminal
Technical Field
The invention belongs to the technical field of cable testing, relates to a circuit and a method, and particularly relates to a semi-conductive buffer layer electrical test circuit, an evaluation method and a processing terminal.
Background
The 66kV and above high-voltage power cable basically adopts a metal sleeve shielding structure, and a semiconductive buffer layer is positioned between the extruded insulating wire core and the metal sleeve and is manufactured through a wrapping process. The semiconductive buffer layer is used as a component unit for transition from high potential to ground potential and transition from insulation to metal grounding in the cable, so that the axial continuous effective grounding of the insulated wire core is realized. Considering the effects of moisture in the installation environment, it is often desirable for the buffer layer to have longitudinal water blocking properties.
At present, the metal sleeve is mostly in the form of an extruded or welded corrugated aluminum sleeve. The corrugated aluminum sleeve and the buffer layer are in interval local contact, if the links such as material selection, design, production or application of the buffer layer are improperly controlled, the semiconducting buffer strip performance of the high-voltage power cable, the wrapping process of the buffer layer, the gap design in the corrugated aluminum sleeve, the invasion of moisture in operation and other adverse factors can all cause poor grounding of the insulated wire core, the situation that the capacitive current and the leakage current of the insulated wire core are locally concentrated in the radial direction and the axial direction in operation can not be distributed and discharged in a dispersed manner through the buffer layer is directly reflected, electrochemical reaction occurs between the buffer material and an interface, the aluminum sleeve is corroded, even the insulation shielding is carried out, and under the action of high voltage and possible overvoltage in the circuit during operation, the buffer layer is subjected to local discharge and electric erosion until main insulation is damaged, and breakdown fault is caused. This has become a difficulty and pain in the improved design of high voltage power cable metal jackets, which presents challenges for high quality manufacturing and high reliability operation.
At present, the evaluation of the buffer layer is mainly carried out by 1) testing the resistance level of the buffer strip but cannot reflect the influence of a wrapping process, a gap between the buffer layer and an aluminum sleeve on the electrical transition performance, and 2) carrying out high-voltage electrical tests on cable finished products before delivery or before line operation, including a power frequency withstand voltage test and a partial discharge test, mainly checking the state of an insulation system, but cannot identify and reflect the transition and grounding performance conditions of the buffer layer of each section of cable.
Therefore, how to provide a test circuit, an evaluation method and a processing terminal for the semi-conductive buffer layer to solve the defects that the buffer layer transition and the grounding performance conditions of each section of cable cannot be identified and reflected in the prior art, and the cable is irreversibly degraded, etc. is a technical problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an objective of the present invention is to provide a testing circuit/evaluation method and a processing terminal for semi-conductive buffer layer, which are used for solving the problem that the prior art cannot identify and reflect buffer layer transition and grounding performance conditions of each section of cable, resulting in irreversible degradation of the cable.
In order to achieve the above and other related objects, the invention provides a semi-conductive buffer layer electric test circuit applied to a cable section to be tested, which comprises a high-voltage ring, a shielding ring, a direct current source assembly, a low-voltage electrode and a metal sleeve, wherein the high-voltage ring is clung to an insulating shielding layer of the cable section to be tested and is in short circuit with a conductor of the cable section to be tested, the shielding ring is clung to the semi-conductive buffer layer of the cable section to be tested, the high-voltage electrode of the direct current source assembly is connected with the high-voltage ring, and the low-voltage electrode of the direct current source assembly is connected with the shielding ring and the metal sleeve of the cable, and the semi-conductive buffer layer is arranged on two sides of the insulating shielding layer.
In an embodiment of the invention, one end of a direct current ammeter of the direct current source component is connected with the surface of the metal sleeve exposed out of the cable section to be tested, and the other end of the ammeter is grounded.
In an embodiment of the invention, a width of the shielding ring is set between 5mm and 15 mm.
In an embodiment of the present invention, a distance between the inner edge of the shielding ring and the outer edge of the surface of the metal sleeve, and the outer sheath is set to be between 5mm and 15 mm.
In an embodiment of the invention, a low voltage pole of the dc source component is grounded.
In an embodiment of the invention, a width of the high-voltage ring is set between 1mm and 5mm.
In an embodiment of the invention, a distance between the high voltage ring and an outer edge of the insulating shielding layer is between 1mm and 5mm.
The invention further provides an electrical evaluation method of the semi-conductive buffer layer, which is characterized by being used for evaluating performance parameters of the semi-conductive buffer layer based on an electrical test circuit of the semi-conductive buffer layer, wherein the electrical test circuit of the semi-conductive buffer layer comprises an insulating shielding layer, semi-conductive buffer layers arranged on two sides of the insulating shielding layer, a high-voltage ring clung to the insulating shielding layer and a shielding ring clung to the semi-conductive buffer layers, the electrical evaluation method of the semi-conductive buffer layer comprises the steps of obtaining circuit test parameters generated in the electrical test circuit of the semi-conductive buffer layer under at least three test environments of a cable section to be tested, and calculating the performance parameters of the semi-conductive buffer layer under a radial direct current loop according to the circuit test parameters generated under the at least three test environments of the cable section to be tested and according to a preset performance evaluation mode of the semi-conductive buffer layer.
In one embodiment of the present invention, the three test environments include an indoor air environment, an oven environment, and a constant temperature and humidity box environment.
In an embodiment of the invention, the performance parameter of the semiconductive buffer layer includes an equivalent line resistance and/or an equivalent plane resistance of the semiconductive buffer layer, and the performance evaluation mode of the semiconductive buffer layer includes an evaluation mode of the equivalent line resistance of the semiconductive buffer layer and an evaluation mode of the equivalent plane resistance of the semiconductive buffer layer.
A final aspect of the present invention provides a processing terminal=comprising a processor and a memory, the memory being configured to store a computer program, the processor being configured to execute the computer program stored by the memory, to cause the processing terminal to execute the method of evaluating the semi-conductive buffer layer electrical.
As described above, the electrical test circuit/evaluation method and the processing terminal for the semiconductive buffer layer of the present invention have the following advantages:
The electrical testing circuit/evaluating method and the processing terminal of the semi-conductive buffer layer can effectively solve the limitations and the disadvantages of the existing strip testing and overall high-voltage electrical testing method of the cable aiming at the electrical characteristics and the structural characteristics of the semi-conductive buffer layer of the high-voltage power cable, comprehensively reflect factors such as the buffer strip, the wrapping structure, the aluminum sleeve gap and the like, effectively evaluate the material characteristics, the structural characteristics and the electrical contact characteristics of the buffer layer, provide support for strip selection, product design and process design, and provide method support for the test and evaluation of the buffer layer of the finished product of the high-voltage cable, thereby promoting the improvement of the reliability of the high-voltage cable system in the service life period.
Drawings
Fig. 1 shows a schematic structural connection of a test circuit according to the invention for an electrical semiconductive buffer layer built for a cable segment to be tested.
FIG. 2 is a flow chart illustrating a method for evaluating the electrical properties of a semiconductor buffer layer in one embodiment.
Description of element reference numerals
1 Test circuit for semi-conductive buffer layer
10 DC source assembly
11 Conductor
12 Insulating shielding layer
13 High-voltage ring
14 Semiconductive buffer layer
15 Shielding ring
16 Metal sleeve
17 Outer sheath
S21~S22 Step (a)
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
Example 1
The embodiment provides a semi-conductive buffer layer electric test circuit which is applied to a cable section to be tested, wherein the semi-conductive buffer layer electric test circuit to be tested comprises:
A high-voltage ring which is closely attached to the insulating shielding layer of the cable section to be tested and is in short circuit with the conductor of the cable section to be tested;
a shielding ring attached to the semiconductive buffer layer of the cable section to be tested;
The high-voltage pole of the direct-current source assembly is connected with the high-voltage ring, and the low-voltage pole of the direct-current source assembly is connected with the shielding ring and the metal sleeve of the cable;
the semi-conductive buffer layers are arranged on two sides of the insulating shielding layer.
The test circuit for electrically testing the semiconductive buffer layer provided in this embodiment will be described in detail with reference to the drawings. The electrical test circuit for the semiconductive buffer layer according to the embodiment is used for testing a cable section to be tested so as to obtain circuit test parameters generated by the test circuit under a radial direct current loop.
The cable segment is pre-treated prior to performing the test to form a cable segment to be tested. The pretreatment process of the cable segment comprises the following steps:
The cable section is selected by taking cable samples from finished products produced continuously, the total length (L S) of the selected cable section is generally not more than 1.5m, and longer cables can be selected according to actual requirements. For straight samples, the flatness is generally not more than 5L S per mill, and for curved samples, the flatness is set according to the specific bending radius requirement.
And (3) processing the cable section, namely cutting and stripping the end part of the cable section layer by layer from outside to inside. The metal sleeve (wrinkled aluminum sleeve) and the outer sheath can be combined and cut, and the stripping length is generally not less than 100mm. The portion of the semiconductive buffer tape outside the end core is stripped, and the length of the remaining buffer tape from the edge of the cladding to the edge of the corrugated aluminum sheath is generally not less than 50mm. And stripping a section of nonmetallic sheath at the middle part of the cable section, and cleaning attachments on the surface of the exposed aluminum sheath.
The cable section is tested immediately after being treated, and if the cable section stays for more than 4 hours, the surface of the section of the cable stripping sheath is required to be wrapped by a plastic film.
The electrical test circuit of the semiconductive buffer layer in the embodiment aims at the electrical characteristics and the structural characteristics of the semiconductive buffer layer of the high-voltage power cable, and effectively solves the limitations and the disadvantages of the existing strip test and the whole high-voltage electrical test method of the cable
Referring to fig. 1, a schematic diagram of structural connection of a test circuit for electrically testing a semiconductive buffer layer built for a cable segment to be tested is shown. As shown in fig. 1, the test circuit 1 for electrically testing the semi-conductive buffer layer includes a dc source assembly 10, a conductor 11, an insulating shielding layer 12, a high voltage ring 13, a semi-conductive buffer layer 14, a shielding ring 15, a metal sleeve 16 and an outer sheath 17.
In this embodiment, the dc source assembly 10 includes a dc voltmeter and a dc ammeter. Specifically, the high voltage pole of the dc source assembly 10 is connected to the high voltage ring 13, that is, the dc voltmeter in the dc source assembly 10 is connected to the high voltage ring 13. The low voltage pole of the dc source assembly 10 is connected to the shielding ring 15 and the metal sheath 16 of the cable, and the low voltage pole of the dc source assembly 10 is grounded. In the present embodiment, the accuracy of the dc voltmeter of the dc source assembly 10 is not lower than ±0.5%.
One end of a direct current ammeter of the direct current source assembly 10 is connected with the surface of a metal sleeve 16 (in this embodiment, the metal sleeve 16 is specifically a corrugated aluminum sleeve) exposed out of the cable section to be tested, and the other end of the ammeter is grounded. The accuracy of the dc ammeter of the dc source assembly 10 is not less than ±0.5%.
In this embodiment, the conductor 11 is surrounded by the insulating shield 12. Connection of the conductor 11 to the dc source assembly 10.
As shown in fig. 1, a high voltage ring 13 is disposed on the insulating shielding layer 12. Wherein the high voltage ring 13 is shorted to the conductor 11 of the cable segment to be tested. In this embodiment, the width of the high-voltage ring 13 is set between 1mm and 5 mm. The distance between the high-voltage ring 13 and the outer edge of the insulating shielding layer 12 is 1 mm-5 mm.
The semiconductive buffer layer 14 is disposed on both sides of the insulating shield layer 12 as shown in fig. 1.
With continued reference to fig. 1, the shield ring 15 is positioned against the semiconductive buffer layer 14 of the cable segment to be tested. In this embodiment, the width of the shielding ring 15 is set between 5mm and 15 mm. The distance between the inner edge of the shielding ring 15 and the outer edge of the surface of the metal sleeve and the outer sheath is set to be 5 mm-15 mm. In this embodiment, the high voltage ring 13 and the shielding ring 15 can control the test stability, i.e. reduce the influence of the leakage current on the test stability.
And placing the cable section to be tested on an insulating pad, measuring the distance L between the corrugated aluminum sleeve edges at two sides, and measuring the outer diameter D of the insulating wire core. And placing the cable section to be tested in at least three test environments, such as an indoor air environment, an oven environment and a constant temperature and humidity box environment according to requirements, and setting meters for measuring the environmental temperature and humidity.
Specifically, the cable section to be tested is placed in the indoor air environment, namely the cable section to be tested is placed in indoor air for not less than 2 hours, the air temperature is a preset value between 15 ℃ and 25 ℃, the air humidity is not more than 50%, the air temperature and humidity test period is kept stable, the temperature change is not more than +/-1 ℃, and the humidity change is not more than +/-2%.
After the temperature and humidity of the cable section to be tested are stable, starting an electric test circuit of the semi-conductive buffer layer built for the cable section to be tested, slowly applying direct current voltage, wherein the voltage rising rate is a preset voltage rising rate threshold value between 0.5mV/s and 50mV/s, the direct current voltage rises to be between 0.5V and 5V and the preset direct current voltage threshold value, the current rises synchronously and slowly, and the current fluctuation after the stabilization is within +/-10%. The direct current voltage rises to a specified value and is stable for not less than 10s, and then the voltage value V 1 and the corresponding current value I 1 of the voltmeter are read every other period, wherein the period is between 1s and 5 s.
Placing the cable section to be tested in the oven environment means that the cable section to be tested is placed in the oven for not less than 2 hours, the temperature of the oven is a preset value between 50 ℃ and 80 ℃, the temperature is kept stable during the test in the oven, and the temperature change is not more than +/-1 ℃.
After the temperature and humidity of the cable section to be tested are stable, starting an electric test circuit of the semi-conductive buffer layer built for the cable section to be tested, slowly applying direct current voltage, wherein the voltage rising rate is a preset voltage rising rate threshold value between 0.5mV/s and 50mV/s, the direct current voltage rises to a preset direct current voltage threshold value between 0.5V and 5V, the current rises synchronously and slowly, and the current fluctuation after stabilization is within +/-10%. The direct current voltage rises to a specified value and is stable for not less than 10s, and then the voltage value V 2 and the corresponding current value I 2 of the voltmeter are read every other period, wherein the period is between 1s and 5 s.
Placing the cable section to be tested in the constant temperature and humidity box environment means that the cable section to be tested is placed in the constant temperature and humidity box for not less than 2 hours, the temperature of the constant temperature and humidity box is a preset temperature value between 50 ℃ and 80 ℃, the humidity of the constant temperature and humidity box is a preset humidity value between 60% and 90%, the temperature and the humidity in an oven are kept stable during the test, the temperature change is not more than +/-1 ℃, and the humidity change is not more than +/-1%.
After the temperature and humidity of the cable section to be tested are stable, starting an electric test circuit of the semi-conductive buffer layer built for the cable section to be tested, slowly applying direct current voltage, wherein the voltage rising rate is a preset voltage rising rate threshold value between 0.5mV/s and 50mV/s, the direct current voltage rises to a preset direct current voltage threshold value between 0.5V and 5V, the current rises synchronously and slowly, and the current fluctuation after stabilization is within +/-10%. The direct current voltage rises to a specified value and is stable for not less than 10s, and then the voltage value V 3 and the corresponding current value I 3 of the voltmeter are read every other period, wherein the period is between 1s and 5 s.
The embodiment also provides an evaluation method of the semi-conductive buffer layer electricity, which is used for evaluating the performance parameters of the semi-conductive buffer layer based on the test circuit of the semi-conductive buffer layer electricity. The test circuit for the electric semi-conductive buffer layer comprises an insulating shielding layer, semi-conductive buffer layers arranged on two sides of the insulating shielding layer, a high-voltage ring clung to the insulating shielding layer and a shielding ring clung to the semi-conductive buffer layer, wherein the evaluation method for the electric semi-conductive buffer layer comprises the following steps:
acquiring circuit test parameters generated in the electrical test circuit of the semi-conductive buffer layer of the cable section to be tested under at least three test environments;
According to the circuit test parameters generated by the cable section to be tested in at least three test environments and according to a performance evaluation mode of a preset semiconductive buffer layer, calculating the performance parameters of the semiconductive buffer layer under a radial direct current loop.
The method for evaluating the electrical properties of the semiconductive buffer layer provided in this embodiment will be described in detail below with reference to the drawings. The method for evaluating the electrical property of the semi-conductive buffer layer evaluates the performance parameters of the semi-conductive buffer layer based on the test circuit of the electrical property of the semi-conductive buffer layer.
Referring to fig. 2, a flow chart of a method for evaluating the electrical properties of a semiconductor buffer layer is shown in an embodiment. As shown in fig. 2, the electrical evaluation method of the semiconductive buffer layer specifically includes the following steps:
S21, obtaining circuit test parameters generated in the electrical test circuit of the semi-conductive buffer layer of the cable section to be tested under at least three test environments, the spacing L between the two sides of the corrugated aluminum sleeve edges and the outer diameter D of the insulated wire core.
In this embodiment, the three test environments include an indoor air environment, an oven environment, and a constant temperature and humidity cabinet environment.
In this embodiment, a voltage value V1 and a corresponding current value I1 generated in the electrical testing circuit of the semiconductive buffer layer of the cable section to be tested in the indoor air environment are obtained;
acquiring a voltage value V2 and a corresponding current value I2 generated in a test circuit of the semi-conductive buffer layer under the oven environment of a cable section to be tested;
And acquiring a voltage value V3 and a corresponding current value I3 generated in the electric test circuit of the semi-conductive buffer layer of the cable section to be tested in the environment of the constant temperature and humidity box.
S22, calculating the performance parameters of the semi-conductive buffer layer under a radial direct current loop according to the circuit test parameters generated by the cable section to be tested under at least three test environments and the performance evaluation mode of the pre-set semi-conductive buffer layer.
In this embodiment, the performance parameters of the semiconductive buffer layer include the equivalent line resistance (R L, Ω -m) and/or the equivalent plane resistance (R S,Ω·mm2) of the semiconductive buffer layer.
The performance evaluation mode of the preset semiconductive buffer layer comprises an evaluation mode of equivalent line resistance of the semiconductive buffer layer and an evaluation mode of equivalent plane resistance of the semiconductive buffer layer.
Specifically, the evaluation mode of the equivalent line resistance of the semiconductive buffer layer is:
RL=L((V1/I1)+(V2/I2)+(V3/I3,))/3;
evaluation mode of equivalent area resistance of semiconductive buffer layer:
RS=πDL((V1/I1)+(V2/I2)+(V3/I3))/3;
Wherein L is the interval between the two sides of the corrugated aluminum sleeve edges, and D is the outer diameter of the insulated wire core.
The protection scope of the electrical evaluation method for the semi-conductive buffer layer is not limited to the execution sequence of the steps listed in the embodiment, and all the schemes of step increase and decrease and step replacement in the prior art according to the principles of the present invention are included in the protection scope of the present invention.
The test circuit and the evaluation method of the semi-conductive buffer layer electrical aim at the electrical characteristics and the structural characteristics of the semi-conductive buffer layer of the high-voltage power cable, can effectively solve the limitations and the defects of the existing strip test and cable integral high-voltage electrical test method, comprehensively reflect factors such as a buffer strip, a wrapping structure, an aluminum sleeve gap and the like, effectively evaluate the material characteristics, the structural characteristics and the electrical contact characteristics of the buffer layer, provide support for strip selection, product design and process design, and provide method support for the test and evaluation of the buffer layer of a high-voltage cable finished product, thereby promoting the improvement of the reliability during the service life of the high-voltage cable system.
Example two
The embodiment provides a processing terminal which comprises a processor, a memory, a transceiver, a communication interface or/and a system bus, wherein the memory and the communication interface are connected with the processor and the transceiver through the system bus and complete communication with each other, the memory is used for storing a computer program, the communication interface is used for communicating with other devices, and the processor and the transceiver are used for running the computer program so that the processing terminal can execute the steps of the semi-conductive buffer layer electrical evaluation method.
The system bus mentioned above may be a peripheral component interconnect standard (PERIPHERAL COMPONENT INTERCONNECT, PCI) bus or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, or the like. The system bus may be classified into an address bus, a data bus, a control bus, and the like. For ease of illustration, the figures are shown with only one bold line, but not with only one bus or one type of bus. The communication interface is used for realizing communication between the database access device and other devices (such as a client, a read-write library and a read-only library). The memory may include random access memory (Random Access Memory, RAM) and may also include non-volatile memory (non-volatile memory), such as at least one disk memory.
The processor may be a general-purpose processor, including a central Processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), a digital signal processor (DIGITAL SIGNAL Processing, DSP), an Application Specific Integrated Circuit (ASIC), a field programmable gate array (Field Programmable GATE ARRAY, FPGA), a programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component.
In summary, the electrical testing circuit/evaluating method and the processing terminal of the semi-conductive buffer layer can effectively solve the limitations and the disadvantages of the existing strip testing and overall high-voltage electrical testing methods of the cable aiming at the electrical characteristics and the structural characteristics of the semi-conductive buffer layer of the high-voltage power cable, comprehensively reflect factors such as the buffer strip, the wrapping structure, the aluminum sleeve gap and the like, effectively evaluate the material characteristics, the structural characteristics and the electrical contact characteristics of the buffer layer, provide support for strip selection, product design and process design, and provide method support for the inspection and evaluation of the buffer layer of the high-voltage cable finished product, thereby promoting the improvement of the reliability during the service life of the high-voltage cable system. The invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims (11)

1.一种半导电缓冲层电气的测试电路,其特征在于,应用于待测试电缆段;所述待测试所述半导电缓冲层电气测试电路包括:1. A semi-conductive buffer layer electrical test circuit, characterized in that it is applied to a cable segment to be tested; the semi-conductive buffer layer electrical test circuit to be tested comprises: 高压环,紧贴所述待测试电缆段的绝缘屏蔽层,且与所述待测试电缆段的导体短接;A high voltage ring, which is in close contact with the insulating shielding layer of the cable segment to be tested and is short-circuited with the conductor of the cable segment to be tested; 屏蔽环,紧贴所述待测试电缆段的半导电缓冲层;A shielding ring, closely attached to the semi-conductive buffer layer of the cable segment to be tested; 直流源组件,所述直流源组件的高压极与所述高压环连接,所述直流源组件的低压极与所述屏蔽环及电缆的金属套连接;A DC source component, wherein the high voltage pole of the DC source component is connected to the high voltage ring, and the low voltage pole of the DC source component is connected to the shielding ring and the metal sleeve of the cable; 其中,所述半导电缓冲层设置于所述绝缘屏蔽层的两侧;通过获取待测试电缆段在至少三种测试环境下所述半导电缓冲层电气的测试电路中产生的电路试验参数;根据待测试电缆段在至少三种测试环境下产生的所述电路试验参数,按照预设半导电缓冲层的性能评估方式,计算在径向直流回路下所述半导电缓冲层的性能参数;所述试验参数为测试电路中产生的电压值及对应的电流值;所述半导电缓冲层的性能参数包括半导电缓冲层的等效线电阻和/或等效面电阻。Wherein, the semiconductive buffer layer is arranged on both sides of the insulating shielding layer; by obtaining the circuit test parameters generated in the electrical test circuit of the semiconductive buffer layer of the cable segment to be tested under at least three test environments; according to the circuit test parameters generated by the cable segment to be tested under at least three test environments, according to the preset performance evaluation method of the semiconductive buffer layer, the performance parameters of the semiconductive buffer layer under the radial DC circuit are calculated; the test parameters are the voltage values and the corresponding current values generated in the test circuit; the performance parameters of the semiconductive buffer layer include the equivalent line resistance and/or equivalent surface resistance of the semiconductive buffer layer. 2.根据权利要求1所述的半导电缓冲层电气的测试电路,其特征在于,所述直流源组件的直流电流表一端与所述待测试电缆段外露的金属套表面连接;所述电流表的另一端接地。2. The electrical test circuit for the semi-conductive buffer layer according to claim 1 is characterized in that one end of the DC ammeter of the DC source component is connected to the exposed metal sheath surface of the cable segment to be tested; and the other end of the ammeter is grounded. 3.根据权利要求2所述的半导电缓冲层电气的测试电路,其特征在于,所述屏蔽环的宽度设置在5mm~15mm之间。3 . The electrical test circuit for the semiconductive buffer layer according to claim 2 , wherein the width of the shielding ring is set between 5 mm and 15 mm. 4.根据权利要求3所述的半导电缓冲层电气的测试电路,其特征在于,所述屏蔽环的内缘与所述金属套表面外缘,外护套之间的距离设置5mm~15mm之间。4. The electrical test circuit of the semiconductive buffer layer according to claim 3, characterized in that the distance between the inner edge of the shielding ring and the outer edge of the metal sleeve surface and the outer sheath is set between 5 mm and 15 mm. 5.根据权利要求1所述的半导电缓冲层电气的测试电路,其特征在于,所述直流源组件的低压极接地。5 . The electrical test circuit for the semiconductive buffer layer according to claim 1 , wherein the low voltage pole of the DC source component is grounded. 6.根据权利要求1所述的半导电缓冲层电气的测试电路,其特征在于,所述高压环的宽度设置在1mm~5mm之间。6 . The electrical test circuit for the semiconductive buffer layer according to claim 1 , wherein the width of the high voltage ring is set between 1 mm and 5 mm. 7.根据权利要求6所述的半导电缓冲层电气的测试电路,其特征在于,所述高压环与所述绝缘屏蔽层外缘的距离设置在1mm~5mm之间。7 . The electrical test circuit of the semiconductive buffer layer according to claim 6 , wherein the distance between the high voltage ring and the outer edge of the insulating shielding layer is set between 1 mm and 5 mm. 8.一种半导电缓冲层电气的评估方法,其特征在于,用于基于一半导电缓冲层电气的测试电路评估半导电缓冲层的性能参数;所述半导电缓冲层电气的测试电路包括绝缘屏蔽层、设置于所述绝缘屏蔽层的两侧的半导电缓冲层、紧贴绝缘屏蔽层的高压环、紧贴所述半导电缓冲层的屏蔽环及直流源组件,所述直流源组件的高压极与所述高压环连接,所述直流源组件的低压极与所述屏蔽环及电缆的金属套连接;所述半导电缓冲层电气的评估方法包括:8. A method for evaluating the electrical properties of a semiconductive buffer layer, characterized in that it is used to evaluate the performance parameters of the semiconductive buffer layer based on a test circuit for the electrical properties of the semiconductive buffer layer; the test circuit for the electrical properties of the semiconductive buffer layer comprises an insulating shielding layer, a semiconductive buffer layer disposed on both sides of the insulating shielding layer, a high-voltage ring close to the insulating shielding layer, a shielding ring close to the semiconductive buffer layer and a DC source component, wherein the high-voltage pole of the DC source component is connected to the high-voltage ring, and the low-voltage pole of the DC source component is connected to the shielding ring and a metal sleeve of a cable; the method for evaluating the electrical properties of the semiconductive buffer layer comprises: 获取待测试电缆段在至少三种测试环境下所述半导电缓冲层电气的测试电路中产生的电路试验参数;Obtaining circuit test parameters generated in a test circuit of the semiconductive buffer layer of the cable segment to be tested under at least three test environments; 根据待测试电缆段在至少三种测试环境下产生的所述电路试验参数,按照预设半导电缓冲层的性能评估方式,计算在径向直流回路下所述半导电缓冲层的性能参数;所述试验参数为测试电路中产生的电压值及对应的电流值;所述半导电缓冲层的性能参数包括半导电缓冲层的等效线电阻和/或等效面电阻。According to the circuit test parameters generated by the cable segment to be tested under at least three test environments, the performance parameters of the semiconductive buffer layer in the radial DC circuit are calculated according to a preset performance evaluation method of the semiconductive buffer layer; the test parameters are the voltage value and the corresponding current value generated in the test circuit; the performance parameters of the semiconductive buffer layer include the equivalent line resistance and/or equivalent surface resistance of the semiconductive buffer layer. 9.根据权利要求8所述的半导电缓冲层电气的评估方法,其特征在于,9. The method for evaluating the electrical properties of a semiconducting buffer layer according to claim 8, characterized in that: 所述三种测试环境包括室内空气环境、烘箱环境及恒温恒湿箱环境。The three test environments include indoor air environment, oven environment and constant temperature and humidity chamber environment. 10.根据权利要求8所述的半导电缓冲层电气的评估方法,其特征在于,10. The method for evaluating the electrical properties of a semiconducting buffer layer according to claim 8, characterized in that: 所述预设半导电缓冲层的性能评估方式包括半导电缓冲层的等效线电阻的评估方式和半导电缓冲层的等效面电阻的评估方式。The performance evaluation method of the preset semiconductive buffer layer includes an evaluation method of the equivalent line resistance of the semiconductive buffer layer and an evaluation method of the equivalent surface resistance of the semiconductive buffer layer. 11.一种处理终端,其特征在于,包括:处理器及存储器;11. A processing terminal, comprising: a processor and a memory; 所述存储器用于存储计算机程序,所述处理器用于执行所述存储器存储的计算机程序,以使所述处理终端执行如权利要求8至10中任一项所述半导电缓冲层电气的评估方法。The memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory, so that the processing terminal executes the method for evaluating the electrical properties of a semiconductive buffer layer according to any one of claims 8 to 10.
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