CN111028780A - Pixel compensation circuit of AMOLED - Google Patents
Pixel compensation circuit of AMOLED Download PDFInfo
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- CN111028780A CN111028780A CN201911232428.8A CN201911232428A CN111028780A CN 111028780 A CN111028780 A CN 111028780A CN 201911232428 A CN201911232428 A CN 201911232428A CN 111028780 A CN111028780 A CN 111028780A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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Abstract
The invention provides a pixel compensation circuit. The pixel compensation circuit comprises seven switches, a storage capacitor, an organic light emitting diode, four signal sources and three input voltages. The time sequence of the four signal sources can be divided into an initial stage, a programming stage and a light-emitting stage in sequence, and the matching of the high and low levels of the time sequence of the four signal sources ensures that the current flowing through the organic light-emitting diode of the display in the light-emitting stage is not influenced by the threshold voltage and the anode voltage of the OLED, so that the drift of the threshold voltage is effectively compensated, and the problems of uneven brightness and aging of the display panel are further improved.
Description
Technical Field
The present disclosure relates to an active-matrix organic light emitting diode (AMOLED) display panel, and more particularly, to a pixel compensation circuit of an AMOLED.
Background
An active organic light emitting diode (AMOLED) is a current mode device that has extremely high requirements on the stability and uniformity of the backplane technology. The backplane technology adopted by the current AMOLED mainly comprises polysilicon and metal oxide thin film transistors, but the threshold voltage (V) exists in the thin film transistorsTH) The current flowing through each pixel is different, which causes the problem of non-uniform brightness among pixels. Moreover, the organic light emitting diode is prone to cause aging of the AMOLED panel when operated for a long time.
Referring to fig. 1, fig. 1 is a schematic diagram of a pixel compensation circuit in the prior art. The structure of the OLED is composed of five thin film transistors and a storage capacitor (5T1C), and an OLED current relation which is irrelevant to threshold voltage but relevant to anode voltage of the OLED can be obtained by controlling time sequence voltage of a signal source. However, although the threshold voltage of the AMOLED can be removed by the above method, the influence of the anode voltage of the organic light emitting diode still exists.
Therefore, in order to solve the problem of non-uniform brightness among pixels and delay the aging of the AMOLED panel, it is necessary to provide a pixel compensation circuit to solve the problems of the prior art.
Disclosure of Invention
The invention aims to provide a pixel compensation circuit to solve the problem of uneven brightness among pixels.
To achieve the above object, the present invention provides a pixel compensation circuit of an AMOLED, including:
a first switch, a first end of which is electrically connected to the first voltage, and a second end of which is used for receiving the first signal source;
a second switch, the second end of which is used for receiving a second signal source, and the third end of which is connected to the third end of the first switch;
a third switch, the second end of which is used for receiving the fourth signal source;
a fourth switch, wherein a first end of the fourth switch is connected to the first end of the third switch, a second end of the fourth switch is used for receiving a third signal source, and a third end of the fourth switch is electrically connected to the second voltage;
a fifth switch, a first end of which is electrically connected to the third voltage, a second end of which is used for receiving the second signal source and is connected with a second end of the second switch;
a sixth switch having a first terminal connected to the third terminal of the fifth switch, a second terminal for receiving the fourth signal source and connected to the second terminal of the third switch, and a third terminal connected to the first terminal of the third switch and the first terminal of the fourth switch;
a seventh switch having a first terminal connected to the first terminal of the third switch, the first terminal of the fourth switch, and the third terminal of the sixth switch, a second terminal connected to the first terminal of the second switch, and a third terminal connected to the third terminal of the first switch and the third terminal of the second switch;
the first end of the organic light-emitting diode is connected to the third end of the third switch; and
and a first end of the storage capacitor is connected with the third end of the fifth switch and the first end of the sixth switch, and a second end of the storage capacitor is connected with the first end of the second switch and the second end of the seventh switch.
Further, the first switch to the seventh switch are all thin film transistors.
Furthermore, the time sequence of the first signal source, the second signal source, the third signal source and the fourth signal source may be sequentially divided into an initial stage, a programming stage and a light-emitting stage.
Further, in the initial stage, the first signal source and the second signal source are at a high level, and the third signal source and the fourth signal source are at a low level.
Further, in the programming phase, the second signal source and the third signal source are at a high level, and the first signal source and the fourth signal source are at a low level.
Further, in the light emitting stage, the first signal source and the fourth signal source are at a high level, and the second signal source and the third signal source are at a low level.
Further, in the initial stage, the voltage V at the second terminal of the seventh switchGSatisfy the relation: vG＝VDDA third terminal voltage V of the fifth switchASatisfy the relation: vA＝VREFIn which V isDDIs the first voltage, VREFIs the third voltage.
Further, in the programming phase, the voltage value V on the storage capacitorCsSatisfy the relation: vCs＝VDATA+VTH-VREFWhereinVDATAIs said second voltage, VTHIs the threshold voltage.
Further, in the light emitting stage, the voltage V at the first terminal of the seventh switchSSatisfy the relation: vS＝VOLEDA second terminal voltage V of the seventh switchGSatisfy the relation: vG＝VDATA+VTH-VREF+VOLEDIn which V isOLEDIs the anode voltage of the OLED.
Further, the current I flowing through the OLEDOLEDSatisfy the relation:
where μ is the carrier mobility, CoxW is the gate width of the TFT, and L is the gate length of the TFT.
The pixel compensation circuit designed by the invention can simultaneously solve the problems of non-uniformity and instability of the electrical characteristics of the thin film transistor in the AMOLED display backplane technology, in particular to the problems of threshold voltage drift and aging of the organic light emitting diode. The display quality of the AMOLED panel can be effectively improved, and the AMOLED panel is expected to be mass-produced on a large scale. Therefore, the method has foresight property, and has obvious advantages compared with the prior art.
Drawings
Fig. 1 is a schematic diagram of a pixel compensation circuit in the prior art.
Fig. 2 is a schematic diagram of a pixel compensation circuit according to an embodiment of the invention.
FIG. 3 is a timing diagram of a pixel compensation circuit according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and effects of the present invention clearer and clearer, the present invention is described in further detail below with reference to the accompanying drawings. It should be understood that the particular embodiments described herein are illustrative only, and that the word "embodiment" as used in the description of the invention is intended to serve as an example, instance, or illustration, and is not intended to limit the invention.
The invention provides a pixel compensation circuit of an AMOLED (active matrix organic light emitting diode), which has the effect of solving the problem of poor quality of an AMOLED panel caused by nonuniform brightness among pixels and aims to ensure that a threshold voltage V is higherTHAnd anode voltage V of OLEDOLEDThe luminous current of the display panel is not influenced.
Referring to fig. 2, fig. 2 is a schematic diagram of a pixel compensation circuit according to an embodiment of the invention. The compensation circuit of the present invention comprises seven switches (T1, T2, T3, T4, T5, T6 and DTFT) and a storage capacitor Cs, wherein each switch comprises a first terminal, a second terminal and a third terminal. In the present embodiment, the seven switches are all Thin Film Transistors (TFTs), and thus each switch has a source terminal, a gate terminal, and a drain terminal corresponding to the first terminal, the second terminal, and the third terminal. It is understood that the first terminal can be a source terminal or a drain terminal, and if the first terminal is a source terminal, the third terminal is a drain terminal, and vice versa. Generally, the terminal to which the input voltage is connected is the source terminal, and the other terminal is the drain terminal.
In the present embodiment, the first terminal of the first switch T1 is electrically connected to the first voltage VDDA second terminal for receiving the signal from the first signal source SCAN1, a third terminal electrically connected to the third terminal of the second switch T2 and the third terminal of the seventh switch DTFT, wherein the first voltage V isDDFor convenience of description, the first voltage is referred to as a power voltage hereinafter. In addition, the first signal source SCAN1 is a level signal from a SCAN line (not shown), by which the on and off of the first switch T1 are controlled.
In the embodiment, the first terminal of the second switch T2 is connected to the second terminal of the seventh switch DTFT and the second terminal of the storage capacitor Cs, and intersects at the node G, the second terminal thereof is used for receiving the signal from the second signal source SCAN 2 and is connected to the second terminal of the fifth switch T5, and the third terminal thereof is connected to the third terminal of the first switch T1 and the third terminal of the seventh switch DTFT, wherein the second signal source SCAN 2 is a level signal from a SCAN line (not shown), and the level signal controls the on and off of the second switch T2 and the fifth switch T5.
In the present embodiment, the first terminal of the third switch T3 is connected to the first terminal of the fourth switch T4, the third terminal of the sixth switch T6 and the first terminal of the seventh switch DTFT, and intersects at the node S, the second terminal thereof is used for receiving the signal from the fourth signal source EM, and the second terminal thereof is connected to the second terminal of the sixth switch T6, the third terminal thereof is electrically connected to the OLED anode voltage VOLEDWherein the fourth signal source EM is a light emitting signal terminal, which controls the on and off of the third switch T3 and the sixth switch T6 by inputting a level signal.
In the present embodiment, a first terminal of the fourth switch T4 is connected to the first terminal of the third switch T3, the third terminal of the sixth switch T6 and the first terminal of the seventh switch DTFT, a crossing point is a node S, a second terminal thereof is used for receiving the signal from the third signal source SCAN 3, and a third terminal thereof is electrically connected to the second voltage VDATAWherein the third signal source SCAN 3 is a level signal from a SCAN line (not shown) for controlling the fourth switch T4 to be turned on or off, and the second voltage V isDATAFor convenience of description, the data voltage is hereinafter referred to as the second voltage.
In the present embodiment, the first terminal of the fifth switch T5 is electrically connected to the third voltage VREFA second terminal for receiving the signal from the second signal source SCAN 2 and connected to the second terminal of the second switch T2, a third terminal connected to the first terminal of the sixth switch T6 and the first terminal of the storage capacitor Cs, and a node a is the intersection point, wherein the third voltage V isREFFor convenience of description, the third voltage is referred to as the reference voltage hereinafter.
In the present embodiment, a first terminal of the sixth switch T6 is connected to a third terminal of the fifth switch T5 and a first terminal of the storage capacitor Cs, and a crossing point is a node a, a second terminal thereof is used for receiving a signal from the fourth signal source EM and is connected to a second terminal of the third switch T3, and a third terminal thereof is connected to the first terminal of the third switch T3, the first terminal of the fourth switch T4 and the first terminal of the seventh switch DTFTF and crosses a node S.
In this embodiment, a first terminal of the seventh switch DTFT is connected to the first terminal of the third switch T3, the first terminal of the fourth switch T4 and the third terminal of the sixth switch T6, and intersects at the node S, a second terminal thereof is connected to the first terminal of the second switch T2 and the second terminal of the storage capacitor Cs, and an intersection point is a node G, and a third terminal thereof is connected to the third terminal of the first switch T1 and the third terminal of the second switch T2.
In the present embodiment, a first terminal of the storage capacitor Cs is connected to the third terminal of the fifth switch T5 and the first terminal of the sixth switch T6 to intersect at the node a, and a second terminal thereof is connected to the first terminal of the second switch T2 and the second terminal of the seventh switch DTFT to intersect at the node G.
In this embodiment, the organic light emitting diode has a first end and a second end, and the first end is connected to the anode voltage V of the OLEDOLEDAnd is connected to a third terminal of the third switch T3.
Referring to fig. 3, fig. 3 is a timing diagram of a pixel compensation circuit according to an embodiment of the invention. The invention realizes that the current flowing through the OLED is not influenced by the threshold voltage V by the structure of 7T1C (namely seven thin film transistors and one storage capacitor) and the high and low level input by a signal sourceTHAnd anode voltage V of organic light emitting diodeOLEDInfluence.
In the present embodiment, the level of the first signal source SCAN1 controls the on and off of the first switch T1, the level of the second signal source SCAN 2 controls the on and off of the second switch T2 and the fifth switch T5, the level of the third signal source SCAN 3 controls the on and off of the fourth switch T4, and the level of the fourth signal source EM controls the on and off of the third switch T3 and the sixth switch T6. Specifically, when the input level is high, the thin film transistor is turned on, and when the input level is low, the thin film transistor is turned off.
In the present embodiment, the level of each signal source goes through three stages, which are an initial stage, a programming stage and a light-emitting stage. That is, the operation of the pixel compensation circuit of the present invention can be performed for a plurality of cycles, and each cycle is sequentially performed for an initial stage, a programming stage and a light-emitting stage. Thus, in the three phases of each cycle, the voltage values between the nodes are as shown in the following table:
the specific description is as follows:
in the initial stage, the first signal source SCAN1 and the second signal source SCAN 2 are at a high level, the third signal source SCAN 3 and the fourth signal source EM are at a low level, which means that the first switch T1 connected to the first signal source SCAN1 and the second switch T2 and the fifth switch T5 connected to the second signal source SCAN 2 are in an open state, and the third switch T3, the fourth switch T4, the sixth switch T6 and the seventh switch DTFT are in a closed state. At this time, the power supply voltage VDDA voltage level, i.e., the voltage V at the node G, is initialized to the node G through the first switch T1 and the second switch T2G＝VDD. On the other hand, the reference voltage VREFThe voltage V also written into the node A, i.e. the node A, through the fifth switch T5A＝VREF。
In the programming phase, the second signal source SCAN 2 and the third signal source SCAN 3 are at a high level, the first signal source SCAN1 and the fourth signal source EM are at a low level, which indicates that the second switch T2 and the fifth switch T5 connected to the second signal source SCAN 2 and the fourth switch T4 connected to the third signal source SCAN 3 are at an open state, and the first switch T1, the third switch T3 and the sixth switch T6 are at a closed state. Since the second terminal node G of the seventh switch DTFT is initialized with the power supply voltage V in the initial stageDDAnd thus it is also in the open state. At this time, the voltage V at the node a is still in an open state due to the fifth switch T5A＝VREF. Further data voltage VDATAA voltage value, i.e. the voltage V of the node S, is provided to the node S through the fourth switch T4S＝VDATA. Furthermore, since the voltage at the node G is equal to the power supply voltage VDDA voltage value greater than the data voltage VDATASo that the voltage at the node G will be invertedAccording to voltage VDATADischarging until the difference between the voltage of the node G and the voltage of the node S is a threshold voltage VTHI.e. the voltage V of the node G during the programming phaseG＝VDATA+VTHAnd thus the voltage V of the storage capacitor Cs at this timeCs＝VDATA+VTH-VREF。
In the light-emitting stage, the voltage is supplied by the power supply voltage VDDSince the current inputted from the terminal must pass through the first switch T1, the seventh switch DTFT and the third switch T3 to make the OLED emit light, the first signal source SCAN1 and the fourth signal source EM are set to high level, the second signal source SCAN 2 and the third signal source SCAN 3 are set to low level at this stage, which indicates that the first switch T1 connected to the first signal source SCAN1 and the third switch T3 and the sixth switch T6 connected to the fourth signal source EM are in an open state, and the second switch T2, the fourth switch T4 and the fifth switch T5 are in a closed state. In addition, since the second end node G of the seventh switch DTFT has a voltage value, it is also in an open state. In this phase, the anode voltage V of the OLEDOLEDNode S and node A are both V through the third switch T3 and the sixth switch T6OLEDI.e. VS＝VOLEDAnd VA＝VOLED. At this time, the voltage V at the node G is floating due to the floating of the storage capacitor CsGWill be bootstrapped to VDATA+VTH-VREF+VOLEDI.e. VG＝VDATA+VTH-VREF+VOLED。
In summary, when the power supply voltage VDDAfter inputting a start voltage and a start current, the pixel compensation circuit in the embodiment of the invention makes the mathematical relation of the current flowing through the seventh switch DTFT in the light-emitting stage according to the structure of 7T1C and the high-low level of the matching signal source be:
wherein μ is the mobility of carrier , CoxW is the gate width of the TFT, and L is the gate length of the TFT. It is understood that the current flowing through the seventh switch DTFT in the light emitting period is the current flowing through the OLED.
Therefore, the light emitting current and the threshold voltage V of the pixel compensation circuit provided by the invention can be knownTHAnd anode voltage V of OLEDOLEDTherefore, the problem of non-uniform brightness caused by unstable current between pixels can be solved. Compared with the prior art, the invention can simultaneously eliminate the threshold voltage VTHAnd anode voltage V of OLEDOLEDThe compensation effect is achieved. In addition, the OLED of the pixel circuit is in a closed state in an illegal light stage, so that the display contrast can be improved, and the aging of the OLED is delayed.
Although the present invention has been described with reference to the preferred embodiments, it is not intended to limit the present invention, and various changes and modifications may be made by those skilled in the art without departing from the scope of the present invention.
Claims (10)
1. A pixel compensation circuit of an AMOLED, comprising:
a first switch, a first end of which is electrically connected to the first voltage, and a second end of which is used for receiving the first signal source;
a second switch, the second end of which is used for receiving a second signal source, and the third end of which is connected to the third end of the first switch;
a third switch, the second end of which is used for receiving the fourth signal source;
a fourth switch, wherein a first end of the fourth switch is connected to the first end of the third switch, a second end of the fourth switch is used for receiving a third signal source, and a third end of the fourth switch is electrically connected to the second voltage;
a fifth switch, a first end of which is electrically connected to the third voltage, a second end of which is used for receiving the second signal source and is connected with a second end of the second switch;
a sixth switch having a first terminal connected to the third terminal of the fifth switch, a second terminal for receiving the fourth signal source and connected to the second terminal of the third switch, and a third terminal connected to the first terminal of the third switch and the first terminal of the fourth switch;
a seventh switch having a first terminal connected to the first terminal of the third switch, the first terminal of the fourth switch, and the third terminal of the sixth switch, a second terminal connected to the first terminal of the second switch, and a third terminal connected to the third terminal of the first switch and the third terminal of the second switch;
the first end of the organic light-emitting diode is connected to the third end of the third switch; and
and a first end of the storage capacitor is connected with the third end of the fifth switch and the first end of the sixth switch, and a second end of the storage capacitor is connected with the first end of the second switch and the second end of the seventh switch.
2. The pixel compensation circuit of an AMOLED of claim 1, wherein the first through seventh switches are all thin film transistors.
3. The pixel compensation circuit of an AMOLED according to claim 1, wherein the timing of the first, second, third and fourth signal sources can be sequentially divided into an initial phase, a programming phase and a light emitting phase.
4. The pixel compensation circuit of an AMOLED according to claim 3, wherein in the initial stage, the first signal source and the second signal source are at a high level, and the third signal source and the fourth signal source are at a low level.
5. The pixel compensation circuit of an AMOLED according to claim 4, wherein in the programming phase, the second signal source and the third signal source are at a high level, and the first signal source and the fourth signal source are at a low level.
6. The pixel compensation circuit of an AMOLED according to claim 5, wherein the first signal source and the fourth signal source are at high level and the second signal source and the third signal source are at low level during the light emitting period.
7. The pixel compensation circuit of AMOLED according to claim 3, wherein in the initial stage, the second terminal voltage V of the seventh switchGSatisfy the relation: vG＝VDDA third terminal voltage V of the fifth switchASatisfy the relation: vA＝VREFIn which V isDDIs the first voltage, VREFIs the third voltage.
8. The pixel compensation circuit of an AMOLED of claim 7, wherein the voltage value V on the storage capacitor is at the programming stageCsSatisfy the relation: vCs＝VDATA+VTH-VREFIn which V isDATAIs said second voltage, VTHIs the threshold voltage.
9. The pixel compensation circuit of an AMOLED of claim 8, wherein the first terminal voltage V of the seventh switch during the light-emitting phaseSSatisfy the relation: vS＝VOLEDA second terminal voltage V of the seventh switchGSatisfy the relation: vG＝VDATA+VTH-VREF+VOLEDIn which V isOLEDIs the anode voltage of the OLED.
10. The pixel compensation circuit of an AMOLED of claim 9, wherein the current I through the OLED isOLEDSatisfy the relation:
where μ is the carrier mobility, CoxW is the gate width of the thin film transistor, and L is the gate masterwork length of the thin film transistor.
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| CN201911232428.8A CN111028780A (en) | 2019-12-03 | 2019-12-03 | Pixel compensation circuit of AMOLED |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114093320A (en) * | 2021-11-26 | 2022-02-25 | 长沙惠科光电有限公司 | Pixel circuit, pixel driving method and display device |
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