CN111009185B

CN111009185B - Pixel array

Info

Publication number: CN111009185B
Application number: CN201811167098.4A
Authority: CN
Inventors: 詹博全; 郭文瑜
Original assignee: E Ink Holdings Inc
Current assignee: E Ink Holdings Inc
Priority date: 2018-10-08
Filing date: 2018-10-08
Publication date: 2021-10-12
Anticipated expiration: 2038-10-08
Also published as: CN111009185A

Abstract

The invention discloses a pixel array, which includes a plurality of first signal lines, a plurality of second signal lines, a plurality of active elements, a plurality of pixel electrodes, and a plurality of selection lines. The second signal lines and the first signal lines are interleaved and electrically insulated. Each active element is electrically connected to one of the first signal lines and one of the second signal lines. Each pixel electrode is electrically connected to one of the active elements. The selection lines are interleaved with the first signal lines to form a plurality of first interleaves and a plurality of second interleaves. The selection line is electrically connected to the first signal line at the first staggered position, and is electrically insulated from the first signal line at the second staggered position. The selection line is electrically insulated from the second signal line. At least one second signal line is disposed between each selection line and any one of the active elements. This pixel array avoids the problem of uneven color.

Description

Pixel array

Technical Field

The present invention relates to a pixel array, and more particularly, to a pixel array having at least one signal line between any active device and any select line.

Background

Display panels have been widely used in a variety of displays, for example: televisions, notebook computers, tablet computers, electronic paper (e-paper) books, mobile phones, and the like. In a conventional display panel, a pixel array includes two signal lines arranged in a staggered manner and pixel units electrically connected to the two signal lines. The first signal line is electrically connected to the selection line and receives the signal of the signal source through the selection line electrically connected to the signal source, and the second signal line extends toward the signal source and is connected to the signal source to receive the signal of the signal source. However, when the selection line transmits a signal, the signal may adversely affect the performance of the pixel units around the selection line, especially the performance of the pixel units near the electrical connection between the first signal line and the selection line. The signals transmitted by the select lines are coupled to the signals of the surrounding pixel units, which causes the display to have a color non-uniformity (Mura) problem, which may occur, for example, on the diagonal lines of the display, thereby reducing the display quality of the display.

In view of the above, a new pixel array is needed to solve the above problems.

Disclosure of Invention

The invention aims to provide a pixel array capable of avoiding the problem of uneven color.

The invention provides a pixel array, which comprises a plurality of first signal lines, a plurality of second signal lines, a plurality of active elements, a plurality of pixel electrodes and a plurality of selection lines. The second signal lines are crossed with the first signal lines and are electrically insulated. Each active element is electrically connected with one of the first signal lines and one of the second signal lines. Each pixel electrode is electrically connected with one of the active elements. The selection lines are interlaced with the first signal lines to form a plurality of first intersections and a plurality of second intersections. The selection lines are electrically connected with the first signal lines at the first intersections, and are electrically insulated from the first signal lines at the second intersections. The selection lines are electrically insulated from the second signal lines. At least one second signal line is provided between each of the selection lines and any one of the active elements.

In some embodiments, two of the second signal lines and a selection line between the two of the second signal lines are disposed between two adjacent active devices.

In some embodiments, the number of the second signal lines is twice the number of the selection lines.

In some embodiments, the number of the second signal lines is twice the number of the first signal lines.

In some embodiments, the number of first signal lines is less than or equal to the number of select lines.

In some embodiments, the first signal line is a scan line and the second signal line is a data line.

In some embodiments, the material of the selection lines is the same as the material of the second signal lines.

In some embodiments, the pixel array further includes an insulating layer disposed between the first signal lines and the second signal lines, and the first signal lines are electrically insulated from the second signal lines by the insulating layer.

In some embodiments, the pixel array further includes an insulating layer disposed between the first signal lines and the select lines, and the first signal lines are electrically insulated from the select lines at the second intersections by the insulating layer.

In some embodiments, the second signal lines extend in the same direction as the select lines.

Compared with the prior art, the layout design of the pixel array can solve the problem of non-uniform color in the prior art.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are intended to provide further explanation of the invention as claimed.

Drawings

The above and other aspects, features and other advantages of the present invention will be more clearly understood by reference to the following description taken in conjunction with the accompanying drawings, in which:

fig. 1 is a schematic top view of a pixel array substrate according to some embodiments of the invention.

Fig. 2 is an enlarged schematic view of the region R1 in fig. 1.

Fig. 3 is an enlarged schematic view of the region R2 in fig. 1.

FIG. 4A is a cross-sectional view of line A-A' of FIG. 2.

FIG. 4B is a cross-sectional view of line B-B' of FIG. 2.

FIG. 4C is a cross-sectional view of the cross-section line C-C' in FIG. 3.

Detailed Description

In order to make the description of the present invention more complete and complete, reference is made to the accompanying drawings, in which like numerals designate the same or similar elements, and the various embodiments described below.

In the following description, numerous implementation details are set forth in order to provide a thorough understanding of the present invention. It should be understood, however, that these implementation details are not to be interpreted as limiting the invention. That is, in some embodiments of the invention, such implementation details are not necessary. In addition, for the sake of simplicity, some conventional structures and elements are shown in the drawings in a simple schematic manner.

Fig. 1 is a schematic top view of a pixel array substrate 100 according to some embodiments of the invention. Fig. 2 is an enlarged schematic view of the region R1 in fig. 1. Fig. 3 is an enlarged schematic view of the region R2 in fig. 1. The pixel array substrate 100 includes a substrate 102, a signal source 104, and a pixel array a. The signal source 104 and the pixel array a are disposed on the substrate 102. The pixel array a includes a plurality of first signal lines 110, a plurality of second signal lines 120, a plurality of selection lines 130, and a plurality of pixel units 140. Each pixel unit 140 includes an active device 140a and a pixel electrode 140 b. The second signal line 120 and the select line 130 of the pixel array a are electrically connected to the signal source 104 for receiving signals from the signal source 104.

As shown in fig. 1, the first signal line 110 and the second signal line 120 are crossed and electrically insulated from the second signal line 120. Each active device 140a is electrically connected to one of the first signal lines 110 and one of the second signal lines 120. Each pixel electrode 140b is electrically connected to one of the active devices 140 a. The shape of the pixel electrode 140b shown in fig. 1 is only illustrative, and the shape of the pixel electrode 140b can be adjusted according to different layout design requirements.

In some embodiments, the first signal lines 110 extend along the first direction D1 and are aligned along the second direction D2. The second signal lines 120 extend in the second direction D2 and are aligned in the first direction D1. The selection lines 130 extend in the second direction D2 and are aligned in the first direction D1. The first direction D1 is different from the second direction D2. In some embodiments, the first direction D1 is substantially perpendicular to the second direction D2. In some embodiments, the second signal line 120 extends in the same direction as the select line 130.

Referring to fig. 1, the selection lines 130 are interlaced with the first signal lines 110 to form a plurality of first intersections X1 and a plurality of second intersections X2. The selection line 130 is electrically connected to the first signal line 110 at the first intersection X1, so that the signal from the signal source 104 can be transmitted to the first signal line 110 through the selection line 130. The selection line 130 is electrically insulated from the first signal line 110 at the second intersection X2. The selection line 130 is electrically insulated from the second signal line. It should be noted that at least one second signal line 120 is disposed between each of the selection lines 130 and any one of the active devices 140a of the pixel units 140, and since the second signal line 120 can shield the signal transmitted by the selection line 130, the influence of the signal on the pixel units 140 can be reduced. Therefore, when the pixel array substrate 100 of the present invention is disposed in a display, the problem of color non-uniformity of the display in the prior art can be avoided.

Still referring to fig. 1, in the pixel array a of the present invention, two of the second signal lines 120 and the select line 130 between the two of the second signal lines 120 are disposed between two adjacent active devices 140 a. Therefore, the signal of the selection line 130 can be shielded by the second signal lines 120 on the left and right sides thereof. Moreover, because the second signal line 120 is disposed between the selection line 130 and the active device 140a, the selection line 130 is not adjacent to the active device 140a, and the influence of the signal transmitted by the selection line 130 on the surrounding pixel units 140 can be reduced, thereby avoiding the problem of color non-uniformity.

The pixel array substrate can be arranged in various displays and can solve the problem of uneven color in the prior art. For example, the pixel array substrate of the present invention can be used as an active array substrate of an Electronic Paper Display (EPD). The electronic paper display can comprise the pixel array substrate and the display film arranged on the pixel array substrate, and a display picture can be obtained by driving display particles in the display film through the pixel array substrate. The layout design of the pixel array substrate can avoid the problem of uneven color of the display, thereby improving the display quality.

In some embodiments, the number of second signal lines 120 is greater than the number of select lines 130. For example, as shown in fig. 1, the number of the second signal lines 120 is twice the number of the selection lines 130, but is not limited thereto. In some embodiments, the number of second signal lines 120 is greater than the number of first signal lines 110. For example, as shown in fig. 1, the number of the second signal lines 120 is twice the number of the first signal lines 110, but is not limited thereto. In some embodiments, as shown in fig. 1, the number of the first signal lines 110 is equal to the number of the selection lines 130, but is not limited thereto.

Next, please refer to fig. 2 and fig. 4A simultaneously. FIG. 4A is a cross-sectional view of line A-A' of FIG. 2. The active device 140a includes a gate GE, an active layer AC, a source SE, and a drain DE. The gate electrode GE is disposed on the substrate 102, the active layer AC is disposed on the gate electrode GE, and the source electrode SE and the drain electrode DE are disposed on the active layer AC. In some embodiments, the pixel array a further includes an insulating layer IL disposed between the gate electrode GE and the active layer AC, covering the gate electrode GE and the substrate 102. In some embodiments, the pixel array a further includes a protection layer PL covering the active layer AC, the source electrode SE, and the drain electrode DE. The drain electrode DE is electrically connected to the pixel electrode 250 through the opening H1 of the protection layer PL. In fig. 2, a connection site E indicates a position where the drain electrode DE is electrically connected to the pixel electrode 250.

As shown in fig. 2 and 4A, the first signal line 110 is electrically connected to the gate GE, and the second signal line 120 is electrically connected to the source SE, so that the first signal line 110 is a scan line and the second signal line 220 is a data line. The first signal line 110 is electrically connected to the selection line 130 to transmit the signal of the signal source 104 to the gate GE.

Next, please refer to fig. 2 and fig. 4B simultaneously. FIG. 4B is a cross-sectional view of line B-B' of FIG. 2. In some embodiments, the pixel array a further includes an insulating layer IL disposed between the first signal line 110 and the second signal line 120, and between the first signal line 110 and the selection line 130. The first signal line 110 is electrically insulated from the second signal line 120 by an insulating layer IL. The selection line 130 is electrically connected to the first signal line 110 through the opening H2 of the insulating layer IL. In some embodiments, the second signal line 120 and the select line 130 may be formed via: patterning the insulating layer to form an insulating layer IL having an opening H2; forming a conductive layer covering the insulating layer IL; the conductive layer is patterned to form second signal lines 120 and select lines 130. Therefore, the material of the selection line 130 is the same as that of the second signal line 120.

Please refer to fig. 3 and fig. 4C simultaneously. FIG. 3 shows a second intersection X2 formed by the intersection of the selection line 130 and the first signal line 110. FIG. 4C is a cross-sectional view of the cross-section line C-C' in FIG. 3. As shown in fig. 4C, the selection line 130 is located on the first signal line 110. In some embodiments, the pixel array a further includes an insulating layer IL disposed between the first signal line 110 and the selection line 130, and the first signal line 110 is electrically insulated from the selection line 130 by the insulating layer IL. In some embodiments, the pixel array a further includes a protective layer PL covering the selection line 130.

In summary, in the pixel array of the present invention, at least one second signal line is disposed between each of the select lines and any one of the active devices of the pixel units, in other words, a second signal line is inevitably disposed between any one of the select lines and any one of the active devices, and since the second signal line can shield the signal transmitted by the select line, the influence of the signal on the pixel units can be reduced, and the second signal line also prevents the select line from being close to the active device, therefore, the layout design of the pixel array of the present invention can solve the problem of color non-uniformity in the prior art.

Although the present invention has been described with reference to the above embodiments, it should be understood that the invention is not limited to the above embodiments, but rather, may be embodied in many forms and varied within the spirit and scope of the invention.

Claims

1. An array of pixels, comprising:

a plurality of first signal lines;

a plurality of second signal lines crossing the plurality of first signal lines and electrically insulated from the plurality of first signal lines;

a plurality of active devices, each of the active devices being electrically connected to one of the plurality of first signal lines and one of the plurality of second signal lines;

a plurality of pixel electrodes, each of the pixel electrodes being electrically connected to one of the plurality of active devices; and

and a plurality of selection lines crossing the plurality of first signal lines to form a plurality of first crossing portions and a plurality of second crossing portions, the plurality of selection lines being electrically connected to the plurality of first signal lines at the plurality of first crossing portions, being electrically insulated from the plurality of first signal lines at the plurality of second crossing portions, and being electrically insulated from the plurality of second signal lines, wherein at least one second signal line is disposed between each selection line and any one of the plurality of active devices, two of the plurality of second signal lines are disposed between two adjacent active devices, and the selection line is disposed between two of the plurality of second signal lines.

2. The pixel array of claim 1, wherein the number of the second signal lines is twice the number of the select lines.

3. The pixel array according to claim 1, wherein the number of the second signal lines is twice the number of the first signal lines.

4. The pixel array of claim 1, wherein the number of first signal lines is less than or equal to the number of select lines.

5. The pixel array of claim 1, wherein the first signal lines are scan lines and the second signal lines are data lines.

6. The pixel array of claim 1, wherein a material of the plurality of selection lines is the same as a material of the plurality of second signal lines.

7. The pixel array of claim 1, further comprising an insulating layer disposed between the first signal lines and the second signal lines, wherein the first signal lines are electrically insulated from the second signal lines by the insulating layer.

8. The pixel array of claim 1, further comprising an insulating layer disposed between the first signal lines and the select lines, the first signal lines being electrically insulated from the select lines at the second intersections by the insulating layer.

9. The pixel array of claim 1, wherein the second plurality of signal lines extend in a same direction as the plurality of select lines.