CN110995235A - Level conversion circuit, electronic equipment and level conversion method - Google Patents
Level conversion circuit, electronic equipment and level conversion method Download PDFInfo
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- CN110995235A CN110995235A CN201911267571.0A CN201911267571A CN110995235A CN 110995235 A CN110995235 A CN 110995235A CN 201911267571 A CN201911267571 A CN 201911267571A CN 110995235 A CN110995235 A CN 110995235A
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- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
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Abstract
The invention provides a level conversion circuit, electronic equipment and a level conversion method, wherein the level conversion circuit comprises a coupling capacitor and a diode, and the coupling capacitor is connected between a voltage end of a transmitting IC chip and a voltage end of a receiving IC chip; the diode is connected between a direct current voltage source and the voltage end of the receiving IC chip, and one end of the diode is connected with the direct current voltage source; when the transmitting IC chip outputs a communication signal to the receiving IC chip, the coupling capacitor transmits the communication signal according to a direct current blocking and alternating current transmission mode, and the communication signal meeting the level requirement is obtained after being clamped by the diode and is output to the receiving IC chip. The high-speed level conversion is realized, so that the converted level signal is in the recognizable range of the receiving IC chip, and the distortion is small.
Description
Technical Field
The present invention relates to the field of electronic circuit technologies, and in particular, to a level shift circuit, an electronic device, and a level shift method.
Background
When data communication is needed between two chips with different level signals, a level conversion circuit needs to be added on a communication line between the chips due to the fact that the level signals are not matched, and the chips have requirements on identification of high and low levels when the data communication is needed between the chips. There is a problem of level conversion when communication is performed between two chips having different level signals.
In the conventional mode for solving the problem of level conversion, a triode or an optocoupler are generally used for conversion, but when the communication rate is greater than a certain value, the problem of distortion or incapability of achieving the level required for conversion occurs. When the communication speed is high, a special chip is needed for level conversion, and the cost is high.
Disclosure of Invention
The invention aims to provide a level conversion circuit, an electronic device and a level conversion method, which are used for solving the problem that the level conversion between two chips with different level signals is distorted or cannot reach the level required to be converted.
In order to achieve the purpose, the invention provides the following technical scheme:
the invention provides a level conversion circuit, which comprises a coupling capacitor and a diode, wherein the coupling capacitor is connected between a voltage end of a transmitting IC chip and a voltage end of a receiving IC chip; the diode is connected between a direct current voltage source and the voltage end of the receiving IC chip, and one end of the diode is connected with the direct current voltage source;
when the transmitting IC chip outputs a communication signal to the receiving IC chip, the coupling capacitor transmits the communication signal according to a direct current blocking and alternating current transmission mode, and the communication signal meeting the level requirement is obtained after being clamped by the diode and is output to the receiving IC chip.
Optionally, the communication signal input to the receiving IC chip is a level signal logically consistent with the communication signal output from the transmitting IC chip and conforming to a voltage range.
Optionally, the voltage range is a voltage range recognizable by the receiving IC chip.
Further, the communication rate between the transmitting IC chip and the receiving IC chip is greater than or equal to 1 Mbps.
Optionally, the level signal at the input voltage end of the receiving IC chip is the sum of the high level signal at the output voltage end of the transmitting IC chip and a reference level voltage.
Optionally, the diode is a silicon tube or a germanium tube.
Correspondingly, the invention also provides electronic equipment which comprises a transmitting IC chip and a receiving IC chip, wherein the transmitting IC chip and the receiving IC chip are connected through the level conversion circuit.
Correspondingly, the invention also provides a level conversion method, which is realized on the basis of any one of the level conversion circuits, and comprises the following steps:
when the transmitting IC chip outputs the communication signal to the receiving IC chip, the coupling capacitor of the level conversion circuit transmits the communication signal according to a direct current blocking and alternating current transmission mode, and the communication signal meeting the level requirement is obtained after the communication signal is clamped by a diode of the level conversion circuit and is output to the receiving IC chip.
Compared with the prior art, the scheme of the invention has the following advantages:
the level conversion circuit, the electronic equipment and the level conversion method provided by the invention comprise a coupling capacitor and a diode, wherein the coupling capacitor is connected between a voltage end of a transmitting IC chip and a voltage end of a receiving IC chip; the diode is connected between a direct current voltage source and the voltage end of the receiving IC chip, and the anode of the diode is connected with the direct current voltage source; when the transmitting IC chip outputs a communication signal to the receiving IC chip, the coupling capacitor transmits the communication signal according to a direct current blocking and alternating current transmission mode, and the communication signal meeting the level requirement is obtained after being clamped by the diode and is output to the receiving IC chip. The method and the device realize high-speed level conversion, enable the converted level signal to be in the recognizable range of the receiving IC chip, and ensure small distortion.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The foregoing and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a circuit diagram illustrating a level shifting circuit according to an exemplary embodiment;
FIG. 2 is a simulation diagram of a level signal prior to level shifting, according to an exemplary embodiment;
fig. 3 is a simulation diagram illustrating a level signal after level shifting according to an exemplary embodiment.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative only and should not be construed as limiting the invention.
The invention provides a level conversion circuit, which aims to solve the problem that when level conversion is carried out between two chips with different level signals, the level conversion circuit is distorted or cannot reach the level required to be converted, so that the communication of the chips fails. In an exemplary embodiment, as shown in fig. 1, the level shift circuit includes a coupling capacitor and a diode, wherein the coupling capacitor is connected between a voltage terminal of the transmitting IC chip and a voltage terminal of the receiving IC chip; the diode is connected between a direct current voltage source and the voltage end of the receiving IC chip, one end of the diode is connected with the direct current voltage source, and the other end of the diode is connected with the coupling capacitor and the receiving IC chip. Of course, the diode may be alternatively implemented by a pull-up resistor, which is not specifically limited herein.
The coupling capacitor is used for blocking direct current and alternating current, and the higher the frequency of an alternating current signal in a certain range is, the better the blocking effect is. The diode is used for clamping and fixing the bias of the output communication signal above a certain level. Specifically, when the transmitting IC chip outputs a communication signal to the receiving IC chip, the coupling capacitor transmits the ac signal in a dc blocking and ac communicating transmission manner, and the communication signal meeting the level requirement is obtained after being clamped by the diode and output to the receiving IC chip. The communication signal meeting the level requirement is a level signal which can be identified by the receiving IC chip.
The level conversion circuit blocks direct current and alternating current through the alternating current coupling effect of the coupling capacitor, and after the level conversion circuit is clamped by the diode, the converted level signal is in the recognizable range of the receiving IC chip, the conversion of high-speed level is realized, and the distortion is ensured to be small. In addition, the high-speed level conversion can be realized through the coupling capacitor and the diode, and the cost is low.
Optionally, the coupling capacitor is an electrolytic capacitor, an anode of the electrolytic capacitor is connected to the voltage terminal of the transmitting IC chip, and a cathode of the electrolytic capacitor is connected to the voltage terminal of the receiving IC chip. The diode may be a silicon or germanium transistor.
Optionally, the communication signal input to the receiving IC chip is a level signal logically consistent with the communication signal output from the transmitting IC chip and conforming to a voltage range, that is, the communication signal output from the transmitting IC chip is converted by the level conversion circuit and then input to the receiving IC chip; at this time, the logics of the communication signals before and after the level conversion are consistent, and the communication signal input to the receiving IC chip is a level signal conforming to the voltage range, thereby ensuring the successful communication between the transmitting IC chip and the receiving IC chip.
Optionally, the voltage range is a voltage range recognizable by the receiving IC chip, so that the ac signal converted by the level conversion circuit can be recognized by the receiving IC chip for subsequent processing.
Optionally, the level signal at the input voltage end of the receiving IC chip is the sum of the high level signal at the output voltage end of the transmitting IC chip and a reference level voltage. The reference level voltage is a level voltage which can be pulled up by a level conversion circuit. For example, when the level signal of the output voltage end of the transmitting IC chip is 3.3V and the reference level voltage is 1V, the level signal of the input voltage end of the receiving IC chip is 4.3V, so that the communication signal input into the receiving IC chip is a level signal recognizable by the receiving IC chip, and successful communication between the transmitting IC chip and the receiving IC chip is realized.
Generally, when the communication rate between the transmitting IC chip and the receiving IC chip is greater than a certain value, the problem of distortion occurs, and the high-speed level shifter circuit of the present application can ensure that the distortion is smaller when the communication rate is higher, that is, when the communication rate between the transmitting IC chip and the receiving IC chip is greater than or equal to 1Mbps, the signal quality is better than that of other similar circuits.
For a better understanding of the present application, the following description is given by way of a specific example:
for example, it is assumed that the voltage range recognizable by the receiving IC chip is 3.5V or more or 1.5V or less. If the level output from the voltage terminal of the transmitting IC chip is 3.3V, and the transmitting IC chip powered by 3.3V needs to transmit a data to the receiving IC chip powered by 5V, the receiving IC chip cannot normally identify the data transmitted by the transmitting IC chip, because for the transmitting IC chip, when the input voltage range is greater than or equal to 3.5V, the input voltage can be identified as high level, and when the input voltage range is less than or equal to 1.5V, the input voltage can be identified as low level, and the 3.3V output voltage of the transmitting IC chip is not within the identifiable range of the receiving IC chip, thus causing the receiving IC chip to be unidentifiable, and failing to communicate. Therefore, the level conversion circuit is added between the transmitting IC chip and the receiving IC chip, so that the receiving IC chip can identify data sent by the transmitting IC chip, as shown in fig. 2 and 3, fig. 2 and 3 are simulation graphs when the communication rate between the analog transmitting IC chip and the receiving IC chip is 10Mbps, and it can be seen from the graphs that the alternating current coupling is performed through the coupling capacitor, and after the coupling capacitor is clamped by the diode, the voltage of 3.3V of the output alternating current signal is increased by 1.0V, so that the level of the alternating current signal input to the receiving IC chip reaches 4.3V, and since 4.3V is greater than 3.5V, the receiving IC chip can identify the alternating current signal as a high level, and no distortion is ensured under the condition of high communication rate.
Correspondingly, the invention also provides electronic equipment which comprises the transmitting IC chip and the receiving IC chip, wherein the transmitting IC chip and the receiving IC chip are connected through the level conversion circuit, so that the normal communication of the transmitting IC chip and the receiving IC chip in the electronic equipment is ensured. The electronic equipment can be equipment which needs level conversion in mobile phones, computers, panels, induction cookers, electric kettles and the like.
Correspondingly, the invention also provides a level conversion method, which is realized on the basis of the level conversion circuit and comprises the following steps:
when the transmitting IC chip outputs the communication signal to the receiving IC chip, the coupling capacitor of the level conversion circuit transmits the communication signal according to a direct current blocking and alternating current transmission mode, and the communication signal meeting the level requirement is obtained after the communication signal is clamped by a diode of the level conversion circuit and is output to the receiving IC chip.
Specifically, it is assumed that the voltage range recognizable by the receiving IC chip is 3.5V or more or 1.5V or less. If the level output from the voltage terminal of the transmitting IC chip is 3.3V, the transmitting IC chip powered by 3.3V needs to transmit a data to the receiving IC chip powered by 5V, normally, the receiving IC chip cannot identify the data transmitted by the transmitting IC chip, because for the transmitting IC chip, when the input voltage range is greater than or equal to 3.5V, the input voltage is identified as high level, when the input voltage range is less than or equal to 1.5V, the input voltage can be identified as low level, and the 3.3V output voltage of the transmitting IC chip is not within the identifiable range of the receiving IC chip, thus causing the receiving IC chip to be unidentifiable, resulting in communication failure. Therefore, the level conversion circuit is added between the transmitting IC chip and the receiving IC chip, when the transmitting IC chip outputs an alternating current signal to the receiving IC chip, the coupling capacitor of the level conversion circuit is conducted and transmits the alternating current signal, and the high level signal obtained after the coupling capacitor of the level conversion circuit is clamped by the diode of the level conversion circuit is output to the receiving IC chip, so that the receiving IC chip can identify the data sent by the transmitting IC chip. As shown in fig. 2 and 3, fig. 2 and 3 are simulation diagrams when the communication rate between the analog transmitting IC chip and the receiving IC chip is 10Mbps, and it can be seen from the diagrams that ac coupling is performed through the coupling capacitor, and after diode clamping, the voltage of 3.3V of the output ac signal is increased by 1.0V, so that the level of the ac signal input to the receiving IC chip reaches 4.3V, and since 4.3V is greater than 3.5V, the receiving IC chip can recognize it as a high level, and it is ensured that no distortion occurs under the condition of high communication rate.
The level conversion method realizes high-speed level conversion, enables the converted level signal to be in the recognizable range of the receiving IC chip, and is small in distortion.
The foregoing is only a partial embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (8)
1. A level switching circuit is characterized by comprising a coupling capacitor and a diode, wherein the coupling capacitor is connected between a voltage end of a transmitting IC chip and a voltage end of a receiving IC chip; the diode is connected between a direct current voltage source and the voltage end of the receiving IC chip, and one end of the diode is connected with the direct current voltage source;
when the transmitting IC chip outputs a communication signal to the receiving IC chip, the coupling capacitor transmits the communication signal according to a direct current blocking and alternating current transmission mode, and the communication signal meeting the level requirement is obtained after being clamped by the diode and is output to the receiving IC chip.
2. The level shift circuit of claim 1, wherein the communication signal input to the receiving IC chip is a level signal logically consistent with the communication signal output from the transmitting IC chip and conforming to a voltage range.
3. The circuit of claim 2, wherein the voltage range is a voltage range recognizable by the receiving IC chip.
4. The circuit of claim 1, wherein a communication rate between the transmitting IC chip and the receiving IC chip is greater than or equal to 1 Mbps.
5. The circuit of claim 1, wherein the level signal at the input voltage terminal of the receiving IC chip is a sum of a high level signal at the output voltage terminal of the transmitting IC chip and a reference level voltage.
6. The circuit of claim 1, wherein the diode is a silicon or germanium transistor.
7. An electronic device comprising a transmitting IC chip and a receiving IC chip, which are connected by a level conversion circuit according to any one of claims 1 to 6.
8. A level shifting method, implemented on a level shifting circuit according to any of claims 1-6, comprising the steps of:
when the transmitting IC chip outputs the communication signal to the receiving IC chip, the coupling capacitor of the level conversion circuit transmits the communication signal according to a direct current blocking and alternating current transmission mode, and the communication signal meeting the level requirement is obtained after the communication signal is clamped by a diode of the level conversion circuit and is output to the receiving IC chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911267571.0A CN110995235A (en) | 2019-12-11 | 2019-12-11 | Level conversion circuit, electronic equipment and level conversion method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911267571.0A CN110995235A (en) | 2019-12-11 | 2019-12-11 | Level conversion circuit, electronic equipment and level conversion method |
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| CN110995235A true CN110995235A (en) | 2020-04-10 |
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| CN201911267571.0A Pending CN110995235A (en) | 2019-12-11 | 2019-12-11 | Level conversion circuit, electronic equipment and level conversion method |
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Citations (9)
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2019
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