CN110972413A - Composite circuit board and manufacturing method thereof - Google Patents
Composite circuit board and manufacturing method thereof Download PDFInfo
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- CN110972413A CN110972413A CN201811152605.7A CN201811152605A CN110972413A CN 110972413 A CN110972413 A CN 110972413A CN 201811152605 A CN201811152605 A CN 201811152605A CN 110972413 A CN110972413 A CN 110972413A
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- 239000002131 composite material Substances 0.000 title claims abstract description 41
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 291
- 238000000034 method Methods 0.000 claims abstract description 26
- 239000000084 colloidal system Substances 0.000 claims abstract description 19
- 238000005520 cutting process Methods 0.000 claims abstract description 6
- 238000004026 adhesive bonding Methods 0.000 claims abstract description 3
- 239000010410 layer Substances 0.000 claims description 142
- 239000011241 protective layer Substances 0.000 claims description 26
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- 238000002844 melting Methods 0.000 claims description 3
- 230000008018 melting Effects 0.000 claims description 3
- 230000000007 visual effect Effects 0.000 claims description 3
- 238000007747 plating Methods 0.000 description 7
- 239000003292 glue Substances 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000005553 drilling Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- HUWSZNZAROKDRZ-RRLWZMAJSA-N (3r,4r)-3-azaniumyl-5-[[(2s,3r)-1-[(2s)-2,3-dicarboxypyrrolidin-1-yl]-3-methyl-1-oxopentan-2-yl]amino]-5-oxo-4-sulfanylpentane-1-sulfonate Chemical compound OS(=O)(=O)CC[C@@H](N)[C@@H](S)C(=O)N[C@@H]([C@H](C)CC)C(=O)N1CCC(C(O)=O)[C@H]1C(O)=O HUWSZNZAROKDRZ-RRLWZMAJSA-N 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 239000013310 covalent-organic framework Substances 0.000 description 2
- 239000008393 encapsulating agent Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000004381 surface treatment Methods 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4638—Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Abstract
The invention relates to a manufacturing method of a composite circuit board, which comprises the following steps: providing an inner layer substrate, and forming a first circuit pattern, a first mark, a second circuit pattern and a second mark on each inner layer substrate unit; gluing a colloid on the inner layer substrate; cutting the inner substrate into a plurality of inner substrate units; providing a first outer layer substrate to form a first outer layer circuit pattern and a third mark; attaching the inner substrate unit to the first outer substrate, and aligning the first mark with the third mark for positioning; providing a second outer layer substrate to form a second outer layer circuit pattern and a fourth mark; combining the inner layer substrate unit on the second outer layer substrate, and aligning the second mark to the fourth mark for positioning; forming electrical conduction among the inner substrate unit, the first outer substrate and the second outer substrate; forming through holes on the first outer layer substrate and the second outer layer substrate respectively; and cutting to form a plurality of composite circuit boards. The invention also provides a composite circuit board manufactured by the method.
Description
Technical Field
The invention relates to a composite circuit board and a manufacturing method thereof.
Background
With the continuous updating of terminal electronic products, electronic products gradually tend to thin, narrow-frame and full-screen designs. Because the Chip On Flex (COF) circuit substrate has superfine conductive circuits and better flexibility, the Chip On Flex (COF) circuit substrate is widely applied to thin, narrow-frame and full-screen electronic products.
Generally, due to the nature of COFs, they do not meet the requirements of Surface Mount Technology (SMT) assembly, and therefore COFs need to be integrated with flexible circuit boards into composite circuit boards. Currently, when a COF is integrated with the flexible circuit board, the COF is mainly designed by two layers of circuits in the whole body and is manufactured by a double-sided addition method, so that a bonding pad is formed, and then the flexible circuit board is formed on the COF.
In the COF and flexible circuit board bonding, usually, a plurality of COF units (PCS) are bonded to a substrate (PNL) -shaped flexible circuit board. The COF unit has uncertain factors of deviation direction during the attaching process, so that the relative position of each product is not fixed after the attaching process. The conventional method for positioning the COF and the flexible printed circuit board by lamination is to sleeve the COF and the flexible printed circuit board on a positioning rod for positioning. The method still causes that the offset of the inner and outer layer products can not meet the requirement of the fitting precision.
Disclosure of Invention
Accordingly, there is a need for a composite circuit board and a method for fabricating the same that overcomes the above-mentioned problems.
A manufacturing method of a composite circuit board comprises the following steps:
providing an inner substrate, wherein the inner substrate comprises a plurality of connected inner substrate units, a first circuit pattern and at least one first mark are formed on one side of each inner substrate unit, a second circuit pattern and at least one second mark are formed on the other side of each inner substrate unit, at least one first bonding pad is formed on the first circuit pattern, and at least one second bonding pad is formed on the second circuit pattern;
gluing a colloid on the inner layer substrate;
cutting the inner substrate to form a plurality of inner substrate units;
providing a first outer-layer substrate, and forming a first outer-layer circuit pattern and third marks on the first outer-layer substrate, wherein the third marks correspond to the first marks one to one;
the inner-layer substrate unit is attached to the first outer-layer substrate through the colloid, and the first mark is aligned to the third mark for positioning during attachment;
providing a second outer layer substrate, and forming a second outer layer circuit pattern and fourth marks on the second outer layer substrate, wherein the fourth marks correspond to the second marks one to one;
attaching the other side of the inner substrate unit to the second outer substrate through the colloid, and positioning by aligning the second mark with the fourth mark during attaching;
forming electrical conduction among the inner layer substrate unit, the first outer layer substrate and the second outer layer substrate;
forming through holes on the first outer layer substrate and the second outer layer substrate respectively to expose the first bonding pad and the second bonding pad;
and cutting the second outer layer substrate and the first outer layer substrate to form a plurality of the composite circuit boards, wherein at least one edge of the inner layer substrate does not extend to the edge of the composite circuit board.
Further, after forming a first circuit pattern and at least one first mark on one side of the inner substrate and forming a second circuit pattern and at least one second mark on the other side of the inner substrate, the method further includes: and forming a first protective layer on the outer surface of the inner substrate by tin melting, wherein the first protective layer covers the first circuit pattern and the second circuit pattern.
Further, after forming the first protective layer, the method further includes: and forming a first covering layer on the first protection layer of the inner-layer substrate.
Further, the first cover layer includes a main body portion formed on the first protective layer and a plurality of extension portions extending from the main body portion toward the first line pattern and the second line pattern.
Further, in the step of forming electrical conduction among the inner substrate unit, the first outer substrate, and the second outer substrate, the inner substrate unit, the first outer substrate, and the second outer substrate are electrically communicated by forming a conductive hole and filling a conductive paste.
Further, after the step of forming electrical conduction between the inner layer substrate unit, the first outer layer substrate, and the second outer layer substrate, the method further includes: and forming a second covering layer and a second protective layer on the outer surfaces of the first outer layer substrate and the second outer layer substrate.
Furthermore, a first conductive hole and a second conductive hole are formed in the first outer substrate, the first conductive hole penetrates through the first outer substrate and the colloid and extends to the first circuit pattern of the inner substrate unit, the second conductive hole penetrates through the first outer substrate and the colloid and extends to the second outer substrate, a third conductive hole is formed in the second outer substrate, and the third conductive hole penetrates through the second outer substrate and extends to the second circuit pattern of the inner substrate unit.
Furthermore, the number of the first marks is two, and the two first marks are respectively arranged at the diagonal positions of the surface where the first marks are located.
Further, in the step of attaching the inner-layer substrate unit to the first outer-layer substrate through the colloid, the first mark is aligned with the third mark by recognizing and positioning through visual recognition equipment.
A composite circuit board comprises an inner layer substrate unit, a first outer layer substrate and a second outer layer substrate, wherein the first outer layer substrate and the second outer layer substrate are connected to two sides of the inner layer substrate unit respectively, at least one first pad and at least one second pad are formed on two sides of the inner layer circuit substrate unit respectively, the inner layer substrate unit is connected to the first outer layer substrate and the second outer layer substrate through a colloid respectively, at least one edge of the inner layer substrate unit does not extend to the edge of the composite circuit board, a first conductive hole and a second conductive hole are formed in the first outer layer substrate, the first conductive hole penetrates through the first outer layer substrate and extends to a first circuit pattern of the inner layer substrate unit, the second conductive hole penetrates through the first outer layer substrate, the colloid and the second outer layer substrate, a third conductive hole is formed in the second outer layer substrate, the third conductive hole penetrates through the second outer layer substrate and extends to a second circuit pattern of the inner layer substrate unit The third conductive hole is opposite to the first conductive hole, the first outer substrate is provided with a first through hole to expose the first pad, the second outer substrate is provided with a second through hole to expose the second pad, two sides of the inner substrate unit are respectively provided with at least one first mark and at least one second mark, the first outer substrate is provided with at least one third mark, the second outer substrate is provided with at least one fourth mark, the first mark is aligned with the third mark, and the second mark is aligned with the fourth mark. Compared with the prior art, in the manufacturing method of the composite circuit board, the first mark and the second mark are respectively arranged on the two opposite sides of the inner layer substrate, the third mark is arranged on the first outer layer substrate, and the fourth mark is arranged on the second outer layer substrate. When the first mark and the third mark are aligned and the second mark and the fourth mark are aligned for positioning, the accuracy during bonding is effectively improved. The composite circuit board is accurate in alignment.
Drawings
Fig. 1 is a schematic cross-sectional view illustrating a first circuit pattern, a first mark, a second circuit pattern and a second mark formed on an inner substrate according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view of the inner substrate of FIG. 1 after forming a first passivation layer thereon.
Fig. 3 is a schematic cross-sectional view of the inner substrate of fig. 2 after a first cap layer is formed on the first protective layer.
Fig. 4 is a cross-sectional view of the inner substrate of fig. 3 after the adhesive is applied and the inner substrate is cut into a plurality of inner substrate units.
Fig. 5 is a schematic cross-sectional view illustrating a first outer layer circuit pattern and a third mark formed on a first outer layer substrate according to an embodiment of the invention.
Fig. 6 is a schematic cross-sectional view of the plurality of inner substrate units in fig. 4 attached to the first outer substrate in fig. 5.
Fig. 7 is a schematic cross-sectional view illustrating a second outer layer circuit pattern and a fourth mark formed on a second outer layer substrate according to an embodiment of the invention.
Fig. 8 is a schematic cross-sectional view of the second outer substrate of fig. 7 attached to the plurality of inner substrate units of fig. 6.
Fig. 9 is a schematic cross-sectional view of the inner substrate unit, the first outer substrate, and the second outer substrate of fig. 8 after electrical conduction is established therebetween.
Fig. 10 is a schematic cross-sectional view of the first outer substrate and the second outer substrate in fig. 9 after forming a second cover layer and a second protective layer.
Fig. 11 is a schematic cross-sectional view of the first and second outer substrates of fig. 10 after forming first and second through-holes.
Fig. 12 is a schematic cross-sectional view of a composite circuit board according to an embodiment of the present invention.
Description of the main elements
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
The manufacturing method of the composite circuit board provided by the technical scheme comprises the following steps:
first, referring to fig. 1, an inner substrate 10a is provided, where the inner substrate 10a includes a plurality of connected inner substrate units 10, a first circuit pattern 121 and at least one first mark 122 are formed on one side of each inner substrate unit 10, and a second circuit pattern 123 and at least one second mark 124 are formed on the other side of each inner substrate unit 10. At least one first pad 1211 is formed on each of the first line patterns 121, and at least one second pad 1231 is formed on each of the second line patterns 123.
In this embodiment, the number of the first marks 122 and the second marks 124 is two, and the first marks and the second marks are respectively located at diagonal positions of the inner substrate unit 10 where the first marks and the second marks are located. In the present embodiment, the first mark 122 and the second mark 124 are both rectangular. It is understood that in other embodiments, the number and shape of the first marks 122 and the second marks 124 can be set as desired.
In the present embodiment, the first line pattern 121 and the second line pattern 123 are formed by a semi-additive method. That is, the first and second circuit patterns 121 and 123 are formed by sequentially performing the steps of drilling, electroless copper plating, film pressing, exposure, development, copper plating, film removal, etching, and the like on the inner layer substrate 10 a.
The first mark 122 and the second mark 124 are formed together in the etching step, and the first mark 122 and the second mark 124 are not electrically connected to the first circuit pattern 121 or the second circuit pattern 123.
It is understood that, in other embodiments, the first line pattern 121 and the second line pattern 123 may also be formed by an additive process or a subtractive process.
Referring to fig. 2, a first passivation layer 13 is formed on the outer surface of the inner substrate 10 a.
The first protective layer 13 is formed by tin plating.
The first protective layer 13 covers the first and second line patterns 121 and 123.
Third, referring to fig. 3, a first capping layer 14 is formed on the first protective layer 13 of the inner substrate 10 a.
The first cover layer 14 includes a main body portion 141 formed on the first protective layer 13 and a plurality of extension portions 142 extending from the main body portion 141 toward the first and second line patterns 121 and 123.
Fourthly, referring to fig. 4, a glue 40 is attached to one side of the inner substrate 10a, and the inner substrate 10a is cut into a plurality of inner substrate units 10.
In the embodiment of the present invention, the glue 40 is attached to one side of the first circuit pattern 121. The first pads 1211 are exposed through the molding compound 40.
In the fifth step, referring to fig. 5, a first outer layer substrate 20 is provided, and a first outer layer circuit pattern 221 and a third mark 222 are formed on the first outer layer substrate 20.
In this embodiment, the first outer layer circuit pattern 221 and the third mark 222 are formed by a subtractive method. That is, the first outer layer circuit pattern 221 and the third mark 222 are formed by performing the steps of film pressing, etching, film removing, etc. on the first outer layer substrate 20 at a time.
The third marks 222 correspond to the first marks 122 one to one.
Referring to fig. 6, the inner substrate unit 10 is attached to the first outer substrate 20 through the adhesive 40, and the first mark 122 is aligned with the third mark 222 for positioning.
In the present embodiment, the first mark 122 is aligned with the third mark 222 by recognizing the positioning through a visual recognition device, but is not limited thereto.
The molding compound 40 is connected to the first circuit pattern 121 of the inner substrate unit 10 and the first insulating layer 21 of the first outer substrate 20.
In the seventh step, referring to fig. 7, a second outer substrate 30 is provided, and a second outer circuit pattern 321 and a fourth mark 322 are formed on the second outer substrate 30.
The second outer layer wiring pattern 321 and the fourth mark 322 are formed by a subtractive method. The fourth mark 322 corresponds to the second mark 124 one-to-one by 1.
In an eighth step, referring to fig. 8, a second outer substrate 30 is attached to the other side of the inner substrate unit 10.
The inner substrate unit 10 and the second outer substrate 30 are also connected by a glue 40. The adhesive 40 connects the second line pattern 123 and the second insulating layer 31. The colloid 40 further fills the space between the first outer substrate 20 and the second outer substrate 30 and covers the inner substrate unit 10. The at least one second pad 1231 is exposed through the adhesive 40.
In the ninth step, referring to fig. 9, the inner substrate unit 10, the first outer substrate 20 and the second outer substrate 30 are electrically connected to each other.
In the embodiment of the present invention, the inner substrate unit 10, the first outer substrate 20, and the second outer substrate 30 are electrically connected by forming conductive holes and filling conductive paste. The conductive vias are formed by, but not limited to, laser drilling and two-time drilling.
Specifically, the first outer substrate 20 is formed with a first conductive via 201 and a second conductive via 202. The first conductive via 201 penetrates the first outer layer substrate 20 and the encapsulant 40 and extends to the first circuit pattern 121 of the inner layer substrate unit 10. The second conductive via 202 penetrates the first outer substrate 20, the encapsulant 40 and extends to the second outer substrate 30. A third conductive hole 301 is formed in the second outer substrate 30. The third conductive via 301 penetrates the second external substrate 30 and extends to the second line pattern 123 of the internal substrate unit 10. The third conductive via 301 is disposed opposite to the first conductive via 201. The first conductive hole 201, the second conductive hole 202 and the third conductive hole 301 are all electrically connected by means of conductive paste.
In the tenth step, referring to fig. 10, a second cover layer 50 and a second protective layer 60 are formed on the outer surface of the first outer substrate 20 and the outer surface of the second outer substrate 30.
The second cover layer 50 includes but is not limited to CVL, PiCL, or ink, and the second protective layer 60 is formed by surface treatment such as gold plating or gold plating.
As a tenth step, referring to fig. 11, a partial region of the first outer layer substrate 20 and a partial region of the second outer layer substrate 30 are removed, thereby forming a first via hole 203 and a second via hole 303 to expose the first pad 1211 and the second pad 1231 of the inner layer substrate.
In a tenth step, referring to fig. 12, the second outer substrate 30 and the first outer substrate 20 are sequentially cut to form a plurality of composite circuit boards 100.
At least one side of the inner substrate unit 10 does not extend to the edge of the composite circuit board 100.
In the method for manufacturing the composite circuit board 100 according to the embodiment of the invention, the first mark 122 and the second mark 124 are respectively disposed on two opposite sides of the inner layer substrate 10a, and the third mark 222 is disposed on the first outer layer substrate 20 and the fourth mark 322 is disposed on the second outer layer substrate 30. The first mark 122 is aligned with the third mark 222 and the second mark 124 is aligned with the fourth mark 322 during the bonding, thereby effectively improving the accuracy during the bonding.
Further, the inner substrate 10a is cut into a plurality of inner substrate units 10 and then connected with the first outer substrate 20 and the second outer substrate 30 through the glue 40, so that the waste of the first outer substrate 20 and the second outer substrate 30 cannot be caused by the scrapping of the single inner substrate unit 10, the layout flexibility of the inner substrate unit 10 and the first outer substrate 20 and the second outer substrate 30 is higher, and the utilization rates of the inner substrate 10a and the first outer substrate 20 and the second outer substrate 30 are improved.
Further, the inner substrate 10a, the first outer substrate 20, and the second outer substrate 30 are independently fabricated and then bonded, so that the fabrication cycle can be reduced.
In the present embodiment, the composite circuit board 100 manufactured by the method of manufacturing a composite circuit board of the present invention is a four-layer board stack, but is not limited thereto, and in other embodiments, a five-layer board, a six-layer board, or other layers of circuit boards may be formed in the same manner.
Referring to fig. 12, the present invention further provides a composite circuit board 100 manufactured by the method for manufacturing a composite circuit board. The composite circuit board 100 includes an inner substrate unit 10, and a first outer substrate 20 and a second outer substrate 30 respectively connected to both sides of the inner substrate unit 10. The first outer layer substrate 20 and the second outer layer substrate 30 are bonded to the inner layer substrate unit 10 by a glue 40.
The inner substrate unit 10 has a first mark 122 and a second mark 124 on two sides thereof. The first external substrate 20 is provided with a third mark 222. The second outer substrate 30 is provided with a fourth mark 322. The first mark 122 is aligned with the third mark 222. The second mark 124 is aligned with the fourth mark 322.
In the embodiment of the present invention, the inner substrate unit 10 is a COF, and the first and second outer substrates 20 and 30 are flexible circuit boards.
The inner layer substrate unit 10 is connected to the first outer layer substrate 20 and the second outer layer substrate 30, and in the present embodiment, is connected to one end of the first outer layer substrate 20 and one end of the second outer layer substrate 30. At least one side of the inner substrate unit 10 does not extend to the edge of the composite circuit board 100.
The first and second line patterns 121 and 123 are formed on both sides of the inner layer substrate unit 10, respectively. In the embodiment of the present invention, the material of the first circuit pattern 121 and the second circuit pattern 123 is copper, and it can be understood that the material of the first circuit pattern 121 and the second circuit pattern 123 can be similar conductive metal.
Further, at least one first pad 1211 is formed on the first circuit pattern 121. At least one second pad 1231 is formed on the second line pattern 123. The at least one first pad 1211 is exposed through the first outer substrate 20. The at least one second pad 1231 is exposed through the second external substrate 30.
Further, the inner substrate unit 10 further includes a first protective layer 13 formed on outer surfaces of the first and second line patterns 121 and 123, that is, the first protective layer 13 covers the first and second line patterns 121 and 123. The first protective layer 13 prevents oxidation of the first pad 1211 and the second pad 1231, increasing the reliability of the inner substrate unit 10. In the embodiment of the present invention, the first protection layer 13 is formed by using tin melting.
Further, the inner substrate unit 10 further includes a first cover layer 14 formed on an outer surface of the first protective layer 13 and filled in a portion of the first line pattern 121 and the second line pattern 123. The first cover layer 14 includes a main body portion 141 formed on an outer surface of the first protective layer 13, and a plurality of extension portions 142 extending from the main body portion 141 toward the first line pattern 121 or the second line pattern 123. The extension portion 142 is disposed perpendicular to the body portion 141.
The first outer substrate 20 is provided with a first outer circuit pattern 221.
Further, a first conductive via 201 and a second conductive via 202 are formed on the first outer substrate 20. The first conductive via 201 penetrates the first outer layer substrate 20 and extends to the first line pattern 121 of the inner layer substrate unit 10. The second conductive via 202 penetrates the first external substrate 20, the colloid 40, and the second external substrate 30.
Further, a first through hole 203 is formed in the first outer substrate 20. The first pad 1211 is exposed through the first via 203.
The second outer substrate 30 is provided with a second outer wiring pattern 321.
Further, a third conductive hole 301 is formed in the second outer substrate 30. The third conductive via 301 penetrates the second outer substrate 30 and extends to the second circuit pattern 123 of the inner substrate unit 10, and the third conductive via 301 is disposed opposite to the first conductive via 201. The inner substrate unit 10 is located at one side of the second conductive via 202.
Further, conductive paste is filled in the first conductive via 201, the second conductive via 202, and the third conductive via 301, so that an electrical connection is formed among the inner substrate unit 10, the first outer substrate 20, and the second outer substrate 30.
Further, a second through hole 303 is formed in the second outer substrate 30. The second pad 1231 is exposed through the second through hole 303.
In addition, the composite circuit board 100 of the present invention further includes a second cover layer 50 and a second protective layer 60 formed on the outer surfaces of the first outer substrate 20 and the second outer substrate 30. The second cover layer 50 and the second protective layer 60 serve to prevent the first and second exterior substrates 20 and 30 from being oxidized, so as to improve stability and reliability of the composite circuit board 100.
In the embodiment of the present invention, the second cover layer 50 includes, but is not limited to, CVL, PiCL, or ink, and the second protective layer 60 is formed by surface treatment such as gold plating or gold plating.
It is understood that various other changes and modifications may be made by those skilled in the art based on the technical idea of the present invention, and all such changes and modifications should fall within the protective scope of the claims of the present invention.
Claims (10)
1. A manufacturing method of a composite circuit board comprises the following steps:
providing an inner substrate, wherein the inner substrate comprises a plurality of connected inner substrate units, a first circuit pattern and at least one first mark are formed on one side of each inner substrate unit, a second circuit pattern and at least one second mark are formed on the other side of each inner substrate unit, at least one first bonding pad is formed on the first circuit pattern, and at least one second bonding pad is formed on the second circuit pattern;
gluing a colloid on the inner layer substrate;
cutting the inner substrate to form a plurality of inner substrate units;
providing a first outer-layer substrate, and forming a first outer-layer circuit pattern and third marks on the first outer-layer substrate, wherein the third marks correspond to the first marks one to one;
the inner-layer substrate unit is attached to the first outer-layer substrate through the colloid, and the first mark is aligned to the third mark for positioning during attachment;
providing a second outer layer substrate, and forming a second outer layer circuit pattern and fourth marks on the second outer layer substrate, wherein the fourth marks correspond to the second marks one to one;
attaching the other side of the inner substrate unit to the second outer substrate through the colloid, and positioning by aligning the second mark with the fourth mark during attaching;
forming electrical conduction among the inner layer substrate unit, the first outer layer substrate and the second outer layer substrate;
forming through holes on the first outer layer substrate and the second outer layer substrate respectively to expose the first bonding pad and the second bonding pad;
and cutting the second outer layer substrate and the first outer layer substrate to form a plurality of the composite circuit boards, wherein at least one edge of the inner layer substrate does not extend to the edge of the composite circuit board.
2. The method for manufacturing a composite circuit board according to claim 1, wherein: after forming a first circuit pattern and at least one first mark on one side of the inner substrate and forming a second circuit pattern and at least one second mark on the other side of the inner substrate, the method further comprises the following steps: and forming a first protective layer on the outer surface of the inner substrate by tin melting, wherein the first protective layer covers the first circuit pattern and the second circuit pattern.
3. The method for manufacturing a composite circuit board according to claim 2, wherein: after forming the first protective layer, further comprising: and forming a first covering layer on the first protection layer of the inner-layer substrate.
4. The method for manufacturing a composite circuit board according to claim 3, wherein: the first cover layer includes a main body portion formed on the first protective layer and a plurality of extension portions extending from the main body portion toward the first line pattern and the second line pattern.
5. The method for manufacturing a composite circuit board according to claim 1, wherein: in the step of forming electrical conduction among the inner substrate unit, the first outer substrate and the second outer substrate, the inner substrate unit, the first outer substrate and the second outer substrate are electrically communicated in a manner of forming a conductive hole and filling a conductive paste.
6. The method for manufacturing a composite circuit board according to claim 1, wherein: after the step of forming electrical conduction between the inner substrate unit, the first outer substrate, and the second outer substrate, the method further includes: and forming a second covering layer and a second protective layer on the outer surfaces of the first outer layer substrate and the second outer layer substrate.
7. The method for manufacturing a composite circuit board according to claim 6, wherein: the first outer-layer substrate is provided with a first conductive hole and a second conductive hole, the first conductive hole penetrates through the first outer-layer substrate and the colloid and extends to the first circuit pattern of the inner-layer substrate unit, the second conductive hole penetrates through the first outer-layer substrate and the colloid and extends to the second outer-layer substrate, the second outer-layer substrate is provided with a third conductive hole, and the third conductive hole penetrates through the second outer-layer substrate and extends to the second circuit pattern of the inner-layer substrate unit.
8. The method for manufacturing a composite circuit board according to claim 1, wherein: the number of the first marks is two, and the two first marks are respectively arranged at the diagonal positions of the surface where the first marks are located.
9. The method for manufacturing a composite circuit board according to claim 1, wherein: in the step of attaching the inner-layer substrate unit to the first outer-layer substrate through the colloid, the first mark is aligned with the third mark by recognizing and positioning through visual recognition equipment.
10. The utility model provides a composite circuit board, includes the inlayer base plate unit, connect respectively in the first outer base plate and the second outer base plate of inlayer base plate unit both sides, inlayer circuit base plate unit both sides form an at least first pad and an at least second pad respectively, its characterized in that: the inner substrate unit is connected to the first outer substrate and the second outer substrate through a colloid respectively, at least one edge of the inner substrate unit does not extend to the edge of the composite circuit board, a first conductive hole and a second conductive hole are formed in the first outer substrate, the first conductive hole penetrates through the first outer substrate and extends to the first circuit pattern of the inner substrate unit, the second conductive hole penetrates through the first outer substrate, the colloid and the second outer substrate, a third conductive hole is formed in the second outer substrate, the third conductive hole penetrates through the second outer substrate and extends to the second circuit pattern of the inner substrate unit, the third conductive hole is arranged opposite to the first conductive hole, and the first pad is exposed outside the first through hole formed in the first outer substrate, the second outer-layer substrate is provided with a second through hole to expose the second bonding pad, at least one first mark and at least one second mark are arranged on two sides of the inner-layer substrate unit respectively, at least one third mark is arranged on the first outer-layer substrate, at least one fourth mark is arranged on the second outer-layer substrate, the first mark is aligned to the third mark, and the second mark is aligned to the fourth mark.
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| CN201811152605.7A CN110972413B (en) | 2018-09-29 | 2018-09-29 | Composite circuit board and manufacturing method thereof |
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| CN201811152605.7A CN110972413B (en) | 2018-09-29 | 2018-09-29 | Composite circuit board and manufacturing method thereof |
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| CN110972413A true CN110972413A (en) | 2020-04-07 |
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| CN110972413B (en) | 2023-05-26 |
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