CN110970329B - Method for preparing transistor diode based on soluble protective film - Google Patents
Method for preparing transistor diode based on soluble protective film Download PDFInfo
- Publication number
- CN110970329B CN110970329B CN201911180927.7A CN201911180927A CN110970329B CN 110970329 B CN110970329 B CN 110970329B CN 201911180927 A CN201911180927 A CN 201911180927A CN 110970329 B CN110970329 B CN 110970329B
- Authority
- CN
- China
- Prior art keywords
- substrate
- protective film
- manufacturing
- diode based
- transistor diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The invention discloses a method for preparing a transistor diode based on a soluble protective film, which comprises the following steps: (1) substrate processing: etching is carried out on corresponding areas of the front surface and the back surface of a substrate to form an etching area, wherein the substrate comprises a substrate A and a substrate B; (2) attaching a protective film: placing the plurality of pairs of the substrate A and the substrate B obtained in the step (1) on a protective film in a matrix arrangement mode, and attaching the back surface of the substrate on the protective film; (3) preparing a semi-finished diode product; (4) removing the protective film: dissolving the protective film by adopting an organic solvent; (5) preparing a diode finished product: cutting the encapsulation layer into granules. The invention can completely prevent the packaging adhesive from penetrating into the back electrode of the substrate through the design of attaching the protective film on the back of the substrate, reduces the limitation of the size on the precision, and is beneficial to the miniaturization development of the manufactured transistor diode.
Description
Technical Field
The invention belongs to the field of transistor diodes, and particularly relates to a method for preparing a transistor diode based on a soluble protective film.
Background
In the conventional diode manufacturing process, the required glass fiber substrate is usually manufactured by etching, drilling, plugging and grinding. With the miniaturization development of electronic components, the precision achieved by the existing technology is limited, and the arrangement yield of the manufactured diode is reduced.
Disclosure of Invention
In view of the above, the present invention proposes a method for manufacturing a transistor diode based on a soluble protective film.
The technical aim is achieved, and the technical effects are achieved by the following technical scheme:
a method for preparing a transistor diode based on a dissolvable protective film, comprising the steps of:
(1) And (3) substrate processing: etching is carried out on corresponding areas of the front surface and the back surface of the substrate to form an etching area, and then a through hole penetrating through the substrate is drilled in a non-etching area and a metal film is plated; wherein the substrate comprises a substrate A and a substrate B;
(2) Attaching a protective film: placing the plurality of pairs of the substrate A and the substrate B obtained in the step (1) on a protective film in a matrix arrangement mode, and attaching the back surface of the substrate on the protective film;
(3) Preparing a semi-finished diode product: arranging a chip in an etching area on the substrate A, and then connecting the chip with the matched substrate B by using a wire to manufacture a packaging layer for coating the chip and the wire;
(4) Removing the protective film: dissolving the protective film by adopting an organic solvent;
(5) Preparing a diode finished product: the encapsulation layer is cut into granules, each granule comprising a wire and the parts of the substrate A and the substrate B to which the wire is connected.
As a further improvement of the present invention, the protective film is a polyethylene protective film.
As a further improvement of the present invention, the encapsulation layer prepared in step (3) is an epoxy protective layer, and the semi-finished product including the completed wire connection is put into a mold of a molding machine to form an epoxy protective layer covering the upper side of the substrate.
As a further improvement of the invention, the encapsulation layer is also made to partially encapsulate the substrate a and the substrate B, which are located on the front side.
As a further improvement of the present invention, the heights of the substrate a and the substrate B are the same and different.
As a further improvement of the present invention, in the step (2), the distance between the adjacent two pairs of the substrates A and B is 0.10-0.20cm.
As a further improvement of the present invention, the step (1) comprises electroplating the continuous areas of the inner wall of the via hole and the outer rings of the upper and lower surfaces with a copper film by electroplating.
As a further improvement of the present invention, the substrate a and the substrate B are elongated, the width of the substrate a or the substrate B is equal to the width of the substrate included in the fabricated diode, and the etched region is disposed along the extension direction of the substrate a or the substrate B.
As a further improvement of the present invention, in the step (3), the chip is fixed on the etched area of the substrate a by silver colloid.
As a further improvement of the present invention, the step (4) is performed further comprising brushing the back surface of the substrate with a flowing liquid.
The invention has the beneficial effects that:
1. the invention can completely prevent the packaging adhesive from penetrating into the back electrode of the substrate through the design of attaching the protective film on the back of the substrate, reduces the limitation of the size on the precision, and is beneficial to the miniaturization development of the manufactured transistor diode.
2. In the manufacturing process of the substrate, the steps of hole plugging and grinding operation are reduced, and the through holes are conducted in a metal film plating mode, so that the cost is reduced, and the yield is improved.
Drawings
FIG. 1 is a schematic view of a structure of an embodiment of a substrate arranged in an array on a protective film;
FIG. 2 is a schematic diagram of the product structure after die bonding and wire bonding are completed;
FIG. 3 is a schematic view of the structure of the product after the molding step of the present invention;
FIG. 4 is a schematic diagram of the semi-finished structure of the dry film removal of the present invention;
FIG. 5 is a schematic view of the structure of the diode device after dicing according to the present invention;
wherein: 101-substrate A, 102-substrate B, 2-protective film, 3-chip, 4-wire, 5-packaging layer.
Detailed Description
The present invention will be described in further detail with reference to the following examples in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
The principle of application of the invention is described in detail below with reference to the accompanying drawings.
The materials of the raw materials used for preparing the transistor diode by implementing the method of the invention are as follows:
a substrate: glass fiber board
A wire: gold, copper, aluminum, silver
Protective film: the thickness of the film layer consisting of polyethylene was 0.2mm.
And (2) packaging layer: epoxy resin layer
The embodiment of the invention provides a method for manufacturing a diode device by using a substrate with a dry film, which comprises the following steps:
(1) Etching the front and back of the substrate to form a plurality of etching areas; vertically drilling the unetched area and electroplating metallic copper, or metallic silver; the substrate includes a substrate a101 and a substrate B102, which correspond to two substrates in the transistor diode respectively. See in particular fig. 1.
(2) Attaching a protective film 2: and (2) placing the plurality of pairs of the substrate A101 and the substrate B102 obtained in the step (1) on the protective film 2 in a matrix arrangement mode, wherein the back surface of the substrate is attached to the protective film 2. The distance between two arrays connected was 0.2mm.
(3) Dispensing at the position of the front surface of the substrate A101 in the etching area (namely, the placement area of the chip 3), and then placing the chip 3 at the dispensing position, namely, the step of die bonding; in a preferred implementation of this embodiment, specific details are: a die bonder is used to dot a silver paste on the front surface of the substrate a101 at one side of the etched area, then the chip 3 is placed on the silver paste, and after the completion, the chip is baked by an oven, see fig. 2 in particular.
One end of the wire 4 is then connected to the top surface of the chip 3, and the other end is connected to the top surface of the etched area on the front side of the substrate B102, which is the substrate a101, i.e., the wire bonding step, see fig. 2 in particular. In a preferred implementation of this embodiment, specific details are: a wire 4 is soldered to the surface of the chip 3 from a solder joint design area on the front surface of the substrate B102 (the solder joint design area and the placement area of the chip 3 are respectively located at two opposite sides of the etching area), and the wire 4 may be any one of gold, copper, aluminum, and silver.
Finally, a packaging layer 5 is manufactured on the front surface of the substrate, the chip 3 and the wires 4, namely a mould pressing step, and the method is concretely shown in fig. 3; in a preferred implementation of this embodiment, specific details are: placing the substrate finished in the previous step into a die of a die press, injecting liquid epoxy resin glue into the die, covering the areas of the front surfaces of the substrate A101 and the substrate B102, and baking by using an oven after finishing; wherein the encapsulation layer 5 encapsulates the chip 3 and the wires 4. Thereby completing the manufacture of the semi-finished product. In this step, the encapsulation layer 5 is fabricated so as not to penetrate to the back surface of the substrate due to the blocking effect of the underlying protective film 2, thereby improving the accuracy of the miniaturized diode.
(4) And (3) removing the protective film 2 on the back surface of the substrate after the step (4), namely, a photoresist removing step. The step includes dissolving the protective film 2 with an organic solvent and then removing, and further includes brushing off the material of the encapsulation layer 5 attached to the protective film 2 in the previous step and the residual protective film 2 with a fur brush. The structure of the stripped transistor is shown in fig. 4; in a preferred implementation of this embodiment, specific details are: and (3) immersing the substrate in the step (4) in isopropanol solution for 10 minutes, and then removing the material of the packaging layer 5 and the residual protective film 2 adhered to the protective film 2 by using a brush under the scouring action of flowing liquid to obtain a semi-finished product.
(5) Cutting the semi-finished product to finish the manufacture of the diode device; in one embodiment of the present invention, the method specifically comprises: and (3) cutting the substrate 1 after the step (5) to finish the diode manufacturing process and form a plurality of diode devices.
The foregoing has shown and described the basic principles and main features of the present invention and the advantages of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (8)
1. A method for manufacturing a transistor diode based on a dissolvable protective film, comprising the steps of:
(1) And (3) substrate processing: etching is carried out on corresponding areas of the front surface and the back surface of the substrate to form an etching area, and then a through hole penetrating through the substrate is drilled in a non-etching area and a metal film is plated; the substrate comprises a plurality of paired substrates A and B;
(2) Attaching a protective film: placing a plurality of paired substrates A and B obtained in the step (1) on a protective film in a matrix arrangement mode, wherein the back surface of the substrate is attached to the protective film;
(3) Preparing a semi-finished diode product: arranging a chip in an etching area on the substrate A, and then connecting the chip with the matched substrate B by using a wire to manufacture a packaging layer for coating the chip and the wire;
(4) Removing the protective film: dissolving the protective film by adopting an organic solvent;
(5) Preparing a diode finished product: cutting the encapsulation layer into granules, wherein each granule comprises a wire and a part of the substrate A and the substrate B connected with the wire;
in the step (3), the chip is fixed in an etching area of the substrate A through silver colloid;
the step (4) further comprises brushing the back surface of the substrate with a flowing liquid.
2. A method of manufacturing a transistor diode based on a soluble protective film according to claim 1, characterized in that: the protective film is a polyethylene protective film.
3. A method of manufacturing a transistor diode based on a soluble protective film according to claim 1, characterized in that: the encapsulation layer prepared in the step (3) is an epoxy resin protection layer, and the semi-finished product which is connected with the lead is placed into a die of a die press to form the epoxy resin protection layer which covers the upper part of the substrate.
4. A method of manufacturing a transistor diode based on a dissolvable protective film according to claim 3, wherein: the manufactured packaging layer also partially coats the substrate A and the substrate B, and the substrate A and the substrate B are positioned on one side of the front face.
5. A method of manufacturing a transistor diode based on a soluble protective film according to claim 1, characterized in that: the heights of the substrate A and the substrate B are the same and different.
6. A method of manufacturing a transistor diode based on a soluble protective film according to claim 1, characterized in that: in the step (2), the distance between two adjacent pairs of the substrates A and B is 0.10-0.20cm.
7. A method of manufacturing a transistor diode based on a soluble protective film according to claim 1, characterized in that: and (2) electroplating copper films on the continuous areas of the inner hole wall of the through hole and the outer rings of the upper surface and the lower surface by adopting an electroplating method.
8. A method of manufacturing a transistor diode based on a soluble protective film according to claim 1, characterized in that: the substrate A and the substrate B are long, the width of the substrate A or the substrate B is equal to the width of the substrate included in the manufactured diode, and the etching area is arranged along the extending direction of the substrate A or the substrate B.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911180927.7A CN110970329B (en) | 2019-11-27 | 2019-11-27 | Method for preparing transistor diode based on soluble protective film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911180927.7A CN110970329B (en) | 2019-11-27 | 2019-11-27 | Method for preparing transistor diode based on soluble protective film |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110970329A CN110970329A (en) | 2020-04-07 |
CN110970329B true CN110970329B (en) | 2024-03-29 |
Family
ID=70031810
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201911180927.7A Active CN110970329B (en) | 2019-11-27 | 2019-11-27 | Method for preparing transistor diode based on soluble protective film |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110970329B (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW445608B (en) * | 2000-05-19 | 2001-07-11 | Siliconware Precision Industries Co Ltd | Semiconductor package and manufacturing method thereof of lead frame without flashing |
CN1518099A (en) * | 2003-01-16 | 2004-08-04 | 松下电器产业株式会社 | Lead frame, manufacturing method thereof, and semiconductor device using lead frame |
JP2006210807A (en) * | 2005-01-31 | 2006-08-10 | Mitsui High Tec Inc | Method for manufacturing semiconductor device |
CN203707129U (en) * | 2013-11-28 | 2014-07-09 | 丽智电子(昆山)有限公司 | Base plate configuration structure of diode assemblies |
CN109585568A (en) * | 2018-11-29 | 2019-04-05 | 丽智电子(昆山)有限公司 | A kind of diode component and its manufacturing method based on laser processing |
-
2019
- 2019-11-27 CN CN201911180927.7A patent/CN110970329B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW445608B (en) * | 2000-05-19 | 2001-07-11 | Siliconware Precision Industries Co Ltd | Semiconductor package and manufacturing method thereof of lead frame without flashing |
CN1518099A (en) * | 2003-01-16 | 2004-08-04 | 松下电器产业株式会社 | Lead frame, manufacturing method thereof, and semiconductor device using lead frame |
JP2006210807A (en) * | 2005-01-31 | 2006-08-10 | Mitsui High Tec Inc | Method for manufacturing semiconductor device |
CN203707129U (en) * | 2013-11-28 | 2014-07-09 | 丽智电子(昆山)有限公司 | Base plate configuration structure of diode assemblies |
CN109585568A (en) * | 2018-11-29 | 2019-04-05 | 丽智电子(昆山)有限公司 | A kind of diode component and its manufacturing method based on laser processing |
Also Published As
Publication number | Publication date |
---|---|
CN110970329A (en) | 2020-04-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100639738B1 (en) | Manufacturing method of circuit device | |
US6429508B1 (en) | Semiconductor package having implantable conductive lands and method for manufacturing the same | |
CN107644862B (en) | Rugged leadframe with silver nanolayers | |
CN102569101B (en) | Outer pin-free packaging structure and manufacturing method thereof | |
US8703598B2 (en) | Manufacturing method of lead frame substrate | |
US7939380B2 (en) | Method of manufacturing a semiconductor component with a low cost leadframe using a non-metallic base structure | |
US9490224B2 (en) | Semiconductor device and manufacturing method thereof | |
CN105206539A (en) | Fan-out package preparation method | |
US8293572B2 (en) | Injection molding system and method of chip package | |
KR20030019082A (en) | Manufacturing method of circuit device | |
US10755940B2 (en) | Plating interconnect for silicon chip | |
CN110970329B (en) | Method for preparing transistor diode based on soluble protective film | |
US6610924B1 (en) | Semiconductor package | |
CN215220716U (en) | Multi-base-island chip packaging structure | |
CN114759139B (en) | Low-cost packaging process for filter | |
US9806012B2 (en) | IC carrier of semiconductor package and manufacturing method thereof | |
JP4979661B2 (en) | Manufacturing method of semiconductor device | |
CN114999924B (en) | Embedded chip packaging process and embedded chip | |
JP2003037125A (en) | Method for manufacturing circuit device | |
JP4342157B2 (en) | Circuit device manufacturing method | |
CN1314108C (en) | Semiconductor chip carrier, semiconductor package and semiconductor package method | |
KR20060024451A (en) | Semiconductor package in wafer molding form and fabrication thereof | |
JP3600136B2 (en) | Circuit device manufacturing method | |
CN107275228A (en) | Semiconductor packaging method for improving precision of upper cover plate | |
CN112820723A (en) | Multi-base island chip packaging structure and packaging method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20231013 Address after: 226000 No. 789 Kangfu Road, High tech Industrial Development Zone, Nantong City, Jiangsu Province Applicant after: LIZHI ELECTRONICS (NANTONG) CO.,LTD. Address before: 215300 no.989, Hanpu Road, hi tech Industrial Park, Kunshan hi tech Zone, Suzhou City, Jiangsu Province Applicant before: LIZ ELECTRONICS (KUNSHAN) Co.,Ltd. |
|
TA01 | Transfer of patent application right | ||
GR01 | Patent grant | ||
GR01 | Patent grant |