CN110956921B - Array substrate, driving method thereof, pixel driving device and display device - Google Patents

Abstract

Embodiments of the present invention provide an array substrate and a driving method thereof, a pixel driving device, and a display device, which relate to the field of display technology and can improve display effects. An array substrate includes: multiple pixels distributed in an array; each pixel in the same row includes multiple sub-pixels corresponding to different colors, and every two adjacent sub-pixels in the same row of pixels form a sub-pixel pair, and the same The sub-pixels of the column correspond to the same color; multiple gate line pairs; the gate line pair includes two gate lines arranged in parallel, and the pixels in the same row are connected to the two gate lines in the same gate line pair, where the two gate lines in each sub-pixel pair The sub-pixels are respectively connected to different gate lines; multiple data lines; the two sub-pixels in each sub-pixel pair are respectively connected to the same data line, and the same data line is connected to each sub-pixel located in an odd row of a column of sub-pixel pairs. The pixel pairs are connected and connected to each sub-pixel pair located in an even row among adjacent column sub-pixel pairs.

Description

Array substrate and driving method thereof, pixel driving device, display device

Technical field

The present invention relates to the field of display technology, and in particular, to an array substrate and a driving method thereof, a pixel driving device, and a display device.

Background technique

In the context of the continuous development of display devices towards low cost and high quality, the gate driver on array (GOA) design of an array substrate driven by a dual gate has been widely used.

In addition, in order to improve the screen-to-body ratio of the display device, one data line is usually used to drive two adjacent columns to drive sub-pixels, as shown in Figure 1, in order to achieve the purpose of reducing the frame by reducing the number of data lines.

Contents of the invention

Embodiments of the present invention provide an array substrate, a driving method thereof, a pixel driving device, and a display device, which can improve display effects.

In order to achieve the above objects, embodiments of the present invention adopt the following technical solutions:

On the one hand, an array substrate is provided, including: a plurality of pixels distributed in an array; each pixel in the same row includes a plurality of sub-pixels corresponding to different colors, and every two adjacent sub-pixels in the pixels in the same row The pixels form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; multiple gate line pairs; the gate line pair includes two gate lines arranged in parallel, and the pixels in the same row and two of the same gate line pair Gate line connection, wherein two sub-pixels in each sub-pixel pair are respectively connected to different gate lines; multiple data lines; two sub-pixels in each sub-pixel pair are respectively connected to the same data line , and the same data line is connected to each sub-pixel pair located in an odd-numbered row among the sub-pixel pairs in one column, and is connected to each sub-pixel pair located in an even-numbered row among the sub-pixel pairs in an adjacent column.

Optionally, each of the pixels includes three sub-pixels corresponding to different colors; the three sub-pixels corresponding to different colors are respectively a first color sub-pixel, a second color sub-pixel and a third color sub-pixel; all pixels in the same row The switching unit of the first color sub-pixel is connected to one gate line of the same gate line pair, and the switching unit of the second color sub-pixel is connected to the other gate line of the same gate line pair.

Optionally, the first color is red, the second color is green, and the third color is blue.

Optionally, two gate lines of the same gate line pair are distributed on both sides of the pixel in the same row; for each sub-pixel in each column, the corresponding gate line pair is distributed in Gate lines on the same side of the row of pixels where the sub-pixels are located are connected.

Optionally, the sub-pixels respectively connected to different gate lines in adjacent gate line pairs located between two adjacent rows of pixels and connected to the same data line have different colors.

On the other hand, a driving method for an array substrate as described above is provided, which provides gate scanning signals to a plurality of gate lines in a preset order; when providing a gate scanning signal to each gate line, inputting a gate scanning signal to each data line the corresponding data signal.

Optionally, providing gate scan signals to multiple gate lines in a preset order includes: providing gate scan signals to the i+(n-1)×4th row gate lines in sequence; i∈{1,3, 2,4}; n∈{1,2,3,4}; Loop the above steps until gate scanning signals are provided to all gate lines, and each value of i increases by 16 for each cycle.

On the other hand, a pixel driving device is provided, including: a driving module for providing gate scanning signals to a plurality of gate lines in a preset order, and when providing gate scanning signals to each gate line, Enter the corresponding data signal.

Optionally, the driving module includes: a plurality of gate line driving units, configured to provide gate scanning signals to the i+(n-1)×4th row gate lines in sequence; i∈{1,3,2,4} ;n∈{1,2,3,4}.

In yet another aspect, a display device is provided, including the array substrate as described above, and/or the pixel driving device as described above.

Embodiments of the present invention provide an array substrate, a driving method thereof, a pixel driving device, and a display device. By arranging multiple pixels, multiple gate line pairs, and multiple data lines distributed in an array, each pixel in the same row includes multiple Corresponds to sub-pixels of different colors, and every two adjacent sub-pixels in the same row of pixels form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; the gate line pair includes two gate lines set in parallel, and the pixels in the same row Connected to two gate lines in the same gate line pair, where the two sub-pixels in each sub-pixel pair are connected to different gate lines respectively; the two sub-pixels in each sub-pixel pair are connected to the same data line respectively, and The same data line is connected to each sub-pixel pair located in an odd-numbered row in a column of sub-pixel pairs, and is connected to each sub-pixel pair located in an even-numbered row in an adjacent column of sub-pixel pairs; the data line is zigzag-shaped and spans adjacent rows multiple times. Column sub-pixel pairs, so that when displaying a solid color picture, the corresponding polarity of the sub-pixel appears irregularly, breaking up the problem of positive and negative polarity brightness inconsistency caused by coupling, thereby improving the display effect.

Description of the drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without exerting creative efforts.

Figure 1 is a schematic structural diagram of an array substrate in the prior art;

Figure 2 is a schematic structural diagram of an array substrate provided by an embodiment of the present invention;

Figure 3 is a schematic structural diagram of yet another array substrate provided by an embodiment of the present invention;

Figure 4 is a schematic structural diagram of another array substrate provided by an embodiment of the present invention;

Figure 5 is a schematic structural diagram of another array substrate provided by an embodiment of the present invention;

Figure 6 is a schematic flowchart of a driving method for an array substrate provided by an embodiment of the present invention;

Figure 7 is a schematic diagram of a clock signal provided by an embodiment of the present invention;

Figure 8 is a schematic diagram of yet another clock signal provided by an embodiment of the present invention;

Figure 9 is a schematic structural diagram of a pixel driving device provided by an embodiment of the present invention;

FIG. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention.

Reference signs:

1-display device; 2-array substrate; 3-pixel driving device; 4-driving module; 41-gate line driving unit; 10-sub-pixel pair.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

As shown in FIG. 1 , the array substrate 2 of the prior art includes a plurality of pixels, a plurality of gate line pairs and a plurality of data lines arranged in an array. Each pixel in the same row includes a plurality of sub-pixels corresponding to different colors (for example, each pixel includes three sub-pixels corresponding to three primary colors, namely, a red sub-pixel, a green sub-pixel and a blue sub-pixel). The sub-pixels in the same column Pixels correspond to the same color. The gate line pair includes two gate lines arranged in parallel. Each sub-pixel in the odd-numbered column of the same row of pixels is connected to one gate line in the pair of gate lines, and each sub-pixel in the even-numbered column is connected to the other gate line in the same pair of gate lines. Gate lines are connected; every two columns of sub-pixels are connected to a data line.

Under the control of the clock signal, the driving module sequentially provides gate scanning signals to the gate lines. Among them, during the period when the gate scanning signal of the 2N+1 row (N is a positive integer greater than or equal to 0) is at high level, the corresponding turned-on pixels of the 2N+1 row are always in a storage power state, and the gate of the 2N row When the scan signal is pulled down, the pixels driven by the gate scan signal of row 2N+1 will be coupled, causing the corresponding pixel charge to be driven insufficiently, resulting in inconsistent positive and negative polarity brightness of pixels displaying the same color, which will adversely affect the display effect and quality. Impact.

To address the above problems, embodiments of the present invention provide an array substrate, as shown in Figures 2 to 5, including:

Multiple pixels distributed in an array; each pixel in the same row includes multiple sub-pixels corresponding to different colors, and every two adjacent sub-pixels in the same row of pixels form a sub-pixel pair 10, and the sub-pixel pair in the same column 10 should be the same color.

It can be understood that if each pixel includes multiple sub-pixels corresponding to different colors, for the same row of pixels, the sub-pixels corresponding to different colors are arranged periodically.

Example 1: Each pixel includes sub-pixels corresponding to three colors, namely a first color sub-pixel, a second color sub-pixel and a third color sub-pixel; where, in the same row, the first color sub-pixel in the first pixel The color sub-pixel and the second color sub-pixel form a sub-pixel pair 10, and the third color sub-pixel in the first pixel and the first color sub-pixel in the adjacent second pixel form a sub-pixel pair 10, The second color sub-pixel and the third color sub-pixel in the second pixel form a sub-pixel pair 10, and so on.

Example 2: Each pixel includes sub-pixels corresponding to four colors, namely a first color sub-pixel, a second color sub-pixel, a third color sub-pixel and a fourth color sub-pixel; wherein, in the same row, the first color sub-pixel The first color sub-pixel and the second color sub-pixel in the first pixel form a sub-pixel pair 10, the third color sub-pixel and the fourth color sub-pixel in the first pixel form a sub-pixel pair 10, and so on.

Multiple gate line pairs; a gate line pair includes two gate lines arranged in parallel. The pixels in the same row are connected to two gate lines in the same gate line pair. The two sub-pixels in each sub-pixel pair 10 are respectively connected to different gate lines. wire connection.

For example, if the two gate lines included in a gate line pair are the first gate line and the second gate line respectively, then in the sub-pixel pair 10 including the first color sub-pixel and the second color sub-pixel, the first color The subpixel is connected to the first gate line, and the second color subpixel is connected to the second gate line. Alternatively, the first color subpixel is connected to the second gate line, and the second color subpixel is connected to the first gate line.

Multiple data lines; two sub-pixels in each sub-pixel pair 10 are respectively connected to the same data line, and the same data line is connected to each sub-pixel pair 10 located in an odd-numbered row in a column of sub-pixel pairs 10, and is connected to the same data line. Each sub-pixel pair 10 located in an even-numbered row among the sub-pixel pairs 10 in adjacent columns is connected.

It can be understood that since the same data line is connected to each sub-pixel pair 10 located in an odd-numbered row in a column of sub-pixel pairs 10, and is connected to each sub-pixel pair 10 located in an even-numbered row in an adjacent column of sub-pixel pairs 10, then the data The line extends along the direction of the pixel column in a zigzag shape at right angles.

For example, if there are multiple columns of sub-pixel pairs 10, for the second column of sub-pixel pairs 10, two sub-pixels in each sub-pixel pair 10 are respectively connected to the same data line. On this basis, for the second column of sub-pixel pairs 10 Each sub-pixel pair 10 in the odd-numbered row and each sub-pixel pair 10 located in the even-numbered row in the first column of sub-pixel pairs 10 are connected to the same data line; each sub-pixel pair located in the even-numbered row 10 and each sub-pixel pair 10 located in an odd-numbered row in the third column sub-pixel pair 10 are connected to the same data line; alternatively, each sub-pixel pair 10 located in an odd-numbered row and each sub-pixel pair 10 located in an even-numbered row in the third column sub-pixel pair 10 are connected to the same data line. The pixel pairs 10 are connected to the same data line; each sub-pixel pair 10 located in the even-numbered rows and each sub-pixel pair 10 located in the odd-numbered rows in the first column of sub-pixel pairs 10 are connected to the same data line.

It should be noted that in the embodiment of the present invention, the data signals transmitted by two adjacent data lines have opposite polarities. For example, within one frame period, the data signal transmitted by the first data line is of positive polarity, the data signal transmitted by the second data line is of negative polarity, and the data signal transmitted by the third data line is of positive polarity.

Since one data line is connected to each sub-pixel pair 10 located in an odd-numbered row in a column of sub-pixel pairs 10, and is connected to each sub-pixel pair 10 located in an even-numbered row in an adjacent column of sub-pixel pairs 10, therefore, two adjacent columns of sub-pixel pairs The polarity of 10 is opposite, and the polarity of the sub-pixel pair 10 in two adjacent rows is also opposite. Therefore, along the row direction, a double-point inversion of the sub-pixel pair 10 is realized, and along the column direction, the sub-pixel pair 10 is realized. The unit of single-point inversion is beneficial to improving the shaking pattern and reducing the visual defects of the display.

In the array substrate provided by embodiments of the present invention, by arranging multiple pixels, multiple gate line pairs and multiple data lines distributed in the array, each pixel in the same row includes multiple sub-pixels corresponding to different colors, and the same Every two adjacent sub-pixels in a row of pixels form a sub-pixel pair 10, and the sub-pixel pairs 10 in the same column should have the same color; the gate line pair includes two gate lines set in parallel, and the pixels in the same row are in the same gate line pair Two gate lines are connected, wherein the two sub-pixels in each sub-pixel pair 10 are respectively connected to different gate lines; the two sub-pixels in each sub-pixel pair 10 are respectively connected to the same data line, and the same data line Connect to each sub-pixel pair 10 located in an odd-numbered row in a column of sub-pixel pairs 10, and connect to each sub-pixel pair 10 located in an even-numbered row in an adjacent column of sub-pixel pairs 10; make the data line zigzag and cross adjacent rows multiple times There are 10 sub-pixel pairs in the column, so when displaying a solid color picture, the corresponding polarity of the sub-pixel appears irregularly, breaking up the problem of positive and negative polarity brightness inconsistency caused by coupling, thereby improving the display effect.

Optionally, as shown in Figures 2 to 5, each pixel includes three sub-pixels corresponding to different colors; the three sub-pixels corresponding to different colors are respectively a first color sub-pixel, a second color sub-pixel and a third color sub-pixel. Color subpixel.

The switching unit of the first color sub-pixel in the same row is connected to one gate line of the same gate line pair, and the switching unit of the second color sub-pixel is connected to the other gate line of the same gate line pair.

It should be noted that, relative to the switching units of sub-pixels of the same color in the same row, part of them is connected to one gate line of the same gate line pair and part of it is connected to another gate line. The switching units of the first color sub-pixel in the same row are connected to the same pair of gate lines. When one of the gate lines in the second color sub-pixel is connected to the other gate line in the same gate line pair, under the control of the clock signal, the gate scanning signals provided by the gate lines are consistent, that is, the switching unit is turned on The conditions are consistent and there is no difference, which ensures the display uniformity of the first color sub-pixel and the second color sub-pixel in the same row, and improves the display effect.

It can be understood that since the two sub-pixels in each sub-pixel pair 10 are respectively connected to different gate lines, when the switching unit of the first color sub-pixel in the same row is connected to one gate line in the same gate line pair, the second The switching unit of the color sub-pixel is connected to another gate line in the same gate line pair, then the gate line connected to the switching unit of the third color sub-pixel is determined according to the connection situation of the other sub-pixel in the same sub-pixel pair 10, and The gate line that should be connected to another sub-pixel belongs to different gate lines in the same gate line pair.

For example, the gate line pair includes a first gate line and a second gate line. If the first color is red and the second color is green, the switching unit of the red sub-pixel in the same row is connected to the first gate line in the same gate line pair. , the switching unit of the green sub-pixel is connected to the second gate line; or, the switching unit of the red sub-pixel is connected to the second gate line of the same gate line pair, and the switching unit of the green sub-pixel is connected to the first gate line; based on this, the blue The switching unit of the sub-pixel is connected to the first gate line or the second gate line according to the fact that the gate line connected to another sub-pixel in the same sub-pixel pair 10 belongs to different gate lines in the same gate line pair.

If the first color is green and the second color is blue, then the switch unit of the green sub-pixel in the same row is connected to the first gate line of the same gate line pair, and the switch unit of the blue sub-pixel is connected to the second gate line; or, The switch unit of the green sub-pixel is connected to the second gate line in the same gate line pair, and the switch unit of the blue sub-pixel is connected to the first gate line; based on this, the switch unit of the red sub-pixel is connected to the first gate line or the second gate line , should be determined according to the fact that the gate line connected to another sub-pixel in the same sub-pixel pair 10 belongs to different gate lines in the same gate line pair.

If the first color is blue and the second color is red, then the switch unit of the blue sub-pixel in the same row is connected to the first gate line of the same gate line pair, and the switch unit of the red sub-pixel is connected to the second gate line; or, The switch unit of the blue sub-pixel is connected to the second gate line in the same gate line pair, and the switch unit of the red sub-pixel is connected to the first gate line; based on this, the switch unit of the green sub-pixel is connected to the first gate line or the second gate line , should be determined according to the fact that the gate line connected to another sub-pixel in the same sub-pixel pair 10 belongs to different gate lines in the same gate line pair.

Optionally, as shown in Figures 2 to 5, the first color is red, the second color is green, and the third color is blue.

Optionally, as shown in Figures 3-5, two gate lines of the same gate line pair are distributed on both sides of the same row of pixels.

Each sub-pixel in each column of sub-pixels is respectively connected to the gate line of the corresponding gate line pair distributed on the same side of the row of pixels where the sub-pixel is located.

For example, multiple pixels are arranged in an array, each pixel includes a red sub-pixel, a green sub-pixel and a blue sub-pixel, and 10 pairs of sub-pixels in the same column should have the same color. If the gate line includes a first gate line and a second gate line, the first gate line is distributed on the upper side of the pixels in the same row, and the second gate line is distributed on the lower side of the pixels in the same row.

The first column is a red sub-pixel, the second column is a green sub-pixel, and the red sub-pixel in the first column of each row and the green sub-pixel in the second column are a sub-pixel pair 10, then the red sub-pixel in the first row and the first column Connect the first gate line distributed on the upper side of the corresponding first gate line pair, and the red sub-pixel in the second row and first column is connected to the first gate line distributed on the upper side of the corresponding second gate line pair. , and so on, the red sub-pixel in the last row and the first column is connected to the first gate line distributed on the upper side of the corresponding last gate line pair; at the same time, the green sub-pixel in the first row and the second column is connected to the corresponding first gate line. The second gate line in the pair is distributed on the lower side, and the green sub-pixel in the second row and second column is connected to the second gate line in the corresponding second gate line pair and is distributed on the lower side, and so on, the second row and column of the last row The green sub-pixel is connected to the second gate line distributed on the lower side of the corresponding last gate line pair.

Alternatively, the red sub-pixels in the first row and the first column are connected to the second gate line distributed on the lower side of the corresponding first gate line pair, and the red sub-pixels in the second row and the first column are connected to the corresponding second gate line pair. The second gate line distributed on the lower side, and so on, the red sub-pixel in the last row and the first column is connected to the second gate line distributed on the lower side of the corresponding last gate line pair; at the same time, the green sub-pixel in the first row and the second column is connected The pixel is connected to the first gate line distributed on the upper side of the corresponding first gate line pair, and the green sub-pixel in the second row and second column is connected to the first gate line distributed on the upper side of the corresponding second gate line pair. lines, and so on, the green sub-pixel in the last row and second column is connected to the first gate line distributed on the upper side of the corresponding last gate line pair.

It should be noted that "upper side" and "lower side" are only used to express positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

Optionally, as shown in FIG. 5 , the sub-pixel pairs 10 that are connected to different gate lines in adjacent gate line pairs located between two adjacent rows of pixels and are connected to the same data line have different colors.

For example, the sub-pixel pair 10 in the first row and second column includes a red sub-pixel R ₁₂ and a green sub-pixel G ₁₂ . The red sub-pixel R ₁₂ is connected to the first gate line of the corresponding first gate line pair, and the green sub-pixel G ₁₂ Connect the second gate line of the corresponding first gate line pair. If each sub-pixel in each column of sub-pixels is connected to a gate line in the corresponding gate line pair distributed on the same side of the row of pixels where the sub-pixel is located, then the second row and second column sub-pixel pair 10 includes a red sub-pixel R ₂₂ and green sub-pixel G ₂₂ , then the red sub-pixel R ₂₂ is connected to the first gate line of the corresponding second gate line pair, and the green sub-pixel G ₂₂ is connected to the second gate line of the corresponding second gate line pair.

The sub-pixel pair 10 in the first row and the third column includes a blue sub-pixel B ₁₃ and a red sub-pixel R ₁₃ . The blue sub-pixel B ₁₃ is connected to the second gate line of the corresponding first gate line pair, and the red sub-pixel R ₁₃ Connect the first gate line of the corresponding first gate line pair.

On this basis, the same data line is connected to the sub-pixel pairs 10 in the first row and the third column, and the sub-pixels in the second row and the second column. In this way, the subpixel connected to the second gate line of the first gate line pair is a blue subpixel, and the subpixel connected to the first gate line of the second gate line pair is a red subpixel, and the blue subpixel The color sub-pixel and the red sub-pixel are connected to the same data line, but the corresponding colors are different.

Optionally, the array substrate further includes a plurality of common electrode lines.

The common electrode line and the gate line are perpendicular to each other and are arranged between two adjacent sub-pixel pairs 10 of each row of pixels.

By arranging the common electrode line between the two sub-pixels of each sub-pixel pair 10 and utilizing the relatively stable voltage of the common electrode line, the display uniformity of the two sub-pixels is ensured and the display effect is improved.

Embodiments of the present invention also provide a driving method for an array substrate, as shown in Figure 6, including:

S10. Provide gate scanning signals to multiple gate lines in a preset sequence.

It can be understood that, under the control of the clock signal, the plurality of gate lines provide gate scanning signals to the plurality of gate lines in a preset sequence.

S20. When providing a gate scan signal to each gate line, input a corresponding data signal to each data line.

For example, as shown in Figure 7, if the preset sequence is that the gate lines sequentially provide gate scanning signals, for an image frame, between the first clock signal to the eighth clock signal (CLK1~CLK8 as shown in the figure) ), the corresponding 1st to 8th gate lines (Gate1~Gate8) respectively provide gate scanning signals, and the sub-pixels connected to each gate line turn on charging accordingly.

Specifically, after the charging of each sub-pixel connected to the first gate line is completed, the gate scanning signal is provided to the second gate line; after the charging of each sub-pixel connected to the second gate line is completed, the gate scanning signal is provided to the third gate line. Each gate line provides a gate scan signal; and so on, until each sub-pixel connected to the seventh gate line is charged, and a gate scan signal is provided to the eighth gate line.

In the driving method of the array substrate provided by the embodiment of the present invention, by providing gate scanning signals to a plurality of gate lines in a preset order, when providing a gate scanning signal to each gate line, a corresponding data line is input to each data line. The data signal is used to drive the array substrate for display.

On the basis of the above, since the data lines cross the sub-pixel pairs 10 of adjacent columns multiple times, irregular polarity appears under the same color. However, when displaying a solid color picture, the output voltage on each data line needs to continuously change.

For example, taking the display of red as an example, assuming that the data voltage Vp = +5V, the common voltage Vcom = 0V, driving the array substrate as shown in Figure 5, when the first gate line is turned on, the data line S2 needs to move to the right The red sub-pixel outputs +5V; when the second gate line is turned on, the data line S2 needs to output 0V to the blue sub-pixel on the left; when the third gate line is turned on, the data line S2 needs to output 0V to the red sub-pixel on the left. The sub-pixel outputs +5V; when the fourth gate line is turned on, the data line S2 needs to output 0V to the green sub-pixel on the right. In this way, the output voltage of the data line needs to be converted from 0V to +5V multiple times, resulting in poor performance in terms of heavy-load driving power consumption.

In order to solve the above problem, optionally, gate scanning signals are provided to multiple gate lines in a preset sequence, including:

Gate scanning signals are provided to the i+(n-1)×4 row gate lines in sequence; i∈{1,3,2,4}; n∈{1,2,3,4}.

The above steps are cycled until gate scanning signals are provided to all gate lines, and each value of i increases by 16 for each cycle.

It should be noted that for an image frame, it is under the control of the first clock signal to the sixteenth clock signal, specifically:

After each sub-pixel connected to the first gate line is charged, a gate scanning signal is provided to the fifth gate line;

After each sub-pixel connected to the fifth gate line is charged, a gate scanning signal is provided to the ninth gate line;

After each sub-pixel connected to the 9th gate line is charged, a gate scanning signal is provided to the 13th gate line;

After each sub-pixel connected to the 13th gate line is charged, a gate scanning signal is provided to the 3rd gate line;

After each sub-pixel connected to the third gate line is charged, a gate scanning signal is provided to the seventh gate line;

After each sub-pixel connected to the 7th gate line is charged, a gate scanning signal is provided to the 11th gate line;

After each sub-pixel connected to the 11th gate line is charged, a gate scanning signal is provided to the 15th gate line;

After each sub-pixel connected to the 15th gate line is charged, a gate scanning signal is provided to the 2nd gate line;

After each sub-pixel connected to the second gate line is charged, a gate scanning signal is provided to the sixth gate line;

After each sub-pixel connected to the 6th gate line is charged, a gate scanning signal is provided to the 10th gate line;

After each sub-pixel connected to the 10th gate line is charged, a gate scanning signal is provided to the 14th gate line;

After each sub-pixel connected to the 14th gate line is charged, a gate scanning signal is provided to the 4th gate line;

After each sub-pixel connected to the fourth gate line is charged, a gate scanning signal is provided to the eighth gate line;

After each sub-pixel connected to the 8th gate line is charged, a gate scanning signal is provided to the 12th gate line;

After each sub-pixel connected to the 12th gate line is charged, a gate scanning signal is provided to the 16th gate line;

Then, each value of i is increased by 16 and updated to {17,19,18,20}.

Again under the control of 16 clock signals, the cycle starts from the 17th gate line, that is, after each sub-pixel connected to the 16th gate line is charged, a gate scan signal is provided to the 17th gate line;

After the charging of each sub-pixel connected to the 17th gate line is completed, the gate scanning signal is provided to the 21st gate line; and so on, until the gate scanning signal is provided to all gate lines.

For example, as shown in Figure 8, the driving module outputs clock signals, each clock signal corresponds to two gate lines, and provides gate scanning signals to the gate lines of the i+(n-1)×4th row in a preset order; i∈{1,3,2,4}; n∈{1,2,3,4}. In this way, for example, the gate scanning signal is provided to the 1st to 16th gate lines, and the sub-pixel color corresponding to the data signal output sequence of the data line S1 is RRRRRRRRBBBBGGGG. When a solid color screen is displayed, for example, red is displayed, the data line S1 It continues to output a constant +5V, and then when it reaches the blue sub-pixel, it only converts the voltage once, and continues to output a constant 0V.

In the same way, the sub-pixel color corresponding to the data signal output sequence of data line S2 is BBBBRRRRGGGGBBBB; when displaying a solid color screen, such as blue, data line S2 continues to output a constant +5V, and then when it reaches the red sub-pixel, the voltage is converted , and continues to output a constant 0V; when it reaches the blue sub-pixel, the conversion voltage continues to output a constant +5V.

In the same way, the sub-pixel colors corresponding to the data signal output sequence of the data line S3 are RRRRBBBBGGGGRRRR; when displaying a solid color screen, such as green, the data line S3 continues to output a constant 0V, and then when it reaches the green sub-pixel, the voltage is converted, and again It continuously outputs a constant +5V; when it comes to the red sub-pixel, the conversion voltage continues to output a constant 0V.

Based on the above driving method, the number of voltage conversions of the data line is greatly reduced, effectively reducing power consumption when displaying solid color images.

An embodiment of the present invention also provides a pixel driving device 3, as shown in Figure 9, including:

The driving module 4 is used to provide gate scanning signals to a plurality of gate lines in a preset order, and when providing a gate scanning signal to each gate line, input corresponding data signals to each data line.

Optionally, as shown in Figure 9, the driving module 4 includes:

A plurality of gate line driving units 41 are used to provide gate scanning signals to the i+(n-1)×4th row gate lines in sequence; i∈{1,3,2,4}; n∈{1,2,3 ,4}.

An embodiment of the present invention also provides a display device 1, as shown in Figure 10, including the array substrate 2 as described above, and/or the pixel driving device 3 as described above.

The display device 1 provided by the present invention has the same beneficial effects as the above-mentioned array substrate 2, which will not be described again here.

The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention. should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims (6)

1. A display device, comprising: an array substrate and a pixel driving device;

the array substrate includes:

a plurality of pixels distributed in an array; each pixel in the same row comprises a plurality of sub-pixels corresponding to different colors, each two adjacent sub-pixels in the same row of the pixels form a sub-pixel pair, and the sub-pixels in the same column correspond to the same color; each pixel comprises three sub-pixels corresponding to different colors; the three sub-pixels corresponding to different colors are respectively a first color sub-pixel, a second color sub-pixel and a third color sub-pixel;

a plurality of gate line pairs; the grid line pair comprises two grid lines which are arranged in parallel, the same row of pixels are connected with the two grid lines in the same grid line pair, and the two sub-pixels in each sub-pixel pair are respectively connected with different grid lines; the switch units of the first color sub-pixels in the same row are connected with one grid line in the same grid line pair, and the switch units of the second color sub-pixels are connected with the other grid line in the same grid line pair;

a plurality of data lines; two sub-pixels in each sub-pixel pair are respectively connected with the same data line, the same data line is connected with each sub-pixel pair in an odd-numbered row in one row of the sub-pixel pairs, and is connected with each sub-pixel pair in an even-numbered row in an adjacent row of the sub-pixel pairs; the data line extends in a right-angle zigzag manner along the column direction of a column of sub-pixels; two sub-pixels in each sub-pixel pair electrically connected with the same data line are respectively positioned at two sides of the same data line, and the polarities of the two sub-pixels in the same sub-pixel pair are the same; the polarities of the data signals transmitted by two adjacent data lines are opposite;

the pixel driving apparatus includes:

the driving module is used for outputting clock signals, and each clock signal corresponds to two grid lines in the grid line pair; two grid lines corresponding to the clock signals receive grid scanning signals in different time periods; the driving module is used for providing grid scanning signals for a plurality of grid lines according to a preset sequence, and inputting corresponding data signals to each data line when the grid scanning signals are provided for each grid line; the driving module includes: a plurality of gate line driving units; the grid line driving units are used for sequentially providing grid scanning signals for the (i+ (n-1) x 4 row grid lines; i e {1,3,2,4}; n.epsilon. {1,2,3,4}.

2. The display device of claim 1, wherein the first color is red, the second color is green, and the third color is blue.

3. The display device according to claim 1, wherein two gate lines of the same pair of gate lines are distributed on both sides of the pixels of the same row;

each sub-pixel in each column of the sub-pixels is respectively connected with the corresponding grid line which is distributed on the same side of one row of the pixels where the sub-pixels are located.

4. A display device according to claim 1, wherein colors corresponding to the sub-pixels connected to the same data line are different, respectively, to different ones of adjacent pairs of gate lines between adjacent rows of pixels.

5. A driving method for a display device according to any one of claims 1 to 4, comprising:

the pixel driving device provides grid scanning signals for a plurality of grid lines of the array substrate according to a preset sequence;

when a gate scan signal is supplied to each gate line, a corresponding data signal is input to each data line of the array substrate.

6. The driving method of the display device according to claim 5, wherein the pixel driving device supplies the gate scan signals to the plurality of gate lines of the array substrate in a preset order, comprising:

the pixel driving device sequentially provides grid scanning signals for the (i+ (n-1) x 4 row grid lines; i e {1,3,2,4}; n.epsilon {1,2,3,4};

the above steps are cycled until gate scan signals are provided to all gate lines, and each value of i is increased by 16 every cycle.