CN110954229B - Temperature detection circuit, temperature detection equipment, chip and circuit structure - Google Patents
Temperature detection circuit, temperature detection equipment, chip and circuit structure Download PDFInfo
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Abstract
本申请实施例提供了一种温度检测电路、温度检测设备、芯片及电路结构，该温度检测电路包括：MOS管温度感应单元，用于感应温度并输出与温度呈正相关的指数关系的漏电流；电流感应单元，其与MOS管温度感应单元连接；计数单元，用于参考预设时钟信号在预设时间段内对所述第一信号的周期数进行计数得到计数值；处理单元，用于根据计数值、指数关系、第一线性关系以及预设时间段计算MOS管温度感应单元感应到温度值。本申请通过采用MOS管温度感应单元来感应温度并输出与温度呈正相关的指数关系的漏电流，使得电流在全温度范围内的变化幅度较大，可以提高了温度检测的准确度以及检测灵敏度。
Embodiments of the present application provide a temperature detection circuit, a temperature detection device, a chip, and a circuit structure, the temperature detection circuit includes: a MOS tube temperature sensing unit for sensing temperature and outputting a leakage current that is positively correlated with the temperature; a current sensing unit, which is connected to the MOS tube temperature sensing unit; a counting unit, used for counting the number of cycles of the first signal within a preset time period with reference to a preset clock signal to obtain a count value; a processing unit, used for according to The count value, the exponential relationship, the first linear relationship and the preset time period are used to calculate the temperature value sensed by the MOS tube temperature sensing unit. In the present application, a MOS tube temperature sensing unit is used to sense temperature and output a leakage current that is positively correlated with the temperature, so that the current has a larger variation range in the whole temperature range, which can improve the temperature detection accuracy and detection sensitivity.
Description
Technical Field
The application relates to the technical field of temperature detection, in particular to a temperature detection circuit, temperature detection equipment, a chip and a circuit structure.
Background
In recent years, the development of integrated circuits has been rapid, and the level of process fabrication has been advanced. The number of components per unit chip area is increasing, and the heat productivity of the chip is also increasing. For a chip with a large scale such as a CPU, the temperature distribution range on the chip is wide, and it is more necessary to detect the chip temperature at a plurality of positions.
Most of the traditional temperature detection circuit structures utilize a triode to generate PTAT voltage which is positively correlated with temperature or CTAT voltage which is negatively correlated with temperature, and then the PTAT voltage or the CTAT voltage analog quantity is converted into digital quantity. However, when the method is adopted, the sensed temperature and the generated voltage are in a linear relation, so that the variation amplitude of the voltage in the whole temperature range is small, the detection accuracy of the method extremely depends on the accuracy of the analog-to-digital converter, and the method is easily influenced by the power supply voltage.
In view of the above problems, no effective technical solution exists at present.
Disclosure of Invention
An object of the embodiments of the present application is to provide a temperature detection circuit, a temperature detection device, a chip and a circuit structure, which can improve the accuracy of temperature detection by inducing temperature to generate a leakage current having an exponential relationship with temperature in positive correlation.
In a first aspect, an embodiment of the present application provides a temperature detection circuit, including:
the MOS tube temperature sensing unit is used for sensing temperature and outputting leakage current which has positive correlation exponential relation with the temperature;
the current sensing unit is connected with the MOS tube temperature sensing unit and used for sensing the current value of the leakage current and outputting a first signal, and the frequency of the first signal and the current value are in a first linear relation of positive correlation;
the counting unit is connected with the current sensing unit, is accessed to the first signal and is used for counting the period number of the first signal in a preset time period by referring to a preset clock signal to obtain a counting value;
and the processing unit is used for calculating the temperature value sensed by the MOS tube temperature sensing unit according to the counting value, the exponential relation, the first linear relation and the preset time period.
According to the embodiment of the application, the MOS tube temperature sensing unit is used for sensing the temperature and outputting the leakage current which is in positive correlation with the temperature, so that the current is large in change in the full temperature range, and the accuracy and the detection sensitivity of temperature detection can be improved.
Optionally, in the temperature detection circuit according to the embodiment of the present application, the MOS transistor temperature sensing unit includes:
the first NMOS tube is in a turn-off state and is used for sensing temperature so as to output leakage current in positive correlation exponential relation with the temperature;
and one end of the voltage limiting module is connected with the drain electrode of the first NMOS tube, the other end of the voltage limiting module is connected with the current sensing unit, and the voltage limiting module is used for limiting the voltage of the source electrode and the drain electrode of the first NMOS tube.
According to the embodiment of the application, the voltage limiting module is adopted to limit the source and drain voltages of the first NMOS tube, so that the source and drain voltages are prevented from changing along with the change of temperature and power supply voltage, the current change caused by the source and drain voltages is eliminated, and the accuracy of temperature detection can be improved.
Optionally, in the temperature detection circuit according to this embodiment of the present application, the voltage limiting module includes:
the source electrode of the second NMOS tube is connected with the drain electrode of the first NMOS tube, and the drain electrode of the second NMOS tube is connected with the current sensing unit;
and the control voltage generating structure is used for sensing temperature and outputting control voltage which is in a first relation with the temperature and is in a negative correlation to the grid electrode of the second NMOS tube so as to limit the source and drain voltage of the first NMOS tube through the second NMOS tube, and the source and drain voltage of the first NMOS tube is kept unchanged within a preset error range.
According to the embodiment of the application, the source and drain voltages of the first NMOS tube are limited by adopting the second NMOS tube and the control voltage generating structure, the source and drain voltages can be prevented from changing along with the change of temperature and power voltage, the current change caused by the source and drain voltages is eliminated, and the accuracy of temperature detection can be improved.
Optionally, in the temperature detection circuit according to this embodiment of the present application, the control voltage generating structure includes a third NMOS transistor, a fourth NMOS transistor, a first resistor, and a first current amplifying structure;
the source electrode of the third NMOS tube is connected with one end of the first resistor and is grounded, the grid electrode of the third NMOS tube, the source electrode of the fourth NMOS tube and the other end of the first resistor are connected, the input end of the first current amplification structure is connected with the drain electrode of the fourth NMOS tube, and the output end of the first current amplification structure is connected with the grid electrode of the fourth NMOS tube, the drain electrode of the third NMOS tube and the grid electrode of the second NMOS tube.
According to the embodiment of the application, the third NMOS tube and the fourth NMOS tube are used for generating the control voltage which is in negative correlation with the temperature, the control voltage which is in negative correlation with the temperature is applied to the grid electrode of the second NMOS tube, so that the limitation of the source/drain voltage of the first NMOS tube is realized, the source/drain voltage of the first NMOS tube is kept constant in a preset error range and cannot be changed along with the change of the temperature and the power voltage, the drain current change caused by the source/drain voltage change of the first NMOS tube can be removed, and the detection accuracy can be improved.
Optionally, in the temperature detection circuit according to the embodiment of the present application, the control voltage generating structure includes a thirteenth MOS transistor and a fourteenth MOS transistor, and both the thirteenth MOS transistor and the fourteenth MOS transistor are NMOS transistors; and the drain electrode of the thirteenth MOS tube is connected with a reference current, and the grid electrode and the drain electrode of the thirteenth MOS tube are connected to be used as a control voltage output point and are electrically connected with the grid electrode of the second NMOS tube.
The control voltage which is negatively correlated with the temperature is generated through the thirteenth MOS tube and the fourteenth MOS tube, and the control circuit has the advantages of being simple in structure and saving the board distribution area.
Optionally, in the temperature detection circuit according to the embodiment of the present application, the MOS tube temperature sensing unit further includes a second current amplifying structure;
the output end of the voltage limiting module is connected with the current sensing unit through the second current amplification structure, and the second current amplification structure is used for amplifying the leakage current output by the voltage limiting module by a preset multiple;
and the processing unit is used for calculating the temperature value sensed by the MOS tube temperature sensing unit according to the counting value, the exponential relation, the first linear relation, the preset time period and the preset multiple.
According to the embodiment of the application, the leakage current can be increased to the induction range of the current induction unit through the amplification of the second current amplification structure, and the accuracy and the sensitivity of temperature detection can be improved.
Optionally, in the temperature detection circuit according to the embodiment of the present application, the second current amplification structure is a cascode current mirror.
According to the embodiment of the application, the accuracy of current amplitude amplification can be improved through the cascode current mirror, and deviation caused by errors of current amplification factors in subsequent temperature value calculation is avoided.
Optionally, in the temperature detection circuit according to this embodiment of the present application, the current sensing unit includes N cascaded fully differential delay units and a D2S converter, where N is an even number greater than 2; the D2S converter is a differential-to-single-ended converter;
the positive phase input end of the first-stage fully differential delay unit is connected with the positive phase output end of the Nth-stage fully differential delay unit, the negative phase input end of the first-stage fully differential delay unit is connected with the negative phase output end of the Nth-stage fully differential delay unit, the positive phase output end of the Nth-1-stage fully differential delay unit is connected with the negative phase input end of the Nth-stage fully differential delay unit, the negative phase output end of the Nth-1-stage fully differential delay unit is connected with the positive phase input end of the Nth-stage fully differential delay unit, the positive phase output end and the reverse phase output end of the Nth-stage fully differential delay unit are respectively connected with the two input ends of the D2S converter, the output end of the D2S converter is connected with the counting unit, and the bias current input ends of the N cascaded fully-differential delay units are connected with the output end of the MOS tube temperature sensing unit.
Optionally, in the temperature detection circuit according to the embodiment of the present application, the current sensing unit includes N cascaded inverters, where N is an odd number greater than 2;
the input end of the first-stage phase inverter is connected with the output end of the Nth-stage phase inverter, the output end of the (N-1) th-stage phase inverter is connected with the input end of the Nth-stage phase inverter, and the bias current input end of each phase inverter is connected with the output end of the MOS tube temperature sensing unit.
In a second aspect, an embodiment of the present application further provides a temperature detection device, including any one of the temperature detection circuits described above.
In a third aspect, an embodiment of the present application further provides a chip, including: the semiconductor substrate and integrated circuit integrated on the semiconductor substrate, integrated circuit includes preset function circuit and is used for carrying out the temperature detection circuit of temperature detection to the semiconductor substrate, temperature detection circuit be above-mentioned any one the temperature detection circuit.
Optionally, in the chip according to the embodiment of the present disclosure, the semiconductor substrate includes a functional region and a plurality of detection regions;
the preset function circuit is arranged in the function area, and each detection area is provided with one temperature detection circuit.
In a fourth aspect, an embodiment of the present application further provides a circuit structure, which includes a chip and a peripheral circuit, where the chip includes a semiconductor substrate and an integrated circuit integrated on the semiconductor substrate, and the integrated circuit includes a preset function circuit and a MOS transistor temperature sensing unit for sensing a temperature of the semiconductor substrate;
the peripheral circuit comprises a current sensing unit, a counting unit and a processing unit, wherein the MOS tube temperature sensing unit, the current sensing unit, the counting unit and the processing unit are sequentially and electrically connected to form the temperature detection circuit.
Additional features and advantages of the present application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the embodiments of the present application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a schematic block diagram of a temperature detection circuit provided in an embodiment of the present application.
Fig. 2 is another schematic block diagram of a temperature detection circuit provided in an embodiment of the present application.
Fig. 3 is a circuit configuration diagram of a temperature sensing unit of a temperature detection circuit according to an embodiment of the present application.
Fig. 4 is a first circuit configuration diagram of a control voltage generating structure of a temperature detection circuit according to an embodiment of the present application.
Fig. 5 is a second circuit configuration diagram of a control voltage generating configuration of a temperature detection circuit according to an embodiment of the present application.
Fig. 6 is a circuit structure diagram of a current sensing unit of a temperature detection circuit according to an embodiment of the present application.
Fig. 7 is another circuit configuration diagram of a current sensing unit of a temperature detection circuit according to an embodiment of the present application.
Fig. 8 is a schematic structural diagram of a chip provided in an embodiment of the present application.
Icon: the device comprises a 10-MOS tube temperature sensing unit, a 20-current sensing unit, a 30-counting unit, a 40-processing unit, a 11-first NMOS tube, a 12-voltage limiting module, a 13-second current amplification structure, a 21 a-fully differential delay unit, a 22a-D2S converter, a 21 b-inverter, a 121-second NMOS tube, a 122-control voltage generation structure and a 1221-first current amplification structure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
Referring to fig. 1, fig. 1 is a schematic block diagram of a temperature detection circuit according to some embodiments of the present disclosure. The temperature detection circuit comprises a MOS tube temperature sensing unit 10, a current sensing unit 20, a counting unit 30 and a processing unit 40. The MOS tube temperature sensing unit 10, the current sensing unit 20, the counting unit 30 and the processing unit 40 are connected in sequence.
The MOS tube temperature sensing unit 10 is used for sensing temperature and outputting leakage current which is in positive correlation with temperature change and has an exponential relationship; the current sensing unit 20 is configured to sense a current value of the leakage current and output a first signal; the frequency of the first signal and the current value of the leakage current are in a first linear relation of positive correlation; the counting unit 30 is configured to access a first signal, count the number of cycles of the first signal in a preset time period with reference to a preset clock signal to obtain a count value, and output the count value to the processing unit 40. The processing unit 40 is configured to calculate a temperature value according to the exponential relationship, the first linear relationship, the preset time period, and the count value.
For example, when the temperature is lowered, the leakage current output by the MOS transistor temperature sensing unit 10 decreases exponentially, and when the temperature is raised, the leakage current output by the MOS transistor temperature sensing unit 10 increases exponentially; the MOS tube sensing unit 10 has a direct corresponding exponential relationship with the temperature change, so that the current change range in the whole temperature range is large, and the accuracy and the sensitivity of temperature detection are improved.
Referring to fig. 2, the MOS temperature sensing unit 10 includes: a first NMOS transistor 11, a voltage limiting module 12, and a second current amplifying structure 13. The source of the first NMOS transistor 11 is connected to the gate and grounded, the drain of the first NMOS transistor 11 is connected to the input of the voltage limiting module 12, the output of the voltage limiting module 12 is connected to the input of the second current amplifying structure 13, and the output of the second current amplifying structure 13 is connected to the current sensing unit 20.
The first NMOS transistor 11 is used to sense a temperature and output a leakage current having an exponential relationship with the temperature. Wherein, the equivalent resistance R of the first NMOS tube 11 in the off stateoffAnd a × e-bTIs proportional to the leakage current Ioff and VDS×e-bTA is proportional, wherein V isDSIs the source/drain voltage of the first NMOS transistor 11, T is the temperature, and a is the coefficient.
The voltage limiting module 12 is configured to limit the source/drain voltage of the first NMOS transistor 11 in the turn-off region, so that the source/drain voltage of the first NMOS transistor 11 is kept at a fixed value within a preset error range, and a change in drain current caused by a factor of a change in the source/drain voltage is avoided.
The second current amplifying structure 13 is configured to amplify the leakage current output by the first NMOS transistor 11 by a predetermined ratio, for example, by 10 times, 20 times, and so on. Of course, it is to be understood that the second current amplifying structure 13 is not essential. According to the embodiment of the application, the leakage current can be increased to the induction range of the current induction unit 20 through the amplification of the second current amplification structure 13, and the accuracy and the sensitivity of temperature detection can be improved. Of course, if the MOS tube temperature sensing unit 10 employs the second current amplifying structure 13 to amplify the leakage current output by the first NMOS tube 11 by a predetermined multiple, the processing unit 40 needs to reference the predetermined multiple when calculating the temperature value. If the MOS temperature sensing unit 10 does not employ the second current amplifying structure 13, the processing unit 40 does not need to consider the preset times when calculating the temperature value.
The voltage limiting module 12 includes a second NMOS transistor 121 and a control voltage generating structure 122. The source of the second NMOS transistor 121 is connected to the drain of the first NMOS transistor 11, and the drain of the second NMOS transistor 121 is connected to the input of the second current amplifying structure 13. Of course, if the second current amplifying structure 13 is not present, the drain of the second NMOS transistor 121 may be directly connected to the current sensing unit 20. The control voltage generating structure 122 is used for sensing temperature and outputting a control voltage which is in a negative corresponding relation with temperature change to the grid electrode of the second NMOS tube 121, so that the drain voltage of the first NMOS tube 11 is limited through the second NMOS tube 121, the source/drain voltage of the first NMOS tube 11 is kept constant within an error range, the drain current change caused by the source/drain voltage change of the first NMOS tube can be removed, and the detection accuracy can be improved.
In particular, there are various implementations of the control voltage generating structure 122.
First, as shown in fig. 3, the control voltage generating structure 122 includes a third NMOS transistor T3, a fourth NMOS transistor T4, a first resistor R1, and a first current amplifying structure 1221.
The source of the third NMOS transistor T3 is connected to one end of the first resistor R1 and grounded, the gate of the third NMOS transistor T3, the source of the fourth NMOS transistor T4, and the other end of the first resistor R1 are connected, the input terminal of the first current amplification structure 1221 is connected to the drain of the fourth NMOS transistor T4, and the output terminal of the first current amplification structure 1221 is connected to the gate of the fourth NMOS transistor T4, the drain of the third NMOS transistor T3, and the gate of the second NMOS transistor 121. The common node formed by connecting the output terminal of the first current amplifying structure 1221 with the gate of the fourth NMOS transistor T4 and the drain of the third NMOS transistor T3 outputs the control voltage VREF corresponding to the negative temperature variation to the gate of the second MOS transistor 121.
The first current amplifying structure 1221 may employ a current mirror, for example, a cascode current mirror formed by connecting the fifth MOS transistor T5, the sixth MOS transistor T6, the seventh MOS transistor T7, and the eighth MOS transistor T8, where a common source of the cascode current mirror is connected to an external power supply voltage. The fifth MOS transistor T5, the sixth MOS transistor T6, the seventh MOS transistor T7, and the eighth MOS transistor T8 are PMOS transistors. A source of the fifth MOS transistor T5 is connected to a source of the sixth MOS transistor T6 and is connected to an external power supply voltage, a gate of the fifth MOS transistor T5, a gate of the sixth MOS transistor T6, a drain of the fifth MOS transistor T5, and a source of the seventh MOS transistor T7 are connected, a drain of the sixth MOS transistor T6 is connected to a source of the eighth MOS transistor T8, a gate of the eighth MOS transistor T8, a gate of the seventh MOS transistor T7, and a drain of the seventh MOS transistor T7 are connected to serve as an input terminal of the first current amplification structure 1221, and a drain of the eighth MOS transistor T8 serves as an output terminal of the first current amplification structure 1221. Of course, it is understood that the first current amplifying structure 1221 may also employ a current mirror formed by connecting two MOS transistors.
In a second way, as shown in fig. 4, the control voltage generating structure 122 includes a thirteenth MOS transistor T13 and a fourteenth MOS transistor T14, and the thirteenth MOS transistor T13 and the fourteenth MOS transistor T14 are NMOS transistors. The drain of the thirteenth MOS transistor T13 is connected to the reference current RefI, and the gate and the drain of the thirteenth MOS transistor are connected to serve as the output point of the control voltage Vref and electrically connected to the second NMOS transistor 121.
In a third mode, as shown in fig. 5, the control voltage generating structure 122 includes a first transistor Q1, and the first transistor Q1 is a PNP transistor. The emitter of the first transistor Q1 is connected to a predetermined reference current RefI, and the collector of the first transistor Q1 is connected to the base and grounded. The emitter of the first transistor Q1 is used as the output point of the control voltage vref, and the emitter of the first transistor Q1 is connected to the gate of the second NMOS transistor.
Of course, the implementation manners of the above three control voltage generating structures 122 do not constitute a limitation on the control voltage generating structures 122, and the control voltage generating structures 122 may also be configured in other manners, which are not listed here.
With continued reference to fig. 3, the second current amplifying structure 13 may employ a current mirror, for example, the second current amplifying structure 13 is a cascode current mirror; the second current amplifying structure 13 includes a ninth MOS transistor T9, a tenth MOS transistor T10, an eleventh MOS transistor T11, and a twelfth MOS transistor T12. The ninth MOS transistor T9, the tenth MOS transistor T10, the eleventh MOS transistor T11, and the twelfth MOS transistor T12 are all PMOS transistors. The source of the ninth MOS transistor T9 and the source of the tenth MOS transistor T10 are connected to an external power source, the gate of the ninth MOS transistor T9, the gate of the tenth MOS transistor T10 andthe drain of the ninth MOS transistor T9 is connected to the source of the eleventh MOS transistor T11, the drain of the tenth MOS transistor T10 is connected to the source of the twelfth MOS transistor T12, the gate of the twelfth MOS transistor T12, the gate of the eleventh MOS transistor T11 and the drain of the eleventh MOS transistor T11 are connected to serve as the input terminal of the second current amplifying structure 13, and the drain of the twelfth MOS transistor T12 serves as the output terminal of the second current amplifying structure 13. The drain current IoffThe current I is input from the input end of the second current amplifying structure 13, and the amplified current I is output from the output end of the second current amplifying structure 13.
It is understood that, in some embodiments, the second current amplifying structure 13 may also employ other common current amplifying circuits, for example, a current mirror formed by two PMOS transistors, which is prior art and not described herein too much.
In some embodiments, the current sensing unit 20 is a current controlled oscillation unit. The bias current end of the current sensing unit 20 is connected to the leakage current amplified by the second current amplifying structure 13 by a predetermined multiple to serve as a bias current, and the frequency of the output signal of the current control oscillation unit is positively correlated with the bias current. The current sensing unit 20 may be implemented by an even number of fully differential delay units, or may be implemented by an odd number of cascaded inverters.
In some embodiments, referring to fig. 6, the current sensing unit 20 includes N fully Differential delay units 21a and a D2S (Differential to Single-Ended) converter 22a, where N is an even number greater than 2. The positive phase input end of the first-stage fully differential delay unit 21a is connected to the positive phase output end of the nth-stage fully differential delay unit 21a, the negative phase input end of the first-stage fully differential delay unit 21a is connected to the negative phase output end of the nth-stage fully differential delay unit 21a, the positive phase output end of the N-1-stage fully differential delay unit 21a is connected to the negative phase input end of the nth-stage fully differential delay unit 21a, the negative phase output end of the N-1-stage fully differential delay unit 21a is connected to the positive phase input end of the nth-stage fully differential delay unit 21a, the positive phase output end and the negative phase output end of the nth-stage fully differential delay unit 21a are respectively connected to two input ends of the D2S converter 22a, and the output end of the D2S converter 22a is connected to the counting unit 30. The N fully differential delay units 21a sense the leakage current, and the D2S converter 22a converts the two output signals into one output first signal, and the first signal is transmitted to the counting unit 30 for counting.
In some embodiments, referring to fig. 7, the current sensing unit 20 includes N cascaded inverters 21b, where N is an odd number greater than 2; the input end of the inverter 21b of the first stage is connected with the output end of the inverter 21b of the nth stage, the output end of the inverter 21b of the N-1 th stage is connected with the input end of the inverter 21b of the nth stage, and the bias current input end of each inverter 21b is connected with the output end of the MOS tube temperature sensing unit 10. The frequency of the signal output by the N cascaded inverters 21b is positively correlated with the bias current input terminal.
The counting unit 30 may be a hardware counter, or may be a chip having a software counting function. The technical unit 30 receives a predetermined clock signal and counts the number of cycles of the first signal within a predetermined time period with the predetermined clock signal as a reference. The counting value output by the counting unit 30 is in direct proportion to the length of the preset time period, and is in inverse proportion to the frequency of the first signal output by the current sensing unit 20, that is, in a second relationship of inverse correlation. The frequency of the first signal and the leakage current output by the MOS temperature sensing unit 10 are in a first linear relationship of positive correlation, and the leakage current and the temperature are in an exponential relationship of positive correlation. Therefore, the first linear relationship, the second relationship and the index relationship can be calculated through multiple data acquisition, and the first linear relationship, the second relationship and the index relationship are stored in the processing unit 40, and when the processing unit 40 receives the counting value, the processing unit can calculate the current induced temperature value of the temperature sensing unit according to the first linear relationship, the second relationship and the index relationship; of course, if the current sensing unit 20 adopts the current amplifying structure, the processing unit 40 needs to reference the amplification factor of the current amplifying structure when calculating the temperature value, and does not need to reference if the current amplifying structure is not adopted.
Therefore, the temperature is sensed by the MOS tube temperature sensing unit and the leakage current which is in positive correlation with the temperature and has an exponential relationship is output, so that the current is greatly changed in the full temperature range, and the accuracy and the detection sensitivity of temperature detection can be improved; and because the voltage limiting is carried out on the source electrode voltage and the drain electrode voltage of the first NMOS tube by adopting the second NMOS tube and the control voltage generating structure, the source electrode voltage and the drain electrode voltage can be prevented from changing along with the change of temperature and the change of power supply voltage, the current change caused by the change of the source electrode voltage and the drain electrode voltage of the first NMOS tube is eliminated, and the accuracy of temperature detection can be further improved.
The embodiment of the application also provides temperature detection equipment which comprises the temperature detection circuit in any embodiment.
Referring to fig. 8, an embodiment of the present application further provides a chip. The chip includes: the semiconductor device includes a semiconductor substrate 201 and an integrated circuit integrated on the semiconductor substrate 201, the integrated circuit includes a preset function circuit 202 and a temperature detection circuit 203 for detecting a temperature of the semiconductor substrate 201, and the temperature detection circuit 203 is a temperature detection circuit in any of the embodiments described above.
It is understood that the semiconductor substrate 201 includes a functional region and a plurality of detection regions; the preset function circuit 202 is disposed in the function area, and each detection area is disposed with a temperature detection circuit 203. The preset function circuit 202 is a chip for implementing the main function of the chip. For example, the preset function circuit 202 may be a positioning circuit for realizing positioning or an arithmetic circuit for realizing complex arithmetic operations, which are not listed here. Wherein the plurality of detection regions may be enclosed by the functional region, or partially enclosed.
Because the temperature detection circuit adopts the MOS pipe to carry out temperature-sensing, greatly reduced its size area, consequently, can be integrated this temperature detection circuit in the chip to make and predetermine the function chip and still have the temperature detection function incidentally, improved the integrated level of chip greatly, and have the temperature detection function, because the temperature detection circuit directly sets up on the semiconductor substrate of chip, make temperature detection more sensitive and accurate.
The embodiment of the application also provides a circuit structure, which comprises a chip and a peripheral circuit, wherein the chip comprises a semiconductor substrate and an integrated circuit integrated on the semiconductor substrate, and the integrated circuit comprises a preset functional circuit and an MOS tube temperature sensing unit used for sensing the temperature of the semiconductor substrate; the peripheral circuit comprises a current sensing unit, a counting unit and a processing unit, wherein the MOS tube temperature sensing unit, the current sensing unit, the counting unit and the processing unit are sequentially and electrically connected to form the temperature detection circuit in any one embodiment.
Compared with the embodiment shown in fig. 8, in the present embodiment, the MOS tube temperature sensing unit for sensing temperature is integrated on the semiconductor substrate, and the current sensing unit, the counting unit, and the processing unit are integrated in the peripheral circuit, so that the circuit structure of the chip is simplified on the basis of ensuring the sensitivity of the temperature detection of the chip.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
In addition, units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
Furthermore, the functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
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| US12174478B2 (en) | 2022-05-11 | 2024-12-24 | Ordos Yuansheng Optoelectronics Co., Ltd. | Display panel, display module and display device |
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| CN112729578B (en) * | 2020-12-08 | 2024-03-22 | 广东美的白色家电技术创新中心有限公司 | Electrical equipment, electronic device and temperature detection circuit thereof |
| CN113050176B (en) * | 2021-03-10 | 2024-06-18 | 维沃移动通信有限公司 | Proximity detection circuit, electronic device, proximity detection processing method and device |
| CN113358235A (en) * | 2021-05-25 | 2021-09-07 | 深圳市航顺芯片技术研发有限公司 | Temperature calculation method, microcontroller, test system and readable storage medium |
| CN113884204B (en) * | 2021-10-22 | 2024-05-28 | 合肥艾创微电子科技有限公司 | Circuit for converting temperature variation into voltage variation in motor driving system |
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