CN110880858B - Driving circuit of switching power supply, half-bridge topology switching power supply and electronic equipment - Google Patents

Abstract

The present application belongs to the technical field of switching power supplies, and relates to a driving circuit of a switching power supply, a half-bridge topology switching power supply, and an electronic device. The driving circuit of the switching power supply includes: a processor, an upper arm driving circuit, and a lower arm driving circuit; the processor sends a pulse width modulation signal to the upper arm driving circuit and the lower arm driving circuit respectively; the upper arm driving circuit includes: a potential conversion circuit, a totem pole discharge circuit, a semi-push-pull driving circuit, and a field effect transistor gate discharge circuit; the processor sends a pulse width modulation signal to the potential conversion circuit; the potential conversion circuit is electrically connected to the totem pole discharge circuit; the totem pole discharge circuit is electrically connected to the semi-push-pull driving circuit; the semi-push-pull driving circuit is electrically connected to the field effect transistor gate discharge circuit; the potential conversion circuit is used to amplify the voltage value of the pulse width modulation signal. The driving circuit wiring of the switching power supply is simple.

Description

Switching power supply drive circuit, half-bridge topology switching power supply and electronic equipment

Technical Field

The present application belongs to the technical field of switching power supplies, and relates to a driving circuit of a switching power supply, a half-bridge topology switching power supply, and electronic equipment.

Background Art

At present, the driving technologies for the main switch field effect transistor of the half-bridge topology switching power supply include optocoupler drive, non-isolated bootstrap drive and single transformer drive. The above three driving methods each have their own disadvantages. Among them, the optocoupler drive requires two isolated power supplies to supply power to the upper and lower arm drive circuit ICs respectively, which increases the difficulty of the secondary power supply and the overall wiring. In addition, the output end of the driving optocoupler will lag behind the signal input end by about 500ns, which is a big technical defect for the half-bridge topology switching power supply with a switching frequency higher than 100KHZ, resulting in the inability to use this driving scheme. Non-isolated bootstrap drives are all dedicated IC solutions, such as IR2101, and there are many models to choose from, but the voltage difference between the upper and lower arms is less than 600V, which cannot meet the use conditions of the half-bridge topology switching power supply with three-phase power input. The disadvantage of the single transformer solution is that the driving waveforms of the upper and lower arm drive circuits will interfere with each other because they come from the same transformer, which will cause the main switch field effect tube to burn in severe cases.

During the research of this application, the inventors found that the driving circuit of the switching power supply in the prior art is either difficult to wire, or the signal output end lags behind the signal input end by about 500ns, or it cannot meet the use conditions of the half-bridge topology switching power supply with three-phase power input, or the driving waveforms of the upper and lower arm driving circuits interfere with each other because they come from the same transformer.

Summary of the invention

The embodiments of the present application disclose a driving circuit of a switching power supply, a half-bridge topology switching power supply and an electronic device, aiming to solve the problems existing in the prior art mentioned in the background technology.

One or more embodiments of the present application disclose a driving circuit of a switching power supply. The driving circuit of the switching power supply includes: a processor, an upper arm driving circuit and a lower arm driving circuit; the processor sends a pulse width modulation signal to the upper arm driving circuit and the lower arm driving circuit respectively; the upper arm driving circuit includes: a potential conversion circuit, a totem pole discharge circuit, a semi-push-pull driving circuit and a field effect transistor gate discharge circuit; the processor sends a pulse width modulation signal to the potential conversion circuit; the potential conversion circuit is electrically connected to the totem pole discharge circuit; the totem pole discharge circuit is electrically connected to the semi-push-pull driving circuit; the semi-push-pull driving circuit is electrically connected to the field effect transistor gate discharge circuit; the potential conversion circuit is used to amplify the voltage value of the pulse width modulation signal; the totem pole discharge circuit is used to amplify the current value of the pulse width modulation signal; the semi-push-pull driving circuit is used to output a positive voltage in the on state; the field effect transistor gate discharge circuit is used to discharge to the field effect transistor gate; the lower arm driving circuit has the same structure as the upper arm driving circuit.

In one or more embodiments of the present application, the potential conversion circuit includes: a comparator U1A, a resistor R1, a resistor R2, a resistor R3 and a capacitor C1; the pulse width modulation signal emitted by the processor is input into the non-inverting input terminal of the comparator U1A; one end of the resistor R1 is connected to a power supply, and the other end of the resistor R1 is connected to one end of the resistor R2; the other end of the resistor R2 is grounded; the capacitor C1 is connected in parallel to both ends of the resistor R2; the inverting input terminal of the comparator U1A is connected between the resistor R1 and the resistor R2; the output terminal of the comparator U1A is connected to the totem pole discharge circuit; one end of the resistor R3 is connected to the output terminal of the comparator U1A, and the other end of the resistor R3 is connected to the power input terminal of the totem pole discharge circuit.

In one or more embodiments of the present application, the totem pole discharge circuit includes: a transistor Q1, a transistor Q2, a resistor R4 and a resistor R5; the base of the transistor Q1 is connected to the output end of the comparator U1A, the collector of the transistor Q1 is connected to the power input end of the totem pole discharge circuit, and the emitter of the transistor Q1 is connected to the collector of the transistor Q2; the base of the transistor Q2 is connected to the output end of the comparator U1A, and the emitter of the transistor Q2 is grounded; one end of the resistor R4 is connected between the emitter of the transistor Q1 and the collector of the transistor Q2, and the other end of the resistor R4 is connected to the semi-push-pull drive circuit; one end of the resistor R5 is grounded, and the other end of the resistor R5 is connected to the semi-push-pull drive circuit.

In one or more embodiments of the present application, the semi-push-pull driving circuit includes: a field effect transistor M1, a transformer T1 and a diode D1; the gate of the field effect transistor M1 is connected to the resistor R4 and the resistor R5, the drain of the field effect transistor M1 is connected to pin 1 of the transformer T1, and the source of the field effect transistor M1 is grounded; pin 2 of the transformer T1 is grounded, pin 3 of the transformer T1 is connected to the cathode of the diode D1, pins 4 and 5 of the transformer T1 are connected to the field effect transistor gate discharge circuit; the anode of the diode D1 is grounded.

In one or more embodiments of the present application, the field effect transistor gate discharge circuit includes: a diode D2, a diode D3, a diode D4, a transistor Q3, a voltage regulator diode DV1, a capacitor C2, a resistor R6, a resistor R7 and a resistor R8; the positive electrode of the diode D2 is connected to the 4th pin of the transformer T1, and the negative electrode of the diode D2 is connected to the capacitor C2; the negative electrode of the diode D3 is connected between the 5th pin of the transformer T1 and the base of the transistor Q3, and the positive electrode of the diode D3 is connected to the source of the main switch field effect transistor; the base of the transistor Q3 is connected to the 5th pin of the transformer T1, and the collector of the transistor Q3 is connected between the negative electrode of the diode D2 and the capacitor C2, and the The emitter of the transistor Q3 is connected to the source of the main switch field effect transistor; the voltage stabilizing diode DV1 is connected in parallel to both ends of the capacitor C2; one end of the resistor R6 is connected between the cathode of the diode D2 and the capacitor C2, and the other end of the resistor R6 is connected to the cathode of the diode D3, the 5th pin of the transformer T1 and the base of the transistor Q3; one end of the resistor R7 is connected to the capacitor C2, and the other end of the resistor R7 is connected to the gate of the main switch field effect transistor; one end of the resistor R8 is connected to the anode of the diode D4, and the other end of the resistor R8 is connected between the resistor R7 and the gate of the main switch field effect transistor; the cathode of the diode D4 is the source of the main switch field effect transistor.

One or more embodiments of the present application disclose a half-bridge topology switching power supply. The half-bridge topology switching power supply includes a driving circuit of the switching power supply, and the driving circuit of the switching power supply includes: a processor, an upper arm driving circuit and a lower arm driving circuit; the processor sends a pulse width modulation signal to the upper arm driving circuit and the lower arm driving circuit respectively; the upper arm driving circuit includes: a potential conversion circuit, a totem pole discharge circuit, a semi-push-pull driving circuit and a field effect transistor gate discharge circuit; the processor sends a pulse width modulation signal to the potential conversion circuit; the potential conversion circuit is electrically connected to the totem pole discharge circuit; the totem pole discharge circuit is electrically connected to the semi-push-pull driving circuit; the semi-push-pull driving circuit is electrically connected to the field effect transistor gate discharge circuit; the potential conversion circuit is used to amplify the voltage value of the pulse width modulation signal; the totem pole discharge circuit is used to amplify the current value of the pulse width modulation signal; the semi-push-pull driving circuit is used to output a positive voltage in the on state; the field effect transistor gate discharge circuit is used to discharge to the field effect transistor gate; the lower arm driving circuit has the same structure as the upper arm driving circuit.

One or more embodiments of the present application disclose an electronic device, wherein the electronic device is provided with a half-bridge topology switching power supply, the half-bridge topology switching power supply includes a driving circuit of the switching power supply, and the driving circuit of the switching power supply includes: a processor, an upper arm driving circuit and a lower arm driving circuit; the processor sends a pulse width modulation signal to the upper arm driving circuit and the lower arm driving circuit respectively; the upper arm driving circuit includes: a potential conversion circuit, a totem pole discharge circuit, a semi-push-pull driving circuit and a field effect transistor gate discharge circuit; the processor sends a pulse width modulation signal to the potential conversion circuit; the potential conversion circuit is electrically connected to the totem pole discharge circuit; the totem pole discharge circuit is electrically connected to the semi-push-pull driving circuit; the semi-push-pull driving circuit is electrically connected to the field effect transistor gate discharge circuit; the potential conversion circuit is used to amplify the voltage value of the pulse width modulation signal; the totem pole discharge circuit is used to amplify the current value of the pulse width modulation signal; the semi-push-pull driving circuit is used to output a positive voltage in a conducting state; the field effect transistor gate discharge circuit is used to discharge to the field effect transistor gate; the lower arm driving circuit has the same structure as the upper arm driving circuit.

Compared with the prior art, the technical solution disclosed in this application has the following beneficial effects:

In an embodiment of the present application, the pulse width modulation signal (PWM signal) sent by the processor to the upper arm drive circuit enters the potential conversion circuit. Since the power supply voltage of the processor is generally 5V, the voltage peak of the pulse width modulation signal coming out of the processor is lower than 5V. If the semi-push-pull drive circuit is directly driven by the voltage peak, the voltage requirement of the semi-push-pull drive circuit cannot be met. In an embodiment of the present application, the voltage value of the pulse width modulation signal is amplified by the potential conversion circuit, and the current value of the pulse width modulation signal is amplified by the totem pole discharge circuit, so that the semi-push-pull drive circuit can reach the on state and output a positive voltage. Then the semi-push-pull drive circuit can drive the main switch field effect transistor of the half-bridge topology switching power supply. In an embodiment of the present application, the drive circuit of the switching power supply forms a dual transformer drive scheme through the upper arm drive circuit and the lower arm drive circuit, and the drive waveform of the upper arm drive circuit does not interfere with the drive waveform of the lower arm drive circuit, and it is not easy to burn out the main switch field effect transistor of the half-bridge topology switching power supply. In addition, the driving circuit wiring of the switching power supply is simple, the signal output end and the signal input end are almost synchronized, and the use conditions of a half-bridge topology switching power supply with three-phase power input can also be met.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

FIG1 is a schematic diagram of a driving circuit of a switching power supply in an embodiment of the present application;

FIG. 2 is a specific structural diagram of a driving circuit of a switching power supply in an embodiment of the present application.

Description of reference numerals:

DETAILED DESCRIPTION

In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present application more thorough and comprehensive.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

At present, the driving technologies for the main switch field effect transistor of the half-bridge topology switching power supply include optocoupler drive, non-isolated bootstrap drive and single transformer drive. The above three driving methods each have their own disadvantages. Among them, the optocoupler drive requires two isolated power supplies to supply power to the upper and lower arm drive circuit ICs respectively, which increases the difficulty of the secondary power supply and the overall wiring. In addition, the output end of the driving optocoupler will lag behind the signal input end by about 500ns, which is a big technical defect for the half-bridge topology switching power supply with a switching frequency higher than 100KHZ, resulting in the inability to use this driving scheme. Non-isolated bootstrap drives are all dedicated IC solutions, such as IR2101, and there are many models to choose from, but the voltage difference between the upper and lower arms is less than 600V, which cannot meet the use conditions of the half-bridge topology switching power supply with three-phase power input. The disadvantage of the single transformer solution is that the driving waveforms of the upper and lower arm drive circuits will interfere with each other because they come from the same transformer, which will cause the main switch field effect tube to burn in severe cases.

An embodiment of the present application discloses a driving circuit of a switching power supply.

Refer to FIG. 1 , which is a schematic diagram of a driving circuit of a switching power supply in an embodiment of the present application.

As shown in FIG1 , the driving circuit of the switching power supply includes: a processor 100, an upper arm driving circuit 200 and a lower arm driving circuit 300; the processor 100 sends a pulse width modulation signal to the upper arm driving circuit 200 and the lower arm driving circuit 300 respectively; the upper arm driving circuit 200 includes: a potential conversion circuit 210, a totem pole discharge circuit 220, a semi-push-pull driving circuit 230 and a field effect transistor gate discharge circuit 240; the processor 100 sends a pulse width modulation signal to the potential conversion circuit 210; the potential conversion circuit 210 and the totem pole discharge circuit 2 20 is electrically connected; the totem pole discharge circuit 220 is electrically connected to the semi-push-pull drive circuit 230; the semi-push-pull drive circuit 230 is electrically connected to the field effect transistor gate discharge circuit 240; the potential conversion circuit 210 is used to amplify the voltage value of the pulse width modulation signal; the totem pole discharge circuit 220 is used to amplify the current value of the pulse width modulation signal; the semi-push-pull drive circuit 230 is used to output a positive voltage in the on state; the field effect transistor gate discharge circuit 240 is used to discharge to the field effect transistor gate; the lower arm drive circuit 300 has the same structure as the upper arm drive circuit 200.

In an embodiment of the present application, the pulse width modulation signal (PWM signal) sent by the processor 100 to the upper arm drive circuit 200 enters the potential conversion circuit 210. Since the power supply voltage of the processor 100 is generally 5V, the voltage peak of the pulse width modulation signal coming out of the processor 100 is lower than 5V. If the semi-push-pull drive circuit 230 is directly driven by the voltage peak, the voltage requirement of the semi-push-pull drive circuit 230 cannot be met. In an embodiment of the present application, the voltage value of the pulse width modulation signal is amplified by the potential conversion circuit 210, and the current value of the pulse width modulation signal is amplified by the totem pole discharge circuit 220, so that the semi-push-pull drive circuit 230 can reach the on state and output a positive voltage. Then the semi-push-pull drive circuit 230 can drive the main switch field effect transistor of the half-bridge topology switching power supply. In the embodiment of the present application, the driving circuit of the switching power supply forms a dual transformer driving scheme through the upper arm driving circuit 200 and the lower arm driving circuit 300, and the driving waveform of the upper arm driving circuit 200 will not interfere with the driving waveform of the lower arm driving circuit 300, and it is not easy to burn out the main switch field effect transistor of the half-bridge topology switching power supply. In addition, the driving circuit wiring of the switching power supply is simple, the signal output end and the signal input end are almost synchronized, and it can also meet the use conditions of the half-bridge topology switching power supply with three-phase electrical input.

Refer to FIG. 2 , which is a specific structural diagram of a driving circuit of a switching power supply in an embodiment of the present application.

As shown in FIG. 2 , the potential conversion circuit 210 includes: a comparator U1A, a resistor R1, a resistor R2, a resistor R3 and a capacitor C1; the pulse width modulation signal emitted by the processor 100 is input into the non-inverting input terminal of the comparator U1A; one end of the resistor R1 is connected to a power supply, and the other end of the resistor R1 is connected to one end of the resistor R2; the other end of the resistor R2 is grounded; the capacitor C1 is connected in parallel to both ends of the resistor R2; the inverting input terminal of the comparator U1A is connected between the resistor R1 and the resistor R2; the output terminal of the comparator U1A is connected to the totem pole discharge circuit 220; one end of the resistor R3 is connected to the output terminal of the comparator U1A, and the other end of the resistor R3 is connected to the power input terminal of the totem pole discharge circuit 220.

As shown in FIG. 2 , the totem pole discharge circuit 220 includes: a transistor Q1, a transistor Q2, a resistor R4 and a resistor R5; the base of the transistor Q1 is connected to the output end of the comparator U1A, the collector of the transistor Q1 is connected to the power input end of the totem pole discharge circuit 220, and the emitter of the transistor Q1 is connected to the collector of the transistor Q2; the base of the transistor Q2 is connected to the output end of the comparator U1A, and the emitter of the transistor Q2 is grounded; one end of the resistor R4 is connected between the emitter of the transistor Q1 and the collector of the transistor Q2, and the other end of the resistor R4 is connected to the semi-push-pull drive circuit 230; one end of the resistor R5 is grounded, and the other end of the resistor R5 is connected to the semi-push-pull drive circuit 230.

As shown in FIG. 2 , the semi-push-pull driving circuit 230 includes: a field effect transistor M1, a transformer T1, and a diode D1; the gate of the field effect transistor M1 is connected to the resistor R4 and the resistor R5, the drain of the field effect transistor M1 is connected to pin 1 of the transformer T1, and the source of the field effect transistor M1 is grounded; pin 2 of the transformer T1 is grounded, pin 3 of the transformer T1 is connected to the cathode of the diode D1, pins 4 and 5 of the transformer T1 are connected to the field effect transistor gate discharge circuit 240; the anode of the diode D1 is grounded.

As shown in FIG. 2 , the field effect transistor gate discharge circuit 240 includes: a diode D2, a diode D3, a diode D4, a transistor Q3, a voltage stabilizing diode DV1, a capacitor C2, a resistor R6, a resistor R7 and a resistor R8; the positive electrode of the diode D2 is connected to the 4th pin of the transformer T1, and the negative electrode of the diode D2 is connected to the capacitor C2; the negative electrode of the diode D3 is connected between the 5th pin of the transformer T1 and the base of the transistor Q3, and the positive electrode of the diode D3 is connected to the source (M3-S) of the main switch field effect transistor; the base of the transistor Q3 is connected to the 5th pin of the transformer T1, and the collector of the transistor Q3 is connected between the negative electrode of the diode D2 and the capacitor C2, and the The emitter of the tube Q3 is connected to the source of the main switch field effect tube; the voltage regulator diode DV1 is connected in parallel to the two ends of the capacitor C2; one end of the resistor R6 is connected between the cathode of the diode D2 and the capacitor C2, and the other end of the resistor R6 is connected to the cathode of the diode D3, the 5th pin of the transformer T1 and the base of the transistor Q3; one end of the resistor R7 is connected to the capacitor C2, and the other end of the resistor R7 is connected to the gate (M3-G) of the main switch field effect tube; one end of the resistor R8 is connected to the anode of the diode D4, and the other end of the resistor R8 is connected between the resistor R7 and the gate of the main switch field effect tube; the cathode of the diode D4 is the source of the main switch field effect tube.

Please refer to the circuit scheme in FIG. 2 for understanding the structure of the lower arm driving circuit 300 .

Continuing to refer to FIG. 2 , the resistor R1 , the resistor R2 , and the capacitor C1 form a resistor voltage divider circuit, and the resistor voltage divider circuit makes the voltage drop of the resistor R2 be 1V to 3V.

Continuing to refer to FIG. 2 , the current of the comparator U1A is about 10 mA, and the resistance value of the resistor R3 is VCC/10 mA.

2 , the field effect transistor M1 is an N-channel field effect transistor with a current of 3A to 6A and a withstand voltage range of 50V to 100V.

2 , the diode D2 and the diode D3 are fast recovery diodes, or Schottky diodes. The current of the diode D2 and the diode D3 is 1A, and the withstand voltage is greater than 50V.

Continuing to refer to Figure 2, in order to allow the transistor Q3 to quickly discharge M3-G, the resistance of the resistor R6 cannot be too large, generally between 470Ω and 1000Ω. Continuing to refer to Figure 2, the voltage regulator diode DV1 is generally selected to be 5.1V/0.5W. The capacitor C2 is 0.1 microfarad to 1 microfarad.

Continuing to refer to FIG. 2 , the resistor R3 is generally selected to be 10Ω to 100Ω.

Continuing to refer to Figure 2, the resistor R8 and the diode D4 constitute an unbalanced charge in the switch state. In the on state, the resistor R8 and the diode D4 charge the capacitor C2. In the on state, the current loop is: pin 4 of transformer T1 → diode D2 → capacitor C2, voltage regulator diode DV1 → (M3-G, M3-S) // (resistor R8, diode D4) → diode D3 → pin 5 of transformer T1. In the off state, the diode D4 is cut off, and the capacitor C2 stores a constant amount of electricity to form a negative voltage when it is turned off. In the off state, the current loop is: M3-G → resistor R7 → capacitor C2 → resistor R6, transistor Q3 → M3-S.

Continuing to refer to FIG2, when the transformer T1 works in the forward state, the diode D1 assists the transformer T1 in completing magnetic reset. The working condition of the semi-push-pull drive circuit 230 is that the maximum duty cycle of the pulse width modulation signal is 50%. When the maximum duty cycle of the pulse width modulation signal is greater than 50%, the transformer T1 cannot complete magnetic reset. The pulse width modulation signals of the upper arm drive circuit 200 and the lower arm drive circuit 300 of the drive circuit of the switching power supply are both less than 50%, which meets the condition for the transformer T1 to complete magnetic reset.

2 , the capacitor C2 , the voltage stabilizing diode DV1 , the resistor R8 , and the diode D4 form a negative voltage generating circuit, which provides a negative voltage turn-off voltage for the main switch field effect transistor, thereby improving anti-interference performance.

An embodiment of the present application discloses a half-bridge topology switching power supply.

In combination with Figures 1 and 2, the half-bridge topology switching power supply includes a driving circuit of the switching power supply, and the driving circuit of the switching power supply includes: a processor 100, an upper arm driving circuit 200 and a lower arm driving circuit 300; the processor 100 sends a pulse width modulation signal to the upper arm driving circuit 200 and the lower arm driving circuit 300 respectively.

The upper arm driving circuit 200 includes: a potential conversion circuit 210, a totem pole discharge circuit 220, a semi-push-pull driving circuit 230 and a field effect transistor gate discharge circuit 240; the processor 100 sends a pulse width modulation signal to the potential conversion circuit 210; the potential conversion circuit 210 is electrically connected to the totem pole discharge circuit 220; the totem pole discharge circuit 220 is electrically connected to the semi-push-pull driving circuit 230; the semi-push-pull driving circuit 230 is electrically connected to the field effect transistor gate discharge circuit 240.

The potential conversion circuit 210 is used to amplify the voltage value of the pulse width modulation signal; the totem pole discharge circuit 220 is used to amplify the current value of the pulse width modulation signal; the semi-push-pull drive circuit 230 is used to output a positive voltage in the on state; the field effect transistor gate discharge circuit 240 is used to discharge to the field effect transistor gate; the lower arm drive circuit 300 has the same structure as the upper arm drive circuit 200.

Furthermore, the potential conversion circuit 210 includes: a comparator U1A, a resistor R1, a resistor R2, a resistor R3 and a capacitor C1; the pulse width modulation signal emitted by the processor 100 is input into the non-inverting input terminal of the comparator U1A; one end of the resistor R1 is connected to a power supply, and the other end of the resistor R1 is connected to one end of the resistor R2; the other end of the resistor R2 is grounded; the capacitor C1 is connected in parallel to both ends of the resistor R2; the inverting input terminal of the comparator U1A is connected between the resistor R1 and the resistor R2; the output terminal of the comparator U1A is connected to the totem pole discharge circuit 220; one end of the resistor R3 is connected to the output terminal of the comparator U1A, and the other end of the resistor R3 is connected to the power input terminal of the totem pole discharge circuit 220.

Furthermore, the totem pole discharge circuit 220 includes: a transistor Q1, a transistor Q2, a resistor R4 and a resistor R5; the base of the transistor Q1 is connected to the output end of the comparator U1A, the collector of the transistor Q1 is connected as the power input end of the totem pole discharge circuit 220, and the emitter of the transistor Q1 is connected to the collector of the transistor Q2; the base of the transistor Q2 is connected to the output end of the comparator U1A, and the emitter of the transistor Q2 is grounded; one end of the resistor R4 is connected between the emitter of the transistor Q1 and the collector of the transistor Q2, and the other end of the resistor R4 is connected to the semi-push-pull drive circuit 230; one end of the resistor R5 is grounded, and the other end of the resistor R5 is connected to the semi-push-pull drive circuit 230.

Furthermore, the semi-push-pull driving circuit 230 includes: a field effect transistor M1, a transformer T1 and a diode D1; the gate of the field effect transistor M1 is connected to the resistor R4 and the resistor R5, the drain of the field effect transistor M1 is connected to pin 1 of the transformer T1, and the source of the field effect transistor M1 is grounded; pin 2 of the transformer T1 is grounded, pin 3 of the transformer T1 is connected to the cathode of the diode D1, pins 4 and 5 of the transformer T1 are connected to the field effect transistor gate discharge circuit 240; the anode of the diode D1 is grounded.

Further, the field effect transistor gate discharge circuit 240 includes: a diode D2, a diode D3, a diode D4, a transistor Q3, a voltage regulator diode DV1, a capacitor C2, a resistor R6, a resistor R7 and a resistor R8; the positive electrode of the diode D2 is connected to the 4th pin of the transformer T1, and the negative electrode of the diode D2 is connected to the capacitor C2; the negative electrode of the diode D3 is connected between the 5th pin of the transformer T1 and the base of the transistor Q3, and the positive electrode of the diode D3 is connected to the source (M3-S) of the main switch field effect transistor; the base of the transistor Q3 is connected to the 5th pin of the transformer T1, and the collector of the transistor Q3 is connected between the negative electrode of the diode D2 and the capacitor C2, and the transistor Q The emitter of 3 is connected to the source of the main switch field effect transistor; the voltage regulator diode DV1 is connected in parallel to the two ends of the capacitor C2; one end of the resistor R6 is connected between the cathode of the diode D2 and the capacitor C2, and the other end of the resistor R6 is connected to the cathode of the diode D3, the 5th pin of the transformer T1 and the base of the transistor Q3; one end of the resistor R7 is connected to the capacitor C2, and the other end of the resistor R7 is connected to the gate (M3-G) of the main switch field effect transistor; one end of the resistor R8 is connected to the anode of the diode D4, and the other end of the resistor R8 is connected between the resistor R7 and the gate of the main switch field effect transistor; the cathode of the diode D4 is the source of the main switch field effect transistor.

An embodiment of the present application discloses an electronic device.

In conjunction with FIG. 1 and FIG. 2 , the electronic device is provided with a half-bridge topology switching power supply, and the half-bridge topology switching power supply includes a driving circuit of the switching power supply. The driving circuit of the switching power supply includes: a processor 100, an upper arm driving circuit 200, and a lower arm driving circuit 300; the processor 100 sends a pulse width modulation signal to the upper arm driving circuit 200 and the lower arm driving circuit 300, respectively.

The upper arm driving circuit 200 includes: a potential conversion circuit 210, a totem pole discharge circuit 220, a semi-push-pull driving circuit 230 and a field effect transistor gate discharge circuit 240; the processor 100 sends a pulse width modulation signal to the potential conversion circuit 210; the potential conversion circuit 210 is electrically connected to the totem pole discharge circuit 220; the totem pole discharge circuit 220 is electrically connected to the semi-push-pull driving circuit 230; the semi-push-pull driving circuit 230 is electrically connected to the field effect transistor gate discharge circuit 240.

The potential conversion circuit 210 is used to amplify the voltage value of the pulse width modulation signal; the totem pole discharge circuit 220 is used to amplify the current value of the pulse width modulation signal; the semi-push-pull drive circuit 230 is used to output a positive voltage in the on state; the field effect transistor gate discharge circuit 240 is used to discharge to the field effect transistor gate; the lower arm drive circuit 300 has the same structure as the upper arm drive circuit 200.

Furthermore, the potential conversion circuit 210 includes: a comparator U1A, a resistor R1, a resistor R2, a resistor R3 and a capacitor C1; the pulse width modulation signal emitted by the processor 100 is input into the non-inverting input terminal of the comparator U1A; one end of the resistor R1 is connected to a power supply, and the other end of the resistor R1 is connected to one end of the resistor R2; the other end of the resistor R2 is grounded; the capacitor C1 is connected in parallel to both ends of the resistor R2; the inverting input terminal of the comparator U1A is connected between the resistor R1 and the resistor R2; the output terminal of the comparator U1A is connected to the totem pole discharge circuit 220; one end of the resistor R3 is connected to the output terminal of the comparator U1A, and the other end of the resistor R3 is connected to the power input terminal of the totem pole discharge circuit 220.

Furthermore, the totem pole discharge circuit 220 includes: a transistor Q1, a transistor Q2, a resistor R4 and a resistor R5; the base of the transistor Q1 is connected to the output end of the comparator U1A, the collector of the transistor Q1 is connected as the power input end of the totem pole discharge circuit 220, and the emitter of the transistor Q1 is connected to the collector of the transistor Q2; the base of the transistor Q2 is connected to the output end of the comparator U1A, and the emitter of the transistor Q2 is grounded; one end of the resistor R4 is connected between the emitter of the transistor Q1 and the collector of the transistor Q2, and the other end of the resistor R4 is connected to the semi-push-pull drive circuit 230; one end of the resistor R5 is grounded, and the other end of the resistor R5 is connected to the semi-push-pull drive circuit 230.

Furthermore, the semi-push-pull driving circuit 230 includes: a field effect transistor M1, a transformer T1 and a diode D1; the gate of the field effect transistor M1 is connected to the resistor R4 and the resistor R5, the drain of the field effect transistor M1 is connected to pin 1 of the transformer T1, and the source of the field effect transistor M1 is grounded; pin 2 of the transformer T1 is grounded, pin 3 of the transformer T1 is connected to the cathode of the diode D1, pins 4 and 5 of the transformer T1 are connected to the field effect transistor gate discharge circuit 240; the anode of the diode D1 is grounded.

Further, the field effect transistor gate discharge circuit 240 includes: a diode D2, a diode D3, a diode D4, a transistor Q3, a voltage regulator diode DV1, a capacitor C2, a resistor R6, a resistor R7 and a resistor R8; the positive electrode of the diode D2 is connected to the 4th pin of the transformer T1, and the negative electrode of the diode D2 is connected to the capacitor C2; the negative electrode of the diode D3 is connected between the 5th pin of the transformer T1 and the base of the transistor Q3, and the positive electrode of the diode D3 is connected to the source (M3-S) of the main switch field effect transistor; the base of the transistor Q3 is connected to the 5th pin of the transformer T1, and the collector of the transistor Q3 is connected between the negative electrode of the diode D2 and the capacitor C2, and the transistor Q The emitter of 3 is connected to the source of the main switch field effect transistor; the voltage regulator diode DV1 is connected in parallel to the two ends of the capacitor C2; one end of the resistor R6 is connected between the cathode of the diode D2 and the capacitor C2, and the other end of the resistor R6 is connected to the cathode of the diode D3, the 5th pin of the transformer T1 and the base of the transistor Q3; one end of the resistor R7 is connected to the capacitor C2, and the other end of the resistor R7 is connected to the gate (M3-G) of the main switch field effect transistor; one end of the resistor R8 is connected to the anode of the diode D4, and the other end of the resistor R8 is connected between the resistor R7 and the gate of the main switch field effect transistor; the cathode of the diode D4 is the source of the main switch field effect transistor.

When the technical solutions in the above-mentioned various embodiments are implemented by software, the computer instructions and/or data implementing the above-mentioned various embodiments can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a readable medium. Computer-readable media include computer storage media and communication media, wherein the communication medium includes any medium that is convenient for transmitting a computer program from one place to another. The storage medium can be any available medium that a computer can store. Taking this as an example but not limited to this: the computer-readable medium can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage medium or other magnetic storage device, or any other medium that can carry or store the desired program code in the form of an instruction or data structure and can be accessed by a computer. In addition, any connection can be appropriately a computer-readable medium. For example, if the software is transmitted from a website, a server or other remote source using a coaxial cable, a fiber-optic cable, a twisted pair, a digital subscriber line (DSL) or wireless technologies such as infrared, radio and microwaves, then the coaxial cable, the fiber-optic cable, the twisted pair, the DSL or wireless technologies such as infrared, wireless and microwaves are included in the definition of the medium.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application is described in detail with reference to the above embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the above embodiments can still be modified, or some of the technical features can be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims (5)

1. A drive circuit of a switching power supply, comprising: a processor (100), an upper arm drive circuit (200), and a lower arm drive circuit (300); the processor (100) sends pulse width modulation signals to the upper arm drive circuit (200) and the lower arm drive circuit (300), respectively;

The upper arm driving circuit (200) includes: a potential conversion circuit (210), a totem pole discharge circuit (220), a half push-pull driving circuit (230), and a field effect transistor gate discharge circuit (240); -said processor (100) sending a pulse width modulated signal to said potential conversion circuit (210); the potential conversion circuit (210) is electrically connected with the totem pole discharge circuit (220); the totem pole discharge circuit (220) is electrically connected with the half push-pull driving circuit (230); the half push-pull driving circuit (230) is electrically connected with the field effect transistor grid discharging circuit (240);

The potential conversion circuit (210) is used for amplifying the voltage value of the pulse width modulation signal; the totem pole discharge circuit (220) is used for amplifying the current value of the pulse width modulation signal; the half push-pull driving circuit (230) is used for outputting positive voltage in a conducting state; the field effect transistor grid electrode discharging circuit (240) is used for discharging to the field effect transistor grid electrode;

the lower arm driving circuit (300) is identical in construction to the upper arm driving circuit (200);

The potential conversion circuit (210) includes: comparator U1A, resistor R1, resistor R2, resistor R3, and capacitor C1; a pulse width modulation signal sent by the processor (100) is input to a non-inverting input terminal of the comparator U1A; one end of the resistor R1 is connected with a power supply, and the other end of the resistor R1 is connected with one end of the resistor R2; the other end of the resistor R2 is grounded; the capacitor C1 is connected in parallel with two ends of the resistor R2; the inverting input end of the comparator U1A is connected between the resistor R1 and the resistor R2; the output end of the comparator U1A is connected with the totem pole discharging circuit (220); one end of the resistor R3 is connected with the output end of the comparator U1A, and the other end of the resistor R3 is connected with the power input end of the totem pole discharging circuit (220);

the current of the comparator U1A is 10mA, and the resistance value of the resistor R3 is VCC/10mA;

The totem pole discharge circuit (220) comprises: transistor Q1, transistor Q2, resistor R4 and resistor R5; the base electrode of the triode Q1 is connected with the output end of the comparator U1A, the collector electrode of the triode Q1 is connected with the power input end of the totem pole discharging circuit (220), and the emitter electrode of the triode Q1 is connected with the collector electrode of the triode Q2; the base electrode of the triode Q2 is connected with the output end of the comparator U1A, and the emitting electrode of the triode Q2 is grounded; one end of the resistor R4 is connected between the emitter of the triode Q1 and the collector of the triode Q2, and the other end of the resistor R4 is connected with the half push-pull driving circuit (230); one end of the resistor R5 is grounded, and the other end of the resistor R5 is connected to the half push-pull driving circuit (230);

the half push-pull driving circuit (230) includes: a field effect transistor M1, a transformer T1, and a diode D1; the grid electrode of the field effect tube M1 is connected with the resistor R4 and the resistor R5, the drain electrode of the field effect tube M1 is connected with the 1 pin of the transformer T1, and the source electrode of the field effect tube M1 is grounded; the 2 pin of the transformer T1 is grounded, the 3 pin of the transformer T1 is connected with the cathode of the diode D1, and the 4 pin and the 5 pin of the transformer T1 are connected with the field effect transistor grid discharge circuit (240); the anode of the diode D1 is grounded;

The field effect transistor M1 is an N-channel field effect transistor with current of 3A-6A and withstand voltage of 50V-100V.

2. The driving circuit of a switching power supply according to claim 1, wherein the field effect transistor gate discharge circuit (240) includes: diode D2, diode D3, diode D4, transistor Q3, zener diode DV1, capacitor C2, resistor R6, resistor R7, and resistor R8; the positive electrode of the diode D2 is connected to the 4 pin of the transformer T1, and the negative electrode of the diode D2 is connected with the capacitor C2; the cathode of the diode D3 is connected between the 5 pin of the transformer T1 and the base electrode of the triode Q3, and the anode of the diode D3 is connected with the source electrode of the main switch field effect transistor; the base electrode of the triode Q3 is connected with the 5 pin of the transformer T1, the collector electrode of the triode Q3 is connected between the cathode of the diode D2 and the capacitor C2, and the emitter electrode of the triode Q3 is connected with the source electrode of the main switch field effect transistor; the zener diode DV1 is connected in parallel with two ends of the capacitor C2; one end of the resistor R6 is connected between the cathode of the diode D2 and the capacitor C2, and the other end of the resistor R6 is connected with the cathode of the diode D3, the pin 5 of the transformer T1 and the base electrode of the triode Q3; one end of the resistor R7 is connected with the capacitor C2, and the other end of the resistor R7 is connected with the grid electrode of the main switch field effect transistor; one end of the resistor R8 is connected with the anode of the diode D4, and the other end of the resistor R8 is connected between the resistor R7 and the grid electrode of the main switch field effect transistor; and the cathode of the diode D4 is the source electrode of the main switch field effect transistor.

3. The driving circuit of a switching power supply according to claim 2, wherein the diode D2 and the diode D3 are at least one of a fast recovery diode or a schottky diode, wherein the current of the diode D2 and the diode D3 is 1A, and the withstand voltage is greater than 50V.

4. A half-bridge topology switching power supply comprising the driving circuit of the switching power supply of any one of claims 1 to 3, the driving circuit of the switching power supply comprising: a processor (100), an upper arm drive circuit (200), and a lower arm drive circuit (300); the processor (100) sends pulse width modulation signals to the upper arm drive circuit (200) and the lower arm drive circuit (300), respectively;

The upper arm driving circuit (200) includes: a potential conversion circuit (210), a totem pole discharge circuit (220), a half push-pull driving circuit (230), and a field effect transistor gate discharge circuit (240); -said processor (100) sending a pulse width modulated signal to said potential conversion circuit (210); the potential conversion circuit (210) is electrically connected with the totem pole discharge circuit (220); the totem pole discharge circuit (220) is electrically connected with the half push-pull driving circuit (230); the half push-pull driving circuit (230) is electrically connected with the field effect transistor grid discharging circuit (240);

The potential conversion circuit (210) is used for amplifying the voltage value of the pulse width modulation signal; the totem pole discharge circuit (220) is used for amplifying the current value of the pulse width modulation signal; the half push-pull driving circuit (230) is used for outputting positive voltage in a conducting state; the field effect transistor grid electrode discharging circuit (240) is used for discharging to the field effect transistor grid electrode;

the lower arm driving circuit (300) is identical in construction to the upper arm driving circuit (200).

5. An electronic device on which the half-bridge topology switching power supply according to claim 4 is provided, the half-bridge topology switching power supply including a driving circuit of the switching power supply, characterized in that the driving circuit of the switching power supply includes: a processor (100), an upper arm drive circuit (200), and a lower arm drive circuit (300); the processor (100) sends pulse width modulation signals to the upper arm drive circuit (200) and the lower arm drive circuit (300), respectively;

The upper arm driving circuit (200) includes: a potential conversion circuit (210), a totem pole discharge circuit (220), a half push-pull driving circuit (230), and a field effect transistor gate discharge circuit (240); -said processor (100) sending a pulse width modulated signal to said potential conversion circuit (210); the potential conversion circuit (210) is electrically connected with the totem pole discharge circuit (220); the totem pole discharge circuit (220) is electrically connected with the half push-pull driving circuit (230); the half push-pull driving circuit (230) is electrically connected with the field effect transistor grid discharging circuit (240);

The potential conversion circuit (210) is used for amplifying the voltage value of the pulse width modulation signal; the totem pole discharge circuit (220) is used for amplifying the current value of the pulse width modulation signal; the half push-pull driving circuit (230) is used for outputting positive voltage in a conducting state; the field effect transistor grid electrode discharging circuit (240) is used for discharging to the field effect transistor grid electrode;

the lower arm driving circuit (300) is identical in construction to the upper arm driving circuit (200).