CN110860817A - Solder sheet and power device chip packaging method using same - Google Patents

Abstract

The invention relates to a solder sheet and a power device chip packaging method welded with the solder sheet, and belongs to the technical field of microelectronic device packaging. The solder sheet includes indium and silver, wherein the weight percentage of indium material is 20-40%, and the weight percentage of metallic silver is 60-80%, and the solder sheet is an indium-silver-indium three-layer composite structure. The chip packaging method uses Ag-In as the reaction system, and the low-temperature welding principle of the chip is that in the connection process, the low-melting point metal indium forms a liquid phase and a solid high-melting point metal silver to diffuse or react with each other, and isothermal solidification occurs to form a high-melting point intermetallic compound. High temperature resistant connection is achieved. In the Ag-In system, the intermetallic compound near the In side is AgIn ₂ . With the prolongation of the welding time, the interdiffusion reaction of Ag-In intensifies, and the In ₄ Ag ₉ and Ag ₃ In intermetallic compounds gradually increase and occupy Most of the intermetallic compounds In ₄ Ag ₉ and Ag ₃ In can withstand a high temperature of 660°C, thus realizing high-temperature service of high-power devices.

Description

A solder sheet and a power device chip packaging method welded with the solder sheet

technical field

The invention relates to the technical field of microelectronic device packaging, relates to a solder sheet and a power device chip packaging method welded with the solder sheet, and is particularly suitable for low-temperature packaging of power devices applied in high temperature, high frequency, high power and other environments .

Background technique

In the field of electronic packaging, with the continuous improvement of chip interconnection density and power density, the heat generated by the chip itself is getting higher and higher, and the demand for high temperature resistant connecting materials is increasing. In addition, the service environment of electronic devices is becoming more and more complex, and the importance of chips used in high temperature, high frequency, and high power environments is increasingly prominent, which puts forward higher requirements for the connection materials of the chips, which requires connection materials It can work stably and reliably for a long time in a high temperature environment.

The new high-power device chip can continue to work in a high temperature environment above 200 °C, and can even serve at a high temperature of about 500 °C. However, the maximum allowable service temperature of the device is not only determined by the properties of the chip, but also limited by the chip connection material. New high-power devices not only require high-temperature mechanical strength of connecting materials, but also have the characteristics of low thermal resistance, high heat dissipation efficiency, and strong electrical conductivity, and in order to better match the actual packaging process and avoid device damage, It is also required that the packaging temperature and pressure should not be too high, so it is urgent to develop a high-power chip packaging method that has good electrical and thermal conductivity and meets "low temperature welding, rapid bonding, and high temperature service".

At present, the high-temperature connection technologies of chips mainly include high-temperature solder connection, nano-silver sintering method, solid-liquid interdiffusion connection method, transient liquid phase sintering method, and nanoporous metal thermocompression bonding method. Among them, solder connection and nano-silver sintering are widely used. At present, the widely used high-temperature solder systems mainly include Au-Sn-based, Zn-Al-based, Bi-Ag-based and Sn-Pb-based, but the operating temperature is generally lower than 350 °C, which cannot meet the high-temperature service requirements of new high-power devices. . Nano-silver sintering is a method based on the principle that the melting point of nano-scale metal particles will decrease, which can achieve high-temperature connection at a lower temperature and a certain pressure, but because this method requires greater pressure and longer sintering time, As a result, it is difficult to realize the process, and the production cost increases sharply. In addition, the sintered joint will produce electromigration, so it is not widely used.

SUMMARY OF THE INVENTION

The technical solution of the present invention is to overcome the defects of the existing power device chip packaging, and to provide a solder sheet and a power device chip packaging method welded with the solder sheet. , to achieve "low temperature connection / high temperature service" chip packaging of power devices, which makes the production operation convenient and easy to mass production.

The technical solution of the present invention is: a solder sheet comprising indium and silver, wherein the weight percentage of indium material is 20-40%, and the weight percentage of metallic silver is 60-80%, and the solder sheet is indium -Silver-Indium three-layer composite structure.

The thicknesses of the indium layers are the same.

The thickness of the indium layer is 10-20 microns.

The power device chip packaging method using the above-mentioned solder sheet welding, the method includes the following steps:

(s1), bake and clean the shell of the power device to ensure the cleanliness of the shell;

(s2), stacking the solder sheet on the power device casing, stacking the chip on the solder sheet, and continuously applying a certain pressure, so that the power device casing, the solder sheet and the chip are assembled together; the chip is in contact with the solder sheet Surface with metallized silver layer;

(s3), put the fixed chip and the shell into the vacuum sintering furnace, carry out nitrogen filling-vacuuming for washing, and quickly heat up to 120 ℃ ~ 130 ℃ with the first heating rate for the first preset time, with the second heating rate The temperature increase rate is increased to 150°C to 200°C, and the temperature is maintained for 60 to 240 minutes. After the temperature preservation is completed, it is quickly cooled and taken out to complete the chip sealing.

The second heating rate is lower than the first heating rate.

The pressure is 0.15-0.60Mpa.

The first preset time is 10-15 minutes.

In the step (s1), the outer shell is subjected to nitrogen baking at 150° C. for more than two hours, and then the outer shell is cleaned by argon plasma for more than 240 s.

The step (s2) is realized by using an assembly tool, which includes a pressure block, a centering device, an upper template and a lower template, wherein:

The lower template is a graphite plate with grooves, and the power device shell is fixed and assembled;

The pressure block is a stepped columnar body, which is fixed by the centering device and the upper template. After the upper template and the lower template are clamped, the pressure block is applied to the chip to ensure continuous pressure to the chip during the packaging process;

The centering device is a graphite plate with a through hole, which positions the pressure block in the circumferential direction;

The upper template is a graphite plate with stepped holes, the pressure block is positioned in the circumferential direction and the axial direction, and is matched and positioned with the lower template through positioning pins.

The pressure block is made of stainless steel.

The beneficial effects of the present invention compared with the prior art are:

(1) The solder sheet provided by the present invention is a solid metal solder sheet with an indium-silver-indium three-layer composite structure, which is convenient for process control and production assembly compared to the existing paste solder.

(2) The weight percentage of the indium material of the solder sheet provided by the present invention is 20-40%, which reduces the melting point of the solder sheet, greatly reduces the chip sealing temperature, and can realize the low temperature (150-200°C), fast and low temperature of the chip and the shell substrate. (60 ~ 240min) welding, and the main components of the chip bonding area after welding are In ₄ Ag ₉ and Ag ₃ In, with high melting point, the obtained power device chip has the characteristics of high temperature resistance (500 ~ 660 ℃), which improves the high-temperature service of high-power devices. ability.

(3) In the welding method of the present invention, the welding pressure is 0.15-0.60 Mpa, the tooling is easy to implement, and the damage to the chip is reduced.

(4) The present invention also provides a chip assembly tool. By applying a solid pressure block counterweight, the power device chips can be quickly sealed (60-240min) under a small pressure of 0.15-0.60Mpa, which greatly improves the production. Efficiency and process achievability.

(5) Using the rapid low-temperature chip welding method provided by the present invention, the chip welding area is firmly bonded after welding, and the chip shear strength is as high as 24.6Mpa or more.

(6) The rapid low-temperature chip welding method provided by the present invention realizes low-temperature welding and high-temperature service, breaks through the technical bottleneck of high welding temperature and low operating temperature of traditional solders such as Au-Sn and Sn-Pb, and provides power devices in high temperature, The application in high frequency, high power and other environments provides a new solution, which is of great significance to solve the low temperature and high strength sealing in the field of microelectronic devices.

Description of drawings

Fig. 1 is the structural composition of the welding sheet of the embodiment of the present invention;

FIG. 2 is a schematic diagram of assembling a chip and a shell of a chip welding method according to an embodiment of the present invention;

Detailed ways

The present invention will be described in detail below with reference to the accompanying drawings and embodiments.

The invention provides a new high-power device chip packaging method, which adopts Ag-In series materials to realize low-temperature welding and high-temperature service chip welding. The basic principle is: the method of chip welding uses Ag-In as the reaction system, and the low-temperature welding principle of the chip is that the low melting point metal indium forms a liquid phase and a solid high melting point metal silver during the connection process. Inter compound to achieve high temperature connection. In the Ag-In system, the intermetallic compound near the In side is AgIn ₂ . With the prolongation of the welding time, the internal interdiffusion reaction of Ag-In intensifies, and the In ₄ Ag ₉ and Ag ₃ In intermetallic compounds gradually increase and occupy Most of the intermetallic compounds In ₄ Ag ₉ and Ag ₃ In can withstand a high temperature of 660°C, thus realizing high-temperature service of high-power devices.

In the above packaging method, the solder sheet used in the present invention adopts Ag-In series materials, including indium and silver, wherein the weight percentage of indium material is 20-40%, and the weight percentage of metallic silver is 60-80%. As shown in FIG. 1 , the solder sheet is an indium-silver-indium (In-Ag-In) three-layer preformed composite structure. The thicknesses of the indium layers are the same. The thickness of the indium layers on both sides is 10-20 microns. The silver layer is 30-100 microns.

In the power device chip packaging method of solder sheet welding, the chip welding and sealing process includes shell processing, chip assembly, and process route setting. Specifically:

(s1), shell treatment: bake and clean the shell of the power device to ensure the cleanliness of the shell; the shell can be baked with nitrogen at 150°C for more than two hours, and then the shell is cleaned by argon plasma for more than 240s;

(s2), chip assembly: the solder sheet 7 is stacked on the power device casing 5, the chip 6 is stacked on the solder sheet 7, and a certain pressure is continuously applied, so that the power device casing 5, the solder sheet 7 and the chip 6 Assembled together; the contact surface of the chip 6 and the solder piece 7 is provided with a metallized silver layer;

As shown in Figure 2, this step is realized by an assembly tool, which is convenient for mass production. The assembly tooling includes a pressure block, a centering device, an upper template and a lower template, wherein:

The lower template is a graphite plate with grooves, and the power device shell is fixed and assembled;

The pressure block 1 is a stepped columnar body, which is fixed by the centering device and the upper template. After the upper template and the lower template are clamped, the pressure block is applied to the chip to ensure that continuous pressure is provided to the chip during the packaging process; the The pressure block is made of stainless steel.

The centering device 2 is a graphite plate with a through hole, which positions the pressure block in the circumferential direction;

The upper template 3 is a graphite plate with stepped holes, which positions the pressure block in the circumferential direction and the axial direction, and cooperates with the lower template through positioning pins for positioning.

(s3), process route setting: put the fixed chip and the shell into the vacuum sintering furnace, carry out nitrogen filling-vacuuming for washing, and rapidly heat up to 120 ℃ ~ 130 ℃ at the first heating rate for the first preset time , the temperature is raised to 150°C to 200°C at the second heating rate, and the temperature is maintained for 60 to 240 minutes. The second heating rate is lower than the first heating rate to reduce the temperature gradient and achieve uniform heating. Generally, the first heating rate is 60-80°C/min, and the second heating rate is 30-40°C/min. The pressure is 0.15-0.60Mpa. The first preset time is 10-15 minutes.

In summary, due to the use of the solder sheet provided by the present invention, the present invention realizes the low temperature (150-200°C) and fast (60-240min) packaging of the chip and the shell substrate, and the high-temperature resistance (500-660°C) is obtained. of power devices.

The technical solution is described below with reference to specific embodiments. The preferred embodiments in the following description are only examples, and other modifications can be obtained by those skilled in the art.

Example 1

(s1), bake the shell with nitrogen at 150°C/2h, and then clean the shell with argon plasma for 240s;

(s2), place the device shell in the lower template of the assembly tool, stack the solder tabs on the shell substrate, stack the chips on the solder tabs, and install the centering device and the upper template on which the pressure block has been placed on the lower template through the positioning pins, Complete chip assembly. The backside of the chip is metallized into a silver layer with a thickness of 3 microns; the thickness of indium on both sides of the selected solder sheet (7) is 10 microns on average, and the thickness of silver in the middle is 85 microns. The weight percentage of indium material is 20%, and the weight percentage of metallic silver is 80%.

(s3), put the fixed chip and the shell into the vacuum sintering furnace, carry out nitrogen filling-vacuuming for 2 times, and rapidly heat up to 120 °C under nitrogen conditions at 80 °C/min for 10 minutes, vacuumize, and vacuum When the temperature is less than 1 mbar, the temperature is raised to 150 °C at 35 °C, and the temperature is maintained for 60 minutes. During the whole process, a pressure of 0.15 Mpa is continuously applied to the chip. After the heat preservation, nitrogen blowing and cooling are completed, and the chip is taken out for sealing.

The shear test of the chip of this embodiment shows that the average shear strength can reach 24.6Mpa.

Example 2

(s1), bake the shell with nitrogen at 150°C/2h, and then clean the shell with argon plasma for 240s;

(s2), place the device shell in the lower template of the assembly tool, stack the solder tabs on the shell substrate, stack the chips on the solder tabs, and install the centering device and the upper template on which the pressure block has been placed on the lower template through the positioning pins, Complete chip assembly. The backside of the chip is metallized into a silver layer with a thickness of 3 microns; the thickness of indium on both sides of the selected solder sheet (7) is 20 microns on average, and the thickness of silver in the middle is 65 microns. The weight percentage of indium material is 40%, and the weight percentage of metallic silver is 60%.

(s3), put the fixed chip and the shell into the vacuum sintering furnace, carry out nitrogen filling-vacuuming for 2 times, and rapidly heat up to 120 °C under nitrogen conditions at 60 °C/min for 15 minutes, vacuumize, vacuumize When the temperature is less than 1 mbar, the temperature is raised to 200 °C at 40 °C, and the temperature is kept for 180 minutes. During the whole process, a pressure of 0.50 Mpa is continuously applied to the chip. After the insulation is completed, nitrogen blowing and cooling are completed, and the chip is taken out for sealing.

The shear test of the chip of this embodiment shows that the average shear strength can reach 26.2Mpa.

Example 3

(s1), bake the shell with nitrogen at 150°C/2h, and then clean the shell with argon plasma for 240s;

(s2), place the device shell in the lower template of the assembly tool, stack the solder tabs on the shell substrate, stack the chips on the solder tabs, and install the centering device and the upper template on which the pressure block has been placed on the lower template through the positioning pins, Complete chip assembly. The backside of the chip is metalized into a silver layer with a thickness of 3 microns; the thickness of indium on both sides of the selected solder sheet (7) is 15 microns on average, and the thickness of silver in the middle is 75 microns. The weight percentage of indium material is 30%, and the weight percentage of metallic silver is 70%.

(s3), put the fixed chip and the shell into a vacuum sintering furnace, carry out nitrogen filling-vacuuming for 2 times, and rapidly heat up to 120 °C under nitrogen conditions at 70 °C/min for 12 minutes, vacuumize, vacuumize When the temperature is less than 1 mbar, the temperature is raised to 180 °C at 30 °C, and the temperature is maintained for 240 min. During the whole process, a pressure of 0.60 Mpa is continuously applied to the chip. After the heat preservation is completed, nitrogen blowing and cooling are completed, and the chip is taken out for sealing.

The chip is subjected to shear test, and the average shear strength can reach 32.4Mpa.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can use the methods and technical contents disclosed above to improve the present invention without departing from the spirit and scope of the present invention. The technical solutions are subject to possible changes and modifications. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solutions of the present invention belong to the technical solutions of the present invention. protected range.

Claims (10)

1. The solder sheet is characterized by comprising 20-40 wt% of indium and 60-80 wt% of metal silver, and the solder sheet is of an indium-silver-indium three-layer composite structure.

2. A solder sheet according to claim 1 wherein the indium layers are of the same thickness.

3. A solder sheet according to claim 1, wherein the indium layer has a thickness of 10 to 20 μm.

4. A method for packaging a power device chip by soldering using the solder sheet as set forth in claim 1, comprising the steps of:

(s1) baking and cleaning the power device shell to ensure the cleanliness of the shell;

(s2) stacking the solder sheet (7) on the power device case (5), stacking the chip (6) on the solder sheet (7), and continuously applying a certain pressure so that the power device case (5), the solder sheet (7), and the chip (6) are assembled together; the contact surface of the chip (6) and the solder sheet (7) is provided with a metalized silver layer;

(s3) placing the fixed chip and the shell into a vacuum sintering furnace, filling nitrogen, vacuumizing, washing gas, rapidly heating to 120-130 ℃ at a first heating rate, preserving heat for a first preset time, heating to 150-200 ℃ at a second heating rate, preserving heat for 60-240 min, rapidly cooling after heat preservation, and taking out to finish chip sealing.

5. The power device chip packaging method according to claim 4, wherein the second temperature rise rate is lower than the first temperature rise rate.

6. The method for packaging the power device chip as claimed in claim 4, wherein the pressure is 0.15MPa to 0.60 MPa.

7. The method for packaging a power device chip soldered with solder bumps as claimed in claim 4, wherein the first predetermined time is 10-15 min.

8. The method for packaging a power device chip soldered with solder pieces as set forth in claim 4, wherein the step (1) comprises baking the housing with nitrogen at 150 ℃ for two or more hours, and then cleaning the housing with argon plasma for 240s or more.

9. The method for packaging a power device chip welded by adopting the solder sheet as claimed in claim 1, wherein the step (2) is realized by adopting an assembly tool, the assembly tool comprises a pressure block, a centering device, an upper template and a lower template, wherein:

the lower template is a graphite plate with a groove, and the power device shell is fixedly assembled;

the pressure block is a step-shaped cylindrical body and is fixed with the upper template through the centering device, and after the upper template and the lower template are assembled, the pressure block is applied to the chip to ensure that continuous pressure is provided for the chip in the packaging process;

the righting device is a graphite plate with a through hole and is used for positioning the pressure block in the circumferential direction;

the upper template is a graphite plate with a stepped hole, positions the pressure block in the circumferential direction and the axial direction, and is matched and positioned with the lower template through a positioning pin.

10. The method of packaging a power device chip by solder bump bonding according to claim 1, wherein the pressure block is made of stainless steel.

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