High-power special power supply fault cascading protection device based on PLC
Technical Field
The invention relates to the technical field of electric technology and power electronics, in particular to a high-power special power supply fault cascading protection device based on a PLC.
Background
Along with the continuous development of scientific research and medical particle accelerator technology, the requirements on accelerator power supplies are higher and higher, and the power supplies have the characteristics of high precision, large capacity, small ripple waves, high reliability and diversified output current waveforms, and generally work cooperatively in a serial, parallel or serial-parallel combination mode. In the prior power supply system, fault linkage between power supplies is only transmitted in a communication mode, and transmission signals are connected through wires, so that electromagnetic interference is often caused to be transmitted between the power supplies, and great trouble is brought to the accuracy and measurement of the power supplies. In a large-voltage and large-current power supply system, along with the increase of the number of power supplies, the requirement on the working reliability of the whole power supply is higher and higher, and the requirement on the response speed of each power supply to faults is also higher and higher. The faults of the power supply are mutually linked through a complex CAN bus communication mode, so that the working requirement of the whole accelerator power supply system CAN not be met, and the technical problems CAN not be solved in the prior art.
Disclosure of Invention
The invention aims to solve the problem of fault cascading protection of special power supplies of high-power particle accelerators in the prior art, and provides a PLC-based high-power special power supply fault cascading protection device for transmitting faults between power supplies in a light mode.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
A high-power special power failure cascading protection device based on a PLC comprises a master controller and a slave controller connected with the master controller, wherein the slave controller is connected with the PLC, a failure input point of the PLC is connected with a failure receiving circuit, a reset output point of the PLC is connected with a failure reset circuit, the other end of the failure receiving circuit is connected with an external failure transmission optical fiber, a power interface of the failure receiving circuit is connected with a voltage conversion circuit, the voltage conversion circuit is connected with a power indication circuit, the power indication circuit is connected with a 24V power supply, a failure output point of the PLC is connected with a failure sending circuit, the failure sending circuit is connected with an external failure transmission optical fiber, the external failure transmission optical fiber is connected with a next failure receiving circuit, and a failure holding circuit is connected between the failure receiving circuit and the failure sending circuit.
Further, the power supply indication circuit comprises an eighth resistor and a light emitting diode which are connected in series, the eighth resistor is connected with the first light emitting diode in series and then connected with the first filter capacitor and the second filter capacitor in parallel on the 24V power supply respectively, the eighth resistor is connected with the positive electrode of the 24V power supply, and the first light emitting diode is connected with the negative electrode of the 24V power supply.
Further, the voltage conversion circuit comprises a first resistor connected with the positive electrode of the 24V power supply, the first resistor is connected with a second resistor, the second resistor is connected with the cathode of the zener diode, the anode of the zener diode is connected with the negative electrode of the 24V power supply, and a 5V power supply output end is connected between the second resistor and the zener diode.
The fault receiving circuit further comprises a receiving optical fiber head, a VCC terminal of the receiving optical fiber head is connected with a fifth resistor, the end of the fifth resistor is further connected with an anode of a 5V power supply, the other end of the fifth resistor is connected with an OUT terminal of the receiving optical fiber head, a first capacitor is further connected in parallel between the VCC terminal of the receiving optical fiber head and a GND terminal, a first diode and a second capacitor are further connected in parallel between the OUT terminal of the receiving optical fiber head and a ground wire, the anode of the first diode is grounded, the OUT terminal of the receiving optical fiber head is further connected with a base electrode of a first triode, a collector electrode of the first triode is grounded, an emitter electrode of the first triode is connected with a No. 2 end of an optical coupler, the No. 1 end of the optical coupler is connected with the anode of the 5V power supply after being connected in series with the sixth resistor, the No. 4 end of the optical coupler is connected with the anode of the 24V power supply, and the No. 3 end of the optical coupler is an output point of a fault signal and is connected with a fault input point of the PLC.
Further, the fault sending circuit comprises a sending optical fiber head, the 2,6,7 terminals of the sending optical fiber head are connected with a fourth resistor, the fourth resistor is connected with a third resistor, the third resistor is connected with a fault output point of the PLC, the 3 rd terminal of the sending optical fiber head is connected with an anode of a second light emitting diode, and a cathode of the second light emitting diode is grounded.
Further, the fault maintaining circuit comprises a seventh resistor connected with an OUT terminal of the receiving optical fiber head, the other end of the seventh resistor is connected with a base electrode of a second triode, an emitting electrode of the second triode is grounded, and a collecting electrode of the second triode is connected with the fault resetting circuit.
Further, the fault reset circuit is a relay, the No. 4 end of the relay is connected with the collector electrode of the second triode, the No. 6 end of the relay is further connected between the third resistor and the fourth resistor through an XSI terminal, the No.1 end of the relay is connected with the reset output point of the PLC, the No. 16 terminal of the relay is grounded, the normally open contact 13 of the relay is connected with the positive electrode of the 24V power supply, and the normally open contact 9 of the relay is connected with the third resistor.
Further, the PLC is in communication connection with the master controller through the slave controller.
Compared with the prior art, the invention has the following beneficial effects:
In the special power supply of the high-power accelerator, the power supply is usually a plurality of single power supplies which are cooperated in a serial, parallel or serial-parallel combination mode, and the control mode usually adopts master and slave control, namely one master controller controls a plurality of slave controllers through communication, and the slave controllers control a PLC through communication and the PLC controls other devices. When the equipment of a certain single power supply fails, the PLC of the single power supply uploads the failure information to the corresponding slave controller through communication, the slave controller uploads the failure information to the master controller through communication, the master controller processes the failure information and then issues the failure information to the slave controllers of other single power supplies, and the slave controllers issue the failure information to the corresponding PLC for processing, so that when the failure information is transmitted through communication, the failure information is processed by a plurality of controllers and the PLC, information transmission delay is generated, and the failure information is possibly lost, so that the equipment in a power supply system of the high-power accelerator cannot be protected in time.
The fault cascading protection device directly concatenates the fault information of the single power supply through the PLC of the single power supply to form another fault transmission channel, and forms double protection with communication transmission, so that the reliability of the high-power special power supply is greatly improved, the response speed of the power supply to faults is accelerated, the power supply can be effectively protected in time, and the occurrence rate of accidents is reduced.
The fault cascading protection device adopts the optical fiber to transmit fault information between the single power supplies in a light mode, isolates electromagnetic interference between the power supplies, and further improves the working reliability of a power supply system.
The fault cascading protection device has the functions of maintaining and resetting fault information, when one piece of power fault information in the cooperative single power supplies is not released, other single power supplies cannot be switched on due to the action of fault cascading, and after the fault is eliminated, the main controller is used for uniformly issuing resetting information to enable all the power supplies to be normally switched on, so that the safety of personnel and equipment is ensured to a certain extent.
The fault interlocking protection device adopts a modularized design, has a standard external interface, and can be randomly configured and installed according to the number of the single power supplies to perform fault interlocking, so that the installation, the debugging and the maintenance are more convenient and quicker.
Drawings
Fig. 1 is a schematic diagram of the power conversion circuit of the present invention.
Fig. 2 is a schematic diagram of the fault chain protection device of the present invention.
Fig. 3 is a system block diagram of an application of the invention.
The reference numerals have the following meanings of 1. A master controller, 2. A PLC, 3. A fault receiving circuit, 4. A fault transmitting circuit, 5. A fault holding circuit, 6. A fault resetting circuit and 7. A slave controller.
Detailed Description
The invention is further described below with reference to the drawings and the detailed description.
As shown in fig. 1-3, a high-power special power failure interlocking protection device based on a PLC comprises a main controller 1 and a plurality of PLCs 2 connected with the main controller 1, wherein the PLCs 2 are in communication connection with the main controller through a slave controller 7. The fault input point of the PLC2 is connected with a fault receiving circuit 3, a fault resetting circuit 6 is connected with the resetting output point of the PLC2, the other end of the fault receiving circuit 3 is connected with an external fault transmission optical fiber, a power interface of the fault receiving circuit 3 is connected with a voltage conversion circuit, the voltage conversion circuit is connected with a power indication circuit, the power indication circuit is connected with a 24V power supply, the fault output point of the PLC2 is connected with a fault transmitting circuit 4, the fault transmitting circuit 4 is connected with an external fault transmission optical fiber, the external fault transmission optical fiber is connected with a next fault receiving circuit 3, and a fault holding circuit 5 is connected between the fault receiving circuit 3 and the fault transmitting circuit 4.
As shown in fig. 1, the power indication circuit includes an eighth resistor R8 and a light emitting diode V2 connected in series, wherein the eighth resistor R8 and the first light emitting diode V2 are connected in series and then connected in parallel with a first filter capacitor C01 and a second filter capacitor C03 respectively to a 24V power supply, the eighth resistor R8 is connected to a positive electrode of the 24V power supply, and the first light emitting diode V2 is connected to a negative electrode of the 24V power supply.
The voltage conversion circuit comprises a first resistor R1 connected with the positive electrode of the 24V power supply, the first resistor R1 is connected with a second resistor R2, the second resistor R2 is connected with the cathode of a voltage stabilizing diode V1, the anode of the voltage stabilizing diode V1 is connected with the negative electrode of the 24V power supply, and a 5V power supply output end is connected between the second resistor R2 and the voltage stabilizing diode V1.
The fault interlocking protection device adopts a 24V power supply to supply power, when the fault interlocking protection device works, the 24V power supply is filtered by the first filter capacitor C01 and the second filter capacitor C03, and is converted into 5V voltage required by a circuit through the voltage-limiting of the first resistor R1 and the second resistor R2 and the voltage-stabilizing diode V1, and a power supply indication circuit formed by the eighth resistor R8 and the first light-emitting diode V2 can display whether the voltage of the power supply is normal or not in real time.
As shown in fig. 2, the fault receiving circuit 3 includes a receiving optical fiber head U1, a VCC terminal of the receiving optical fiber head U1 is connected with a fifth resistor R5, the end of the fifth resistor R5 is further connected with a positive electrode of a 5V power supply, the other end of the fifth resistor R5 is connected with an OUT terminal of the receiving optical fiber head U1, a first capacitor C1 is further connected in parallel between the VCC terminal and a GND terminal of the receiving optical fiber head U1, a first diode V6 and a second capacitor C2 are further connected in parallel between the OUT terminal of the receiving optical fiber head U1 and a ground wire, an anode of the first diode V6 is grounded, an OUT terminal of the receiving optical fiber head U1 is further connected with a base of a first triode V3, a collector of the first triode V3 is grounded, an emitter of the first triode V3 is connected with a number 2 end of an optical coupler V4, the number 1 end of the optical coupler V4 is connected with the positive electrode of the 5V power supply after being connected in series with the sixth resistor R6, a number 4 of the optical coupler V4 is terminated with the positive electrode of the 24V power supply, and a number 3 end of the optical coupler V4 is the output point of a fault signal is the fault point of the PLC 2.
The fault sending circuit 4 comprises a sending optical fiber head U2, the terminals 2,6 and 7 of the sending optical fiber head U2 are connected with a fourth resistor R4, the fourth resistor R4 is connected with a third resistor R3, the third resistor R3 is connected with a fault output point of the PLC2, the terminal 3 of the sending optical fiber head U2 is connected with an anode of a second light emitting diode V7, and a cathode of the second light emitting diode V7 is grounded.
The fault maintaining circuit 5 comprises a seventh resistor R7 connected with the OUT terminal of the receiving optical fiber head U1, the other end of the seventh resistor R7 is connected with the base electrode of a second triode V5, the emitter electrode of the second triode V5 is grounded, and the collector electrode of the second triode V5 is connected with the reset circuit.
The fault reset circuit 6 is a relay K1, the No. 4 end of the relay K1 is connected with the collector electrode of the triode V5, the No. 6 end of the relay K1 is further connected between the third resistor R3 and the fourth resistor R4 through an XSI terminal, the No. 1 end of the relay K1 is connected with the reset output point of the PLC2, the No. 16 terminal of the relay K1 is grounded, the normally open contact 13 of the relay K1 is connected with the positive electrode of the 24V power supply, and the normally open contact 9 of the relay K1 is connected with the third resistor R3.
The port of the PLC 2 shows that the fault output point Q0.1 outputs a low level as faulty and outputs a high level as non-faulty, the reset output point Q0.2 outputs a low level without reset and outputs a high level reset, and the fault receiving point I0.1 receives a low level as faulty and receives a high level as non-faulty.
When the system is initialized, the whole system is required to be initialized by using a reset signal firstly, namely, the main controller 1 sends a reset signal to the PLC 2 through the controller 7, so that a reset output point Q0.2 of the PLC 2 outputs a high-level (the time is 1 s) reset signal, the reset relay K1 is attracted after receiving the reset signal, normally open contacts 13 and 9 of the reset relay K1 are closed, normally closed contacts 4 and 6 are opened, at the moment, a 24V power supply is connected with a fault sending circuit 4 through contacts 13 and 9 of the relay K1, the sending optical fiber head U2 starts to emit light and transmits the light through an optical fiber, meanwhile, a receiving optical fiber head U1 in the fault receiving circuit 3 receives optical signals sent by other fault interlocking devices, and when the receiving optical fiber head U1 receives the optical signals, the 6 end of the receiving optical fiber head U1 outputs a low level, so that a first triode V3 is conducted, the optical coupler V4 is conducted, the 24V (the high level) is fed into a fault receiving point I0.1 of the PLC 2 through the optical coupler V4, the PLC 2 detects no fault, and then the normally closed output point Q0 is detected, the fault output point U1 is continuously conducted, the fault state is continuously conducted, and the system is completely closed, and the state is completely reset, and the fault state is completely is finished.
When the single power supply equipment fails, the local PLC 2 processes the received failure information and outputs low level 0V at a failure output point Q0.1, at the moment, the sending optical fiber head U2 does not emit light due to no driving current, and the failure information is transmitted to a receiving circuit of a failure interlocking device of other single power supplies through an external failure transmission optical fiber.
When the single power supply of the platform receives fault information of other single power supplies, the receiving optical fiber head U1 can not receive optical signals, the No.6 end of the receiving optical fiber head U1 outputs high level, so that the first triode V3 is turned off, the second triode V5 is turned on, after the first triode V3 is turned off, the optical coupler V4 is also turned off, so that 24V cannot be transmitted to a fault receiving point I0.1 of the PLC 2, the fault receiving point I0.1 receives low level, the fault information is transmitted to the local PLC 2, meanwhile, after the second triode V5 is turned on, the potential between the third resistor R3 and the fourth resistor R4 is forcedly pulled to 0V through normally closed points 4 and 6 of the relay K1 and XS1 (short circuit), at the moment, no matter whether the fault output point Q0.1 of the PLC 2 is low level or not, the transmitting optical fiber head U2 cannot emit light, and therefore the fault linkage protection device directly spans the received fault information to the next single power supply through a hardware circuit.
When a fault occurs, the receiving optical fiber head U1 cannot receive an optical signal, the port 6 of the receiving optical fiber head U1 outputs a high level, so that the second triode V5 is always conducted, the potential between the first resistor R3 and the second resistor R4 is forced to be pulled to 0V, the transmitting optical fiber head U2 cannot emit light, the fault is kept, and until reset information exists, the normally closed contacts 4 and 6 are disconnected due to the attraction of the relay K1, and the potential between the first resistor R3 and the second resistor R4 can be kept, so that system fault interlocking information can be eliminated.
Fig. 3 is a system diagram of a fault cascade protection device in the high-power special power supply system, when a device of a 1# single power supply fails, a PLC 2 of the 1# power supply transmits fault information to a fault transmitting circuit 4 of the 1# power supply through a fault output point thereof after processing the fault information, the fault transmitting circuit 4 converts the fault information into an optical signal and transmits the optical signal to a fault receiving circuit 3 of the 2# single power supply, the fault receiving circuit 3 latches and transmits the fault to the fault transmitting circuit 4 through a fault holding circuit 5 while converting the received optical information into electrical information to be processed by the PLC 2 of the 2# power supply, and the fault transmitting circuit 4 transmits the fault information to the next power supply, so that even if the PLC 2 of the 2# power supply does not transmit the fault information, the fault information is continuously transmitted through a hardware circuit and directly spans the processing of the PLC 2 and a controller until all the power supplies receive the fault information. After the fault is removed, the host computer is used for enabling the master controller 1 to uniformly send reset signals to the slave controllers 7 of each power supply, the slave controllers 7 send reset signals to the corresponding PLC, and the PLC sends out reset signals to the corresponding fault interlocking protection devices, so that the whole fault interlocking protection device is restored to an initialized state.